Slides

Status and Plans for Module Production
PXD Telco, July 2016
1
Ladislav Andricek, MPG Halbleiterlabor
PXD9 Sensor Production: 29 Wafers
 PXD9-6: 3 wafers pilot run
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First module assembly, DESY test, gated mode tests
 PXD9-7: 4 wafers pre-production
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Lessons from pilot run incorporated (improved periphery routing)
Modules for Beast2, module pre-production ….
Status: Phase III – Cu electro-plating done,
at inspection, seed layer removal, possibly repair …
 PXD9-8: 9 wafers, main production I
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Final modules
Status: Phase II – Lithography of 2nd Metal ongoing
 PXD9-9: 6 wafers, main production II
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Final modules
Status: Phase II - Metal 1 done, on probe station
 PXD9-10: 7 wafers, contingency…
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PXD Telco, July 2016
Status: Phase I finished - on stand-by before Phase II
2
Ladislav Andricek, MPG Halbleiterlabor
PXD9-6 and -7 – combined pixel yield
 Percentage of live pixels
Pilot run
Pre-production
W30
W35
W36
W31
W37
W38
W40
IF
0*
98.44
98.96
98.8
98.4
98.8
100.0
OF1
100.00
98.44
98.96
99.0
98.1
0
99.5
OF2
99.48
98.96
99.48
99.0
0
0
99.3
OB1
97.72
99.40*
0
99.4
98.4
97.9
100.0
OB2
99.48
0
98.96
99.5
99.5
0
99.9
IB
97.92
0
99.48
100.0
99.0
99.0
100.0
Total
83.3%
66.6%
83.3%
100%
83.3%
50%
100%
*failure due to operator error during testing
•
34/42 (80.1%) working sensors
•
25/42 (59.5%) prime grade sensors (>99% pixels)
•
9/42 (21.4%) second grade sensors
PXD Telco, July 2016
3
Ladislav Andricek, MPG Halbleiterlabor
PXD9-6 and -7 – combined pixel yield
 Percentage of live pixels
Pilot run
Pre-production
W30
W35
W36
W31
W37
W38
W40
IF
0*
98.44
ProbeC
98.8
98.4
98.8
100.0
OF1
Pilot
98.44
98.96
99.0
98.1
0
99.5
OF2
Pilot
98.96
99.48
99.0
0
0
99.3
OB1
Pilot
DESY
0
99.4
98.4
97.9
100.0
OB2
Pilot
0
98.96
99.5
99.5
0
99.9
IB
DESY
0
ProbeC
100.0
99.0
99.0
100.0
Total
83.3%
66.6%
83.3%
100%
83.3%
50%
100%
*failure due to operator error during testing
•
34/42 (80.1%) working sensors
•
25/42 (59.5%) prime grade sensors (>99% pixels)
•
9/42 (21.4%) second grade sensors
PXD Telco, July 2016
4
Ladislav Andricek, MPG Halbleiterlabor
Recent assemblies
 W36-IF
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DCDB4 / DHPT1.1 / SWB2.1
Flip Chip successful
Now at SMD at HLL  Probe card tests
 W37-IB
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PXD Telco, July 2016
DCDB4 / DHPT1.1 / SWB2.1
Flip chip problems (operator error at IZM) for 4/6 SWBs
Rework???  SWB2.1 issue …
5
Ladislav Andricek, MPG Halbleiterlabor
Bumping at PacTech
 ENIG process: Electroless Nickel Immersion Gold  UBM
Au
plating
e-Ni
plating
 Solder ball jetting
drop balls and
reflow
 Fully Qualified with SwitcherB18v2.0
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PXD Telco, July 2016
Test production
X-sections, shear tests, test assemblies … all ok!
Assembly of EMCMs, pilot modules, Desy test..
6
Ladislav Andricek, MPG Halbleiterlabor
The new SwitcherB18v2.1
 Bumping (UBM process) causes problems with the new Switcher
 On one pad – the substrate pad – and only on this pad
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Very little or no Nickel deposition
 Main difference to old Switcher
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Chip is larger…
Different passivation (1µm Nitride/Oxide <-> PI)
Guard ring of the chip exposed, connected to bulk
 Different electrochemical potential causes reduced Ni growth on substrate
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Solution: isolate chip edge!
 Manual coating on 70 chips done, was successful but with miserable yield (~30/70)
PXD Telco, July 2016
7
Ladislav Andricek, MPG Halbleiterlabor
Assembling a wafer
 Re-assembly of a “wafer”
1
3
2
4
5
 Test successful
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UBM successful on test wafer with five SWB
Balling was okay
Shear tests passed
 Wafer with 29 chips assembled
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PXD Telco, July 2016
Now at Pactech
Delayed due to administrative issues
8
Ladislav Andricek, MPG Halbleiterlabor
Test Assembly of SWBs to bond adapter
 Adapters assembled for SWB testing on hybrid level
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Three adapters assembled
One assembly done with bad chip (bumping problems)
 Cross-section
 80µm balls  too much solder ….
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Ongoing balling with 60 and 70µm balls
PXD Telco, July 2016
9
Ladislav Andricek, MPG Halbleiterlabor
Test Assembly of SWBs to bond adapter
 Adapters assembled for SWB testing on hybrid level
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Three adapters assembled
One assembly done with bad chip (bumping problems)
 Cross-section
 Delamination between SWB Alu and Ni?
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Not certain that is this real
Could be due to contamination before UBM….
PXD Telco, July 2016
10
Ladislav Andricek, MPG Halbleiterlabor
Switcher bumping: Status
 Only ~10 bumped SwitcherB18v2.1 left at HLL
 Ivan ordered 500 chips more, when will they arrive???
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If the current bumping run is successful, assemble immediately more wafers
 Schedule to get enough good bumped chips is very tight
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Plan to start Phase 2 module assembly first half of August…..
# of modules depends on the outcome of the current bumping at PacTech
The new bumped chips to come have to be tested, very fast!!
Need 24 + spares, have only 39, if the current bumping is successful!!
Also still technical uncertainties!
 Plan B
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As in the past, though painful: Au-stud (HLL) and solder jetting (PacTech) for production
For Phase2 modules: ask Heidelberg, if they can help?
 Plan C
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PXD Telco, July 2016
Accurate wafer assembly at IZM, through mask electro-plating on “wafer level”
Agreed with IZM
11
Ladislav Andricek, MPG Halbleiterlabor
Updated schedule
o
o
PXD Telco, July 2016
12
4 batches: PXD9-7 .. 10
End dates
o PXD9-7 July 2016
o PXD9-8 Nov 2016
o PXD9-9 Dec 2016
o PXD9-10 April 2017
Ladislav Andricek, MPG Halbleiterlabor
Updated schedule
o
o
o
o
o
PXD Telco, July 2016
13
ASICs to be ready end July?
More towards August
DHPT1.2, DCDB4.?
Both tested
SWB2.1 bumped and tested
Ladislav Andricek, MPG Halbleiterlabor
Updated schedule
o
PXD Telco, July 2016
14
Kapton
o 5 sets Pre-prod ordered
o eta mid/end July
o Main order asap
o Need other caps??
Ladislav Andricek, MPG Halbleiterlabor
Updated schedule
o
PXD Telco, July 2016
15
Module pre-production
o 3 L1 and 3 L2 ladders
o Final chip set
o Slowly step-by-step
o FC, SMD, test
o Repeat pilot with larger
sample, practice ….
Ladislav Andricek, MPG Halbleiterlabor
Updated schedule
PXD Telco, July 2016
16
o
Ladder assembly
o Kapton attach
o incl. Module testing
o Ladder assembly
o
o
Phase 2 ladders mid. Oct.
Two spare ladders per layer
Ladislav Andricek, MPG Halbleiterlabor
Summary
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Main target is the DESY setup in autumn
Start assembly of modules ~ mid. August
Sensors on track
ASICs
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DCDB4.x  tests with matrix, decide which one to use, (DCDB4.2?), test on probe station
DHPT1.2  tight schedule, have to be verified on hybrid level, tested on probe station ..
SWB2.1  still issues with bumping, new delivery urgently needed, testing probe station
Flip Chip scheduled, SMDs okay
Probe card testing being qualified on one type (IF/OB)
Kaptons should arrive these days, Kapton assembly beg. of September
Coated jigs????
 Module testing
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At MPP, to start right after kapton attach  ready??
 Ladder assembly September/October
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Never practiced, needs qualification and internal review
 SCB availability (coated), tooling for ladder mount to SCBs, practice …
PXD Telco, July 2016
17
Ladislav Andricek, MPG Halbleiterlabor
backup
PXD Telco, July 2016
18
Ladislav Andricek, MPG Halbleiterlabor
Updated schedule
o
o
PXD Telco, July 2016
19
Main production, FC, SMD, test
o Start w/ PXD9-8
o Earlier w/ PXD9-7 rem.
o 4 modules/week
o 6 weeks L1  24 (16)
o 8 weeks L2  32 (24)
Kapton attach when L1 done
o Can be earlier
o Testing as soon as
module available
o Testing/ladder assembly
interleaved
Ladislav Andricek, MPG Halbleiterlabor
Updated schedule
Ladder assembly, Ladder testing, half shell assembly
o ~25 weeks
PXD commissioning at DESY  New
o 3 months (partly contingency)
Shipment to KEK 1 week
o PXD@KEK 12.10.2017
o
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o
PXD Telco, July 2016
20
Ladislav Andricek, MPG Halbleiterlabor