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Company
Overview
FPGA, ASIC
& Embedded SW
Design Services
Located in
Leuven, Belgium
Version: 2015-06-01
Founded in 1991
About Easics

Easics is a System-on-Chip design company,
targeting designs
in FPGAs and digital & mixed-signal ASICs.
Easics designs reliable and scalable
high-performance & low-power
embedded systems
for leading product companies active in
imaging / image sensors,
medical / healthcare,
industrial, aerospace, multimedia,
wireless & wired connectivity, broadcast,
measurement equipment
Customers:
• OEMs: electronics, optics, mechanics
• Semiconductor companies
• Analog / Mixed-signal IC design houses
© 2015 Easics NV – www.easics.com
Easics company overview
2
3 Pillars of Easics
FPGA-based Optical Sorting Machine
- Real-time Image Processing for Optical Food/Non-Food Sorter
- Pipelined object delineation
- Object tracking
- Object properties
& classification
- position prediction
- Multi-camera
- Combined
HW processing
& real-time SW
See the machine in action:
http://www.youtube.com/watch?v=T3qPgRblbnk
4
Image sensor ASIC for Leica M Camera
- Digital noise reduction
- Integrated on sensor chip
Read the full article:
http://www.dspvalley.com/userfiles/file/4140_DSPValley_NB-dec-jan13_Bookmarks.pdf
5
Real-time image enhancement for thermal camera
- On-the-fly high frame-rate non-uniformity compensation and calibration
(non-uniformity changes with e.g., temperature)
- Minimization problem, implemented on FPGA
6
ASIC for cochlear hearing implant
- External device = microphones + DSP ASIC
+ battery + coil
- Implanted
= coil + ASIC + electrode array
- High reliability & ultra low-power
7
Companion ASIC for high-end scientiic image sensors
DARE User Day @ ESA/ESTEC, 8 December 2014, Noordwijk, the Netherlands
https://indico.esa.int/indico/event/72/session/0/contribution/1/material/slides/0.pdf
•
Radiation hardened
•
Cryogenic temperature operation
•
Fully programmable sequencer
•
16-bit A/D-convertors
•
SpaceWire / RMAP interface
•
Application: space science
& earth observation missions
Cryogenic and radiation hard ASIC design for large format NIR/SWIR detector array @ SPIE, 22-25 September 2014:
http://spie.org/Publications/Proceedings/Paper/10.1117/12.2067184
Bits&Chips Hardware Conference, 12 June 2013, ‘s-Hertogenbosch, the Netherlands:
http://bc-smartsystems.nl/_Resources/Persistent/0dec773c77410423a862b92c1eb1dfac364d544d/Geert%20Verbruggen.pdf
DSP Valley Newsletter, December 2012 / January 2013:
http://www.dspvalley.com/userfiles/file/4140_DSPValley_NB-dec-jan13_Bookmarks.pdf
EE Times, 16 November 2012:
http://www.eetimes.com/document.asp?doc_id=1280138
8
Easics' Business Models
• Project-based design services: FPGA, ASIC, embedded SW
• IP licensing
• R&D as partner or subcontractor in consortia
• Sub-contractor / partner management & selection
– PCB production, assembly and test
– FPGA & ASIC IP cores
– Analog ASIC design
– ASIC production, test, packaging and supply chain management
• Prototype & Product delivery
– assembled & tested PCBs
– packaged & tested ASICs
• Long-term relationship with customers and partners
9
Easics' Approach
• Communication
• Documentation
• Requirements Engineering
• Model Development
• Future-Proof Architecture
• Implementation & Veriication
• Physical validation in the Easics labs
• Cooperation with partners
until prototype and volume production
10
Expertise
•
•
•
•
•
•
•
First-of-a-kind product development
High-performance Digital Signal Processing
Ultra-low power design
SOC / processor integration, HW/SW partitioning
High Reliability
Functional Safety
Fault-Tolerant & Radiation-Hardened design
11
Expertise
• Real-time image processing
• Wireless connectivity:
– full digital datapath from analog front-end
until data packets in and out
• Wired connectivity:
– TCP/IP, xDSL, SDH/SONET, ...
– CoaXPress, USB, EtherCAT, …
– Custom Multi Gbit/s over LVDS I/O
– Traic management, shaping, queueing, switching, routing
– Network processors
12
Expertise in Imaging Systems
illumination
- video/image processing
- vision
- video/image interpretation
Easics' vision/imaging customers include:
- image sensor manufacturers
- camera manufacturers
- system manufacturers
13
Technologies
• FPGA: all-vendors: Altera, Xilinx, Microsemi [Actel], Lattice, …
incl. latest devices: Altera V-series & SoC, Xilinx 7-series & Zynq
• ASIC: foundry-independent, broad range of nodes:
0.35μm, 0.25μm, 0.18μm, 0.13μm, 90nm, 65nm, 40nm, 28nm
TSMC, GLOBALFOUNDRIES, UMC, SMIC, TowerJazz, LFoundry,
ON Semi, ST, NXP, Altis, X-FAB, ams, NEC, …
• Radiation-hardened ASIC: imec/ESA DARE library (UMC 0.18μm),
triple redundancy
• High-Speed links: copper (twisted-pair, coax) & optical iber
• Embedded processors: Altera Nios, Xilinx Microblaze, ARM,
Leon SPARC, PowerPC, NXP CoolFlux, Tensilica/Cadence,
Target/Synopsys, Easics S8 & S16, …
• Embedded operating systems: Linux, eCos, …
• Embedded SW
• PC SW, incl. GUI
• PCB
Our FPGA-centric approach:
FPGA SOC + DRAM + SRAM + power regulation + connectivity
(rather than “heterogeneous system-on-PCB”)
14
Intellectual Property: HW IP Cores for FPGA & ASIC
• TCP/IP & UDP stack
– Fully in HW: requires no processor or software.
Client uses standard TCP/IP driver (no custom driver SW required).
– Available for 10 Gbit/s, 1 Gbit/s and 10/100 Mbit/s
– Eicient, high throughput:
near 100% link utilization (independent of packet size)
– Lowest latency in the industry
– Small & low-cost:
1 Gbit/s version can be mapped on Cyclone & Spartan FPGAs
• Tiny & adaptable microcontroller cores: S8 and S16
– with debug port
– incl. SW development tools
– for integration in mixed-signal ASIC
• …..
15
Contact information
Easics NV
Arenberg Science Park
Gaston Geenslaan 11
3001 Leuven
Belgium
www.easics.com
Contact:
Ramses Valvekens, CEO
ramses@easics.be
Jan Zegers, director
jan.zegers@easics.be
16

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