SC1894 FW4.0.05.00 Release Notes

Transcription

SC1894 FW4.0.05.00 Release Notes Rev1.0
SC1894 FW4.0.05.00 Release Notes
This document contains confidential information proprietary to Scintera, Inc., and is provided under a non-disclosure agreement.
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Unauthorized copying or distribution is prohibited. Scintera™ and RFPAL™ are trademarks of Scintera, Inc. All other trademarks are the property of their
respective owners. No circuit patent licenses are implied. Scintera reserves the right to change its product specifications at any time. © 2012 Scintera, Inc. All
Rights Reserved.
Table of Contents
1. Introduction ................................................................................................................................................ 4
1.1. Overview ............................................................................................................................................. 4
1.2. Scope .................................................................................................................................................. 4
1.3. Current Limitations .............................................................................................................................. 5
1.4. Reference Documents ......................................................................................................................... 5
1.5. Revision History .................................................................................................................................. 5
2. SC1894 Evaluation Kit Setup ..................................................................................................................... 6
2.1. SC1894 Evaluation Board with integrated delay line ........................................................................... 6
2.2. What to look for if performance is lower than expected? ...................................................................... 8
2.3. Signal Generator Considerations for Power Level Change Performance tests .................................... 8
3. SC1894 Hardware Setup ........................................................................................................................... 9
3.1. RFIN and RFFB Levels ....................................................................................................................... 9
3.2. Through Path Delay and Loss ........................................................................................................... 10
3.3. Average Coefficient Indicator............................................................................................................. 12
3.4. Evaluation Board Typical Power Consumption at (25°C) ................................................................... 13
3.4.1. SC1894 Evaluation Board Typical 5V Power Consumption at (25°C) ......................................... 13
3.4.2. SC1894 Evaluation Board Typical 1.8/3.3V Power Consumption at (25°C) ................................ 13
4. SC1894 Operation ................................................................................................................................... 13
4.1. SC1894 GUI ...................................................................................................................................... 14
4.2. IC Configuration ................................................................................................................................ 15
4.3. Frequency Range, Min Frequency, Max Frequency, Center Freq, and Bandwidth ............................ 15
4.3.1. Frequency Range ....................................................................................................................... 15
4.3.2. Changing Frequency Range ....................................................................................................... 15
4.3.3. Min Frequency and Max Frequency ........................................................................................... 15
4.3.4. Changing Min Frequency and Max Frequency ........................................................................... 16
4.3.5. Center Frequency and Bandwidth .............................................................................................. 16
4.4. RFIN and RFFB Power Management Unit (PMU) .............................................................................. 17
4.4.1. PMU Calibration ......................................................................................................................... 17
4.4.2. PMU Update Rate ...................................................................................................................... 19
4.4.3. TDD Considerations – Operation with <100% duty cycle ............................................................ 19
4.4.4. RFIN and RFFB AGC Parameters .............................................................................................. 19
4.5. Firmware Status ................................................................................................................................ 20
4.5.1. Overall Status ............................................................................................................................. 20
4.5.2. Firmware States ......................................................................................................................... 20
4.5.3. Error/Warning Codes .................................................................................................................. 21
4.5.4. GUI Log Files ............................................................................................................................. 21
4.5.5. GUI Collect Dump ...................................................................................................................... 22
4.5.6. Reset.......................................................................................................................................... 22
4.6. Operation Modes ............................................................................................................................... 22
4.6.1. Optimized Correction Mode ........................................................................................................ 22
4.6.2. Smooth Adaptation Mode ........................................................................................................... 22
4.6.2.1. Calibration – Selecting Smooth Adaptation Mode ................................................................... 24
4.6.2.2. Clearing Calibration Parameters ............................................................................................. 24
4.7. Adaptation and Correction Options .................................................................................................... 25
4.7.1. Duty Cycled Feedback ............................................................................................................... 25
4.7.2. Adaptation States ....................................................................................................................... 25
4.7.3. Enabling and Disabling Correction.............................................................................................. 25
4.8. Upgrading SC1894 Firmware ............................................................................................................ 26
4.8.1. GUI function Adding New Firmware to “Available Firmware” list ................................................. 26
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4.8.2. Change Firmware ....................................................................................................................... 26
4.9. Cost Function .................................................................................................................................... 26
5. SC1894 Performance Data ...................................................................................................................... 27
5.1. NXP Class AB Performance Data at 3.6 GHz .................................................................................... 28
5.1.1. WCDMA 4 Carrier 7.75dB PAR .................................................................................................. 28
5.1.2. LTE 20 MHz E-TM3.1 ................................................................................................................. 28
5.2. 2100 MHz Doherty, Average Power 20-50W ..................................................................................... 29
5.2.1. LTE 20 MHz E-TM3.1 (9.51dB PAR) .......................................................................................... 29
5.2.2. Single Carrier WCDMA PAR = 6.5 dB ........................................................................................ 30
5.2.3. Single Carrier WCDMA PAR = 8dB ............................................................................................ 31
5.2.4. Single Carrier WCDMA TM1 PAR = 9.99 dB .............................................................................. 32
5.2.5. Dual Carrier WCDMA2 PAR = 6.50 dB ....................................................................................... 33
5.2.6. Dual Carriers WCDMA PAR = 8 dB ............................................................................................ 34
5.2.7. Dual Carriers WCDMA TM1 PAR = 9.70 dB ............................................................................... 35
5.3. 2600-2700 MHz Doherty, Average Power 15-20W ............................................................................ 36
5.3.1. LTE 20 MHz ETM 3.3 (PAR=9.51dB) ......................................................................................... 36
5.3.2. TD-LTE 10 MHz (64% duty cycle ; 8dB PAR) ............................................................................. 37
5.3.1. TD-LTE 20 MHz (64% duty cycle ; 9.3dB PAR) .......................................................................... 38
5.3.2. Three Carriers WCDMA PAR = 7.13 dB ..................................................................................... 39
5.3.3. Three Carriers WCDMA PAR = 9.58 dB ..................................................................................... 40
5.4. Peaking Amplifier Bias Adjustment with NXP BLD6G22-50 and WCDMA4 (PAR=7.75dB)................ 41
Table of Figures
Figure 1: SC1894 Evaluation Board Connection Diagram ................................................................................. 6
Figure 2: SC1894 System Block Diagram .......................................................................................................... 7
Figure 3: SC1894 GUI Window Annotated with Reference Sections................................................................ 14
Figure 4: Smooth adaptation Calibration Procedure at Center Frequency A .................................................... 23
Table of Tables
Table 1: RFIN and RFOUT couplers for SC1894 Evaluation Boards ................................................................. 7
Table 2: RFIN and RFFB Ranges for Maximum Correction – 168 MHz to 470 MHz .......................................... 9
Table 3: RFIN and RFFB Ranges for Maximum Correction – 470 MHz to 2700 MHz ........................................ 9
Table 4: RFIN and RFFB Ranges for Maximum Correction – 2700 MHz to 3300 MHz ...................................... 9
Table 5: RFIN and RFFB Ranges for Maximum Correction – 3300 MHz to 4200 MHz .................................... 10
Table 6: DL246 4 ns Delay Insertion Loss ....................................................................................................... 11
Table 7: Typical 5V Average Power and Current Consumption for SC1894 EVK (25°C) ................................. 13
Table 8: Typical 1.8V and 3.3V Power Consumption for SC1894 (25°C) ......................................................... 13
Table 9: SC1894 Frequency Ranges ............................................................................................................... 15
Table 10: SC1894_EVK RFIN and RFFB Offsets over Frequencies ................................................................ 18
Table 11: Error Codes ..................................................................................................................................... 21
Table 12: Warning Codes ................................................................................................................................ 21
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1. Introduction
1.1. Overview
Firmware 4.0.05.00 is a production release firmware.
The SC1894 RF PA Linearizer (RFPAL) is designed to fully address the linearization requirements for cellular
infrastructure (LTE, TD-LTE, WiMax, EVDO), VHF & UHF terrestrial broadcast television (CMMB, DVB-T,
ISDBT, ATSC), microwave point-to-point and other systems. The SC1894 is pin to pin compatible with
Scintera’s previous generations of RFPAL, provides improved linearization performance and a wider operating
frequency range of 470-3800MHz. FW 4.0.05.00 does support operation from 470 MHz down to 168 MHz and
from 3.8 to 4.2 GHz for evaluation and prototyping only. Only the 470-3800MHz frequency range has been
qualified for production in this FW release.
The following features were added:
 Firmware Assisted Factory Calibration for Smooth Mode for one or two center frequencies for faster
and easier calibration procedure.
 Faster initial convergence speed with Smooth Mode as Max coefficients are stored.
 Faster reaction time to center frequency changes with two point’s calibration.
A new GUI 1.9.1 is required to operate Firmware 4.0.05.00 and Evaluation Kits (EVK).
Please read; “Scintera GUI Installation Guide” [2].
1.2. Scope
This document is meant to provide a comprehensive user’s guide to the SC1894 with FW 4.0.05.00 in order to
evaluate the operation and performance with a given power amplifier. The documents referenced in section
1.4 are companion documents to be used when implementing the SC1894 in a design. Please see the
Scintera website or contact your local sales representative for access to these documents.

SC1894 Frequency Bands:
o SC1894-09: 3300-4200 MHz1
o SC1894-08: 2700-3500 MHz
o SC1894-07: 1800-2700 MHz
o SC1894-05: 1040-2080 MHz
o SC1894-04: 520-1040 MHz
o SC1894-02: 260-520 MHz1
o SC1894-01: 168-260 MHz1
1
For evaluation or prototyping purposes only.
Evaluation Kits (please contact Scintera Sales for availability):
o 3800-4200 MHz (P/N SC1894-EVK3900) 2
o 3300-3800 MHz (P/N SC1894-EVK3400)
o 2300-2800 MHz (P/N SC1894-EVK2400)
o 1800-2200 MHz (P/N SC1894-EVK1900)
o 1350-1800 MHz (P/N SC1894-EVK1500) 2
o
698-960 MHz (P/N SC1894-EVK900)
o
470-928 MHz (P/N SC1894-EVK500)
o
168-470 MHz (P/N SC1894-EVK200)
2
Please contact Scintera Sales for availability
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See section 2 for quick starting your SC1894 Evaluation Kit.
See section 3 and 4 for detailed overview of SC1894’s operation and optimizing the performance for your
application.
See section 5 for example performance data.
1.3. Current Limitations






Two-point calibration is not supported by the GUI. This function is only supported from the host. See
[4] for details.
RFIN and RFFB power levels reported by GUI need to be calibrated as the offset will vary with the EVK
frequency band.
RFIN and RFFB slider ranges defined in the GUI are not valid for all frequencies and can’t be used for
SC1894-EVK3400.
After reaching TRACK, performance is expected to further improve.
SC1894 supports instantaneous signal bandwidths from 1.2 to 60MHz. Please contact Scintera sales
for the availability of other supported signal bandwidths.
The SC1894 is guaranteed to operate across power supply and temperature variations as specified in
the datasheet. Operation above 3.8GHz is limited to 25ºC or below. If operation across full operating
conditions is required for operating frequencies above 3.8 GHz, please contact Scintera sales.
1.4. Reference Documents
[1]
[2]
[3]
[4]
[5]
[6]
Document
SC1894 FW4.0.05.00 Quick Start Guide
Scintera GUI Installation Guide
SC1894 Hardware Design Guide
SC1894 SPI Programming Guide
SC1894 Data Sheet
SC1894 and PA system design power budget calculator
NDA Required
NO
NO
YES
YES
NO
NO
1.5. Revision History
Revision
1.0
Date
October 2012
Description
Initial Release
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2. SC1894 Evaluation Kit Setup
2.1. SC1894 Evaluation Board with integrated delay line
Feedback
Coupler
PA
Power
meter
(Optional)
5V DC Power Supply
5V
Spectrum
analyzer
GND
Power supply
indicator LED
Power
meter
(Optional)
RFOUT
Integrated
Delay Line
SC-USB-SPI
Delay
Adjustment
Components
Predriver
PC - GUI
Signal
Generator
RFIN
Power
meter
(Optional)
RESET
RFFB
Power
meter
(Optional)
Figure 1: SC1894 Evaluation Board Connection Diagram
1. The SC1894 Evaluation Board must be powered from a +5V DC power supply capable of providing
0.6A (although the actual average power consumption of SC1894 is lower). Connect the power supply
to the banana jacks on the SC1894 Evaluation Board labeled +5V (red) and GND (black).
2. RFOUT is connected to the power amplifier input. The attenuator between the RFOUT and the PA
should be set using the power indicator for RFIN on the GUI. While not required, it is helpful that an
adjustable attenuator is used for setting the power level of the RF power amplifier.
3. RFFB is connected to the power amplifier feedback coupler. While not required, it is helpful that an
adjustable attenuator to be used to set the RFFB level into the evaluation board.
RFFB level should follow the recommendations from section 3.1
4. Connect the USB cable from NI-8451 or SC-SPI-USB to the PC. Scintera recommends using a USB
cable less than 4 feet long.
5. Reset SC1894 using either the GUI or the board reset button.
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To cover all the different frequency bands from 168 MHz to 4.2 GHz, it was required to use different PCB to
accommodate different coupler footprint.
Additionally, it was required to use different coupling ratios for RFIN and RFOUT couplers as described in
Table 1. It is important as well in the gain line-up to take into account the RFIN to RFOUT loss described in
that same table.
SC1894-EVB
PA
Correction
coupler
RFIN
Attenuator
SC1894
BALUN
Matching
Network
BALUN
Matching
Network
BALUN
RFOUTN
Matching
Network
RFOUTP
RFFBP
Combiner/
Filter/duplexer
YdB
RFINN
RFFBN
antenna
RFFB
-12 to -2dBm
pk when PA
is at PMAX
Attenuator
RFIN_BLN
xdB
RFINP
Feedback
coupler
RFOUT
Delay
Line
RFOUT_BLN
+6 to 16dBm
pk when PA
is at PMAX
Input
coupler
Figure 2: SC1894 System Block Diagram
Table 1: RFIN and RFOUT couplers for SC1894 Evaluation Boards
EVK #
Frequency Range (MHz)
RFIN Coupler
RFOUT Coupler
SC1894-EVK3400
3300-3800
5
7
SC1894-EVK2400
2300-2700
10
6
SC1894-EVK1900
1800-2200
10
7
SC1894-EVK900
698-960
10
10
SC1894-EVK500
470-928
10
10
SC1894-EVK200
168-470
10
10
RFIN-RFOUT loss (dB)
9.5
6.5
6
3.5
4
3.5
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2.2. What to look for if performance is lower than expected?





Make sure that Status Indicator indicates “TRACK”. If not, then SC1894 has not fully converged to the
optimal solution. It might be required to wait an additional 30s for optimum performance with current
firmware.
Check the linearity of the signal source out of the signal generator. A pre-driver between the signal
generator and RFIN may be required to ensure signal source has enough linearity. It is recommended
that the input linearity be at least 5 to 10 dB better than the desired linearity at the PA output.
Check that RFIN and RFFB are at the recommended levels at the PA maximum output power – see
sections 3.1.
Make sure you spectrum analyzer internal attenuation is not too high, increasing the noise floor and
limiting performance. Reduce the spectrum analyzer’s attenuation as much as possible while not
overdriving the analyzer.
Try different delay line – see section 3.2. Make sure the firmware is configured to the correct frequency
range and the input signal is within the scanning boundaries – see section 4.3.3.
2.3. Signal Generator Considerations for Power Level Change Performance
tests
To prevent the signal generator from transmitting undesirable peaks during power level changes, it is required
to take the following steps.
With some signal generator, it is important to turn ALC OFF and to configure “Power Search” properly.
Select “Manual” option if available.
With some signal generators, “Power Search” doesn’t have a “Manual” option. In this case, select “Span”.
Then select “Configure Span Power Search” and select “User” for “Span Type” and configure “Start
Frequency” and “Stop Frequency” to the center frequency of the signal test.
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3. SC1894 Hardware Setup
3.1.
RFIN and RFFB Levels
Setting the correct RFIN and RFFB levels to the SC1894 is required for optimal performance. As shown in
Table 10, the different SC1894 EVKs have different offsets over frequency and it is important to calibrate the
RFIN and RFFB offsets in the GUI. See section
If the system is set up as described in the following tables, the linearization provided by SC1894 should be
sufficient over the entire operating range of a typical power amplifier. The amount of correction required by the
amplifier generally decreases as the PA output power is backed off.
Table 2: RFIN and RFFB Ranges for Maximum Correction – 168 MHz to 470 MHz
Operation at 25 °C, AVDD18 = 1.8 V, AVDD33 = 3.3 V, DVDD18 = 1.8 V and 20 MHz external clock unless otherwise specified.
PARAMETER
Peak RFIN_BLN1,3
Peak RFFB_BLN1,3
RMS RFIN_BLN2,3
RMS RFFB_BLN2,3
Peak RFIN1,4
RMS RFIN2,4
RFIN_BLN Operating Range
RFFB_BLN Operating Range
SYMBOL
PRFIN_BLN_P
PRFFB_BLN_P
PRFIN_BLN
PRFFB_BLN
PRFIN_Peak
PRFIN_RMS
PRFIN_BLN
PRFFB_BLN
CONDITIONS
Peak Power
Peak Power
RMS Power
RMS Power
Peak Power
RMS Power
RMS Power
RMS Power
MIN
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TYP
4
-4
-6
-14
14
4
MAX
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
UNITS
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
1. Peak power is defined as the 10-4 point on the CCDF (Complementary Cumulative Distribution
Function) of the signal.
2. RMS Power given for reference based on Peak to Average Ratio (PAR) of 5 to 10 dB. As long as RMS
power (MAX) + PAR does not exceed the Peak Power limits specified above, there is no maximum limit
on the PAR.
3. Referred to 50Ω impedance into a 1:2 balun.
4. For 10dB RFIN coupler.
PARAMETER
Peak RFIN_BLN1,3
Peak RFFB_BLN1,3
RMS RFIN_BLN2,3
RMS RFFB_BLN2,3
Peak RFIN1,4
RMS RFIN2,4
SYMBOL
PRFIN_BLN_P
PRFFB_BLN_P
PRFIN_BLN
PRFFB_BLN
PRFIN_Peak
PRFIN_RMS
PRFIN_BLN
PRFFB_BLN
CONDITIONS
Peak Power
Peak Power
RMS Power
RMS Power
Peak Power
RMS Power
RMS Power
RMS Power
MIN
-4
-14
-9
-19
6
1
-40
-45
TYP
4
-4
-6
-14
14
4
MAX
6
-2
-4
-12
16
6
-4
-12
UNITS
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
on the PAR.
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PARAMETER
Peak RFIN_BLN1,3
Peak RFFB_BLN1,3
RMS RFIN_BLN2,3
RMS RFFB_BLN2,3
Peak RFIN1,4
RMS RFIN2,4
SYMBOL
PRFIN_BLN_P
PRFFB_BLN_P
PRFIN_BLN
PRFFB_BLN
PRFIN_Peak
PRFIN_RMS
PRFIN_BLN
PRFFB_BLN
CONDITIONS
Peak Power
Peak Power
RMS Power
RMS Power
Peak Power
RMS Power
RMS Power
RMS Power
MIN
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TYP
7
-4
-3
-14
TBD
TBD
MAX
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
UNITS
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
on the PAR.
4. RFIN coupler recommendation To Be Defined (TBD).
PARAMETER
Peak RFIN_BLN1,3
Peak RFFB_BLN1,3
RMS RFIN_BLN2,3
RMS RFFB_BLN2,3
Peak RFIN1,4
RMS RFIN2,4
SYMBOL
PRFIN_BLN_P
PRFFB_BLN_P
PRFIN_BLN
PRFFB_BLN
PRFIN_Peak
PRFIN_RMS
PRFIN_BLN
PRFFB_BLN
CONDITIONS
Peak Power
Peak Power
RMS Power
RMS Power
Peak Power
RMS Power
RMS Power
RMS Power
MIN
1
-14
-4
-19
6
1
-35
-45
TYP
9
-4
-1
-14
14
4
MAX
11
-2
1
-12
16
6
1
-12
UNITS
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
on the PAR.
For example, for SC1894-EVK1990 with 10dB RFIN coupler and 8 dB PAR, it is recommended to set RFIN
and RFFB power levels at follow levels when the PA is at maximum output power:
 RFIN = +6 dBm RMS which is +14 dBm peak into the coupler
 RFIN_BLN = -4 dBm RMS which is +4 dBm peak into the Balun
 RFFB = -12 dBm RMS which is -4 dBm peak.
3.2. Through Path Delay and Loss
The Evaluation Board utilizes a DL246 for the delay line. This integrated delay line provides a 2 ns delay line
and a 4 ns delay line that can be connected to form a 6 ns delay.
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Table 6: DL246 4 ns Delay Insertion Loss
Parameter
Delay
Insertion Loss
Insertion Loss
Insertion Loss
Insertion Loss
Insertion Loss
Insertion Loss
Insertion Loss
Insertion Loss
Insertion Loss
Typical
4
0.8
1
1.3
1.6
1.8
3.2
3.7
4.8
5
Units
ns
dB
dB
dB
dB
dB
dB
dB
dB
dB
Frequency
168-4200 MHz
168 MHz
200 MHz
450 MHz
700 MHz
900 MHz
2140 MHz
2800 MHz
3600 MHz
4200 MHz
The EVB can be configured with zero ohm jumpers to either ~0, 2 , 4 or 6 ns through path delay using the on
board DL246 or it can be configured to use external delay line.
A through path delay line between the input and output couplers (see Figure 3 for coupler locations) that
approximates the internal delay of SC1894 may be required for optimal performance.
For most PA applications, the optimal delay is approximately 4 nanoseconds – this is the length of the delay
circuit integrated with the evaluation kit. Some designs may require more or less delay in the through path to
optimize performance. Scintera suggests making system measurements with the following delay lines:
1. 4 ns (integrated)
2. 2 ns
3. 6 ns
4. Minimal delay
A 4ns delay has been found to be optimum for most PA’s. For amplifiers that exhibit more than normal memory
effects, 6ns may provide better performance. Similarly for a PA with little memory effect, a 2ns delay line may
be sufficient. The optimum delay line should be determined during product development.
NOTE
 The absolute phase of the delay line is not critical.
 The delay line delay accuracy is not critical.
 The performance difference between 2ns, 4ns and 6ns is usually less than 2-3dB of correction at
maximum output power.
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3.3. Average Coefficient Indicator
The SC1894 provides an average coefficient indicator. The average coefficient indicator gives an indication if
the SC1894 is operating within the optimal range for linearizing the amplifier under test. The average
coefficient indicator, if checked, should be done once TRACK is reached at maximum output power. At the
same time, the final linearity (ACLR or IMD level) of the system under test should be measured. This is
intended to be used as an indicator during manufacturing as part of a factory alignment and verification. It is
not intended to be used to monitor the system in field operation.
The SC1894 correction signal processor is capable of operation over a wide dynamic range. For this reason,
the valid operating range may span a wide range of values. It is not recommended to “over optimize” using
this parameter – any value within the range and possibly even beyond is a valid condition if the resulting
corrected performance meets expectation.
If the Avg Coeff Val > 100 when operating at the typical power amplifier maximum output power and the
system linearity is not as expected then this is an indication that the correction power at RFOUT is not at a
sufficient level to correct the amplifier. The path loss from RFOUT_BLN to RFOUT should be verified.
If Avg Coeff Val < 10 at the typical power amplifier maximum output power, the ratio of correction power to
signal power may be too high.
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3.4. Evaluation Board Typical Power Consumption at (25°C)
3.4.1.
SC1894 Evaluation Board Typical 5V Power Consumption at (25°C)
Table 7 shows SC1894 evaluation board typical 5V power consumption at room temperature (25°C).
Table 7: Typical 5V Average Power and Current Consumption for SC1894 EVK (25°C)
Conditions 1
5V Current (mA)
Total Power (mW)
No Firmware Running
34
170
Average Current/PWR
208
1025
During INIT/CAL Modes
FSA/TRACK Duty Cycled
241
1205
Feedback OFF
TRACK Duty Cycled
117
585
Feedback ON2
NOTE:
1. Measurements made at the +5V supply of SC1894-EVK
2. Average for Duty Cycled Feedback ON: 10% ON and 90% OFF. ON Time is 100ms and OFF time is
1s. Total period is 1.1s.
3.4.2.
SC1894 Evaluation Board Typical 1.8/3.3V Power Consumption at (25°C)
Table 8 shows SC1894 evaluation board typical 1.8V and 3.3V power consumption at room temperature
(25°C).
Table 8: Typical 1.8V and 3.3V Power Consumption for SC1894 (25°C)
Conditions 1
1.8V Current (mA) 3.3V Current (mA) Total Power (mW)
No Firmware Running
10
19
243
Average Current/PWR
366
63
867
During INIT/CAL Modes
FSA/TRACK Duty
427
56
1006
Cycled Feedback OFF
TRACK Duty Cycled
211
29
476
Feedback ON2
NOTE:
1. Measurements made at the +1.8V and 3.3V supply connections of SC1894
2. Average for Duty Cycled Feedback ON: 10% ON and 90% OFF. ON Time is 100ms and OFF time is
1s. Total period is 1.1s.
4. SC1894 Operation
This section describes how to change certain parameters within the SC1894 as well as access status
information over the SC1894 SPI. The supplied Scintera GUI enables the user to access the SC1894 SPI via
the SPI to USB converter.
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4.1. SC1894 GUI
Sec 4.3
Sec 4.5
Sec 4.8
Sec 4.2
Sec 4.6
Sec 4.7
Sec 4.3
Sec 4.3
Sec 4.4
Sec 4.8
Sec 4.5.2
Sec 4.7
Sec 4.3.1
Sec 4.5.3
14gui.png
Sec 4.6.2
Sec 4.4
Sec 3.3
Sec 4.6
Sec 4.4
Sec 4.5.3
Sec 4.9
Figure 3: SC1894 GUI Window Annotated with Reference Sections
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Unauthorized copying or distribution is prohibited. Scintera™ and RFPAL™ are trademarks of Scintera, Inc. All other trademarks are the property of their respective owners. No circuit patent licenses are implied.
Scintera reserves the right to change its product specifications at any time. © 2012 Scintera, Inc. All Rights Reserved.
4.2. IC Configuration
The IC Information indicates the hardware status as well as the setting of user parameters available in the
EEPROM.
The firmware version loaded on the SC1894 can be read using the Scintera GUI. See section 4.8.2 to change
the firmware.
4.3. Frequency Range, Min Frequency, Max Frequency, Center Freq, and
Bandwidth
4.3.1.
Frequency Range
The SC1894 supports operation from 168 to 4200 MHz divided in multiple ranges. The SC1894 will only scan
for the input frequency within the band that is selected. The range is an EEPROM parameter and can be read
from the GUI over the SPI interface. The following ranges are supported:
Table 9: SC1894 Frequency Ranges
Frequency
Range
Range
01
02
04
05
07
08
09
Guaranteed Frequency Ranges
GUI Frequency pull-down
Options1
Min Freq
Max Freq
168
260
520
1040
1800
2700
3300
Available Frequency Ranges for
Testing
Min Freq
Max
130
260
520
1040
1616
2666
3191
260
520
1040
2080
3049
4500
4500
260
520
1040
2080
2700
3500
4200
1. Operation outside the Guaranteed Frequency Ranges is not guaranteed.
4.3.2.
Changing Frequency Range
The frequency range of the SC1894 can be changed using the SPI. This change is written to the internal
EEPROM so only needs to be done once to reconfigure the SC1894 to operate in a new band. There is no
limit to the number of times the SC1894 can be configured to a new frequency range.
You should be sure that your scanning range matches the design frequency of your board or evaluation kit.
4.3.3.
Min Frequency and Max Frequency
The Frequency Scanning Bounds define the frequency range over which the SC1894 will scan for the RF
signal on RFIN and RFFB. Min Frequency (MHz) and Max Frequency (MHz) are the EEPROM parameters that
define the scanning bounds. The current settings for these values can be read over the SPI. The GUI displays
these values in the Status box.
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4.3.4.
Changing Min Frequency and Max Frequency
The Min Frequency is the lowest frequency that the SC1894 scans when searching for the signal center
frequency and Max Frequency is the highest frequency that the SC1894 scans when searching for the signal
center frequency. It is good practice to set the Min Frequency and the Max Frequency to the actual values
required for the operating range of your application.
Setting the Min Frequency and Max Frequency will write the values to the internal EEPROM and it is only
required to set them once. There is no limit to the number of times these parameters can be configured.
The default frequency scanning bounds for each range are the guaranteed frequency ranges as defined in
Table 9. This table shows as well the available frequency ranges that can be used to extend these ranges for
test purpose.
4.3.5.
Center Frequency and Bandwidth
Once the SC1894 exits the CAL state, the detected signal center frequency (±0.5 MHz) and -24 dBc signal
bandwidth (±0.75 MHz for BW <5 MHz, ±1.5 MHz for BW ≥5 MHz) may be obtained from the GUI. The
SC1894 considers signals within this displayed bandwidth as “in band” and does not include this signal power
as distortion to be corrected.
If the distortion products of your amplifier are above -24 dBc, the SC1894 may consider them as signal and not
operate properly.
The SC1894 will not attempt to correct signals that are less than 1 MHz of signal bandwidth.
The maximum signal bandwidth is 60 MHz for fully occupied signals and 40 MHz for widely spaced carriers
with no carriers in between.
If the detected signal bandwidth does not reflect system or test equipment settings, it may indicate that the
SC1894 is not operating under the correct conditions.
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4.4. RFIN and RFFB Power Management Unit (PMU)
The SC1894 integrates the analog power detector, analog to digital converter and sampling integration to
provide a precise RMS RF power measurement using the SPI interface. This feature is currently only available
via the GUI and not from the host.
4.4.1.
PMU Calibration
The reference points for the RFIN and RFFB PMU are the inputs of the chip. For precise power
measurements, the PMU will require a single point calibration in manufacturing. The PMU calibration typically
consists of setting the PA at maximum output power. An external calibrated power meter is used to read the
PA power. The SC1894 is allowed to converge and reach TRACK. The PMU value is then read over the SPI
for RFFB and used as the reference point. A similar procedure can be used to calibrate the RFIN value as
well. These reference values are then stored in the host and used as an offset to calculate absolute power
from the PMU values read from SC1894. See the SPI programming guide for examples and usage. This
calibration can be done at the same time as calibration for Smooth Adaptation Mode if desired.
The GUI enables the customer to display absolute power at outside reference points (typically the absolute PA
output power) by providing a window to enter the value read from the external power meter. This value is then
used to calculate the offset which is applied to the power as measured by the SC1894 and displayed as Ref
power. If the calibration is not done then the offset in the GUI is preset for the approximate coupler loss and
matching circuit loss for RFIN and matching circuit loss for the RFFB so the approximate power at the board
connectors is displayed in Ref as shown above. The GUI will calculate the offset when the Expected Power is
entered and “Calibrate RFFB PMU” or “Calibrate RFIN PMU” is pushed. Expected power should be the value
read from external reference such as calibrated power meter or spectrum analyzer. Alternatively, the offset can
be manually entered in the offset window.
RFIN and RFFB power indicators must be calibrated. See Table 10 for SC1894-EVK RFIN and RFFB
offset over frequencies
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Table 10: SC1894_EVK RFIN and RFFB Offsets over Frequencies
EVK
EVK3400
EVK2400
EVK1900
EVK900
EVK500
EVK200
Frequency (MHz)
3800
3600
3400
2700
2550
2400
2200
2000
1800
960
698
928
700
470
470
300
250
200
168
RFIN Offset1
(dB)
12.41
10.9
10.3
12.7
12.01
11.63
11.67
10.7
10.8
10
11
10
9.3
8.6
9.13
9.70
10.38
11.46
12.03
RFIN Delta2
(dB)
2.41
0.9
0.3
2.7
2.01
1.63
1.67
0.7
0.8
0
1
0
-0.7
-1.4
-0.87
-0.3
0.38
1.46
2.03
RFFB Offset1,2
(dB)
5.41
5
4.2
1.6
1.23
1.2
0.35
-0.12
-0.4
0.5
0
-1
-1.2
-1.8
-1.68
-1.88
-1.87
-1.92
-1.34
2. RFIN Default Offset is 10dB and RFFB Default Offset is 0dB.
3. RFFB Offset = RFFB Delta, while RFIN Delta = RFIN Offset-10.
See GUI capture in 4.1 for an example.
GUI recommended ranges for RFIN and RFFB sliders are assuming RFIN offset of 10dB and RFFB offset
of 0dB.
GUI slider recommended ranges do not take into account these deltas.
From the GUI capture example at 3800 MHz, the RFIN offset difference is 2.41dB (12.41-10=2.41dB), while
the RFFB offset difference is about 5.41dB. The GUI RFIN RMS range into the coupler is 1 to 6dBm and the
RFFB RMS range is -12 to 19dBm. But since the deltas are not considered in the slider range, it is possible to
rely on the sliders under all conditions, especially with SC1894-EVK3400 RFFB range as outlined by the
values in Red. In some cases, it might be useful to consider the RFIN AGC (PDET) and RFFB AGC values as
described in section 4.4.4.
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4.4.2.
PMU Update Rate
The RFIN and RFFB levels are updated every 300 milliseconds by the PMU when the SC1894 is in FSA or
TRACK states – note that the RFFB and RFIN signals must both be present for the SC1894 to be in FSA or
TRACK. The PMU is not updated during the INIT or CAL states. If the RFFB power drops below the specified
range in section 3.1 for >40 ms then the PMU will indicate that no power is detected for both RFIN and RFFB.
In order to provide enough integration samples to allow precise measurements of signals with high peak to
average values, the default measurement time for the power detector is set to 40 ms. Note that the SC1894 is
not adapting the pre-distortion coefficients during measurement time. Note that if the frame length of the
waveform is not a multiple of 40 ms, or a multiple of 10 ms that is evenly divisible into 40 ms, then the power
measurement will be done over an incomplete frame length.
4.4.3.
TDD Considerations – Operation with <100% duty cycle
The SC1894 PMU operates continuously over the measurement window – it does not discard samples which
may have been taken when the PA is off. This will affect the reading for waveforms with less than 100% duty
cycle as would be seen in TDD applications. For example, the PMU value read for a 50% PA on time (duty
cycle) will be 3 dB lower than the value with 100% duty cycle. It is straightforward to calculate the PA on time
power from the PMU value:
1. For systems with a fixed duty cycle, it is recommended to calibrate the PMU with the procedure above
using a waveform with proper Rx/Tx duty cycle. This is the preferred method.
2. For systems with variable Rx/Tx duty cycle, the host controller can be used to scale the measurement
value by the duty cycle.
4.4.4.
RFIN and RFFB AGC Parameters
The RFIN AGC (PDET) parameter is an attenuator in an AGC loop within the SC1894 analog circuitry. This
RFIN AGC loop ensures that the peak voltage into the correction block stays within the desired range across
RFIN level and temperature. In Optimized Correction mode, the RFIN AGC (PDET) index is determined during
the PDET state between CAL and FSA. The RFIN AGC (PDET) index is an integer value between 0 and 15. At
room temperature, when the PA operates at maximum output power, the RFIN AGC (PDET) index must be
within 12 and 4. This needs to be taken into account as well for Smooth Adaptation Calibration. The Calibrated
RFIN AGC (PDET) value must be within 12 and 4, and ideally closer to 12.
Over temperature, the PA gain and SC1894 internal gain will vary. To compensate for the PA gain variations,
the PA AGC loop external to SC1894 will adjust the RFIN level to maintain the PA output power constant. If the
RFIN level increases, the optimal PDET index needs to increase as well. Similarly, as temperature changes
affect the SC1894 internal gain, the PDET index will adjust to maintain optimal signal levels within the SC1894
automatically adjusts the PDET index to compensate for these gain variation over temperature. These PDET
index adjustments will create a brief ACLR degradation.
For some application, these temporary degradations in ACLR correction might not be acceptable and it is
possible to disable the PDET index compensation over temperature variations by setting the “PDET
Temperature Compensation Flag” to ‘1’. This will hold the calibrated PDET value constant over all conditions.
The tradeoff is that the correction performance may degrade slightly at extreme temperatures. This potential
degradation is a function of the PA’s gain and P1dB over temperature within the temperature range required
(See [4] for configuration details).
The RFFB AGC is an AGC loop within the SC1894 analog circuitry loop used to maintain the RFFB signal to
the optimum level. The higher the RFFB power level, the lower the RFFB AGC value. If the RFFB AGC value
is below 6 at room temperature when the PA operates at maximum power, it indicates that the AGC is at its
limit. Hence the RFFB power must be reduced.
However, the RFIN/RFFB power level limits stipulated in the datasheet must be met.
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4.5. Firmware Status
The SC1894 supports various status commands from the GUI to aid during development and monitor the
SC1894 status during operation. It is recommended that the GUI be used to monitor the SC1894 status during
development.
The GUI displays the SC1894 status. The rate at which the GUI is updated is shown in Status - Update Rate.
It is configurable and is set to 0.5 seconds by default. It is possible to disable GUI refresh and to only update
the GUI with “Force Update” button.
4.5.1.
Overall Status
The state of the correction processor can be read via the SPI and is displayed on the GUI. These are
important indicators to determine if the SC1894 is operating as intended. The GUI displays these states.
4.5.2.
Firmware States
INIT



Initialize microprocessor
Initialize all internal data memories
Load configuration parameters from EEPROM



Calibrate internal VCO/PLL and internal gain levels
Adaptation engine is scanning to find the carrier center frequency and bandwidth. If the
average RFIN and RFFB levels are within the specified dynamic range (see section 3.1)
then the SC1894 completes CAL and begins optimizing gain settings (PDET).
Perform initial adaptation

Optimize gain settings


Full Speed Adaptation to converge quickly to initial predistortion solution.
SC1894 rapidly adapts the coefficients with very large steps to converge faster to lower
ACLR as fast as possible. RFFB is used to measure and minimize the system out-ofband distortion.
Large changes in the ACLR may occur as the optimum values are found.
PMU Measurement Values Available
CAL
PDET
FSA


TRACK





Firmware has converged to the best possible predistortion solution
Slow rate adaptation to account for small changes over power, temperature.
Monitor feedback signal for average power changes and adjust adaptation parameters
appropriately.
Monitor feedback signal for center frequency or bandwidth changes and adjust
predistortion parameters appropriately. SC1894 will reliably detect center frequency
changes ≤40 MHz.
PMU measurement values available
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4.5.3.
Error/Warning Codes
The SC1894 will provide warning or error codes if these registers are polled over the SPI. Warnings do not
interrupt the operation of the IC although a warning typically indicates that optimal performance is not being
obtained. Errors indicate that the SC1894 will reset itself to clear an Error Condition.
The different Error and Warning Codes are described in Table 11 and
Table 12.
Table 11: Error Codes
Error Code
Meaning
0
No Error
3
'EEPROM corrupted'
Improper use of the part resulted in EEPROM corruption. Re-downloaded the
firmware using Scintera GUI might fix this error. If not, please contact
CustomerSupport@scintera.com
5
“Center Frequency outside the Define Frequency Range”. Center Frequency is
outside the Min and Max Frequency range. Please modify the Min and Max
Frequency range to fix this error.
Others
“Internal Chip Error”
Please contact CustomerSupport@scintera.com if you get any other error that
doesn’t get fix after Reset or re-downloading the firmware using Scintera GUI.
NOTE: Please contact Scintera if any of these rare errors are encountered.
Table 12: Warning Codes
Warning Code
Meaning
0
No Warning
44/48
“Center Frequency TOO LOW”. This warning should not happen for customer using
the GUI but could happen for customer using a host to control SC1894. This will
indicate that the device is operating outside the recommended frequency ranges
defined in Table 9.
Others
Internal Warning. Please contact customer_support@scintera.com for further
information.
When the firmware issue a warning, the GUI won’t clear that warning until the “Clear Warning” button is
pressed, even if the warning is no longer applicable. So after a warning is reported, it is recommended to clear
it.
4.5.4.
GUI Log Files
The GUI allows the Error and Warning codes to be logged. Each time the GUI is started an “Error/Warning”
log file will be created.
For Windows XP, it is created with a unique name based on when it was started under:
C:\Documents and Settings\All Users\Application Data\Scintera\ScinteraGUI\Log
For Windows 7, the log file will be created under
C:\ProgramData\Scintera\ScinteraGUI\Log
Please note that with Windows 7, ProgramData directory is hidden by default. To make it visible, open
“Windows Explorer and select the C drive. Press “Alt”, select tools, and then “Folder Options” to select “Show
hidden files, folders, and drivers to see it”. Hit “Apply” or “OK”.
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The format will be: etrace20110517_182622.csv indicating date and time of the log file start. The first eight
characters are date in yyyymmdd format (May 17 2011 in this case) and the last six digits are time of day in 24
hour hhmmss format (6PM 26minutes and 22s in this case).
All errors and warning will be captured in this log file.
The New Log File button allows starting a new log file without having to close the GUI.
4.5.5.
GUI Collect Dump
This will open a file explorer window to designate path where the Dump Files will be created and saved.
By default, for Windows XP, it is saved under:
C:\Documents and Settings\All Users\Application Data\Scintera\ScinteraGUI
By default, for Windows 7, the log file will be created under
C:\ProgramData\Scintera\ScinteraGUI
The Dump File .scidmp contains important variables and state information used for factory
troubleshooting/debugging. This is only available using the GUI.
4.5.6.
Reset
The SC1894 supports a hardware reset pin as outlined in the hardware design guide. The HW reset is
implemented on the evaluation kit as a push button as show in Figure 1. There is a GUI command button
which is equivalent to the HW reset. When using the GUI, it is not recommended to use the push button reset
on the PCB.
4.6. Operation Modes
Firmware supports two user selectable operating modes: Optimized Correction Mode and Smooth Adaptation
Mode. While it is strongly recommended to use smooth adaptation, the user should determine which mode to
use based upon the system performance and evaluation criteria.
The SPI interface is used to read the calibration parameters to determine what operating mode the SC1894 is
in. The GUI does this and displays the operating mode in the Status box.
4.6.1.
Optimized Correction Mode
This is the default mode of operation. This mode sets the adaptation parameters to achieve best ACLR
cancellation at all power levels once re-convergence is achieved. Re-adaption is triggered whenever the
average power level changes by greater than 0.75 dB as averaged over a 50 ms period. This re-adaption may
appear noisy and exhibit rapid changes in ACLR until the device completes re-convergence.
4.6.2.
Smooth Adaptation Mode
Using this mode sets adaptation parameters to limit perturbations during re-convergence resulting in lower
ACLR during that time. Operation in this mode requires an initial factory calibration of the SC1894 and Power
Amplifier system. Smoother adaptation is achieved by fixing the Calibration parameters at manufacturing time.
Smooth adaptation mode may result in slightly degraded performance in back off when compared with
Optimized Correction Mode. At maximum power, there is no difference in correction performance between
Smooth Adaptation Mode and Optimized Correction Mode.
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Start
Apply 100% loaded signal at PA
maximum average power (PMAX)
at center frequency A
Clear Calibration Parameters A
no
GUI
SPI Commands

UN-LOCK EEPROM

Clear MaxPWRCalParameters A

Read Command Execution Status
Wait 100ms
Command
Complete
yes
Reset SC1894
Set Calibration Parameters A
no
Click on “Set Calibration

Parameters” button
Reset SC1894

Set MaxPWRCalParameters A
Command
Complete

Read Command Execution Status
yes

LOCK EEPROM
Reset SC1894

Reset SC1894
Wait 100ms
End
Figure 4: Smooth adaptation Calibration Procedure at Center Frequency A
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4.6.2.1. Calibration – Selecting Smooth Adaptation Mode
The smooth adaptation calibration is done at factory alignment of the power amplifier system. It is possible to
calibrate at either one or two center frequencies. With the system at maximum average output power and
maximum signal bandwidth and a constant average output power, the SC1894 is converged and certain
parameters are stored in the EEPROM. A signal with 100% duty cycle should be used. For TDD systems; it is
recommended to use 100% duty cycle during the TX ON period.
The GUI enables the user to perform this calibration with a single push of the “Set Calibration Parameters”
button. When pressing the button “Set Calibration Parameters”, the GUI automatically executes all the SPI
commands described in Figure 4.
To enable this Smooth Adaptation Mode from a host, the host firmware will just need to follow the same steps.
See the SPI Programming Guide [4]
When pressing the button “Set Calibration Parameters”, the GUI will first Un-Lock the EEPROM and then send
a “Clear MaxPWRCalParameters A” message communication command to SC1894. Then the GUI reads the
execution status of the command to confirm that the firmware has executed this command and clear all the
Maximum Power Calibration Parameters. After getting confirmation that the command has been completed,
then the GUI resets the SC1894.
After Reset, the GUI waits one second and issues a “Set MaxPWRCalParameters A” message communication
command to SC1894. Then the firmware automatically stores all the Maximum Power Calibration Parameters,
coefficients and checksum to the customer configuration parameter zone in the EEPROM.
Once the firmware has completed this command, it sends back a message to confirm that the command has
been completed. As a last step, the GUI resets the SC1894 to boot up in Smooth adaptation mode.
Once this procedure is run, the SC1894 at power up or reset will always operate in Smooth Adaptation Mode
unless the calibration parameters are cleared. The calibration is specific to the system so if the PA or other
components in the system change, the SC1894 should be re-calibrated. If the maximum operating power is
changed, the procedure should be re-run.
When this mode is enabled, the GUI will display the difference between the calibrated power and the current
power: Backoff from Calibrated Max Power.
It is possible from the host to add a second calibration point at a different frequency B. This feature is currently
not available from the GUI.
With two frequency calibrations, the smooth adaptation calibration parameters corresponding to the closer
calibration frequency will be chosen at a given frequency. The threshold for deciding which frequency to use is
the midpoint of the two calibration frequencies. For example with calibration at 3800 MHz and 3700 MHz and a
center frequency of 3760 MHz, the parameters from the calibration at 3800 MHz will be selected. See the SPI
Programming Guide [4] for details.
4.6.2.2. Clearing Calibration Parameters
Clearing the calibration parameters will put the SC1894 into the default Optimized Correction Mode. It is
important to clear all of the calibration parameters. The GUI enables the user to clear these parameters with a
single push of the “Clear Calibration Parameters” button. The host will need to firs unlock the EEPROM and
then send a simple “Clear MaxPWRCalParameters A” message communication command to SC1894 to clear
all the Maximum Power Calibration Parameters.
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4.7. Adaptation and Correction Options
4.7.1.
Duty Cycled Feedback
This is an EEPROM parameter. Duty cycling of the feedback receiver and adaptation circuitry offers the
benefit of reduced average power consumption. The feedback receiver and adaptation are only duty cycled
during TRACK state – this allows the SC1894 to converge quickly and then enter a low power TRACK state.
By default Duty Cycled Feedback is disabled.
When Duty Cycle Feedback is “Off”
o SC1894 is continuously adapting coefficients and monitoring RFFB.
o In this mode, the coefficients are continuously adapted with 100% duty cycle.
o This is the default mode.
When Duty Cycle Feedback is “On”
o Duty Cycle period = ON_TIME + OFF_TIME = 100 + 1000 = 1100ms
o During ON_TIME(100ms), SC1894 adapting coefficients and monitoring power level change on
RFFB
o During the OFF_TIME (1s), the coefficients are not adapted and correction is still applied.
SC1894 is not monitoring RFFB power level change or center frequency change or signal
bandwidth change.
o Once it is “On” the device will come up in this mode on power up or reset.
4.7.2.
Adaptation States
The adaptation engine can be stopped and freeze the current coefficients. This is typically used for debug and
lab evaluation purposes only. The last calculated coefficients are applied to the correction signal processor
and are not updated.


Running: Default state. Adaptation mode running as described above.
Frozen: freeze coefficient adaptation. All other circuits are left in the state they were in at application of
freeze command.
4.7.3.
Enabling and Disabling Correction
Once in TRACK, it is possible to turn off the pre-distortion signal. This is set to “FW Control” by default. This
can be used to toggle between corrected and uncorrected performance of the PA and typically used during
development. It is not recommended to disable SC1894 at low output powers as the firmware handles this
automatically.
Disabled: Predistortion signal is disabled and coefficients are not adapted. All other circuits are left in the
state they were in at the application of disable command.
FW Control: Predistortion signal is enabled.
During other states, this option is disabled as the RFOUT must be under firmware control.
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4.8. Upgrading SC1894 Firmware
The internal EEPROM in the SC1894 supports field upgrades of the firmware. The firmware is upgradeable
using the GUI.
4.8.1.
GUI function Adding New Firmware to “Available Firmware” list
“Add Firmware” will allow adding future firmware to the “Available Firmware” list. New Firmware version is
included in the CD provided with EVB kit and can easily added to “Installed Firmware” list. New firmware
versions will be provided in encrypted format “.sci”.
Click on “Install Firmware” and navigate to file to be added.
Select the .sci file and click Open. Firmware will be added to the available firmware drop down and
downloaded to the SC1894 chip.
4.8.2.
Change Firmware
To download firmware to SC1894, select one of the “Available Firmware” and click “Change Firmware”.
4.9. Cost Function
The cost function is measured at the RFFB input and is a scalar value proportional to ACLR measurement.
The magnitude of this scalar will depend on the modulation type. Monitoring the relative change of this scalar
will provide an indication of a given PA’s ACLR.
The values reported by the GUI are averaged over 30 measurements.
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5. SC1894 Performance Data
In the following sections, the plots should be read as follows:
 The green vertical line is Psat-PAR for the waveform. Psat= P3dB or 3dB PAR compression point. To
be measured with SC1894 with a high PAR waveform (~10dB).
 ACLR/ACPR ending in “-0” (red traces on spectrum plots) are without correction
 ACLR/ACPR ending in “-1” (blue traces on spectrum plots) are with correction using SC1894
 FOR WCDMA
 ACLR1 is the power in a 3.84MHz IBW at a 5MHz offset, relative to the power in the 3.84 MHz
carrier (for multicarrier signals it is offset from the center of the of end carrier)
 ACLR2 is the power in a 3.84MHz IBW at a 10MHz offset, relative to the power in the 3.84 MHz
carrier (for multicarrier signals it is offset from the center of the of end carrier)
 For CDMA
 ACPR1 is the power in a 30 kHz bandwidth at an 885 kHz offset relative to the power in the 1.2288
MHz carrier bandwidth.
 ACPR2 is the power in a 30 kHz bandwidth at a 1980 kHz offset relative to the power in the 1.2288
MHz carrier bandwidth.
 For multicarrier signals, ACLR1L (ACPR1L) is offset from the center of the first carrier, and ACLR1U
(ACPR1U) is offset from the center of the last carrier.
 For multicarrier signals, ACLR2L (ACPR2L) is offset from the center of the first carrier, and ACLR2U
(ACPR2U) is offset from the center of the last carrier.
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5.1. NXP Class AB Performance Data at 3.6 GHz




NXP BLF6G38-10 class AB, LDMOS
Frequency range: 3400-3600 MHz
Frequency of operation: 3600 MHz
Gain: 16dB. Psat: 42dBm
5.1.1.
WCDMA 4 Carrier 7.75dB PAR
PA output power level sweep with NXP BLF6G38-10
SN10407 hw4.1 PAM258 25.0 WCDMA4-1111#7.75 3600.0 MHz 12/05/30 20:31:00 U
-25
-35
PA Output Power, dBm / 30 kHz
WP
ACLR1-0
ACLR1-1
ACLR2-0
ACLR2-1
-30
-40
ACLR, dBc
10
POUT-0 = 34.0 dBm
PSD-1
POUT-1 = 34.0 dBm
PSD-0
0 ACLR2L-0 ACLR1L-0
ACLR1U-0 ACLR2U-0
-45
-50
-55
-41.3
-10
-39.3
ACLR2L-1 ACLR1L-1
-57.1
-56.5
-38.3
-40.3
ACLR1U-1 ACLR2U-1
-55.7
-55.7
-20
-30
-40
-60
-65
26
27
28
5.1.2.
29
30
31
32
Pout, dBm
33
34
35
-50
36
-20
-15
-10
-5
0
5
10
15
Frequency Offset from Carrier Center, MHz
20
LTE 20 MHz E-TM3.1
PA output power level sweep with NXP BLF6G38-10
SN10407 hw4.1 PAM258 25.0 LTE20M1-1#6.73 3600.0 MHz 12/05/30 20:31:00 U
-25
-35
WP
ACLR1-0
ACLR1-1
ACLR2-0
ACLR2-1
-30
ACLR, dBc
-40
-45
-50
-55
-10
ACLR2L-0
-55.1
ACLR1L-0
-37.4
ACLR1U-0
-38.0
ACLR2U-0
-55.8
ACLR2L-1
-59.5
ACLR1L-1
-56.2
ACLR1U-1
-57.0
ACLR2U-1
-60.3
-20
-30
-40
-50
-60
-65
26
10
POUT-0 = 35.0 dBm
PSD-1
POUT-1 = 35.0 dBm
PSD-0
0
27
28
29
30
31
32
Pout, dBm
33
34
35
36
-60
-50
-40
-30
-20
-10
0
10
20
30
40
50
Page 28/42
Rights Reserved.
5.2. 2100 MHz Doherty, Average Power 20-50W




Freescale 2x MRF8S21100, Doherty PAM, LDMOS
Optimized for Efficiency.
Frequency: 2140 MHz
Gain 16dB, Psat ~53.1dBm
5.2.1.
LTE 20 MHz E-TM3.1 (9.51dB PAR)
PA output power level sweep with Freescale 2xMRF8S21100
SN10606 hw4.1 PAM114 25.0 1.80V 3.30V LTE20M1-1#9.51 2140.0 MHz 12/08/22 17:17:22 U
SN10606 hw4.1 PAM114 25.0 1.80V 3.30V LTE20M1-1#9.51 2140.0 MHz 12/08/22 17:17:22
50
-25
45
-30
WP
PAE
40
ACLR, dBc
-40
Power-added efficiency, %
-35
WP
ACLR1-0
ACLR1-1
ACLR2-0
ACLR2-1
-45
-50
35
30
25
20
15
-55
10
-60
5
-65
34
36
38
40
Pout, dBm
42
44
0
34
46
36
38
40
Pout, dBm
42
44
46
PA Output = 42.9dBm
SN10606 hw4.1 PAM114 25.0 1.80V 3.30V LTE20M1-1#9.51 2140.0 MHz 12/08/22 17:17:22 U
20
POUT-0 = 43.0 dBm
0
PSD-1
PSD-0
POUT-1 = 42.9 dBm
10
ACLR2L-0
-48.4
ACLR1L-0
-30.2
ACLR1U-0
-29.9
ACLR2U-0
-48.7
ACLR2L-1
-55.1
ACLR1L-1
-50.3
ACLR1U-1
-49.6
ACLR2U-1
-55.2
-10
-20
-30
-40
-50
-50
-40
-30
-20
-10
0
10
20
30
40
50
Page 29/42
Rights Reserved.
5.2.2.
Single Carrier WCDMA PAR = 6.5 dB
SN10606 hw4.1 PAM114 25.0 1.80V 3.30V WCDMA1-1#6.5 2140.0 MHz 12/08/22 17:17:22 U
SN10606 hw4.1 PAM114 25.0 1.80V 3.30V WCDMA1-1#6.5 2140.0 MHz 12/08/22 17:17:22
-25
50
-30
45
40
-35
-40
ACLR, dBc
WP
PAE
WP
ACLR1-0
ACLR1-1
ACLR2-0
ACLR2-1
-45
-50
-55
-60
35
30
25
20
15
10
-65
5
-70
36
38
40
42
Pout, dBm
44
46
0
36
48
38
40
42
Pout, dBm
44
46
48
PA Output =46dBm.
Power Added Efficiency: 45%
30
POUT-0 = 46.0 dBm
20
10
PSD-1
PSD-0
POUT-1 = 46.0 dBm
ACLR2L-0
-47.8
ACLR1L-0
-31.6
ACLR1U-0
-31.5
ACLR2U-0
-47.7
ACLR2L-1
-59.4
ACLR1L-1
-54.3
ACLR1U-1
-54.4
ACLR2U-1
-58.9
0
-10
-20
-30
-40
-10
-5
0
5
10
Page 30/42
Rights Reserved.
5.2.3.
Single Carrier WCDMA PAR = 8dB
-25
50
-30
45
40
-35
-40
ACLR, dBc
WP
PAE
WP
ACLR1-0
ACLR1-1
ACLR2-0
ACLR2-1
-45
-50
-55
-60
35
30
25
20
15
10
-65
5
-70
36
37
38
39
40
41
42
Pout, dBm
43
44
45
0
36
46
37
38
39
40
41
42
Pout, dBm
43
44
45
46
PA Output =44.5Bm.
30
POUT-0 = 44.4 dBm
20
10
PSD-1
PSD-0
POUT-1 = 44.5 dBm
ACLR2L-0
-49.6
ACLR1L-0
-31.8
ACLR1U-0
-31.6
ACLR2U-0
-49.5
ACLR2L-1
-57.0
ACLR1L-1
-52.2
ACLR1U-1
-52.5
ACLR2U-1
-57.0
0
-10
-20
-30
-40
-10
-5
0
5
10
Page 31/42
Rights Reserved.
5.2.4.
Single Carrier WCDMA TM1 PAR = 9.99 dB
-25
50
-30
45
40
-35
-40
ACLR, dBc
WP
PAE
WP
ACLR1-0
ACLR1-1
ACLR2-0
ACLR2-1
-45
-50
-55
-60
35
30
25
20
15
10
-65
5
-70
34
35
36
37
38
39
40
Pout, dBm
41
42
43
0
34
44
35
36
37
38
39
40
Pout, dBm
41
42
43
44
PA Output =42.55Bm.
30
POUT-0 = 42.5 dBm
20
10
PSD-1
PSD-0
POUT-1 = 42.5 dBm
ACLR2L-0
-52.9
ACLR1L-0
-32.8
ACLR1U-0
-32.5
ACLR2U-0
-52.6
ACLR2L-1
-58.1
ACLR1L-1
-52.1
ACLR1U-1
-52.4
ACLR2U-1
-58.0
0
-10
-20
-30
-40
-10
-5
0
5
10
Page 32/42
Rights Reserved.
5.2.5.
Dual Carrier WCDMA2 PAR = 6.50 dB
-25
50
WP
PAE
45
-30
40
ACLR, dBc
-40
-35
WP
ACLR1-0
ACLR1-1
ACLR2-0
ACLR2-1
-45
-50
35
30
25
20
15
-55
10
-60
-65
37
5
38
39
40
41
42
43
Pout, dBm
44
45
46
0
37
47
38
39
40
41
42
43
Pout, dBm
44
45
46
47
PA Output = 46.1dBm
30
POUT-0 = 46.0 dBm
20
10
PSD-1
PSD-0
POUT-1 = 46.1 dBm
ACLR2L-0 ACLR1L-0
-33.1
-26.5
ACLR1U-0 ACLR2U-0
-26.2
-32.8
ACLR2L-1 ACLR1L-1
-56.0
-51.9
ACLR1U-1 ACLR2U-1
-51.9
-54.9
0
-10
-20
-30
-40
-15
-10
-5
0
5
10
15
Page 33/42
Rights Reserved.
5.2.6.
Dual Carriers WCDMA PAR = 8 dB
-25
50
WP
PAE
45
-30
40
ACLR, dBc
-40
-35
WP
ACLR1-0
ACLR1-1
ACLR2-0
ACLR2-1
-45
-50
35
30
25
20
15
-55
10
-60
5
-65
36
37
38
39
40
41
42
Pout, dBm
43
44
45
0
36
46
37
38
39
40
41
42
Pout, dBm
43
44
45
46
PA Output =44.6Bm.
30
POUT-0 = 44.5 dBm
20
10
PSD-1
PSD-0
POUT-1 = 44.6 dBm
ACLR2L-0 ACLR1L-0
-34.9
-27.6
ACLR1U-0 ACLR2U-0
-27.1
-34.6
ACLR2L-1 ACLR1L-1
-54.7
-52.1
ACLR1U-1 ACLR2U-1
-50.9
-53.9
0
-10
-20
-30
-40
-15
-10
-5
0
5
10
15
Page 34/42
Rights Reserved.
5.2.7.
Dual Carriers WCDMA TM1 PAR = 9.70 dB
-25
50
WP
ACLR1-0
ACLR1-1
ACLR2-0
ACLR2-1
-35
40
-40
ACLR, dBc
WP
PAE
45
-30
-45
-50
35
30
25
20
15
-55
10
-60
-65
34
5
35
36
37
38
39
40
Pout, dBm
41
42
43
0
34
44
35
36
37
38
39
40
Pout, dBm
41
42
43
44
PA Output =42.55Bm.
20
POUT-0 = 42.7 dBm
PSD-1
PSD-0
POUT-1 = 42.7 dBm
10
0
ACLR2L-0 ACLR1L-0
-36.8
-28.1
ACLR1U-0 ACLR2U-0
-27.6
-36.3
ACLR2L-1 ACLR1L-1
-54.6
-51.0
ACLR1U-1 ACLR2U-1
-50.6
-54.2
-10
-20
-30
-40
-15
-10
-5
0
5
10
15
Page 35/42
Rights Reserved.
5.3. 2600-2700 MHz Doherty, Average Power 15-20W






NXP BLF6G27-150P
Operating Frequency: 2655 MHz
Frequency Range: 2500-2700 MHz
Doherty, LDMOS Technology
Gain ~ 15dB,
Psat ~ 52.6dBm
5.3.1.
LTE 20 MHz ETM 3.3 (PAR=9.51dB)
PA output power level sweep with NXP BLF6G27-150P
-25
WP
ACLR1-0
ACLR1-1
ACLR2-0
ACLR2-1
-30
-35
ACLR, dBc
-40
-45
-50
-55
-60
-65
34
35
36
37
38
39
40
Pout, dBm
41
42
43
44
PA Output = 42.2 dBm
20
POUT-0 = 42.6 dBm
PSD-1
POUT-1 = 42.2 dBm
PSD-0
10
ACLR2L-0
ACLR1L-0
ACLR1U-0
ACLR2U-0
0
-51.1
-32.2
-32.7
-51.4
ACLR2L-1
-58.1
ACLR1L-1
-53.5
ACLR1U-1
-52.8
ACLR2U-1
-58.6
-10
-20
-30
-40
-50
-40
-30
-20
-10
0
10
20
30
40
50
Page 36/42
Rights Reserved.
5.3.2.
TD-LTE 10 MHz (64% duty cycle ; 8dB PAR)
The TD-LTE spectral amplitude over time is shown in the following figure:
PA output power level sweep with NXP BLF6G27-150P and spectrum plot are shown in the following figures:
SN10702 hw4.1 PAM078 25.0 LTE10M1-1D64#8.23 2550.0 MHz 12/08/21 23:29:22 U
-25
-30
-35
ACLR, dBc
-40
WP
ACLR1-0
ACLR1-1
ACLR2-0
ACLR2-1
-45
-50
-55
-60
-65
34
36
38
40
Pout, dBm
42
44
46
Page 37/42
Rights Reserved.
5.3.1.
TD-LTE 20 MHz (64% duty cycle ; 9.3dB PAR)
The TD-LTE 20 MHz spectral amplitude over time is shown in the following figure:
PA output power level sweep with NXP BLF6G27-150P and spectrum plot are shown in the following figures:
-25
-30
-35
ACLR, dBc
-40
WP
ACLR1-0
ACLR1-1
ACLR2-0
ACLR2-1
-45
-50
20
POUT-0 = 43.1 dBm
PSD-1
POUT-1 = 42.6 dBm
PSD-0
10
ACLR2L-0
ACLR1L-0
ACLR1U-0
ACLR2U-0
-55
0
-49.9
-31.6
-31.9
-50.1
ACLR2L-1
-56.9
ACLR1L-1
-52.0
ACLR1U-1
-51.3
ACLR2U-1
-56.4
-10
-20
-30
-60
-65
34
36
38
40
Pout, dBm
42
44
46
-40
-50
-40
-30
-20
-10
0
10
20
30
40
50
Page 38/42
Rights Reserved.
5.3.2.
Three Carriers WCDMA PAR = 7.13 dB
-25
SN10702 hw4.1 PAM078 25.0 WCDMA3-111#7.13 2550.0 MHz 12/08/21 19:16:57
5
WP
4.5
EVM-0
EVM-1
4
-30
-35
3.5
WP
ACLR1-0
ACLR1-1
ACLR2-0
ACLR2-1
-45
-50
3
EVM, %
ACLR, dBc
-40
2.5
2
1.5
-55
1
-60
0.5
-65
36
38
40
42
Pout, dBm
44
46
0
36
48
38
ACLR vs PA output
40
42
Pout, dBm
44
46
48
EVM vs PA output
PA Output = 44.7dBm
30
POUT-0 = 44.9 dBm
PSD-1
POUT-1 = 44.7 dBm
PSD-0
20
ACLR2L-0 ACLR1L-0
-31.6
-27.1
ACLR1U-0 ACLR2U-0
-27.1
-31.6
10 ACLR2L-1 ACLR1L-1
ACLR1U-1 ACLR2U-1
-51.0
-53.9
-54.8
-52.2
0
-10
-20
-30
-40
-15
-10
-5
0
5
10
15
Page 39/42
Rights Reserved.
5.3.3.
Three Carriers WCDMA PAR = 9.58 dB
-25
WP
ACLR1-0
ACLR1-1
ACLR2-0
ACLR2-1
-30
-35
ACLR, dBc
-40
-45
-50
-55
-60
-65
32
34
36
38
Pout, dBm
40
42
44
PA Output = 42.1dBm
20
POUT-0 = 42.6 dBm
PSD-1
POUT-1 = 42.1 dBm
PSD-0
ACLR1U-0 ACLR2U-0
-32.8
0
-29.0
ACLR2L-1 ACLR1L-1
-53.9
-51.4
-29.1
-33.0
ACLR1U-1 ACLR2U-1
-50.8
-53.7
-10
-20
-30
-40
-15
-10
-5
0
5
10
15
Page 40/42
Rights Reserved.
5.4. Peaking Amplifier Bias Adjustment with NXP BLD6G22-50 and WCDMA4
(PAR=7.75dB)






NXP BLD6G22-50 Compact Design.
Operating Frequency: 2140 MHz
Frequency Range: 2110-2170 MHz
Doherty, LDMOS Technology
Gain ~ 15dB,
Psat ~ 48.2dBm
With NXP BLF6G22-50 PA output power level at 40.4dBm (Psat-PAR), the peaking amplifier bias was adjusted
from 0 to 0.9V. It was determined that 0.4V was the best value for final linearity with SC1894. The following
plots shows the WCDMA4 (7.75dB PAR) final linearity and the power added efficiency with SC1894 versus
different peaking amplifier bias (Vpeak).
SC1894 WCDMA4-7.75 Vpeak Sweep
-37
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
0.55
0.6
0.65
0.7
0.75
0.8
0.85
0.9
-35
-39
ACLR(dBc)
-41
-43
ACLR1
-45
ACLR2
-47
-49
-51
-53
-55
Power Added Efficiency VS Vpeak
43.00%
42.00%
41.00%
40.00%
39.00%
Power Added
Efficiency
38.00%
37.00%
36.00%
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
0.55
0.6
0.65
0.7
0.75
0.8
0.85
0.9
35.00%
Page 41/42
Rights Reserved.
With the peaking amplifier bias set to 0.4V, the Power Added Efficiency versus PA output power level was
collected:
Power Added Efficiency
50%
Efficiency
40%
30%
Power Added
Efficiency
20%
10%
41.66
40.83
40.05
38.71
36.65
34.57
32.43
30.41
28.44
26.48
24.51
22.53
20.56
0%
PA output Power
ACLR and EVM sweep versus PA output power level:
-25
SN10622 hw4.1 PAM184 25.0 WCDMA4-1111#7.75 2140.0 MHz 12/09/07 14:34:30
5
WP
4.5
EVM-0
EVM-1
4
-30
-35
3.5
WP
ACLR1-0
ACLR1-1
ACLR2-0
ACLR2-1
-45
-50
3
EVM, %
ACLR, dBc
-40
2.5
2
1.5
-55
1
-60
-65
32
0.5
33
34
35
36
37
38
Pout, dBm
39
40
41
42
0
32
33
34
35
36
37
38
Pout, dBm
39
40
41
42
At 40.4 dBm output power with PAE=40%, the Spectrum plot is:
20
POUT-0 = 40.1 dBm
PSD-1
POUT-1 = 40.4 dBm
PSD-0
ACLR1U-0 ACLR2U-0
-30.8
0
-28.4
ACLR2L-1 ACLR1L-1
-51.9
-50.3
-31.1
-34.2
ACLR1U-1 ACLR2U-1
-50.4
-51.7
-10
-20
-30
-40
-20
-15
-10
-5
0
5
10
15
20
Page 42/42
Rights Reserved.

SC1894 FW4.0.05.00 Release Notes

Transcription

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