1 - technicalaudio.com
Transcription
1 - technicalaudio.com
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CLOCK VARI VEM 8254 1/40 EXTO 9.6 kHz p- 10.000 (nom.) 1 5ips ipsOL^ 7.5 3.75 ips O Figure 4-17 Capstan Servo Block Diagram JUI ROTARY ENCODER JIPK ;n k mm .2 «aa 1a HI*®**.* i1 & o o t 2 JSP6** MX-5050 CAPSTAN MOTOR SERVO SYSTEM THEORY OF OPERATION The Capstan Motor Drive Amplifier contains the circuitry necessary to drive the threephase, brushless, DC Capstan Motor, as well as signal amplification and conditioning cir cuitry for the Capstan Tach pulses. The Capstan Motor rotor contains four sections of non- magnetic material, and there are three Detector coils located in the motor housing. When the motor is stopped, one of the non-magnetic sections will be adjacent to one of the detector coils. Each detector coil is the inductor in an LC oscillator (Q 6 and C 26, Q 7 and C 27, and Q 8 and C 28 being the transistor/capacitor pair associated with each detector coil) which oscillates at ap proximately 130 kHz. When the non-magnetic portion of the rotor is adjacent to a detec tor coil, that oscillator becomes detuned, and stops oscillating. When an oscillator stops oscillating, the logic circuitry causes the corresponding Armature coil to be energized, causring theoscillator rotor to to move thecausing rotor turns, the non-magnetic sections in cause each stop towards oscillatingit.inAs turn, each armature coil to be energized sequence. Changing the capstan motor speed causes the dc voltage applied to the comparator IC 1 to change, changing the pulse width of the signal sent to the pulse-width to voltage converter (Q 2 and Q 3). The resulting voltage change is applied to the Armature coils to change the motor speed. If an abrupt change in motor speed is sensed, relay K 1 is activated which shorts one armature coil until the circuit stabilizes. The rotor carries a toothed gear which passes in front of a pickup head flanked by two per manent magnets. As the rotor rotates, the toothed gear passes through the magnetic flux created by the permanent magnets. The resulting fluctuations in the magnetic field are sensed by the pickup head and converted to a pulse train. These pulses are amplified before being applied to the comparator IC 1 where they affect the pulse width of the signal sent to the pulse- width to voltage converter (Q 2 and Q 3) to control the motor speed. There are three adjustments on the Capstan Motor Drive PCB, VR 1 which adjusts the speed at 15 ips, VR 2 which adjusts the speed at 7.5 ips, and VR 3 which adjusts the speed at 3.75 ips. The speed of the Capstan Motor can be varied by the Pitch control or from an external source of DC voltage by changing the DC voltage applied to the comparator IC 1. ' "■^ - ^ S.78 ;» €> T 000* Tl CM .*« J; iVW ; MO 920$ 14 l.»K ^W"' • »4> l c&- m ; lOt 4& I PITCH CONT ♦*4VUHMCO ♦f4v nto il -£0;-=DLj 2SCI8ISGR or EQUIVALENT 2SAIOI3GR 2SCIBI3GR or EQUIVALENT 2soeeoro 05X014 2SCI8I5GR or EQUIVALENT 015X017 2SB596YO 08X020 2SAI0I56R 021X023 2SCI3I9GR or EQUIVALENT 4 . .• 10 ■ 0 1 I S 1 5 8 8 o f E Q U I VA L E N T 02 IN4006 03X09 ISI588 or EQUIVALENT DI0XDI2 ISI889 or FMA ICI IC2 IC3 LM29CKN or EOUIVBLENT SN7400N SN7408N £ft14 JUMMIIID ON MACHINE* W I T H L O C AT O R C O N H C C T O I t l DC SERVO C A P S TA N L»o c O O -J o •3 o i 111 s * ^ -< 5 1 Si £> U-ife .•^ V— & •— M 1— V. 2 Z i J ' M V w fl ?T- 31W &* d^i<v?ofU yov if© h <u a! S L_ ao^^] -yov C N <33 I X cr I c |C»I DATA aw*. DtSPtAM . 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I - «4- f»ETW»- 0- r-^B Ai/0tO rvu7T£ (n^tt) I To / ^ e » r r * £ R . ^ . r PrVJttt-. rMPic*-rcfc ,utvl-io//i_ buocjc \ ^ y \ r^-G>(i/>^- J^v □□□ o n MTR-10/12 Tape Transport ° * PLL Capstan Servo Control * Micro Processor Controlled Tension Servo /$^\ *«M8WMftgBii»{ iwwmvl tgwrewre o > C D CO c to a C O o a. o o 0) o o 0) (0 CO Q. a> CO CO j = o CO CO c a> Q . a. E s< fMQ Time Code Version Head Assembly .1 1 I JL ' ' ' '~l~ ■J I I 1 I- I TTT1 H I,II I i I i i i i rs.4---E,s\ 5E ZSL Audio Audio TC Erase Audio E r a s e R e c o r d & R e a d / Wr i t e R e p r o d u c e Independent %C head is used to reduce crosstalk between audio and TC tracks. The coincidence of audio and TC tracks is controlled by microprocessor. MX-55 Time Code Version Head Assembly Audio & TC Audio & TC Erase Record (Write) Audio & TC Reproduce (Read) All heads are in-line type. Crosstalk between audio and TC tracks is reduced by crosstalk canceller circuit. Because of in-line type heads, coincidence of audio and TC tracks is always constant 1 cpi (1) Q Phase comp. (SE2& Comparator RED Comparator i>@- Tape CREEK Input (2) 77,777- By-pass O Limiter tape (6) ■w.u.,... Narrow >£j>a&tI4Q&v ut ^^aaatsamBB roBB^f. Input imum qegLiaiimjiJummmnw Input o Line Out Amp. r±£i % Wide-Band ■ -o (3) (*) (5) REC Buffer Amp. V BIAS ") REC Amp. .UJMIUMliUMi iW SBsenfti Line Input Afflp. Line Input Amp. CP2 (7) 77777 T/C PCB BLOCK DIAGRAM (1 HEAD SYSTEM) (erase y ERASE * Automatically select Input mode during Record function . 77fr7 /0&\ /$$&\ < o XL 8 si o r- TTn" hd fcc^W \ \/ \ ▶ - e •- 5- £ ▶ 0> a °- e £ s >» o Ui > _ \/ £ 5o 5a 3 %s z _1 o a. t- 2 < 1CO JP*\ /00\, H ^ >|P^v CO a K < > o 2 o 3 < o* N X o o 0> 10 o o CO o -1 a. A N X N X o o CD » * 01 01 « & o to < — yg#^-> TRIMMERS, TEST POINTS AND JUMPERS ON THE MX-70 (**" TRANSPORT CONTROL PCB (PB-48RB) Trimmers VR1 Fast Wind Speed VREF Adj - adjust for +5.0V at TP 4 VR2 Fast Wind Speed VREF Offset - Adjust for OV @ TP 4 while holding SW 1 Test Points TP1 - TP3 Ground TP4 Fast Wind Speed VREF T P 5 Ta c h o A T P 6 Ta c h o B T P 7 Ta c h o C Jumpers Jl - J4 ROM Select ROM Type Jumper Setting 64 kB (2 pc) J2, J3 (Shorted) fV^ 1 12 28 8 k Bk B ( 2 ( 1p c )p c J) l , J Jl 3 , * J 4 256 kB (1 pc) Jl, J2, J3, J4 J5 Selects Dynamic Only or Mechanical and Dynamic Brakes during Fast Wind to Stop transitions J5 Open - Dynamic Only * J5 Shorted - Mechanical and Dynamic J6 & J7 Lifter Solenoid Voltage Select J6 Shorted, J7 Open - +24V then +15V * J6 Open, J7 Shorted - +24V only J8 & J9 ROM Size Select J8 Shorted - 256 kByte J9 Shorted - 128 kByte * J10 & Jl 1 Rehearse Select Jp9\ J10 Shorted, Jl 1 Shorted - Fast Standby must be selected for Rehearse to function * J10 Open, Jl 1 Open - Rehearse functions with Fast Standby Off NOTE: * indicates factory setting. TRIMMERS AND TEST POINTS ON MX-70 REEL CONTROL PCBs Trimmers Lot Number A - H I - J L - PB-48LA with PB-4GUA PB-7KUA PCB Part Number PB-48LA Take Up Position " Gain VRl VR2 VRl VR2 VRl VR2 Supply Position " Ga in VR3 VR4 VR3 VR4 VR4 VR5 Take Up Torque Supply Torque VR9 VRIO VR9 VRIO VR3 VR6 F.Fwd Gain Rewind Gain VR6 VR7 VR6 VR7 VR7 VR8 Fast Wind Speed VR8 VR8 VR9 Test Points (All versions) Take Up sensor Voltage Take Up Servo Voltage Supply Sensor Voltage Supply Servo Voltage Speed Reference Voltage Tach Voltage Gnd Gnd jps\ TRIMMERS, TEST POINTS, AND SWITCHES ON MX-70 CAPSTAN CONTROL PCB (PB-48KA) Trimmers VRl Va r i - S p e e d a d j u s t . S e t f o r 9 . 6 k H z + / 1 5 0 H z a t T P 1 . VR2 Low Speed Damping adjust. Set for fast recovery of waveform at TP6 (or minimum Wow and Flutter). VR3 High Speed Damping adjust. Set for fast recovery of w a v e f o r m a t T P 6 ( o r m i n i m u m Wo w a n d F l u t t e r ) . VR4 Low Speed Gain adjust. Set for 50% duty cycle at TP6. VR5 High Speed Gain adjust. Set for 50% duty cycle at TP6 Test Points Va r i - S p e e d f r e q u e n c y - 9 . 6 k H z + / - 2 0 % Internal clock frequency - 9.6 kHz. Phase Locked Loop frequency - 810.24 kHz. /fPN C a p s t a n Ta c h C a p s t a n Ta c h f r e q u e n c y - 0 - 1 5 V s q u a r e w a v e Capstan Drive voltage - varying DC voltage. Gnd. Gnd. Switches SW1 S p e e d P a i r - H i g h / L o w. SW2 Capstan Speed adjust - 0.035%/step. SW3 Capstan Speed adjust - 0.35%/step. TRIMMERS, TEST POINTS, AND SWITCHES/JUMPERS ON MX-70 AUDIO PCBs (PB-16XA) Trimmers i r f H VRl VR2 VR3 VR4 VR5 VR6 VR7 VR8 VR9 VRIO VR11 VR12 VR13 VR14 VR15 VR16 VR17 VR18 VR19 VR20 Erase Current Sel-Rep Level High Speed - Low Freq. Compensation High Speed - High Freq. Repro EQ Low Speed - Low Freq. Compensation Low Speed - High Freq. Repro EQ Peak Indicator Level VU Meter Level Te s t O s c i l l a t o r L e v e l Input Level High Speed - High Freq. Record EQ Low Speed - High Freq. Record EQ Record Level High Speed - Phase Comp Low Speed - Phase Comp Record Bias Current High Speed - Repro Level Low Speed - Repro Level Erase Bias Symmetry Record Bias Symmetry Test Points TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 Record Head Bias Record Head Gnd Erase Head Bias Erase Head Gnd Audio Gnd Audio Gnd Record Bias Drive Erase Bias Drive Switches and Jumpers SW1 SW2 SW3 SW4 Jl CN2 CN3 CN6 CN7 Balanced/Unbalanced G a p l e s s P u n c h I n / O u t Ti m i n g Output Level +4/-8 dBm Input Level +4/-8 dBm Cue Attenuation High Speed Repro EQ Select Low Speed Repro EQ Select Record EQ NAB/IEC Select High/Low Record Speed Pair MX-70 ERROR CODES J0£to\ Err 00 Err 01 Err 02 Err 03 Err 04 CPUEr ROM Checksum Error RAM Read/Write Error PB-48RA IC 21 Error PB-48RA IC 19 Error PB-48RA IC 7 Error Abnormal Program State SOFTWARE VERSION TEST Hold STOP button pressed while turning On the Power to the machine; the software program number will be shown on the Tape Time display. BRAKE TEST Press all five Transport buttons and the EDIT button simultaneously. /0^s RUNNING TEST Press all five Transport buttons and the CUE button simultaneously. INSTRUCTIONS FOR SETTING THE EQUALIZATION JUMPERS ON MX-70 AUDIO CHANNEL PCBs Set the jumpers on each Audio PCB to the following positions: For ln 16 Channel Machines High Speed Pair (30/15 ios^ Machines AES Equalization at 30 ips, IEC Equalization at 15 ips (1" 16 Channel Standard) CN3 Low Speed Repro (2 Jumpers) - co & 35 CN2 High Speed Repro (2 Jumpers) - «» & 17.5 CN6 Record EQ (2 Jumpers) - IEC & IEC CN7 Record Speed Pair (3 Jumpers) - H, H, & H Low Speed Pair (15/7.5 ios) Machines IEC Equalization at both speeds (T 16 Channel Standard) /IPS CN3 Low Speed Repro (2 Jumpers) - oo & 70 CN2 High Speed Repro (2 Jumpers) - oo & 35 CN6 Record EQ (2 Jumpers) - IEC & IEC CN7 Record Speed Pair (3 Jumpers) - L, L, & L For 1" 8 Channel Machines High Speed Pair (30/15 iosl Machines AES Equalization at 30 ips, NAB Equalization at 15 ips (1" 8 Channel Standard) CN3 Low Speed Repro (2 Jumpers) - 3180 & 50 CN2 High Speed Repro (2 Jumpers) - oo & 17.5 CN6 Record EQ (2 Jumpers) - NAB & NAB H CN7 Record Speed Pair (3 Jumpers) - H, H, & H Low Speed Pair (15/7.5 iosl Machines NAB Equalization at both speeds (1" 8 Channel Standard) CN3 Low Speed Repro (2 Jumpers) - 3180 & 50 CN2 High Speed Repro (2 Jumpers) - 3180 & 50 CN6 Record EQ (2 Jumpers) - NAB & NAB L CN7 Record Speed Pair (3 Jumpers) - L, L, & L EQUALIZATION JUMPER INSTRUCTIONS CONTINUED For 1/2" 8 Channel MX-70s High Speed Pair (30/15 ips) Machines AES Equalization at 30 ips, EEC Equalization at 15 ips (1/2" 8 Channel Standard) CN3 Low Speed Repro (2 Jumpers) - oo & 35 CN2 High Speed Repro (2 Jumpers) - oo & 17.5 CN6 Record EQ (2 Jumpers) - IEC & IEC CN7 Record Speed Pair (3 Jumpers) - H, H, & H Low Speed Pair (15/7.5 ips) Machines LEC Equalization at both speeds (1/2W 8 Channel Standard) CN3 Low Speed Repro (2 Jumpers) - <*° & 70 CN2 High Speed Repro (2 Jumpers) - oo & 35 CN6 Record EQ (2 Jumpers) - IEC & IEC CN7 Record Speed Pair (3 Jumpers) - L, L, & L It is possible to operate the 1/2" 8 Channel MX-70 using NAB equalization, however, this does not conform to industry standards for this format. /SPN High Speed Pair (30/15 ips) Machines AES Equalization at 30 ips, NAB Equalization at 15 ips (Non-Standard EQ) CN3 Low Speed Repro (2 Jumpers) - 3180 & 50 CN2 High Speed Repro (2 Jumpers) - <^> & 17.5 CN6 Record EQ (2 Jumpers) - NAB & NAB H CN7 Record Speed Pair (3 Jumpers) - H, H, & H Low Speed Pair (15/7.5 jps^ Machines NAB Equalization at both speeds (Non-Standard EQ) CN3 Low Speed Repro (2 Jumpers) - 3180 & 50 CN2 High Speed Repro (2 Jumpers) - 3180 & 50 CN6 Record EQ (2 Jumpers) - NAB & NAB L CN7 Record Speed Pair (3 Jumpers) - L, L, & L NOTE: // mixed EQ operation (IEC @ 15 ips - NAB @ 7.5 ips) is required, modifications must be made to each Audio Channel PCB. Please contact OTARI Corp. for further information. LOCATION OF JUMPER CONNECTOR 8* 2 £< c/5°- LOW SPEED CN3 REPRO EQ HIQH 8PEE0 CN2 REPRO EQ CN6 CN7 S P E E D PA I R REC EQ NAB H il»ffi NAB L 3180 WMM%m\ m<r& ^^^^^»j~j^i 3180 oo oo ~ir\ /U 50 50 35 I ^^^^\ NAB H NAB L 35 17.5 NAB H 35 17.5 3180 ? !■ ,; 1 J$f^ 0^ *^mQJ < O o -J CD -J ^ O < or cq O I O CD LU LJ or o 00 Lu < < I CO a. < o < ^ o o -J CO CO o _l o o o CO CL < o o 00 I X C O «a o o. C D O > > t- « O + in H > in + > H Bo s M s on S3 % W 00 s S6H < D 2H t z H < o H H 0. to So H H Wtd 0. Ch < (0 > O > in + m t > O > o > o > in H + o r> m H i-VW-^ "-A<W—£ o o -J 03 o g Q < O CO I X MX-80 ERROR CODES ERROR CODE # 0 1 2 3 4 5 20 21 70 71 72 DESCRIPTION PROGRAM CHECK SUM ERROR RAM READ/WRITE ERROR TRANSPORT PCB IC18 ERROR (M5L8255) TRANSPORT PCB IC22 ERROR (M5L8255) SERIAL I/O PCB IC25 ERROR (M5L8255) SERIAL I/O PCB NOT PLUGGED IN TRANSPORT WILL NOT WIND PAST REPEAT POINTS CUE POINTS SELECTED FOR REPEAT FUNCTION ARE IDENTICAL TIME OUT ERROR IN COMMUNICATION WITH SERIAL I/O PCB TIME OUT ERROR IN COMMUNICATION WITH OPTIONAL SERIAL I/O PCB #1 TIME OUT ERROR IN COMMUNICATION WITH OPTIONAL SERIAL I/O PCB #2 MX-80 REMOTE ERROR CODES /0^S ERROR CODE # 90 91 92 93 94 95 96 97 98 99 DESCRIPTION INITIAL COMMUNICATION ERROR TIME OUT ERROR EX: MX-80 AND REMOTE ARE RECEIVING DIFFERENT INFORMATION UNDEFINE ERROR EX: REMOTE RECEIVES UNDEFINED DATA OR GLITCHES CHECK SUM ERROR NO ACKNOWLEDGE SIGNAL RECEIVED PARITY ERROR OVER RUN ERROR FRAMING ERROR TRANSMIT BUFFER FULL STX ERROR NOTE: Dip switches 1-5 inside remote on CPU PCB will defeat indication of error codes 91-99. Error 90 will indicate with this switch in either ON or OFF position. Error 90 indication on power up is common due to the different boot-up routines of the remote CPU and the serial I/O PCB. MX-80 LIST O'TRICKS L SOFTWARE CHECKS A. TRANSPORT SOFTWARE PG08211 Turn On power while pressing STOP switch. Machine Displays software number and version on tape counter. Example: PG08211C > 082 03 B. REMOTE SOFTWARE PG08411 Power up while pressing STOP on remote. Machine displays software number and version on tape counter. C. SERIAL I/O/SOFTWARE PG08311 Remove serial I/O PCB and perform visual check. II. TEST MODES /)$PS\ A. Hold down all five transport buttons on machine and press SEARCH ZERO button then release. After a short pause, machine will perform fullfunction test. B. Hold down all 5 transport buttons on the machine and press SEARCH ZERO. Release SEARCH ZERO and press EDIT/UNLOAD while still holding down transport buttons then release. Machine will toggle between F.fwd and Rwd. To exit test modes, press CLEAR. Tape control will display -A.Err— until TIME/IPS/% button is pressed. MX-80 SERIAL REMOTE PCB (PB-4FEA) Sw 5 is an 8 position DIP Switch having the following functions: Sw 5-1, 5-2, and 5-3: Baud Rate Select (NOTE: Must be set for 38.4 bps, 1 Stop bit, 8 bit characters, Parity On, Parity Even, and Point to Point Protocol to insure proper communication with the CB-123 or CB-124 Remote Control unit. 5-1 5-2 5-3 Baud Rate TP 2 0 0 0 110 1.76 kHz 1 0 0 300 4.8 kHz 0 1 0 1200 19.2 kHz 1 1 0 2400 38.4 kHz 0 0 1 4800 76.8 kHz 1 0 1 9600 153.6 kHz 0 1 1 19200 307.2 kHz 1 1 1 38400 614.4 kHz Sw 5-4: Number of Stop Bits On - 2 Stop Bits Off- 1 Stop Bit Sw 5-5: Character Length Assign On - 8 Bit Characters Off- 7 Bit Characters Sw 5-6: Parity Bit On - Parity On Off- Parity Off Sw 5-7: Parity Select On - Even Parity Off- Odd Parity Sw 5-8: Serial Protocol Select On - Multi-Point (RS-422) Off- Point to Point (RS-232C) Factory Settings: 5-1 5-2 5-3 5-4 5-5 5-6 5-7 5-8 ON ON ON OFF ON ON ON OFF MX-80 TEST POINTS, POTS AND VOLTAGES QUICK REFERENCE GUIDE I. TRANSPORT PCB A. TACH QUADRATURE ADJUSTMENT: 1. TP2 - Tach A from PB-7LAA(front tach PCB) 2. TP3 - Tach B from PB-7DSA(rear tach PCB) 3. TP4 - Tach C from PB-7LAA(front tach PCB) EBU B. FAST WIND SPEED REFERENCE ADJUSTMENT: 1. TP5 - adjust VR2 for 0 V in Unload 2. TP5 - adjust VRl for +7.0 in FFD C. SYSTEM CLOCK 1. TP6 - 400 kHz clock II. REEL CONTROL PCB A. TENSION ARM GAIN ADJUSTMENT: 1. CP6 - adjust VR4 for 0 V with Take-up arm at top of travel - adjust VR5 for +10.0 V with Take-up arm at bottom of travel 2. CP2 - adjust VRl for 0 V w/Supply arm at top of travel adjust VR2 for 10.0 V w/Supply arm at bottom of travel B. PLAY ACCELERATION ADJUSTMENT: 1. CP10 - adjust VR11 for +7.0 V with both Arms at top in Play Mode C. FASTWIND TORQUE ADJUSTMENT: 1. Top of R27 - adjust VR8 for -8.0 V in Rwd 2. Top of R71 - adjust VR9 for -8.0 V in F.fwd D. REEL MOTOR TORQUE ADJUSTMENT: 1. CP4 - adjust VR3 for +7.5 V in Rwd holding Supply reel table 2. CP8 - adjust VR6 for +7.5 V in F.fwd holding Take-up reel table E. TENSION ARM POSITION/TAPE TENSION ADJUSTMENT: 1. Adjust VR4 to align Take-up tension arm with deck plate drill mark while tape is loaded in Stop mode, or adjust for 320 g in Stop mode. 2. Adjust VRl to align Supply Tension Arm with deck plate drill mark while tape is loaded in Stop mode, or adjust for 320 g in Stop mode JfPl^s F. FASTWIND/SPOOLING SPEED ADJUSTMENT: 1. CP13 - adjust VR10 for 3 kHz in Fastwind mode 2. CP13 - adjust VR7 for 1 kHz in in Spool mode m. CAPSTAN CONTROL PCB A. CAPSTAN CLOCK: 1. CP1 - 9.6 kHz at 30 ips from Transport PCB B. CAPSTAN TACH: 1. CP2 - 4.8 kHz at 30 ips from Capstan Motor C. PHASE LOCKED LOOP DUTY CYCLE ADJ 1. CP3 - 9.6 kHz at 30 ips from IC8 D. CAPSTAN GAIN ADJUSTMENT: 1. CP3 - adjust VR4 - 30ips VR5 - 15ips for 50% duty VR6 - 7.5ips cycle E. CAPSTAN DAMP ADJUSTMENT: 1. CP4 - 1.0V when locked - Adj VRl- 30ips for fast recovery of VR2- 15ips waveform when capstan VR3- 7.3ips is held and released -OR2. Adjust VRl, 2, and 3 for minimum wow/flutter V IV. AUDIO PCB ON BOARD TRIMMERS A. TEST SIGNAL LEVEL: 1. Adjust VRl3 for 0 VU with reference signal applied to Test Jack B. INPUT LEVEL: 1. Adjust VRl4 for 0 VU with reference signal applied to Line Input C. PEAK INDICATOR: 1. Adjust VR11 for peak LED illumination at +14dBm input level D. OUTPUT LEVEL: 1. Adjust VRl2 for output reference level E. RECORD BIAS SYMMETRY: 1. Adjust VR22 for minimum thump in Record mode; erase head disconnected F. ERASE BIAS SYMMETRY: 1. Adjust VR23 for minimum thump in Record mode; record head disconnected j0^\ "1 I L £ 0 S © - R f i ff * - C o - t « o w : 1 P^2" L o o o o <UF Recu > ♦•r > Pci*» jif. r.u. L_*J£ T*««J.V*&*» OP-W6 T" s r o* P "> Pok,C <\uoo ggf/xifta* Pi™ < > O k com' con* lllOlCA-. |,^vwp oewc* CPU cu<c.g(tA»e pcii tji»s.ei*. ^ j t V. a « p D » W > RSfxre f*f\*rC^ CO<w*r*r»«i3"- ^_ Courmm. < r = * PC.*, D£c< dsf»sTT«»» iiMwr OttivgTT I «>icaT £*rs«»oe»*p T*a«j-i SPDOHP £xr- 4f>»Ot~ pea C <o a» rtcn. <3* v (/O EC-tol S.PCBP P«v»«> g < T UJL u3 ■<r B,rt-i C©«OT*iOC rPK ! » OPTION c ^ ftM-w " ^ r>ftT» *e-?* Pes copmou >nQic<vtp*> o <^ ot o u TtiAM'*portr Rcstr < C O * * t» ec fc sTiwaa^ -sTftTu^ 1-x* So» rup Te M M o H re.gc k *.» ^ imput/T*re, xt» y e I £.AfOC?>Ofc.T 3 LOCK- L>\ *CfcA*4 CUE Reproduce Head AT T 3 EQ Amplifier Reproduce -SOdBt Low Comp ■ W» i ■—^^—* ——»/*■ IT1? Low Com p. jp* eq » aes/nab/iec " p Bal.\} *" Output MdBm /Active \ Output P £ -*■ VU Drive -lOdBs • fJ Sync. •SOdBt EQ Amplifier Sync Rep. Record Reproduce Amplifier Mode Control Curcuit Amplifier Control Command (from Tape Remote Deck & \/ Amplifier Tape Speed HI/LOW Line. Moni. j~ Test Stonal O L i n e / Te t t J > Erase Sig.O- -VvV P> m ■M—' & -w»—<—-vyv— Active Bil Input BietSig.O- -lOdBs ■^ H H W JF-* Low Comp. \\ U) -lOdBsi, __. ^Ar- Bias Trap IRepro EQ On/off «r —w- »- t r. Record Head 2S7KHz Erase Output 85.7KHI Figure 4-6. MTR-90 block diagram showing audio levels, 24-channel model. (Based on 1 kHz signal, NAB EQ, 30 ips speed.)