Printability, Inspectability and Repair Process Assessment
Transcription
Printability, Inspectability and Repair Process Assessment
2008 International Symposium on Extreme Ultraviolet Lithography Characterization of EUV Mask Defects: Printability and Repair Process Hakseung Han*, Donggun Lee, Hwan-Seok Seo, Kenneth A. Goldberg**, Hoon Kim, Byung-Sub Ahn, In-Yong Kang, Wonil Cho, Sanghyeon Lee, Suyoung Lee, Geunbae Kim, Dongwan Kim, Seong-Sue Kim, and HanKu Cho Memory R&D Center Samsung Electronics Co., Ltd. **CXRO, Lawrence Berkeley National Lab. *hakseung.han@samsung.com 2/total 3/total Absorber defect printability ADT Printability (45nm HP) - Intrusion z Intrusion type defects were formed ranging from ~14nm(4X). z Intrusions larger than ~40nm on mask are printable. Mask SEM Image 14.1nm 25.4nm Wafer SEM Image 29.0nm 41.0nm 60.6nm Printable 78.4nm Measured defect size (on mask) [nm] ADT Printability (32nm HP) - Intrusion z Intrusions larger than ~40nm on mask are printable. z Difficult to analyze due to large resist LER . Mask SEM Image 19.6nm 35.0nm Wafer SEM Image 41.6nm 54.4nm 111nm 111nm Measured defect size (on mask) [nm] ADT Printability (45nm HP) - Extrusion z Extrusions larger than ~40nm on mask are printable. z Failed to get printability about extrusions on 32nm Line . Mask SEM Image 24.4nm 26.5nm 47.8nm Wafer SEM Image 7/total 57.7nm 71.6nm 86.5nm 104.2n m ADT Printability (45nm HP) - Contact z Defect size defined from virtual edge z Defects larger than ~35nm are printable. Defect size Definition Mask SEM Image 24.2nm 27.4nm Wafer SEM Image 33.0nm 39.1nm 41.9nm 47nm 53.2nm 57.0nm Printability Simulation(45nmHP) - Intrusion zTh’shold CD was obtained with varying defect width without shadowing effect. z15nm(60nm on mask) square makes CD change more than 5%. z Less printable than ADT test Æ LER & Process dominant. Assuming Square defect. 5% 10% 9 Printability Simulation(32nmHP) - Intrusion z 12nm(48nm on mask) square makes CD change more than 5%. Assuming Square defect. 5% 10% Printability Simulation(45nmHP) - Extrusion 8nm(32nm on mask) square makes CD change more than 5%. Printable defect size from simulation roughly matches ADT printability data between 5% and 10%. z Extrusion type shows much tighter spec. than intrusion. z z Assuming Square defect. 5% 10% Printability Simulation(32nmHP) - Extrusion z 6nm(24nm on mask) square makes CD change more than 5%. Assuming Square defect. 5% 10% Simulation Comparison with ADT result Simulation underestimates printability for intrusion type. It is likely test result could be misunderstood due to process effect. z z Simulation ( 5 ~ 10 %) ADT test ( Roughly measured) 45nm Int. 32nm Int. 45nm Ext. 32nm Ext. 13 SEMATECH/Berkeley MET 5X reduction, 0.3 NA (synchrotron source) CCD mask SEMATECH/Berkeley AIT ~0.35 NA, 0.2σ 14/total Repair Process Development- Ebeam Repair z z z 450nm Bridge Defects were repaired and evaluated using the AIT. Process tuning needed due to Buffer layer(B) Æ Ru Cap. Preferred. After fine tuning, repair processes (C,D) worked well. BF-120 BF-60 BF A Ref. B C D 15/total BF+60 BF+120 Ebeam Repair Process z Measured Th’hold CD through focus. z Case D showed enough process margin about 200nm. D C Spec(10%) 16/total Nano-machining Repair Process z Extrusion(75nm x 150nm) on 150nm Line was repaired and evaluated using Nano-machinning repair. z Showed good feasibility. BF-120 BF-60 BF BF+60 BF+120 A Ref. B Refer to paper by Dr. Suyoung Lee at BACUS 08 for more details C D 17/total Nano-machining Repair Process z z z Confirmed again using MET. 5x demagnification exposure and 30nm HP L&S images. Appears process margins are enough. BF-100 d0 – 15% BF-50 BF BF+50 d0 – 5% d0 – 10% 18/total BF+100 d0 Nano-machining Repair Process z Missing contact hole repaired and evaluated using AIT and showed good feasibility. z Aerial imaging is very useful for defect printability-related analysis, much more convenient than using wafer exposure. Ref. Repaired Ref. Repaired 19/total Repaired Ref. 20/total The authors would like to thank… z Jinhong Park and Junghoon Lee at Process Development Team for measuring wafer printed at ADT and other ADT related engineers in IMEC and ASML, z Iacopo Mochi for measuring aerial image from the AIT, z Dr. Patrick Naulleau, Paul Denham, Brian Hoef, and Gideon Jones for their helps for the wafer printing test using EUV MET at ALS in LBNL. 21