Steckverbinder in Hochgeschwindigkeitssystemen
Transcription
Steckverbinder in Hochgeschwindigkeitssystemen
Steckverbinder in Hochgeschwindigkeitssystemen Thomas Gneiting, AdMOS GmbH thomas.gneiting@admos.de Company Information • AdMOS was founded in 1997 by Dr. Thomas Gneiting. • AdMOS is focused on: – Software development of tools for model parameter extraction of CMOS and other devices. – Service for modeling and simulation of complex devices and systems. – Engineering service for design and test AdMOS GmbH of RF and high speed components. Advanced Modeling Solutions • Actually, we employ 5 highly qualified In den Gernaeckern 8 engineers for our modeling service and D-72636 Frickenhausen/Germany software development activities. Phone: +49 (7025) 911698-0 • Due to our ongoing expansion, we moved Fax: +49 (7025) 911698-99 to a new office building in December 2007. email: info@admos.de http://www.admos.de Table of Content • Typical examples for high speed interconnect systems – – Communication System Industrial Computer System • Influence of connectors to the performance of high speed systems • Demonstration of a high performance connector • Connector to PCB interface as a limiting factor • Future requirements Communication System Daughter card with Processor, IO, etc. Male Connector Female System (e.g. Router, Switch) Connector with back plane Principle Architecture Communication System Signal paths with a serial point to point connection on differential lines up to 10Gbit/s NRZ code. High Speed Multi Pin Connector Transmitter/ Receiver Backplane System Host Board Signal via with differential traces Transmitter/ Receiver Daughtercard Daughtercard Industrial Computer System S-ATA BPL 3 S-ATA USB GBE USB GbE 5 4 2 1 PCI Express: Prozessor Add-In 2 PCI Express: Prozessor BPL Silicon 3 Serial ATA: Prozessor Disk via BPL 4 Gigabit Ethernet: Prozessor anderes System via BPL 5 USB 2.0: Prozessor Peripherie via BPL BPL Silicon Connector 1 Processor board Transmitter/ Receiver Add in cards Table of Content • Typical examples for high speed interconnect systems • Influence of connectors to the performance of high speed systems – – – Impedance and reflection behavior Crosstalk Eye diagrams • Demonstration of a high performance connector • Connector to PCB interface as a limiting factor • Future requirements Key components for SI analysis in this chapter PCB Striplines Signal path Backplane High Speed Connector to Board Transition High Speed Connector System Host Board Transmitter/Receiver Transmitter out + 8B10B 6.25 Gbit/s out - Daughtercard Daughtercard Signal via with Vias (here for differential signal lines) Modeling the Passive Signal Path Port P2 Num=2 Port P1 Num=1 VAR Design_Settings Trace_length=500 Trace_width=0.15*factor_width Trace_spacing=0.4 Trace_thickness=0.035 Pre_break_height=0.24 er=FR4_er tan_d=FR4_tan_d cbi_Backplane=cbp_PF_FR4_top cbi_Daughter=cdt_PF_FR4_top Port P3 Num=3 g h Daughter card Differential traces: ADS PCB multiline models Board Contact Model Port P4 Num=4 Connector Model g h Daughter card h h g-h g-h g spar_lb_daughter X2 er_dt2=er B_dt2=2*Pre_break_height T_dt2=Trace_thickness tand_dt2=tan_d W_dt2=Trace_width S_dt2=Trace_spacing len_dt2=50 g e-f c-d a-b a-b c-d e-f g-h spar_lb_daughter X3 er_dt2=er B_dt2=2*Pre_break_height T_dt2=Trace_thickness tand_dt2=tan_d W_dt2=Trace_width S_dt2=Trace_spacing len_dt2=50 Board Contact Model Integration of Touchstone Spar files coming from CST Microwave Studio Models are hierarchical and fully parameterized to allow simulation of different configurations (trace lengths, board material) or statistical analyses. c-d a-b g-h a-b c-d e-f spar_stecker_alle Stecker2 spar_stecker_alle Stecker1 Connector plus board contact (Micro Vias or not): e-f g h g Backplane spar_lb_backplane Backplane er_bp2=er T_bp2=Trace_thickness B_bp2=2*Pre_break_height tand_bp2=tan_d len_bp2=Trace_length W_bp2=Trace_width S_bp2=Trace_spacing h Characteristic Impedance Time Domain Var Eqn TRANSIENT DUT 8 Ue7 Ue8 9 Ue9 7 10 Ue10 11 Ue11 ERNI ERmet ZD connector 2nd connector 115 12 model_DUT X1 sim_index=3 VAR VAR SRC_Vhigh=1 SRC_Rise=85e-12 SRC_Period=80e-9 Backplane 110 Ue12 105 100 impededance Ohm Ue1 VtPulse SRC4 R TLIN Vlow=0 V R20 TL2 Vhigh=SRC_Vhigh t R=50 Ohm Z=50.0 Ohm Edge=cosine E=60 Rise=SRC_Rise F=1 GHz Fall=SRC_Rise Width=SRC_Period/2-SRC_Rise Period=SRC_Period Ue2 VtPulse R SRC5 TLIN R21 1 Vlow=0 V TL4 t R=50 Ohm Vhigh=-SRC_Vhigh Z=50.0 Ohm 2 Edge=cosine E=60 Rise=SRC_Rise F=1 GHz Ue3 3 Fall=SRC_Rise Ue4 4 Width=SRC_Period/2-SRC_Rise Period=SRC_Period Ue5 5 VtPulse 6 R SRC6 TLIN R24 Vlow=0 V TL5 t R=50 Ohm Vhigh=SRC_Vhigh Z=50.0 Ohm Edge=cosine E=60 Rise=SRC_Rise F=1 GHz Fall=SRC_Rise Width=SRC_Period/2-SRC_Rise Period=SRC_Period Ue6 VtPulse R SRC7 TLIN R25 Vlow=0 V TL6 t R=50 Ohm Vhigh=-SRC_Vhigh Z=50.0 Ohm Edge=cosine E=60 Rise=SRC_Rise F=1 GHz Fall=SRC_Rise Width=SRC_Period/2-SRC_Rise Period=SRC_Period 95 90 85 80 75 70 65 60 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 5.7 5.9 time, nsec Plated through hole vias for the ERNI ERmet ZD connector (press-in technique) Crosstalk Time Domain Ue1 VtPulse SRC4 R TLIN Vlow=0 V R20 TL2 Vhigh=SRC_Vhigh t R=50 Ohm Z=50.0 Ohm Edge=cosine E=60 Rise=SRC_Rise F=1 GHz Fall=SRC_Rise Width=SRC_Period/2-SRC_Rise Period=SRC_Period Ue2 VtPulse R SRC5 TLIN R21 1 Vlow=0 V TL4 t R=50 Ohm Vhigh=-SRC_Vhigh Z=50.0 Ohm 2 Edge=cosine E=60 Rise=SRC_Rise F=1 GHz Ue3 3 Fall=SRC_Rise Ue4 4 Width=SRC_Period/2-SRC_Rise Period=SRC_Period Ue5 5 VtPulse 6 R SRC6 TLIN R24 Vlow=0 V TL5 t R=50 Ohm Vhigh=SRC_Vhigh Z=50.0 Ohm Edge=cosine E=60 Rise=SRC_Rise F=1 GHz Fall=SRC_Rise Width=SRC_Period/2-SRC_Rise Period=SRC_Period Ue6 VtPulse R SRC7 TLIN R25 Vlow=0 V TL6 t R=50 Ohm Vhigh=-SRC_Vhigh Z=50.0 Ohm Edge=cosine E=60 Rise=SRC_Rise F=1 GHz Fall=SRC_Rise Width=SRC_Period/2-SRC_Rise Period=SRC_Period Maximum NEXT in the via sections of the connector ! TRANSIENT DUT 8 Ue7 Ue8 9 Ue9 7 10 Ue10 11 Ue11 Var Eqn VAR VAR SRC_Vhigh=1 SRC_Rise=85e-12 SRC_Period=80e-9 Impedance 12 model_DUT X1 sim_index=3 Ue12 The connector itself generates very low crosstalk S-Parameter of Differential Traces DUT in out 1 7 2 8 3 9 4 10 5 11 6 12 Transmission 0 model_DUT X1 PCB -5 dB(S(5,6)) Var Eqn S-PARAMETERS -10 Reflection 0 -15 0.0 -5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 freq, GHz -10 dB(S(5,5)) Differential S-parameters in Odd mode. 0.5 -15 -20 -25 -30 -35 -40 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 freq, GHz 4.0 4.5 5.0 5.5 6.0 5.5 6.0 Eye Diagrams (Measured and Simulated) S M A connectors DUT B ackplane ee B it P attern G enerator O scilloscope A gilent 86100 A Datastream: 10Gbit/s NRZ Summary: Connector Influence The following list shows, which component mainly influences performance degradations in high speed systems: • Signal loss (|S21|): is mostly dominated by the losses in the PCB • Xtalk: can be very high in the connector to PCB interface • Reflections: can be very high in the connector to PCB interface interface • Skew: in both, the connector and the PCB interface Table of Content • Typical examples for high speed interconnect systems • Influence of connectors to the performance of high speed systems • Demonstration of a high performance connector – – ERNI ERmet ZD and ERmet 0XT Critical issues in connector designs • Connector to PCB interface as a limiting factor • Future requirements Example Connector (1): ERNI ERmet ZD Differential traces 4 differential signal pairs per connector wafer Shielding components Shielding in the male connector Pressfit pins for signals and ground shields Example Connector (2): ERNI ERmet 0XT Differential traces 4 differential signal pairs per connector wafer micro-vias for the signal interconnections Shielding components Ground connections using Pin in Paste technology Construction ERNI ERmet ZD Federleiste (Female) Abdeckung Kontaktaufnahme Federkontakte Deckel Schirmblech Schirmblech Messerkontakte Kontaktaufnahme Messerleiste (Male) Critical Issues in Connector Design Contact Design and overlay between male and female conductor Shielding Pressfit Pins Skew between the 2 conductors of a differential pair Advances in Contact Design D-Sub DIN ERmet SMC ERmet ZD Minimized discontinuities by minimized contact structures Microspeed EM Analysis to Support Connector Design Table of Content • Typical examples for high speed interconnect systems • Influence of connectors to the performance of high speed systems • Demonstration of a high performance connector • Connector to PCB interface as a limiting factor – – Demonstrator Comparison between Pressfit Technology, Microvias and Backdrilling • Future requirements Case Study: ERNI ERmet 0XT This case study takes into account the connector to PCB interface of the ERNI ERmet 0XT connector which can be used for data rates of at least 10GBit/s. The simulations are performed in a fully 3-D EM simulator (CST Microwave Studio). Different kind of interfaces Setup 1 Setup 2 Setup 3 Connector pad Via type SMT Microvia SMT Through hole Via diameter Signal layer 0.35 Top Pressfit Throughole with backdrill 0.5 Top Zoomed cross section 0.3 Bottom Different kind of interfaces Setup 1 Setup 2 Setup 3 Connector pad Via type SMT Microvia SMT Through hole Via diameter Short Signal layer 0.35 Top Pressfit Throughole with backdrill 0.5 Top Zoomed cross section pressfit pin Line in PCB Backdrilled through via 0.3 Bottom Different kind of interfaces Setup 1 Setup 2 Setup 3 Connector pad Via type SMT Microvia SMT Through hole Via diameter Signal layer 0.35 Top Pressfit Throughole with backdrill 0.5 Top Zoomed cross section SMD Pad Microvia Line in PCB 0.3 Bottom Different kind of interfaces Setup 1 Setup 2 Setup 3 Zoomed cross section Connector pad Via type SMT Microvia Via diameter Signal layer 0.35 Top Pressfit Throughole with Through via backdrill 0.5 Top SMT Through hole 0.3 SMD pad Bottom Line in PCB Performance: Impedance + Crosstalk Impedance NEXT SMT pad, microvia SMT pad, through hole via Pressfit, backdrill SMT pad, microvia SMT pad, through hole via Pressfit, backdrill FEXT Signal: Step with a rise time of 50ps (20 to 80%) SMT pad, microvia SMT pad, through hole via Pressfit, backdrill Table of Content • Typical examples for high speed interconnect systems • Influence of connectors to the performance of high speed systems • Demonstration of a high performance connector • Connector to PCB interface as a limiting factor – – Demonstrator Comparison between Pressfit Technology, Microvias and Backdrilling • Future requirements Future Requirements High Speed Connectors • Minimize reflections through miniaturisation and optimisation of the mating zone • Keep crosstalk low with improved shielding or clever arrangement of signals • Improve connector to PCB interface by the usage of – smaller pressfit zones – BGA like balls to solder on SMT pads ? • Improve skew behavior Connectors should be ready for the 40GBit/s challenge as outlined in the BMBF Verbundprojekt Giganoboard: „... Deshalb stellt die Entwicklung von hochintegrierten, komplexen Leiterplatten für die elektrische Datenübertragung bis 40 GBit/s ..... eine Schlüsseltechnologie dar. .... „