EECT 7327 - Data Converters - The University of Texas at Dallas

EECT 7327
Data Converters
Professor Yun Chiu
© 2014
Erik Jonsson School of Electrical Engineering and Computer Science
University of Texas at Dallas
Logistics
• Instructor: Professor Yun Chiu
• E-Mail: chiu.yun@utdallas.edu
• Office Hour: Tuesday, 2-4 pm, in ECSN 3.602
• TA: TBA
• TA Office Hour: TBA
• Website: http://www.utdallas.edu/~chiu.yun/7327
• Lecture notes, handouts, project assignments, etc. will be posted on
the website (no paper copy will be distributed in class)
–2–
Data Converters
EECT 7327
Introduction
Professor Y. Chiu
Fall 2014
Prerequisites
• Analog circuit design
– EECT 6326 (Analog IC Design), or equivalent at the level of G&M,
Razavi, or similar books
• Digital signal processing
– EE 4361 (Digital Signal Processing), or equivalent at the level of O&S or
similar books
• Digital circuit design
– Basic knowledge of gate/transistor-level logic design (logic family,
sequential logic, etc.)
– Some knowledge of AHDL or Verilog-A is helpful for the project
–3–
Data Converters
EECT 7327
Introduction
Professor Y. Chiu
Fall 2014
Course Outline (not in order)
1. Switched-capacitor circuit techniques and realization
– SC amplifier and SC integrator
2. Review of topics in sampled-data signal processing
3. Sample-and-hold amplifier (SHA)
4. Nyquist-rate data converters
– Flash, algorithmic/cyclic, SAR, pipeline, subranging, etc.
5. Oversampled data converters
– Single-loop, MASH, multi-bit, continuous-time, etc.
6.
7.
8.
9.
10.
Precision techniques for data conversion
Digital calibration, digital assistance, and digital post-processing
Data converter testing and benchmarks
Technology trend and figure-of-merit (FoM)
Advanced topics (if time allows)
–4–
Data Converters
EECT 7327
Introduction
Professor Y. Chiu
Fall 2014
Lecture Notes & Textbook
•
•
Textbook: No required textbook. Lecture notes, slides, and papers
will be posted on the course website.
References
–
Analog circuit design
•
•
•
•
–
Data converters
•
•
•
–
Gray, et al., Analysis and Design of Analog Integrated Circuits, 4th Ed., Wiley, 2001
Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2001
Johns and Martin, Analog Integrated Circuit Design, Wiley, 1997
Allen and Holberg, CMOS Analog Circuit Design, 2nd Ed., Oxford, 2002
Razavi, Principles of Data Conversion System Design, IEEE Press, 1995
van de Plassche, CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters,
2nd Ed., Kluwer, 2003
Norsworthy et al., Delta-Sigma Data Converters: Theory, Design, and Simulation,
Wiley, 1996
Switched-capacitor circuits
•
Gregorian and Temes, Analog MOS Integrated Circuits for Signal Processing, Wiley,
1986
–5–
Data Converters
EECT 7327
Introduction
Professor Y. Chiu
Fall 2014
CAD Tools
• CAD Tools required:
– SpectreRF
SPICE-type analyses: .dc, .ac, .xf, .noise, .tran, etc.
Additional capabilities: pss, pac, pxf, pnoise, pdisto to analyze large-signal
nonlinear circuits (e.g., switched-capacitor circuits, RF circuits)
– MATLAB, Simulink
Mixed-domain behavioral modeling, analog/digital filter synthesis, etc.
• CAD Tools recommended:
– Cadence GUI suite (awd, ocean, icfb, msfb, icde, icms, etc.) for design
entry, simulation, waveform display, etc.
–6–
Data Converters
EECT 7327
Introduction
Professor Y. Chiu
Fall 2014
Projects, Exam, and Grading
•
A series of three phases of a nearly semester-long term project to build a
X-bit, Y-MS/s Z-type CMOS ADC…
•
•
Midterm exam:
Term Project:
– Phase I:
– Phase 2:
– Phase 3:
30%
70%
(TBA)
20%
20%
30%
(assigned in 4th week)
(assigned in 7th week)
(assigned in 10th week)
5%
(in class, last day of instruction)
•
Project presentation:
•
Grading Policy: Projects are to be completed by two-student groups, with
each group submitting a joint report (and SPICE decks) in each phase.
Grading in each phase will be independent, i.e., based on phase-specific
goals and specifications.
–7–
Data Converters
EECT 7327
Introduction
Professor Y. Chiu
Fall 2014
Why This Course?
Isn’t Digital Great Enough?
–8–
Data Converters
EECT 7327
Introduction
Professor Y. Chiu
Fall 2014
Advantages of Digital VLSI
•
Noise immunity, robustness
•
Unlimited precision or accuracy
•
Flexibility, programmability, and scalability
•
Electronic design automation (EDA) tools widely available and
successful
•
Benefiting from Moore’s law – “The number of transistors on a chip
doubles every 18 months,” IEDM, 1975
– Cost/function drops 29% every year
– That’s 30X in 10 years
–9–
Data Converters
EECT 7327
Introduction
Professor Y. Chiu
Fall 2014
Moore’s Law
1000
10000
HP-MPU printed gate length
100
1000
10
1
1996
2000
2004
2008
2012
2016
Transition freq. [GHz]
Gate length [nm]
NMOS peak transition frequency
100
2020
Production year
2004 International Technology Roadmap of Semiconductor
(http://www.itrs.net/)
– 10 –
Data Converters
EECT 7327
Introduction
Professor Y. Chiu
Fall 2014
Moore’s Law
“If GM had kept up with technology like the
computer industry has, we would all be driving
$25 cars that got 1,000 miles to the gallon…”
– Bill Gates, COMDEX keynote
– 11 –
Data Converters
EECT 7327
Introduction
Professor Y. Chiu
Fall 2014
Just Digital is far from enough…
Analog World
(CT, CA)
Phone Lines, Cables
(DSL, Cable Modem)
E&M Waves
(Cellphone, Radio,
GPS)
Digital World
(DT, DA)
Audio
(MP3, Hearing Aid)
Video
(Dig. Camera, LCD TV,
TFT Display)
Mechanical Transducers
(Car/Airplane Sensors,
MEMS, Nanopore)
Biochemical Sensors
(Hazard detection, Drug
Delivery, Lab-on-a-Chip)
Digital Storage
(DVD, Hard Disk, Flash)
Paul Gray’s eggshell diagram
– 12 –
Data Converters
EECT 7327
Introduction
Professor Y. Chiu
Fall 2014
Challenges for Analog
•
Sensitive to noise – SNR (signal-to-noise ratio)
•
Subject to device nonlinearities – THD (total harmonic distortion)
•
Sensitive to device mismatch and process variations
•
Difficult to design, simulate, layout, test, and debug
•
Inevitable, often limits the overall system performance/cost
•
Scaling scenario outlook
– High-speed, low-resolution applications benefit
– High SNR design difficult to scale with low supply voltages
– 13 –
Data Converters
EECT 7327
Introduction
Professor Y. Chiu
Fall 2014
Example 1 – Mixed-Signal Hearing Aid
ΣΔ
A/D
DSP
ΣΔ
D/A
H-Bridge
Driver
Decimation
Filter
AGC
[dB]
0
-50
-100
-150
0.001
0.01
Normalized frequency
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0.1
0.5
Data Converters
EECT 7327
Introduction
Professor Y. Chiu
Fall 2014
Example 2 – PRML Read Channel
Clock
Recovery
D
D
…
D
A/D
Preamp
Viterbi
Adaptive
Equalizer
LPF
PR4
Sample
value
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0 1 1 0
01011
Data Converters
EECT 7327
Introduction
Professor Y. Chiu
Fall 2014
Example 3 – RF Transceiver
B
C
A
A/D
LNA
I
Q
SCF, GmC
OP-RC
AAF
LO
DSP
D/A
PA
Desirable
Channel
I
Q
LO
A
B
C
RF
IF or BB
BB
– 16 –
Data Converters
EECT 7327
Introduction
Professor Y. Chiu
Fall 2014
Example 3 – RF Transceiver
• Small form factor, high integration, more functions, low power
• Market/economy is the ultimate driving force
Ericsson CH388
(Hybrid, 1995)
Berkäna GSM/GPRS Ericsson Bluetooth
(CMOS, 2005)
(CMOS, 2001)
Future
Past
A
D
CMOS? or
something else?
Present
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