Program - CSMANTECH

2015
International Conference on Compound Semiconductor Manufacturing
Technology
May 18th – 21nd, 2015
www.csmantech.org
Hyatt Regency Scottsdale
Resort & Spa at Gainey Ranch
Scottsdale, Arizona, USA
Photographs courtesy of
Scottsdale Convention & Visitors Bureau
Hyatt Regency Scottsdale Resort & Spa
CONFERENCE AT A GLANCE
SUNDAY, May 17th
6:00 PM – 8:00 PM
MONDAY, May 18th
7:00 AM – 7:00 PM
7:00 AM – 8:30 AM
8:30 AM – 4:45 PM
7:00 AM – 8:15 AM
8:15 AM – 4:30 PM
12:30 PM – 1:30 PM
6:00 PM – 9:00 PM
TUESDAY, May 19th
7:00 AM – 5:00 PM
7:00 AM – 8:30 AM
8:30 AM – 9:00 AM
8:30 AM – 5:20 PM
9:00 AM – 9:30 AM
9:30 AM – 11:00 AM
11:00 AM – 1:00 PM
1:00 PM – 2:50 PM
2:50 PM – 3:40 PM
3:40 PM – 5:20 PM
5:30 PM – 6:30 PM
5:30 PM – 6:30 PM
7:00 PM –10:00 PM
REGISTRATION
Registration
REGISTRATION
Registration
CS MANTECH BREAKFAST
Location TBD
CS MANTECH WORKSHOPS
Location TBD
ROCS BREAKFAST
Location TBD
ROCS WORKSHOP
Location TBD
LUNCHEON FOR WORKSHOPS
Location TBD
EXHIBITS RECEPTION
Vaquero Ballroom
REGISTRATION
Registration
BREAKFAST
Vaquero Ballroom - Exhibits
OPENING CEREMONIES
Arizona Ballroom
EXHIBIT OPEN
Vaquero Ballroom
KEYNOTE: Prof. Hiroshi Amano – Nobel Prize for Physics
Arizona Ballroom
SESSION 1: Plenary
Arizona Ballroom
EXHIBITS LUNCH
Vaquero Ballroom
SESSION 2: Compound Semiconductor Trends
Arizona Ballroom
BREAK
Arizona Ballroom - Exhibits
SESSION 3: GaN Manufacturing
Arizona Ballroom
EXHIBITORS’ FORUMS
Location TBD
STUDENT FORUM
Location TBD
INTERNATIONAL RECEPTION
Buses Depart at 6:45 PM
WEDNESDAY, May 20st
7:00 AM – 5:00 PM
REGISTRATION
Registration
7:00 AM – 8:30 AM
BREAKFAST
Vaquero Ballroom - Exhibits
8:00 AM – 9:40 AM
SESSION 4: Materials
Arizona Ballroom - A
8:00 AM – 9:40 AM
SESSION 5: Metalization
Arizona Ballroom - B
8:30 AM – 11:00 AM
EXHIBIT OPEN
Vaquero Ballroom
9:40 AM – 10:20 AM
BREAK
Arizona Ballroom - Exhibits
10:20 AM – 12:00 PM
10:20 AM – 12:00 PM
SESSION 6: GaN Materials
Arizona Ballroom - A
SESSION 7: GaN Dry Etch
Arizona Ballroom - B
12:00 PM – 1:30 PM
OPEN LUNCH
1:30 PM – 3:10 PM
SESSION 8: Thermal Analysis
Arizona Ballroom - A
SESSION 9: GaN Annealing/Passivation
Arizona Ballroom - B
BREAK
Location TBD
SESSION 10: Test/Yield
Arizona Ballroom - A
SESSION 11: Manufacturing Improvements
Arizona Ballroom - B
RUMP SESSION RECEPTION
Location TBD
RUMP SESSIONS A-D
Location TBD
SEMI Standards Meeting
Location TBD
1:30 PM – 3:10 PM
3:10 PM – 3:30 PM
3:30 PM – 5:10 PM
3:30 PM – 5:10 PM
5:10 PM – 5:50 PM
5:50 PM – 6:50 PM
7:00 PM – 9:00 PM
THURSDAY, May 21st
7:00 AM – 9:30 AM
7:00 AM – 8:30 AM
8:00 AM – 9:40 AM
8:00 AM – 9:40 AM
9:40 AM –10:10 AM
10:10 AM –12:00 PM
10:10 AM –12:00 PM
REGISTRATION
Registration
BREAKFAST
Location TBD
SESSION 12: GaAs Processing
Arizona Ballroom - A
SESSION 13: GaN RF Devices
Arizona Ballroom - B
BREAK
Location TBD
SESSION 14: III-V Devices
Arizona Ballroom - A
SESSION 15: GaN Power Electronics
Arizona Ballroom - B
12:00 PM – 1:00 PM
LUNCH
Location TBD
1:00 PM – 1:30 PM
30th Anniversary: A Look Ahead
Lunch Location
1:30 PM – 3:00 PM
SESSION 16: GaN Reliability
Arizona Ballroom
SESSION 17: Posters
South Foyer
3:00 PM – 4:00 PM
4:00 PM – 4:30 PM
CLOSING RECEPTION
Desert Garden
2015 CONFERENCE HIGHLIGHTS
The 2015 CS MANTECH program begins on Monday, May 18th with a series of tutorial workshops. This year’s workshop theme is
RF for Device and Fab Engineers: Basic and Advanced Measurements, Device Modeling, Power Amplifier Design, and RF Packaging.
Please see the MANTECH WORKSHOP section for details.
Also on Monday, CS MANTECH is pleased to be hosting the internationally recognized Reliability of Compound Semiconductor
(ROCS) workshop. This workshop is the premier forum for the presentation of the latest results and new developments related to
compound semiconductor reliability.
The JEDEC Committee JC-14.7 sponsors the ROCS workshop. Please see
http://www.jedec.org/home/gaas for details.
The conference social functions begin Monday evening at 6:00pm with the Exhibitor Reception. Attendees will have the opportunity to
interact with material suppliers, tool manufacturers, and service provides. This is a great chance to touch base with current vendors, view
new offerings, and network with colleagues all while enjoying a taste of the Southwest.
The CS MANTECH Conference begins Tuesday morning with opening ceremonies that include the 2014 Best Paper awards,
Sponsorship Recognition, and a conference overview along with a short tutorial on the Guidebook Application. There will also be a
special recognition of the CS MANTECH founder, He Bong Kim on the 30th Anniversary of the conference. Following the opening
functions the CS MANTECH committee is pleased to announce there will be a Keynote Presentation from the 2014 Nobel Prize for
Physics winner, Dr. Hiroshi Amano from Nagoya University. Dr. Amano will give his unique perspective on light emitting diodes with
his talk "Lighting the Earth with LEDs, -Past, Present and Future Prospects of GaN-Based Blue LEDs-".
The technical program begins with a Plenary Session composed of three invited talks. First, Timothy Heidel from the office of
Advanced Research Projects Agency - Energy (ARPA-E), will discuss power electronics in his talk “Strategies for Wide Bandgap,
Inexpensive Transistors for Controlling High-Efficiency Systems”. Second, Dr. Daniel Green from the Defense Advanced Research
Projects Agency (DARPA) will provide an overview of current Microsystems Technology Office (MTO) semiconductor research
activities in his talk “Compound Semiconductor Technology for Modern RF Modules: Status and Future Directions”. Third, Dr. Tatsuya
Hosotani from Murata Manufacturing will describe wireless power transfer in his talk “Importance of High Frequency Compound
Semiconductor devices for Wireless Power Transfer using Direct-Current-Resonance System”. Following the Plenary, attendees are
welcome to attend a sponsored luncheon in the Exhibitor Hall.
After lunch, the technical program resumes with sessions on Compound Semiconductor Trends and GaN Manufacturing. These serial
sessions are composed of invited and regular submission talks. The Tuesday technical program concludes with the Exhibitors’ Forum and
Student Forum. The Exhibitors’ Forum provides an opportunity for exhibitors to present short marketing/technical presentations to the
conference attendees. The Student Forum provides an opportunity for students to explore career options through networking with
members of the CS community from industry, academia, and government. Tuesday evening, CS MANTECH will host the International
Reception
Wednesday morning begins early with breakfast in the Exhibitor Hall where attendees can follow up on questions from the Exhibitors’
Forum or meet with one or two new vendors before the technical sessions begin at 8:00am. There is a full program of parallel sessions
throughout the day. Morning sessions focus either on III-V and III-N materials or metallization and dry etch processing. Afternoon
sessions continue thermal analysis and yield enhancement or annealing/passivation and manufacturing improvements. Parallel sessions
have been structured so that attendees can move between talks and sessions. The morning break, held in the Exhibitor Hall, will be one
last opportunity to talk with vendors before the exhibits close at 11:00am. Lunch is open to allow attendees to explore the resort area and
maybe take in a little sun. Following the technical sessions, Wednesday evening is host to the popular CS MANTECH Rump Sessions.
Eat, drink, and debate! Attendees are encouraged to join any (or all) of the four parallel highly interactive and lively discussions.
Thursday morning the technical program continues with parallel sessions. Topics include GaN and III-V RF Devices along with GaN
Power Electronics. CS MANTECH will be providing lunch where Dr. Milton Feng from the University of Illinois @ Urbana-Champaign
will discuss the future of compound semiconductors in his talk “Compound Semiconductor Microelectronics / Photonics Research for the
next 30 years – Personal View based on past 30 years evolution”. After lunch there will be one serial session on GaN Reliability followed
by the interactive Poster Session. The poster session is a unique opportunity to talk one-on-one with the author on topics including
photonic devices, photolithography, noise characterization, and more. Attendees vote for best poster for which the winning author will
receive a Best Poster Award.
The conference ends Thursday afternoon with a Closing Reception and the perennial picture contest. However, instead of the usual Ugly
picture, this year the picture contest has a Western Theme. Cactus, cowboys, Clint Eastwood – anything on a Western theme is allowed!
The pictures can be real or photo-shopped, have something to do with a fab or not, be beautiful or funny, whatever your creativity can
come up with! Amazon gift cards will be given to the top two pictures, as determined by voting of attendees at the Interactive Forum. The
closing reception also features the conference feedback prize drawing.
On behalf of the 2015 Technical Program Committee, Welcome to Scottsdale!
CS MANTECH WORKSHOP
This year the CS-MANTECH workshop provides a crash course in “all things RF.” Aimed at practicing engineers in the III-V device
community (but also appropriate for students or anyone curious about how III-V devices can be characterized, modeled, packaged, or
designed into systems), this workshop will provide attendees with exposure to a broad range of key RF concepts and techniques. With
coverage of basic and advanced measurements of RF devices, device modeling, power amplifier design, and device and circuit packaging,
the workshop will provide a solid foundation as well as coverage of emerging techniques and approaches in the RF application space for
III-V devices.
This year’s workshop consists of five segments led by experts in their respective domains. The first two segments focus on device
characterization. The Fundamentals of RF Measurements will be taught by Marcel Tutt (Freescale); topics include a discussion of device
properties, figures of merit, and measurements and analysis techniques. Measurement techniques that will be discussed include Sparameters, X-parameters, noise figure, and power. On-wafer and in-fixture measurements, as well as calibration and de-embedding will
be discussed. The second segment, Advanced Microwave Measurements for Device Characterization, will be led by Wooyeol Choi (U.
Texas-Dallas). This talk focuses on more advanced RF device characterization techniques, with emphasis on nonlinear properties of
devices. The role and limitations of pulsed-bias s-parameter measurements, load-pull (both conventional as well as harmonic load pull),
and large-signal network analysis will be discussed, with explanations of both how these techniques are performed as well as examples of
the information they can provide about the devices under test
.
The third segment will provide an overview of device modeling, delivered by David Root (Keysight). Since modeling work flows
differ greatly depending on the intended user of the models (e.g., circuit designers want models that simulate quickly and accurately but
without regard to whether or not the models have a physical basis, while fab and device engineers typically use models to understand
devices and their variation and so require physically-meaningful models), the various different types of device models (physically based,
empirical, and behavioral) will be contrasted and their benefits and limitations discussed. In addition, there is often a reliance on in-fab
device PCMs based on DC and S-parameter measurements; while these tests are mature, they are often insufficient to infer the largesignal performance of devices under the high-power or modulated stimuli typical of modern systems. The basics of the relationships
between in-fab measurements and model equivalent circuits will be reviewed, and simple but rigorous principles relating measurements to
nonlinear model characteristics are reviewed, resulting in a unified description for both FET and bipolar devices. Finally, trends toward
more sophisticated measurements and simulation models that could be exploited in fabs will be presented.
Following the discussion of device modeling, Jonathan Chisum (formerly MIT Lincoln Laboratory, now at the Univ. of Notre Dame)
will lead the fourth segment, focusing on circuit design for power amplifiers. RF power amplifiers (PA) are of critical importance for
wireless communication systems, radar, electronic warfare, and more. Because PAs are designed to extract the maximum power, gain,
efficiency, or linearity out of a given active device, there are fundamental tradeoffs that must be made and therefore PA non-idealities
typically limit overall system performance. This segment will provide an overview of PA performance parameters, linear, overdriven, and
switch-mode amplifier classes and topologies (A, B, AB, C, D, E, F, F -1), design methods, and PA non-idealities in order to understand
these design tradeoffs and their effect on PA performance. The effect of harmonic termination on amplifier efficiency and bandwidth, and
the impact of device, interconnect, and packaging parasitics will be discussed. The segment culminates with a discussion of advanced
topologies and compensation methods for enhancing PA performance.
The final segment of the workshop, Packaging and Functional Integration, will be jointly led by Elias Reese and Tarak Railkar
(Qorvo). In this segment, the distinctions between RF/microwave/mm-wave packaging and other semiconductor packaging will be
discussed, and common RF packaging forms in production today will be described. In addition, the implications of volume and cost
structure on packaging will be considered, as will the escalating challenges in RF packaging, including performance (frequency, power,
environmental considerations), functional integration (performance improvement, size reduction), and manufacturing cost and volume.
The discussion will also include how the interplay among semiconductor, packaging technology, and manufacturing affects the viability
and deployment of electronic systems, and how packaging can impact system development time and lifecycle cost. Beyond the current
state of the art, the segment will conclude with a look forward to the packaging needs, trends, and visions for the future.
2015 ROCS WORKSHOP
Reliability of Compound Semiconductors
Monday, May 18th, 2015
Hyatt Regency Scottsdale Resort & Spa
Room: TBD
8:30 a.m. – 5:00 p.m.
The 30th annual ROCS Workshop - formerly known as the GaAs Rel Workshop - will be held in conjunction with the CS ManTech
Conference on Monday May 18th, 2015, at the Hyatt Regency Scottsdale Resort & Spa in Scottsdale, AZ. This meeting is sponsored by
the JEDEC JC-14.7 Committee on GaAs Reliability and Quality Standards and the EIA.
The ROCS Workshop brings together researchers, manufacturers and users of compound semiconductor materials, devices and circuits.
Papers presenting latest results, including work-in-progress and new developments in all aspects of compound semiconductor reliability
will be presented. Potential authors are invited to submit an electronic copy of a one to two page comprehensive summary, suitable for a
15 minute presentation, to rocs@jedec.org. The deadline for receipt of submissions is March 2rd, 2015; late papers of significant interest
may be considered up to the date of the Workshop. The Advanced Program will be published approximately one month prior to the
meeting at http://www.jedec.org/home/gaas/.
Advance registration for the workshop is $100 for students, $200 for JEDEC members, and $225 for non-members; on-site registration
is $250. Registration includes a full day of ROCS presentations, two breaks, a luncheon and a copy of the Proceedings. Late registration
will be available starting at 7:30 a.m. on the morning of the workshop. For further information or to register on-line (through May 4th,
2015), visit our web site at http://www.jedec.org/home/gaas/, or contact: Peter Ersland, Workshop Chairman, M/A-COM Technology
Solutions, 100 Chelmsford Street, Lowell, MA 01851, (978) 656-2817, Peter.Ersland@macom.com.
INDUSTRY EXHIBITS
As a tradition, the Exhibit held in conjunction with the CS MANTECH Conference demonstrates the venue for the compound
semiconductor arena that offers the excellent opportunity for conference attendees and vendors to directly interact with each other for
both parties to submit detailed information from either side to efficiently resolve open questions regarding products and services on the
spot. The portfolio of Vendors that are on display include those that manufacture fully functional equipment for various applications or
related sub-assemblies for the development and production of devices and semiconductor materials as well as those offering the necessary
starting materials like substrates and gases. Representations on tools for optical inspection and those for evaluation of materials and
components are established in addition as well. To complete the unique set-up of the Exhibits, highly qualified and respected journals and
research agencies providing latest news from R&D labs and production companies as add-on to the insight in what’s happening in the
different markets and technologies of the semiconductor industry are represented also.
Conference attendees as students, whether experienced or new to this get-together, as well as technical and business people are
receiving latest updates and details on products they are already or may become interested in by chance stopping by at a booth attracting
their attention.
Communication and exchange between vendors and conference attendees is strongly enforced through the Exhibit Reception in the
evening before the conference start, coffee-breaks during the Exhibit and conference lunch on Tuesday, all just taking place in the
Exhibition Hall around the booths which further underlines the value of participation for all.
To further support provision of the unique capabilities and introduction on the vendors themselves in combination with demonstration
of the advantages and performance of their long-time existing as well as latest products, the Exhibitor Forum on Tuesday after the
technical sessions is set-up as an uniquie platform.
Access to information for exhibitors as well as on-line registration are available on the Exhibitor Link on the CS MANTECH website
(http://csmantech.org/exhibitors/exhibitors.html).
In case of any still open question regarding the Industry Exhibits at the CS MANTECH, please do not hesitate to contact the Exhibits
Chair Ruediger Schreiner at exhibitor@gaasmantech.org .
SEMI STANDARDS MEETING
The SEMI Standards meeting is scheduled for Wednesday May 20th, from 7:00 pm to 9:00 pm (immediately following the Rump
Sessions. The SEMI Compound Semiconductor (GaAs, InP and SiC) Committee invites CS MANTECH Conference attendees interested
in the development of internationally approved standards for wafer specifications to attend this meeting. Topics being addressed are
GaAs, InP, and SiC dimensions/orientations and electrical properties, epitaxial layer specifications (which properties should be specified,
and how they are to be verified), and non-destructive test methods.
Based in San Jose, CA, SEMI is an international trade association serving more than 2,400 companies participating in the
semiconductor and flat panel display equipment and materials markets. SEMI maintains offices in Brussels, Moscow, Tokyo, Seoul,
Hsinchu, Beijing, Singapore, Austin, Boston and Washington, DC. For additional information, please contact: Co-Chair: James Oliver of
Northrop Grumman at 410-765-0117 or j.oliver@ngc.com, Co-Chair: Russ Kremer of Freiberger Compound Materials at 937-291-2899
or russ@fcm-us.com, or at SEMI Standards contact Paul Trio at 408-943-6900 or ptrio@semi.org.
WESTERN THEME PICTURE CONTEST
To celebrate our western site for this year’s conference, we are sponsoring a picture contest.
Cactus, cowboys, Clint Eastwood - anything on a Western theme is allowed! The pictures can be
real or photo-shopped, have something to do with a fab or not, be beautiful or funny, whatever your
creativity can come up with! Amazon gift cards will be given to the top two pictures, as determined
by voting of attendees at the Interactive Forum. Help us honor the American West by submitting a
picture to picturecontest@csmantech.org.
CONFERENCE CLOSING RECEPTION
The Conference Closing Reception brings the 2015 CS MANTECH to an end. Immediately following the Poster Session, the closing
reception affords attendees one last opportunity to exchange business cards, ideas, and experiences as they reflect on the week. During
the reception voting for Best Poster Presentation and Picture Contest will be tallied and winners announced.
Returning this year is the Feedback Form Raffle. Conference feedback on technical content and venue is valuable to the CS MANTECH
committees in structuring in the conference and technical program year to year. In addition, conference feedback is used to help select the
Best Paper and Best Student Paper. Each Feedback Form submitted will be entered into a raffle for a prize. It’s as simple as that! The
drawing will be held during the closing reception, though the winner need not be present to win.
TECHNICAL PROGRAM
Monday, May 18th
CS MANTECH WORKSHOPS
Chair: Patrick Fay, University of Notre Dame
7:00 AM
Registration
8:00 AM
Fundamentals of RF Measurements
Marcel Tutt, Freescale
9:30 AM
Advanced Microwave Measurements for Device Characterization
Wooyeol Choi, University of Texas, Dallas
10:45 AM
BREAK
11:00 AM
Device Modeling for Fab Engineers
David Root, Keysight
12:30 PM
WORKSHOP LUNCH
(CS MANTECH & ROCS)
1:30 PM
Power Amplifier Design
Jonathan Chisum, Univ. of Notre Dam
3:00 PM
BREAK
3:15 PM
Packaging and Functional Integration
Elias Reese and Tarak Railkar, Qorvo, Inc.
4:45 PM
WORKSHOP CLOSING
6:00 PM
EXHIBITS RECEPTION
ROCS WORKSHOPS
Chair: Peter Ersland, M/A-COM Technology Solutions
7:30 AM - 8:30 AM
ROCS Registration
8:30 AM - 5:00 PM
ROCS Workshop Sessions
12:30 AM – 1:30 PM
WORKSHOP LUNCH
(CS MANTECH & ROCS)
6:00 PM
EXHIBITS RECEPTION
Tuesday, May 19th
CONFERENCE OPENING
8:30 AM
Opening Ceremonies
Paul Cooke, IQE RF
Conference Chair
8:40 AM
2014 Conference Best Paper Awards
Paul Cooke, IQE RF
Conference Chair
8:50 AM
Technical Program Highlights
Dave Via
Technical Program Chair
KEYNOTE
Chair:
Yohei Otoki, Hitachi Metals
9:00 AM
Keynote: Lighting the Earth by LED’s, Past, Present and Future Prospects of GaN-Based Blue LED’s
Dr. Hiroshi Amano, 2014 Nobel Price in Physics
Nagoya University, Japan
SESSION 1: PLENARY
Chairs:
David Via
9:30 AM
Invited Presentation
1.1 Strategies for Wide Bandgap, Inexpensive Transistors for Controlling High-Efficiency Systems
Timothy D. Heidel
Advanced Research Projects Agency - Energy (ARPA-E)
10:00 AM
Invited Presentation
1.2 Compound Semiconductor Technology for Modern RF Modules: Status and Future Directions
Daniel S. Green1, Carl L. Dohrman2, Avinash S. Kane2, Tsu-Hsi Chang3
1
DARPA, 2Booz Allen Hamilton, 3HetInTec Corp
10:30 AM
Invited Presentation
1.3 Importance of High Frequency Compound Semiconductor Devices for Wireless Power Transfer using DirectCurrent-Resonance System
Tatsuya Hosotani
Murata Manufacturing Co., Ltd
11:00 AM
EXHIBITS LUNCH
Tuesday, May 19th
SESSION 2: COMPOUND SEMICONDUCTOR TRENDS
Chairs:
Michelle Bourke, Oxford Instruments Plasma Technology
Barb Landini, Sumika Electronic Materials
1:00 PM
Invited Presentation
2.1 Mobile RF Front End Integration
James P. Young
Skyworks Solutions, Inc.
1:30 PM
Invited Presentation
2.2 Packaging Trends in the Wireless Industry
Robert Darveaux, Tony LoBianco, Lori DeOrio, Andrew Kay, Bob Williams
Skyworks Solutions, Inc.
2:00 PM
2.3 Market and Technology Trends in WBG Materials for Power Electronics Applications
Dr. Hong Lin
Compound Semiconductor Market and Technology Analyst, Yole Développement
2:20 PM
2.4 6-inch VCSEL Wafer Foundry Economics
David Cheskis
ANADIGICS, Inc.
2:50 PM
BREAK
SESSION 3: GaN MANUFACTURING
Chairs:
Dane Henry, Qorvo, Inc.
Toshihide Kikkawa, Transphorm
3:40 PM
3.1 0.15μm GaN MMIC Manufacturing Technology for 2-50 GHz Power Applications
Sabyasachi Nayak, Ming-Yih Kao, Hua-Tang Chen, Trish Smith, Peter Goeller, Weixiang Gao, Jose Jimenez, Shuoqi Chen,
Charles Campbell, Gergana Drandova, Robert Kraft
Qorvo, Inc.
4:00 PM
3.2 RF Performance Improvement of 0.25μm GaN HEMT Foundry Technology
Jhih-Han Du, Che-Kai Lin, Sheng-Wen Peng, Fu-Chuan Chu, Kai-Sin Cho, Yue-Ting Lin, Wei-Chou Wang, Walter
Wohlmuth
WIN Semiconductors Corp
4:20 PM
3.3 Effects of Underlying Metals on Textures of Plated Au films on GaN
Kazuhiro Maeda, Koichiro Nishizawa, Daisuke Suzuki, Toshihiko Shiga, Hitoshi Watanabe
Mitsubishi Electric Corporation
4:40 PM
3.4 Enhanced Visual Performance in GaN HEMT Technology
Kai-Sin Cho, Yue-Ting Lin, Wei-Chou Wang, Jhih-Han Du, Forrest Cho, Walter Wohlmuth
WIN Semiconductors Corp.
5:00 PM
3.5 High Power Plastic Packaging with GaN
Quinn D. Martin
MACOM Technology Solutions
5:30 PM
EXHIBITOR AND STUDENT FORUMS
Please refer to the posted placards in the exhibit area for forum participants and scheduled presentations.
7:00 PM
INTERNATIONAL RECEPTION
Buses depart at 6:45 pm.
Wednesday, May 20th
SESSION 4: MATERIALS
Chairs:
Guoliang Zhou, Skyworks
Kevin Stevens, IQE
8:00 PM
4.1 A Mechanism and a Solution to non-Uniformity of pHEMT Wafers Grown by MBE Process
Guoliang Zhou, Mark Borek
Skyworks Solutions, Inc.
8:20 PM
4.2 Fast and Highly Accurate in-situ Calibration of AlGaAs Ternary Composition for MOVPE-based Growth of
Edge-Emitting Diode Lasers
M. Zorn1, O. Schulz3, A.J. Spring Thorpe2, J.-T. Zettler3
1
JENOPTIK Diode Lab GmbH, 2NRC of Canada, 3LayTec AG
8:40 PM
4.3 Orderly Array of in-plane GaAs Nanowires on Exact (001) Silicon for Antiphase-Domain-free GaAs Thin Films
Qiang Li, Kar Wei Ng, Kei May Lau
Hong Kong University of Science and Technology
9:00 PM
4.4 Fabrication of III-V virtual Substrate on 200 mm Silicon for III-V and Si Devices Integration
D. Kohen David1, K.H. Lee Kwang Hong1, K.E.K. Lee Kenneth Eng Kian1, C.S. Tan Chuan Seng2, S.F. Yoon Soon Fatt1,2,
E.A. Fitzgerald Eugene A.1,3
1
Singapore-MIT Low Energy Electronic Systems IRG (LEES), 2Nanyang Technological University, 3Massachusetts Institute
of Technology
9:20 PM
4.5 Improvements in Processing - Carrier and Material Impacts
Molly Hladik1, Aric Shorey2
1
Brewer Science, Inc, 2Corning, Inc
SESSION 5: METALLIZATION
Chairs:
Heribert Zull, Osram Opto Semiconductors
Shiban Tiku, Skyworks Solutions
8:00 AM
5.1 Dynamics of Surface Treatments and Pre-Cleans for High Volume Wafer Manufacturing
J. Crites1, W. Snodgrass2, L. Luu3 and Collaborators
1
Skyworks Solutions Inc., 2Avago Technologies, 3Global Communication Semiconductors LLC
8:20 AM
5.2 A Simulation of Wafer Temperature-Time Profile in PVD Process Using an Exponential Model and Its
Applications
Xiaokang Huang1, Romek Bobkowski1, Duofeng Yue1, Craig Hall1, Charles Dark1, Arthur McGeown2, Chris Jones2, Paulo
Lima2, Paul Rich2
1
Qorvo, Inc., 2SPTS Technologies Ltd.
8:40 AM
5.3 Stress Reduction in Metallization using in-situ Stress Measurement and Plasma Assisted Evaporation
Silvia Schwyn Thöny, Jürgen Buchholz, Reinhard Benz
Evatec AG.
9:00 AM
5.4 Wafer-to-Wafer Metal Sputter Deposition Process Control by Automatic Deposition Rate Adjustment
Chang’e Weng1, Jinhong Yang1, Ron Herring1, Brian Zevenbergen1, Joel Anderson2, Chris Jones2, Liam Cunnane2
1
Qorvo, Inc., 2SPTS Technologies Ltd.
9:20 AM
5.5 Understanding Process Capability for Cu Bump Electroplating
Dave Walker, Brian Zevenbergen
Qorvo, Inc.
9:40 PM
BREAK
Wednesday, May 20th
SESSION 6: GaN MATERIALS
Chairs:
John Blevins, AFRL/RYD
Judy Kronwasser, NOVASiC
10:20 AM
6.1 The Growth of AlGaN/GaN Structure on 200mm Si (111) with Low Wafer Bow
Chieh-Chih Huang1, Frank Ried2, Tomas Palacios3, Soo Jin Chua4, Eugene A Fitzgerald5
1
Singapore-MIT Alliance for Research and Technology Center, 2AIXTRON SE, 3Department of Electrical Engineering and
Computer Science-MIT, 4National University of Singapore, 5Department of Materials Science and Engineering-MIT.
10:40 AM
6.2 GaN MOCVD on Si via Single Crystal Rare-Earth Oxide Buffer Layer
Rytis Dargis, Erdem Arkun, Radek Roucka, Andrew Clark
Translucent Inc.
11:00 AM
6.3 Characterization of Strained AlGaN/GaN HEMTs on CMP-thinned Si Substrates
Marko J. Tadjer1, Travis J. Anderson2, Andrew D. Koehler2, Jordan D. Greenlee3, Karl D. Hobart2, Fritz J. Kub2
1
American Society for Engineering Education, 2United States Naval Research Laboratory, 3National Research Council
11:20 AM
6.4 Effect of Capping Structure on High Temperature Annealing of GaN
Jordan D. Greenlee1, Boris N. Feigelson2, Travis J. Anderson2, Charles R. Eddy, Jr. 2, Karl D. Hobart2, Fritz J. Kub2
1
Naval Research Laboratory, 2National Research Council
11:40 AM
6.5 GaN-on-Diamond Wafers: Recent Developments
Felix Ejeckam, Daniel Francis, Firooz Faili, Frank Lowe, Daniel Twitchen, Bruce Bolliger
Element Six Technologies
SESSION 7: GaN DRY ETCH
Chairs:
Jansen Uyeda, Northrop Grumman (AS)
Russ Westerman, Plasma-Therm, LLC
10:20 AM
7.1 Optimizing the SiC Plasma Etching Process for Manufacturing Power Devices
Haruna Oda, Peter Wood, HIromichi Ogiya, Seita Miyoshi, Osamu Tsuji
SAMCO Inc.
10:40 AM
7.2 Electrical Properties of GaN Etched by Low Bias Power Process
Yuichi Minoura, Naoya Okamoto, Toshihiro Ohki, Shiro Ozaki, Kozo Makiyama, Keiji Watanabe
Fujitsu Laboratories Ltd.
11:00 AM
7.3 SiC / GaN Via Process – in Search for Perfection
Ju-Ai Ruan, Craig Hall, Harold Isom, Tom Nagle
Qorvo, Inc.
11:20 AM
7.4 Qualification of Backside Via Etch Process in GaN-on-SiC HEMT Devices
Frank Fan, Minkar Chen, Daniel Hou, David Wang
Global Communication Semiconductors, LLC
11:40 AM
7.5 Analysis and Optimization of a Through Substrate Via Etch Process for Silicon Carbide Substrates
Andreas Thies1, Wilfred John1, Stephan Freyer1, Jaime Beltran2, Olaf Krüger1
1
Ferdinand-Braun-Institut, 2LayTec AG.
12:00 PM
OPEN LUNCH
Wednesday, May 20th
SESSION 8: THERMAL MANAGEMENT FOR HIGH POWER DEVICES
Chairs:
Tom Low, Keysight Technologies
Chang-Hwang Hua, WIN Semiconductors Corp.
1:30 PM
Student Presentation
8.1 Measuring the Thermal Conductivity of the GaN Buffer Layer in AlGaN/GaN HEMTs: Effect of Carbon and
Iron Doping
M.Power1, J.W. Pomeroy1, Y.Otoki2, T.Tanaka2, J.Wada2, M. Kuzuhara3, W.Jantz4, A.Souzis5, M.Kuball1
1
University of Bristol, 2Hitachi Metals, 3University of Fukui, 4SemiMap Scientific Instruments, 5II-VI Wide Bandgap Group
1:50 PM
8.2 Rapid Characterization of GaN-on-Diamond Interfacial Thermal Resistance Using Contactless Transient
Thermoreflectance
Huarui Sun1, James W. Pomeroy1, Roland B. Simon1, Daniel Francis2, Firooz Faili2, Daniel J. Twitchen2, Martin Kuball1
1
University of Bristol, 2Element Six Technologies
2:10 PM
8.3 Comparison of Thermal Properties of Packaged AlGaN/GaN HFETs on Si and n-SiC Substrates
R. Zhytnytska1, J. Böcker2, H. Just2, E. Bahat-Treidel1, O. Hilt1, S. Dieckerhoff2, J. Würfl1, G. Tränkle1
1
Ferdinand-Braun-Institut, 2Technische Universität Berlin
2:30 AM
Student Presentation
8.4 Improved Thermal Stabilities in Normally-off GaN MIS-HEMTs
Cheng Liu, Hanxing Wang, Shu Yang, Yunyou Lu, Shenghou Liu, Zhikai Tang, Qimeng Jiang, Kevin J. Chen
The Hong Kong University of Science and Technology
2:50 AM
8.5 Simulation of the Impact of Through-Substrate Vias on the Thermal Resistance of Compound Semiconductor
Devices
Rajesh Baskaran, Allen W. Hanson
MACOM Technology Solutions Inc.
SESSION 9: GaN ANNEALING/PASSIVATION
Chairs:
Scott Sheppard, CREE, Inc.
Paul Pinsukanjana, IntelliEPI
1:30 PM
9.1 Atomic Layer Deposition for GaN Power Semiconductors
H.C.M. Knoops, Y. Huang, B. Mackenzie, T. R. Sharp, C. J. Hodson, M. Bourke
Oxford Instruments Plasma Technology
1:50 PM
9.2 Comparative Study of AlGaN/GaN HEMTs with LPCVD- and PECVD-SiNx Passivation
Xinhua Wang, Sen Huang, Jinhan Zhang, Yingkui Zheng, Ke Wei, Xiaojuan Chen, Guoguo Liu, Tingting Yuan, Weijun
Luo, Lei Pang, Haojie Jiang, Hushan Cui, Junfeng Li, Chao Zhao, Xinyu Liu
Chinese Academy of Sciences
2:10 PM
Student Presentation
9.3 A Low-Annealing-Temperature Process Using Si-Incorporated Contact Stacks for n-Type III-Nitride
Semiconductors
Yi-Che Lee, A F M Saniul Haq, Shyh-Chiang Shen
Georgia Institute of Technology
2:30 PM
Student Presentation
9.4 Impact of Post Fabrication Annealing PEALD ZrO2 for GaN MOSFETs
K. Bothe, A. Ma, A. Afshar, P. Motamedi, K. Cadien, D. Barlage
University of Alberta
2:50 PM
9.5 Suppressed Current Collapse in High Pressure Water Vapor Annealed AlGaN/GaN HEMTs
Yohei Kobayashi1, Joel T. Asubar1, Koji Yoshitsugu2, Hirokuni Tokuda1, Masahiro Horita2, Yukiharu Uraoka2, Masaaki
Kuzuhara1
1
University of Fukui, 2Nara Institute of Science and Technology
Wednesday, May 20th
3:10 PM
BREAK
SESSION 10: TEST/YIELD
Chairs:
Gene Kohara, Marubeni America Corporation
Robert Sadler, Global Communication Semiconductors, LLC
3:30 PM
10.1 Improving Return on Invested Capital (ROIC) in PHEMT Technology
Peng (Tom) Cheng, Patrick Carroll, Tom Rogers
Qorvo, Inc.
3:50 PM
10.2 Optimization Methodology of Clean Pads Selection for Lifetime and Test Yield on RF bump Wafer Test with
Membrane Probe Card
I-Pin Chia, Min-Chang Tu, Paul Yeh
WIN Semiconductor
4:10 PM
10.3 Threshold Voltage Extraction Method for 2D Devices with Power-Law µ(nS) Dependence
Vincent Mosser, David Seron, Youcef Haddab
Itron France
4:30 PM
10.4 Process Optimization to Improve Known-Good-Die (KGD) Test Accuracy and Wafer Final Yield
Yu Wang, Patrick Carroll, Jing Yao, Zach Reitmeier, Tom O’Brien, Doug Melville
Qorvo, Inc.
4:50 PM
10.5 Using GaAs Diesort Methods for Efficient High Volume Capacitor Testing
Martin J. Brophy, John Stanback, Thomas Dungan
Avago Technologies
SESSION 11: MANUFACTURING IMPROVMENTS
Chairs:
Corey Nevers, Qorvo, Inc.
David Wang, Global Communication Semiconductors
3:30 PM
11.1 Defects (‘Seams’) Caused By Clear Field Mask Chrome Dimensions
Richard Nutter
HRL Laboratories, LLC
3:50 PM
11.2 Effect of Tape Liftoff Tool Settings and Plasma Conditions on Metal Peeling from Polyimide Surfaces
Jiang Wang, David Lipka, Sam Mony, Nercy Ebrahimi
Skyworks Solution Inc.
4:10 PM
11.3 Effective in-line Monitoring Structures for Critical Dimension Measurement in Photolithography
Chao Wang, Lisa Huynh, Kevin Zoglo
Qorvo, Inc.
4:30 PM
11.4 InAlN/GaN HEMTs over 100-GHz fT with an Improved Y-Gate Process by an i-line Stepper
Hiroyuki Ichikawa, Isao Makabe, Tsuyoshi Kouchi, Ken Nakata, Kazutaka Inoue
Sumitomo Electric Industries, Ltd.
4:50 PM
11.5 Rapid Production Readiness Through Process Margin Study: How to Isolate the Epi and Fab Parameters That
Really Matter
S. Hurtt, D. Schwartz, J. Yang, S. Nedeljkovic, T. Henderson, F. Pool
Qorvo, Inc.
5:10 PM
RUMP SESSION RECEPTION
5:50 PM
Chair:
RUMP SESSIONS
Steve Mahon
7:00 PM
SEMI STANDARDS MEETING
Thursday, May 21st
SESSION 12: GaAs PROCESSING
Chairs:
Jim Crites, Skyworks Solutions
Keith Wieber, Qorvo, Inc.
8:00 AM
12.1 High Aspect Ratio Individual Source Through Wafer Vias for High Frequency GaAs pHEMT Processes
H.Stieglauer1, E.Dengler1, M.Hosch1, P.Michel2, C.Teysandier2, H.Blanck1
1
United Monolithic Semiconductors Germany, 2United Monolithic Semiconductors France
8:20 AM
Student Presentation
12.2 A CMOS-compatible Fabrication Process for Scaled Self-Aligned InGaAs MOSFETs
Jianqiang Lin, Dimitri A. Antoniadis, and Jesús A. del Alamo
MIT
8:40 AM
12.3 Effect of Pt Thickness on the Gate Sinking in a pHEMT Device
Debdas Pal, Julia Okvath
MACOM
9:00 AM
12.4 An Integration of On-Chip High-Q Inductors by Cu Redistribution Layer (RDL) with Bumping for
InGaP/GaAs HBT MMIC
Jung-Hao Hsu, Shu-Hsiao Tsai, Shih-Wei Chen, Kay Wu, Cheng-Kuo Lin, and Dennis Williams, Yu-Chi Wang
WIN Semiconductors Corp.
9:20 AM
12.5 Highly Linear Ka-Band 0.15µm GaAs Power pHEMT Process for Use in Low-Cost Molded QFN Plastic
Package
Michael Hosch1, Hermann Stieglauer1, Charles Teyssandier2, Philippe Auxemery2, Mikael Richard2, Jan Grünenpütt1,
Benoît Lambert2, Didier Floriot2, Hervé Blanck1
1
United Monolithic Semiconductors Germany, 2United Monolithic Semiconductors France
SESSION 13: GAN RF DEVICES
Chairs:
Martin Kuball, University of Bristol
David Meyer, Naval Research Lab
8:00 AM
13.1 Leakage Current and Two-Tone-Linearity Investigations on 0.5µm AlGaN/GaN HEMTs
Bernd Schauwecker, Michael Hosch, Hervé Blanck
United Monolithic Semiconductors
8:20 AM
13.2 AlInN/GaN HEMTs on SiC and on Silicon with Regrown Ohmic Contacts by Selective Ammonia MBE
Stefano Tirelli1, Diego Marti1, Lorenzo Lugani2, Marco Malinverni2, J.-F. Carlin2, E. Giraud2, Nicolas Grandjean2, C. R.
Bolognesi1
1
Millimeter-Wave Electronics Group, ETH-Zürich, 2ICMP, École Polytechnique Fédérale de Lausanne (EPFL)
8:40 AM
13.3 Correlation Between Luminescence and Current Collapse in AlGaN/GaN HEMTs
S. Ohi, Y. Sakaida, J. T. Asubar, H. Tokuda, M. Kuzuhara
University of Fukui.
9:00 AM
13.4 Current Dispersion in Short Channel Al0.32Ga0.68N/GaN HEMTs
K. Y. Osipov, S. A. Chevtchenko, O. Bengtsson, P. Kurpas, F. Brunner, N. Kemf, J. Würfl, G. Tränkle
Ferdinand-Braun-Institut
9:20 AM
13.5 Practical Challenges of Processing III-Nitride/Graphene/SiC Devices
Andrew D. Koehler1, Neeraj Nepal2, Marko J. Tadjer3, Rachael L. Myers-Ward1, Virginia D. Wheeler1, Travis J. Anderson1,
Michael A. Mastro1, Jordan D. Greenlee4, Jennifer K. Hite1, Karl D. Hobart1, Francis J. Kub1
1
Naval Research Laboratory, 2Sotera Defense Solutions, 3ASEE Postdoctoral Fellow Residing at NRL, 4NRC Postdoctoral
Fellow Residing at NRL
9:40 AM
BREAK
Thursday, May 21st
SESSION 14: III-V DEVICES
Chairs:
Hidetoshi Kawasaki, Sony
Shyh-Chiang Shen, Georgia Tech
10:10 AM
Invited Presentation
14.1 Field Plate Models Applied to Manufacturability and RF Frequency Analysis
Robert Coffie
RLC Solutions
10:40 AM
14.2 ESD Protection Device for HEMT MMICs
Jung-Tao Chung, Shinichiro Takatani, Cheng-Kuo Lin, Hsi-Tsung Lin, Shao-Chang Cheng, Shu-Hsiao Tsai, Cheng-Guan
Yuan, Joseph S.M. Liu, Yu-Chi Wang
WIN Semiconductors Corp.
11:00 AM
14.3 pHEMT Device Characterization for Current Transient Time Constant and Link to Error Vector Magnitude
S. Nedeljkovic, S. Hurtt
Qorvo, Inc.
11:20 AM
Student Presentation
14.4 Development of an InP/GaAsSb DHBT MMIC Process with a Teflon AF Interlevel Dielectric
Ralf Flückiger, Rickard Lövblom, Maria Alexandrova, Hansruedi Benedickter, Olivier Ostinelli, C. R. Bolognesi
Millimeter-Wave Electronics Group, ETH-Zürich
11:40 AM
Student Presentation
14.5 Characterization of Heterojunction Bipolar Phototransistor with Integrated Two-Section Light-Emitting
Transistors
Cheng-Han Wu1, Yuan-Fu Hsu2, Gong-Sheng Cheng2, Chao-Hsin Wu1,2
1
Graduate Institute of Electronics Engineering, 2Graduate Institute of Photonics and Optoelectronics, National Taiwan
University
SESSION 15: GaN POWER ELECTRONICS
Chairs:
Drew Hanser, Veeco Instruments, Inc.
Chris Youtsey, MicroLink Devices
10:10 AM
Invited Presentation
15.1 Vertical Power Semiconductor Devices Based on Bulk GaN Substrates
I.C. Kizilyalli, X. Xin, T. Prunty, M. Raj, O. Aktas
Avogy Inc.
10:40 AM
15.2 Above 2000 V Breakdown Voltage on 2 µm-thick Buffer Ultrathin Barrier AlN/GaN-on-Silicon Transistors
N. Herbecq, I. Roch-Jeune, A. Linge, M. Zegaoui, F. Medjdoub
Institute of Electronics, Microelectronics and Nanotechnology
11:00 AM
15.3 EC-2.0eV Trap-Related Dynamic RON in GaN/Si MISHEMTs
W.Sun, A. Sasikumar, A. Arehart, S. Ringel
Ohio State University
11:20 AM
15.4 Stress and Characterization Strategies to Assess Oxide Breakdown in High-Voltage GaN Field-Effect
Transistors
S. Warnock, J. A. del Alamo
Massachusetts Institute of Technology
11:40 AM
15.5 Demonstration of Innovative Screening Method to Identify Long-Term Performance-Stable High Voltage GaNon-Silicon Based Power Devices
Hyeongnam Kim, H. Kannan, Y. Pan, D. Veereddy, R. Garg, C. Zhu, J. Sun, Bhargav Pandya, D. Smith, S. Hardikar, M.
Imam, T. McDonald
International Rectifier Corp.
Thursday, May 21st
12:00 PM
LUNCH
LUNCH TALK
1:00 PM
Compound Semiconductor Microelectronics / Photonics Research for the next 30 years – Personal View based on
past 30 year’s evolution.
Dr. Milton Feng
The University of Illinois, Urbana-Champaign
SESSION 16: GaN RELIABILITY
Chairs:
Shawn Burnham, HRL Laboratories
Karen Moore, Freescale
1:30 PM
Invited Presentation
16.1 GaN HEMT Lifetesting – Characterizing Diverse Mechanisms
Bruce M. Paine, Steve R. Polmanter, Vincent T. Ng, Neil T. Kubota, Carl R. Ignacio
Boeing Network and Space Systems
2:00 PM
16.2 Failure Mechanisms in AlGaN/GaN HEMTs Irradiated with 2MeV Protons
T.J. Anderson1, A.D. Koehler1, P. Specht2, B.D. Weaver1, J.D. Greenlee1, M.J. Tadjer1, J.K. Hite1, M.A. Mastro1, M. Porter3,
M. Wade3, O.C. Dubon2, M. Luysberg4, K.D. Hobart1, T.R. Weatherford3, F.J. Kub1
1
Naval Research Laboratory, 2University of California, Berkeley, 3Naval Postgraduate School, 4Ernst-Ruska Research
Center
2:20 AM
16.3 Drain - Bulk Leakage Current Mechanisms and Model for Power GaN HEMT on Si Substrate
Mirwazul Islam1, Grigory Simin1, Naveen Tipirneni2, Jungwoo Joh2, Vijay Krishnamurthy2, Sameer Pendharkar2
1
University of South Carolina, 2Texas Instruments, Dallas, TX
2:40 PM
16.4 Hot-Phonon Effect on the Reliability of GaN-Based Heterostructure Field-Effect Transistors
Cemil Kayis1, Hadis Morkoç2
1
ASELSAN, Inc., 2Virginia Commonwealth University
SESSION 17: POSTER
Chairs:
Nick Kolarich, Epiworks
Kelli Rivers, Vacuum Engineering & Materials Co.
3:00 PM
Student Presentation
17.1 0.18 mm E/D-mode pHEMT using I-line Photolithography for Microwave Application
Min-Li Chou1, Yi-Shun Lin2, Ming-Tai Wu2, Sheng-Chun Wang2, Hsin-Chi Wang2, Li-Chung Lee2, Zhi-Peng Lin2, ChihYu Tseng2, Fred CH Lin2, Pang-Shao Chen2, Houng-Chi Wei2, Chian_Gau1, Shih1, Hsien-Chin Chiu1
1
Chang Gung University, 2Wavetek Microelectronics Corp.
Student Presentation
17.2 6A-Operating Current GaN-Based Enhancement-Mode High Electron Mobility Transistors
Chih-Hao Wang, Liang-Yu Su, Finella Lee, Jian-Jang Huang
National Taiwan University
Student Presentation
17.3 Enhancement of Cut-off Frequency and Optical Bandwidth in Light-Emitting Transistors at High Temperature
I-Te Lee, Chao-Hsin Wu
National Taiwan University
17.4 Micromachined p-GaN Gate Normally-off PowerHEMT with an Optimized Air-Bridge Matrix Layout Design
Chih-Wei Yang1, Hsiang-Chun Wang1, Hsien-Chin Chiu1, Chien-Kai Tung2, Tsung-Cheng Chang2, Schang-jing Hon2
1
Chang Gung University, 2Huga Optotech Inc.
17.5 Optical Frequency Response of GaN-based Light-emitting Diodes with Embedded Photonic Crystals
Yu-Feng Yin, Yen-Hsiang Hsu, Liang-Yu Su, Yuan-Fu Hsu, Li-Cheng Chang, Chao-Hsin Wu, JianJang Huang
National Taiwan University
17.6 Si-Ge-Sn based Compound Semiconductors for Photonic Applications
Radek Roucka, Andrew Clark, Nam Pham
Translucent Inc.
17.7 Low Frequency Noise Measurements as a Characterization Tool for Reliability Assessment in AlGaN/GaN
High-Electron-Mobility Transistors (HEMTs)
Miao Zhao
Chinese Academy of Sciences
17.8 Wide Head T-Shaped Gate Process for Low-Noise AlGaN/GaN HEMTs
Hyung Sup Yoon, Byoung Gue Min, Jong Min Lee, Dong Min Kang, Ho Kyun Ahn, Hae Cheon Kim, Jong Won Lim
Electronics and Telecommunications Research Institute
Student Presentation
17.9 Effect of Gate Threshold Swings by ALD-Al2O3/AlGaN Interfacial Traps in GaN Power HEMT with Multiple
Fluorinated Gate Dielectric Layers
Yun-Hsiang Wang1,4, Yung C. Liang1, Ganesh S. Samudra1, Bo-Jhang Huang2, Ya-Chu Liao2, Chih-Fang Huang2, WeiHung Kuo3, Guo-Qiang Lo4
1
National University of Singapore, 2National Tsing Hua University, 3Industrial Technology Research Institute, 4A*STAR
Institute of Microelectronics
CONFERENCE CLOSING
4:00 PM
Closing Reception
GENERAL INFORMATION
2015 International Conference on Compound Semiconductor Manufacturing Technology
May 18th – 21st, 2015
Hyatt Regency Scottsdale Resort & Spa at Gainey Ranch
7500 E. Doubletree Ranch Road
Scottsdale, Arizona, USA, 85258
REGISTRATION INFORMATION (US$)
For Advanced Conference Registration, register online at our Web Site by April 28th.
www.csmantech.org
On or before
Full Conference Registration
Student Conference Registration
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One-Day Conference Registration
One-Day Exhibit Registration
Workshop Registration
Government Workshop Registration
Apr. 28
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After Apr. 28
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$175
Payment of the full, student, or government conference registration fee includes one copy of the printed Conference Digest (if desired),
one copy of the Conference Digest on a USB memory stick, and admission to all sessions and the exhibits. It also includes the
International Reception, Exhibits Reception, Exhibits Luncheon, Rump Session Reception, Interactive Forum Reception, breakfasts, and
refreshment breaks. Additional copies of the Conference Digest may be purchased at $140 each. Additional copies of the Conference
Digest on a USB memory stick may be purchased for $50 each.
The one-day registration includes admission to all sessions for that day, admission to the Exhibits Hall, buffet breakfast, break
refreshments, and lunch. The Rump Session Reception or Interactive Forum Reception is included on Wednesday and Thursday,
respectively. It also includes a printed Conference Digest and a Conference Digest on a USB memory stick. The one-day registration does
not include admission to the International Reception. The one-day option can be taken only once during the conference.
Payment of workshop registration includes one copy of the Workshop Digest, breakfast, Workshop Luncheon and break refreshments.
Additional copies of the Workshop Notes may be purchased for $100.
Registrants may pay by check, money order, bank draft or credit card. Make checks payable in U.S. dollars drawn on a U.S bank to:
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All refund requests must be received by Peter Ersland at the CS MANTECH office shown below by April 28 th for a full refund less a $25
processing fee. NO REFUNDS AFTER APRIL 28, 2015.
CS MANTECH
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For Advanced Conference Registration, register online at our Web Site by April 28 th.
www.csmantech.org
HOTEL RESERVATIONS
(note send to the chairs for update information)
CS MANTECH has arranged for a discounted nightly rate at the Hyatt Regency Scottsdale Resort & Spa. The rate for single or double
occupancy is $189 per night.
The CS MANTECH rate includes free guest room Internet access. State and local occupancy taxes (currently 14.75%) will be added
to these rates. For those wishing to extend their stay, a limited number of rooms are available at the group rate before and after the
conference on a first come, first served basis.
Please note that if guaranteed by credit card, one night’s room and tax will be charged if the reservation is cancelled after 6pm the day
before arrival.
Hotel reservations may be made through either:
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 Calling the Hyatt Regency Scottsdale Resort & Spa at: +1-480-444-1234
When calling the Hotel directly, please request the CS MANTECH group rate. To receive the CS MANTECH rate, Hotel reservations
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the Hyatt (Currently $309+tax).
If you require the US Government rate (ID required) please call the Sheraton Denver Hotel directly and notify them you are attending
CS MANTECH.
The discounted rate is subject to availability, so please MAKE YOUR RESERVATION EARLY!
We ask you to please support CS MANTECH and to enjoy all of the conference activities by staying at our official 2015
location, the Hyatt Regency Scottsdale Resort & Spa.