PDF 2,1 MB - Elmos Semiconductor AG

Transcription

PDF 2,1 MB - Elmos Semiconductor AG
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
Features
General Description
ÿ
ÿ
ÿ
ÿ
ÿ
ÿ
ÿ
ÿ
ÿ
ÿ
The star coupler is part of the electrical, physical layer in a FlexRay™ communication network. The E981.56
provides interfaces to connect up to four branches of
twisted pair physical bus lines to other bus drivers or
star couplers. It also interfaces with a communication
controller (CC). Via SPI the bus driver (BD) provides status information concerning failure detection on the bus
lines (e.g. short circuit, ground loss) and over temperature condition to a host controller (HOST). An interrupt
signal is generated whenever the failure status changes.
The device supports normal and standby mode and
provides remote wake up capability via bus line. The
output (INH) can be used to control an external voltage regulator.
Enhanced Active Star Device with new features Downward compatible to E910.56B
Compliant to FlexRay™ electrical physical layer v3.0
4 branches for coupling up to 4 FlexRay™ buses
(extensible by banking of active star devices)
Transmitter control by bus guardian interface
Additional CC and host interface
Supports data rates up to 10 Mbit/s
Supports two low power modes and wake-up
Fast forwarding of wake-up frames
Control and diagnosis via SPI™
Applications
ÿ Star coupler and additionally usable as transceiver in FlexRay™ nodes (ECUs)
Ordering Information
Product ID
Temp. Range
Package
E981.56
-40°C to +125°C
QFN44L9
Typical Application
Blockdiagram
SCSN
VBAT
SCK
ECU 1
Power
Supply
Microcontroller
(HOST)
SDI
SDO
Supervisor
Communication
Controller
TxEN
TxD
RxD
RSTN
VIO
VCC
SPI
INTN
Local
Wake-up
LWU
INH
BGE
Bus Driver
E981.56
DCN
TxD
TxEN
additional
intra star
interface
if needed
BP_1
BGE
Transmitter_1
Communication
Controller
Interface
Receiver_1
Bus guardian
Interface
Wake up
Detector_1
Bus Driver
E981.56
TRXD0
TRXD1
VBUF
RSTN
DCN
BP_1 BM_1 BP_2 BM_2 BP_3 BM_3 BP_4 BM_4
INH
GND
LWU
VBAT
VCC
VIO
FlexRay™ and
Bus Failure
Detector_1
INTN
RxD
4
Single_Branch_1
Host Interface
(SPI + Interrupt)
are trademarks of Daimler AG
Central
Logic
Inhibit & Wake
BM_1
Single_Branch_2
....
BP_2
Single_Branch_3
....
BP_3
Single_Branch_4
....
BP_4
Star Transmitter &
Receiver
BM_2
BM_3
BM_4
TRXD0
TRXD1
intra star
interface
Power Undervolt.
Supply Monitor POR
5V
Overtemp.
Regulator Monitor
VBUF
Vref
E981.56
GND
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 1/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
1 Pin Description
Table 1: Pin Description
Pin
Name
Type 1)
Description 2)
Remark
1
SCSN
DI, PU
Chip Select Input (from H)
VIO-level
2
SCK
DI, PD
SPI Clock Input (from H)
VIO-level
3
SDI
DI, PD
SPI Data Input (from H)
VIO-level
4
SDO
DO, tristate
SPI Data Output (to H)
VIO-level
5
INTN
DO
6
GNDD
7
Error sum signal
Low active
S
Ground
3rd GND Pin
VIO
S
IO Supply
3.3V or 5V
8
BGE
DI, PD
Enables transmission TxD to bus
VIO-level
9
TXD
DI, PD
Transmit Data Input (from CC)
VIO-level
10
TXEN
DI, PU
Transmit Data Enable (from CC)
VIO-level (low active)
11
RXD
DO
Receive Data Output (to CC)
12
TRXD0
DIO
Intra star interface 0
External pull up resistor
13
TRXD1
DIO
Intra star interface 1
External pull up resistor
15
INH
O, HV
Inhibit output (high side switch)
16
LWU
DI, HV
Local wake-up
17
VBAT
S, HV
HV supply in sleep mode
19
GND2
S
21
VBUF2
AIO
22
VCC2
S
23
BM_4
AIO
Bus Line Minus
Analog I/O, HV protected
24
BP_4
AIO
Bus Line Plus
Analog I/O, HV protected
26
BM_3
AIO
Bus Line Minus
Analog I/O, HV protected
VIO-level
Logic at VBAT level
HV Input
Battery voltage with bias
protection diode
Ground
2nd GND-Pin
Buffer cap. for remote wake-up
External capacitor 2
Transceiver Supply
2nd VCC-Pin
27
BP_3
AIO
Bus Line Plus
Analog I/O, HV protected
29
BM_2
AIO
Bus Line Minus
Analog I/O, HV protected
30
BP_2
AIO
Bus Line Plus
Analog I/O, HV protected
32
BM_1
AIO
Bus Line Minus
Analog I/O, HV protected
33
BP_1
AIO
Bus Line Plus
Analog I/O, HV protected
34
VCC1
S
Transceiver Supply
Buffer cap. for remote wake-up
VCC-Pin
35
VBUF1
AIO
37
GND1
S
Ground
External capacitor 1
GND-Pin
43
DCN
DI
Downward compatibility to E910.56B (3
VIO-level
44
RSTN
DI, PU
External reset
Low active
14, 18,
20, 25,
28, 31,
36, 3842
n.c.
-
Not connected
Recommendation:
connection to GND
1) 1 D = digital, A = analog, S = Supply, I = Input, O = Output, HV = High Voltage, PU = Pull up, PD = pull down, pins not
in list are not connected internally
2) H= Host, CC= Communication Controller
3) DCN=1 (VDCN at VIO level):E981.56 is compatible to EPL Spec. 3.0, DCN=0: E981.56 is downward compatible to
E910.56B.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 2/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
1
SCK
2
SDI
VBUF1
VCC1
39 38
n.c.
GND1
40
n.c.
41
n.c.
n.c.
n.c.
43 42
n.c.
44
SCSN
DCN
RSTN
1.1 Pinout
35
34
37 36
33
BP_1
32
BM_1
3
31
n.c.
SDO
4
30
BP_2
INTN
5
29
BM_2
GNDD
6
28
n.c.
VIO
7
27
BP_3
BGE
8
26
BM_3
TXD
9
25
n.c.
TXEN 10
24
BP_4
RXD 11
23
BM_4
45
22
VCC2
GND2
20 21
VBUF2
19
n.c.
18
n.c.
16 17
LWU
15
VBAT
14
INH
TRXD1
TRXD0
12 13
n.c.
E981.56
Figure 1: Package pinout QFN44L9, transparent top view, not to scale.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 3/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
2 Absolute Maximum Ratings
Stresses beyond these absolute maximum ratings listed below may cause permanent damage to the device. These are stress
ratings only; operation of the device at these or any other conditions beyond those listed in the operational sections of this
document is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
All voltages referred to VGND. Currents flowing into terminals are positive, those drawn out of a terminal are negative.
Description
Condition
Symbol
Max
Unit
VBAT
18
V
Load dump 1)
VBAT
40
V
Jump start
VBAT
28
V
Alternator Supply Voltage
2)
Local Wake-up Voltage
Min
VLWU
-0.3
VBAT
V
Transceiver Supply Voltage
VCC
-0.3
5.5
V
IO Supply Voltage
VIO
-0.3
5.5
V
Star Supply Voltage
-0.3
5.5
V
VBP,VBM
VBUF
-27 6)
40
V
VTXEN,
VTXD,
VRXD, VSCSN, VSCK,
VSDI,
VSDO,
VINTN
-0.3
uVIO+0.3
V
VINH
-0.3
uVBAT+0.3
V
VTRXD0,
VTRXD1
-0.3
VBUF+0.3
V
Pins BP,BM
against GND
uESDIEC
6
kV
LWU
against GND
(with 3.3kΩ
series resistor)
uESDIEC
6
kV
VBAT
against GND
(with 100nF
buffer capacitor)
uESDIEC
6
kV
Pins BP,BM, VBAT,
LWU against
GND pin
uESDext
6
kV
Other pins
uESDint
2
kV
Pins BP,BM
uESDmm
100
V
LWU
uESDmm
100
V
VBAT
uESDmm
100
V
corner pins
uESDCDM
750
V
other pins
uCDM
500
V
Pin VBAT
-150
100
V
Pin LWU
-150
100
V
Pins BPx/
BMx
-150
100
V
Bus Line Voltage
Digital IO (3.3V or 5V)
Voltage at INH
Voltage at TRXD0, TRXD1
ESD Voltage HBM according to
IEC61000-4-2
(system level) 3)
ESD Voltage HBM according to
AEC-Q100
(chip level) 4)
ESD Voltage MM according to JESD22A115/AEC-Q100-003
ESD Voltage CDM according to
AEC-Q100
Immunity to transients 5)
7)
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 4/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
Description
Condition
Symbol
Min
Max
Unit
150
°C
Junction Temperature
TJ
Ambient Temperature
TAMB_
Class1
-40
125
°C
Storage Temperature
TSTG
-40
125
°C
1)
2)
3)
4)
5)
6)
7)
max. 400 ms with RTJA=12.9 K/W max. 1 min with RTJA=12.9 K/W,
Cs = 150pF, Rd = 330Ω
Cs = 100pF, Rd = 1500Ω
Pulse 1, 2a, 3a, 3b according to ISO7637-1, -2 Class C
Minimum value from -40 to +95°C. Between +95°C and +125°C VBP = VBM = -17V
VBUF corresponds to the parameter VStarSupply of the EPL specification [EPL09]
2.1 Recommended Operating Conditions
Parameters are guaranteed within the range of operating conditions unless otherwise specified.
Description
Battery Supply Voltage
Condition
Symbol
Min
Max
Unit
4.75V≤VCC≤
5.25V
uVBAT
5.5
18
V
Undervoltage at
VCC
uVBATWAKE
7
18
V
uVCC
4.75
5.25
V
Transceiver Supply Voltage
IO Supply Voltage 1)
Level shift
interface 3.3V
uVIO
3.0
3.6
V
IO Supply Voltage 1)
Level shift
interface 5V
uVIO
4.75
5.25
V
VLWU
-0.3
18
V
Top
- 40
125
°C
Local Wake-up voltage
Operating Temperature Range
1) Both AS-CC interface and AS-Host interface with 3.3V or 5V power supply
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 5/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
3 Detailed Electrical Specification
3.1 Power Supply Interface
3.1.1 Power Supply Parameters
Description
Condition
Symbol
Supply current at VBAT
AS_Sleep, VCCOK=0
IBATslp
Supply current at VCC
AS_Standby
ICCsby
TX idle
ICCni
TX active
ICCna
Supply current at VIO
No load at RxD, SDO,
INTN
IVIO
Star Supply Voltage 1)
CBUF=2x100 μF,
uVCC=5V,TX active
VBUF
Supply current at VCC
Supply current at VCC
2)
Minimum required voltage for
LWU
Min
Typ
Max
Unit
65
120
μA
900
μA
25
30
mA
120
200
mA
50
μA
uVCC
V
7
V
uVCC0.2
uVBAT_
WAKE
1) VBUF corresponds to VStarSupply defined in [EPL09]; a large CBUF is necessary if wake-up symbols shall be transmitted in the
sleep mode
2) The current consumption depends on the number of used branches and the succession of the frames
3.1.2 Inhibit Output Parameters
Description
Output voltage
Absolute leakage current
Condition
Symbol
Min
Not sleep, IINH=200μA, uVBAT>5.5V
uINHNot_
Sleep 1)
uVBAT-1
AS_Sleep
iINHleak 1)
Typ
Max
Unit
V
10
μA
Max
Unit
1) INH is a logic output signal at VBAT level. uINHNot_Sleep, iINHleak correspond with uINH1Not_Sleep, iINH1leak
3.1.3 Local Wake-up Input Parameters
Description
Condition
Symbol
Min
Typ
LWU threshold
LWU_VIO=1
VTH_LWU_VIO
1
2.4
V
LWU threshold
LWU_VIO=0
VTH_LWU_VBAT
2.5
4.5
V
Wake pulse filter time
dStarWakePulseFilter
1
500
μs
Time to enter AS_Normal after local wake-up event 1)
dStarWake-upReactionlocal
100
µs
1) Note: dStarWake-upReactionlocal is counted from the end of dStarWakePulseFilter
Local wake-up (LWU) is a logic signal at VIO/VCC or VBAT level. A negative or positive pulse at LWU wakes the ASD.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 6/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
3.1.1 Power Supply Parameters
Description
Condition
Symbol
Power on threshold
VDD rising
1)
Power on threshold
VDD falling
1)
Min
Typ
Max
Unit
2.9
V
uStarUVDDon
uStarUVDDoff
2.5
Undervoltage detection threshold
VCC 2)
uStarUVVCC
4.3
4.7
V
Undervoltage detection threshold
VBAT 2)
uStarUVVBAT
4.5
5.5
V
Undervoltage detection threshold
VBUF 3)
uStarUVVBUF
4.0
4.5
V
dStarUVVCC
350
500
650
μs
dStarUVVBAT
350
500
650
μs
dStarUVVBUF
350
500
650
μs
dStarRVCC
350
500
650
μs
dStarRVBAT
350
500
650
μs
dStarRVBUF
350
500
650
μs
Undervoltage reaction time VCC
Undervoltage reaction time VBAT
Undervoltage reaction time VBUF
3)
Undervoltage recovery time VCC
Undervoltage recovery time VBAT
Undervoltage recovery time VBUF
3)
V
1) VDD is the internal supply of the central logic. If VDD decreases to less than uStarUVDDoff, the active star device enters
AS_off.
2) The hysteresis necessary to set and reset the undervoltage reliably is within the range of maximum and minimum values.
3) uStarUVVBUF, dStarUVVBUF, dStarRVBUF correspond with uStarUVVSupply, dStarUVVSupply, dStarRVSupply defined in [EPL09].
3.2 Level Shift Interface Parameters
Description
Condition
Symbol
Min
Undervoltage detection
threshold uVIO 1)
uStarUVVIO
2.35
Undervoltage reaction time uVIO
dStarUVVIO
350
Undervoltage revovery time uVIO
dStarRVIO
350
Typ
Max
Unit
2.75
V
500
650
μs
500
650
μs
1) The hysteresis necessary to set and reset the undervoltage reliably is within the range of maximum and minimum values.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 7/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
3.3 Bus Interfaces (Branches 1 - 4)
3.3.1 Branch Receiver Parameters
Description
Condition
Symbol
Min
Receiver threshold for detecting
Data_1
AS_Normal
uData1
Receiver threshold for detecting
Data_0
AS_Normal
Mismatch of receiver thresholds
uCM=2.5V
Max
Unit
150
300
mV
uData0
-300
-150
mV
uData1|uData0|
-30
30
mV
uCM 1)
-10
15
V
RCM1, RCM2
10
20
40
kΩ
1800
2500
3200
mV
-200
0
200
mV
<1
25
µA
1600
µA
Max
Unit
Undisturbed
Receiver common mode input range receive
function
Receiver common mode input
resistance
TX idle
AS_Normal,
Rload=40…55 Ω,
Cload=100pF
Bus bias voltage
AS_Sleep or
AS_Standby,
Rload=40…55 Ω,
Cload=100pF
uBias
Absolute leakage current at AS_Off
AS_Off,
uBP=uBM=5V 2)
iBPleak,
iBMleak
Absolute leakage current at loss of
GND
Loss of GND 3)
uBP=uBM=0V
iBPleakGND,
iBMleakGND
Typ
1) uCM=(uBP+uBM)/2
2) All other pins are connected to ground.
3) All other pins (including GND) are connected to 16V.
3.3.2 Branch Remote Wake-up Detector Parameters
Description 1)
Condition
Symbol
Min
AS_Standby, AS_
Sleep, uVBAT≥7V
uData0_LP
-400
-100
mV
Acceptance timeout for detection
of a Data_0 phase in wake-up pattern
dWU0Detect
1
4
μs
Acceptance timeout for a detection of an Idle (or Data_1) phase in
wake-up pattern
dWUIdleDetect
1
4
μs
Acceptance timeout for WU
recognition
dWUTimeout
48
140
μs
dWUInterrupt
0.13
1
μs
Wake-up detector threshold for detection Data_0
Acceptance timeout for
interruptions
Continuous signal before interruption 2)
Typ
1) Description, see fig. 4.10.2
2) e.g. the minimum value of dWUInterrupt requires a continuous signal (minimum 0.87 μs) before interruption
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 8/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
3.3.3 Branch Transmitter Parameters
Description 1)
Condition
Symbol
Min
Absolute differential voltage
Rload=40…55Ω,
Cload=100pF
while sending
uStarTxactive
Absolute differential voltage
Rload=40…55Ω,
Cload=100pF
while idle
uStarTxidle
Absolute output current at Bp, BM
Max
Unit
900
2000
mV
0
30
mV
BP, BM shorted
to GND
iBPGNDShortMax,
iBMGNDShortMax
60
mA
Absolute output current at Bp, BM
BP, BM shorted
to 27V
iBPBAT27ShortMax,
iBMBAT27ShortMax
60
mA
Absolute output current at Bp, BM
BP, BM shorted
to -5V
iBP-5VShortMax,
iBM-5VShortMax
60
mA
Absolute output current at Bp, BM
BP, BM shorted
mutually
iBPBMShortMax,
iBMBPShortMax
60
mA
Equivalent transmitter output
resistance
Rload=40Ω,
100Ω
Cload=100pF 2)
RStarTransmitter
300
Ω
40
Typ
150
1) Description, see fig. 4.4.3 and 4.4.4
2) RStarTransmitter =50Ω*(uBus100 - uBus40)/(2.5*uBus40 - uBus100) ; uBus100 is uBus with Rload=100Ω and uBus40 is uBus
with Rload=40Ω
3.3.4 Branch To Branch Timing Parameters
Description 1)
Condition
Filter time for Idle detection
Filter time for activity
detection
Symbol
Min
dStarIdleDetection
dStarActivityDetection
Typ
Max
Unit
50
200
ns
100
250
ns
Propagation delay from branch
m to branch n
Negative edge
dStarDelay10
150
ns
Propagation delay from branch
m to branch n
Positive edge
dStarDelay01
150
ns
Asymmetric propagation delay
uBus ≥ 400mV,
4400ns ≥d Bit ≥
80ns
dStarAsym 2)
0
8
ns
TSS length change
dStarTSSLengthChange 3)
-450
0
ns
Prolongation of last bit of a
frame
dStarFES1LengthChange 4)
0
450
ns
Symbol length change
dStarSymbolLengthChange 5)
-300
450
ns
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 9/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
Description 1)
Condition
Prolongation of symbol at
symbol end
1)
2)
3)
4)
5)
6)
Symbol
Min
dStarSymbolEndLengthChange 6)
0
Typ
Max
Unit
450
ns
Max
Unit
Description, see fig. 4.2.2-4.2.5
dStarAsym=|dStarDelay10 - dStarDelay01| (for uBus >400mV and 4400ns>dBit>80ns [EPL 09])
dStarTSSLengthChange=dTSS_n-dTSS_m
dStarFES1LengthChange=dFES1_n-dFES1_m
dStarSymbolLengthChange=dSymbol_n-dSymbol_m, according [EPL 09]
dStarSymbolEndLengthChange=dSymbolEnd_n-dSymbolEnd_m, according [EPL 09]
3.3.5 Mode Control Timing Parameters
Description 1)
Condition
Symbol
Min
Typ
Active star setup delay 2)
dStarSetupDelay
500
ns
Time to enter AS_Normal after VBUF is available
remote wake-up event
dStarWake-upReactionTime
70
µs
Timeout for leaving
AS_Normal_APM_RWU
Undervoltage at
VCC
dStarWake-upGotoStandby
2
3.8
6
ms
Go-to-sleep timeout
No data
transmitting or
receiving
dStarGotoSleep
640
1000
1300
ms
dBranchRxActiveMax
650
2600
µs
TOVER
140
170
°C
Symbol
Min
Max
Unit
0.7*uVIO
V
Noise detection time
Overtemperature threshold 2)
1) description see section 4.9
2) not tested in production test
3.4 Communication Controller Interface
3.4.1 TXD and TXEN Input Parameters
Description
Condition
TXEN threshold for detection
high level
VIH_TXEN 1)
TXEN threshold for detection
low level
VIL_TXEN 1)
TXD threshold for detection
high level
VIH_TXD 2)
TXD threshold for detection
low level
VIL_TXD 2)
Input capacitance at pin TXD 3)
C_StarTXD
Typ
0.3*uVIO
V
0.6*uVIO
0.4*uVIO
V
V
10
pF
Pull up current at TxEN
uVIO=5V
Ipu_TxEN
-300
-150
-50
µA
Pull down current at TxD
uVIO=5V
Ipd_TxD
5
30
50
µA
1) VIH_TXEN and VIL_TXEN correspond with uVDIG-IN-HIGH and uVDIG-IN-LOW of [EPL09].
2) EPL notation: VIH_TXD is equivalent to uStarLogic_1, VIL_TXD is equivalent to uStarLogic_0.
Note: The data lines TXD and TXEN from the Communication Controller are related to VIO level.
3) not tested in production test
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 10/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
3.4.2 RXD Output Parameters
Description
Condition
Symbol
Min
Typ
Unit
uVIO
V
0.2*uVIO
V
Iload=-2mA
VOH_RXD
Low level output voltage
Iload=2mA
VOL_RXD
Rise time, fall time at RXD pin
Cload=15pF
dStarRXDR15+ dStarRXDF15
13
ns
Difference of rise and fall time
Cload=15pF
|dStarRXDR15 –dStarRXDF15|
5
ns
uVIO < uStarUVVIO,
Rload=100kΩ
uVRXD-OUT-UV 4)
500
mV
AS_Off
uVRXD-OUT-OFF 4)
VIO
V
2)3)
3)
Output voltage at VIO
undervoltage
Output voltage at unsupplied
star 3)
1)
2)
3)
4)
0.8*uVIO
Max
High level output voltage
1)
1)
VOH and VOL correspond with uVDIG-OUT-HIGH and uVDIG-OUT-LOW of [EPL09].
related to 20%-80% uVIO
not tested in production test
uVRXD-OUT-UV, uVRXD-OUT-OFF correspond to uVDIG-OUT-UV, uVDIG-OUT-OFF of the EPL specification [EPL09]
3.4.3 Bus to RXD Timing Parameters
Description
Condition
Symbol
Min
Idle reaction time
dStarRxai
Activity reaction time
dStarRxia
Typ
Max
Unit
50
550
ns
100
350
ns
Receiver delay
negative edge
dStarRx10
225
ns
Receiver delay
positive edge
dStarRx01
225
ns
uBus ≥ 400mV,
4400ns ≥d Bit ≥
80ns
dStarRxAsym 2)
10
ns
TSS length change from branch
to RxD 3)
Rload=40 Ω,
Cload=100pF
dStarTSSLength
Change_Bus_RxD
-450
0
ns
FES1 length change from
branch to RxD 4)
Rload=40 Ω,
Cload=100pF
dStarFES1Length
Change_Bus_RxD
0
450
ns
Symbol length change from
branch to RxD 5)
Rload=40 Ω,
Cload=100pF
dStarSymbolLength Change_
Bus_RxD
-300
400
ns
Receiver delay mismatch
1) Description, see section 4.4.1.1 and 4.4.1.2
2) dStarRxAsym = | dStarRx10 - dStarRx01 | (for uBus level of +/-150mV and +/-300mV)
3) dStarTSSLengthChange_Bus_RxD=dStarRx01-dStarRxia
4) dStarFES1LengthChange_Bus_RxD =dStarRxai-dStarRx01
5) dStarSymbol¬LengthChange_Bus_RxD = dStarRxai-dStarRxia
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 11/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
3.4.4 TXD, TXEN To Bus Timing parameters
Description
1)
Condition
Symbol
Transmitter delay, negative
edge
Rload=40 Ω
Cload=100pF,
TxD rise and
fall times ≥ 9ns
(20%-80%)
Max
Unit
dStarTx10
225
ns
dStarTx01
225
ns
Transmitter delay mismatch
TxD fall/rise time
5±1ns
dStarTxAsym 3)
10
ns
Fall time differential bus voltage 2)
80% to 20%
Rload=40 Ω,
Cload=100pF
dBusTx10
6
18.75
ns
Rise time differential bus voltage 2)
20% to 80%
Rload=40 Ω,
Cload=100pF
dBusTx01
6
18.75
ns
dBusTxDif
3
ns
Transmitter delay, positive
edge
Difference between differential rise and fall
time | dBusTx10 - dBusTx01| 2)
Min
Typ
Propagation delay idle to active
Rload=40 Ω,
Cload=100pF
dStarTxia
250
ns
Propagation delay active to
idle
Rload=40 Ω,
Cload=100pF
dStarTxai
250
ns
Transition time idle to active 2)
Rload=40 Ω,
Cload=100pF
dBusTxia
30
ns
Transition time active to idle 2)
Rload=40 Ω,
Cload=100pF
dBusTxai
30
ns
TXEN=0
dStarTxActiveMax
650
2600
µs
TSS length change from TxD to
the branches 4)
Rload=40 Ω,
Cload=100pF
dStarTSSLength
Change_TxD _Bus
-450
0
ns
FES1 length change from TxD
to the branches 5)
Rload=40 Ω,
Cload=100pF
dStarFES1Length
Change_ TxD _Bus
0
450
ns
Symbol length change from
TxD to the branches 6)
Rload=40 Ω,
Cload=100pF
dStarSymbolLength Change_
TxD _Bus
-300
400
ns
75
ns
Maximum length of
transmitter activation
TxD reaction time after TxEN
Low-High transient 2)7)
1)
2)
3)
4)
5)
6)
7)
dStarTxreaction
Description, see section 4.4.1.3-4.4.1.4
Not tested in production test
dStarTxAsym = | dStarTx10 - dStarTx01 | (for uBus level of +/-150mV and +/-300mV)
dStarTSSLengthChange_TxD_Bus=dStarTx01-dStarTxia
dStarFES1LengthChange_TxD_Bus =dStarTxai-dStarTx01
dStarSymbol¬LengthChange_TxD_Bus = dStarTxai-dStarTxia
See section 4.4.1.3
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 12/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
3.4.4 TXD, TXEN To Bus Timing parameters
Description
Idle loop back delay
Condition
Symbol
Min
Typ
dStarTxRxai
1)
Max
Unit
325
ns
1) The time span from the end of a symbol transmission (0-1 transition of TxEN and TxD) to the 0-1 transition at the own
RxD pin.
3.5 Host Interface
3.5.1 SCSN, SCK and SDI Input Parameters
Description
Condition
Symbol
Min
Threshold for detection high
level
VIH_SCSN, VIH_
SCK, VIH_SDI
Threshold for detection low
level
VIL_SCSN, VIL_
SCK, VIL_SDI
0.3*uVIO
Typ
Max
Unit
0.7*uVIO
V
V
Pull up current at SCSN
uVIO=5V
Ipu_SCSN
-50
-30
-5
µA
Pull down current at SCK,SDI
uVIO=5V
Ipd_SCK, Ipd_SDI
5
30
50
µA
The signals SCSN, SCK and SDI from the host microcontroller are related to VIO level. VIH and VIL correspond with uVDIG-IN-HIGH
and uVDIG-IN-LOW of [EPL09].
3.5.2 SDO and INTN Output Parameters 1)
Description
Condition
Symbol
Min
High level output voltage
Iload= -2mA
VOH_SDO, VOH_
INTN
0.8*uVIO
Low level output voltage
Iload=2mA
Output voltage SDO at VIO
undervoltage
Output voltage SDO at
unsupplied star
Output voltage INTN at VIO
undervoltage
Output voltage INTN at
unsupplied star 4)
Typ
Max
Unit
uVIO
V
VOL_SDO, VOL_
INTN
0.2*uVIO
V
VIO < uStarUVVIO,
Rload=100kΩ
uVSDO-OUT-UV 2)
500
mV
AS_Off
uVSDO-OUT-OFF 2)
500
mV
VIO < uStarUVVIO,
Rload=100kΩ
uVINTN-OUT-UV 3)
500
mV
AS_Off
uVINTN-OUT-OFF 3)
VIO
V
1) The signals SDO and INTN to the host microcontroller are related to VIO level. VOH and VOL correspond with uVDIG-OUT-HIGH
and uVDIG-OUT-LOW of [EPL09].
2) uVSDO-OUT-UV, uVSDO-OUT-OFF correspond to uVDIG-OUT-UV, uVDIG-OUT-OFF of the EPL specification [EPL09].
3) uVINTN-OUT-UV, uVINTN-OUT-OFF correspond to uVDIG-OUT-UV, uVDIG-OUT-OFF of the EPL specification [EPL09].
4) not tested in production test
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 13/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
3.5.3 SPI And INTN Timing Parameters
Description
Condition
Symbol
Min
Typ
Max
Unit
5
MHz
SPI clock frequency
fSPI
Setup time SCSN
dspis
100
ns
Hold time SCSN
dspih
100
ns
Internal processing time between 2 SPI commands
dspid
70
μs
Mode transition time after
host command
dStarModeChangeSPI
100
μs
dStarReactionTimeSPI
200
μs
Max
Unit
0.7*uVIO
V
Time for detection of an event
to falling edge of INTN
The signals SDO and INTN to the host microcontroller are related to VIO level.
3.6 Bus Guardian Interface Parameters
Description
Condition
Symbol
Min
Typ
Threshold for detection
high level
VIH_BGE 1)
Threshold for detection
low level
VIL_BGE 1)
0.3*uVIO
Ipd_BGE
5
30
50
µA
Min
Typ
Max
Unit
0.7*
uVBUF
V
Pull down current at BGE
uVIO=5V
V
1) VIH and VIL correspond with uVDIG-IN-HIGH and uVDIG-IN-LOW of [EPL09].
3.7 Intra Star Interface Parameters
Description
Threshold for detection high
level at TRXD0, TRXD1
Condition
Symbol
Rpullup = 220Ω,
Cload<50pF
VBUF≥4.5V
VIH_TRXD
Threshold for detection low
level at TRXD0, TRXD1
VIL_TRXD
Low level output voltage
at TRXD0, TRXD1
VOL_TRXD
0.3*
uVBUF
V
0.8
V
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 14/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
3.8 DCN and RSTN Input Parameters
Description
Condition
Symbol
Min
Threshold for detection high
level
VIH_DCN
Threshold for detection low
level
VIL_DCN
Threshold for detection high
level
VIH_RSTN
Threshold for detection low
level
VIL_RSTN
0.3*uVIO
Ipu_RSTN
-50
Pull up current at RSTN
uVIO=5V
Typ
Max
Unit
0.7*uVIO
V
0.3*uVIO
V
0.7*uVIO
V
V
-30
-5
µA
Note: There is no internal pull-up or pull-down current source at the DCN pin.
4 Functional Description
4.1 Block Diagram
SCSN
Single_Branch_1
SCK
Bus Failure
Detector_1
Host Interface
(SPI + Interrupt)
SDI
SDO
BP_1
INTN
RxD
TxD
TxEN
BGE
Transmitter_1
Communication
Controller
Interface
Receiver_1
Bus guardian
Interface
Wake up
Detector_1
RSTN
DCN
INH
LWU
VBAT
VCC
VIO
Central
Logic
Inhibit & Wake
BM_1
Single_Branch_2
....
BP_2
Single_Branch_3
....
BP_3
Single_Branch_4
....
BP_4
Star Transmitter &
Receiver
BM_2
BM_3
BM_4
TRXD0
TRXD1
intra star
interface
Power Undervolt.
Supply Monitor POR
5V
Overtemp.
Regulator Monitor
VBUF
Vref
E981.56
GND
Figure 4.1.1: Block Diagram of an active star device (ASD)
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 15/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
The E981.56 is an active star device (ASD). One or more ASDs form an Active Star (AS) in a FlexRay network.
The following table shows the functional classes according to FlexRay Electrical Physical Layer Specification V3.0
(FlexRay Consortium 2009) implemented in the Active Star device:
Functional class
Implemented
Active star – communication controller interface
yes
Active star – bus guardian interface
yes
Active star – voltage regulator control (including LWU)
yes
Active star – internal voltage regulator
no
Active star – logic level adaptation
yes
Active star – host interface
yes
Increased voltage amplitude transmitter
yes
The ASD E981.56 has 4 branches to connect 4 bus lines from FlexRay nodes. Every branch has a bus interface (the
pins BP and BM) and can receive or transmit differential bus signals. The receiver of each branch recognizes incoming FlexRay signals and a signal router as part of the central logic switches the signal paths to all other branches.
The idle phase after the end of the frame resets the signal path and all branches are ready to receive signals from
their bus lines. The signal router switches the signal path again according the receiving branch. Collisions are normally prevented due to the FlexRay time slot principle. In addition the signal router prevents the concurrent reception from other bus lines during the propagation of a frame.
Each branch of an ASD consists of the receiver, the wake-up detector and the transmitter including bus error detection. The receiver forms from the differential analog bus signal a single-ended logical signal. The transmitter sends
out the well balanced differential signal to achieve high signal integrity and a low EME. The wake-up detector acts
like a receiver at very low power consumption and wakes the ASD by means of dedicated patterns from the bus.
In the normal mode AS_Normal the power supply is the external voltage VCC, necessary for the transmitting and
receiving functionality. VCC is connected with the internal supply voltage VBUF as long as uVCC in not in undervoltage. Otherwise, two external capacitors connected to VBUF1 und VBUF2 can maintain the voltage which is
necessary to transmit wake-up symbols in the low power mode. A second voltage derived from VBAT (battery
voltage with the reverse bias protection diode) serves as low power supply (in AS_Standby and AS_Sleep) to keep
the states and to permit the wake-up ability. The signal INH (related to VBAT) is applicable to switch the external
power supply VCC.
Every signal path passes the TRXD intra star interface (TRXD-IF). The pins TRXD0 and TRXD1 have external pull up
resistors and allow to connect further star couplers (increasing of the number of branches by banking of active
star devices).
If the AS is housed on an ECU board the usage of the communication controller interface (CC-IF) and/or the host
interface (Host-IF) is possible. The CC sets TXEN=0. This forces the signal router to send the TXD signal from the CC
to all 4 branches as well as to the intra star interface (TRXD-IF).
The host interface comprises the SPI (SCSN, SCK, SDO, and SDI) and the interrupt pin INTN. The host can read the
states of the AS device and the contents of the failure registers. Write commands allow the mode control.
The interfaces of different types of communication controllers CC (RXD, TXD, and TXEN) and hosts (SPI, INTN) can
require different voltage levels. A level shift interface (VIO) delivers the reference voltage of both interfaces. Also
the controlling device of the inputs BGE, RSTN and DCN are related to VIO.
The bus guardian interface permits by the mean of an extra signal to switch all transmitters in a high resistance
state (pin BGE). The input signal at BGE is also related to VIO.
The local wake-up interface comprises the pin LWU (local wake-up). An edge at this pin permits to wake the active
star device by external signal sources with arbitrary levels (from 3.3V to VBAT).
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 16/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
4.2 Branch To Branch Signal Propagation
4.2.1 Autonomous ASD Configuration
VECU
VBAT
5VRegulator
Data streams
Br.1-1
VCC
VBUF
VIO
Br.1-2
Br.1-3
BGE
TRD0
TRD1
TRD0
TRD1
Br.1-4
Br.2-1
VBAT
VCC
VBUF
Br.2-2
Br.2-3
VIO
BGE
Br.2-4
Figure 4.2.1: Example of the two banked autonomous active star devices (autonomous ASDs)
Fig. 4.2.1 shows an AS with 2 banked ASDs which operates in the autonomous mode only. The arrows on the right
side symbolize the data traffic. The incoming signal at branch 1-2 is propagated to all other 7 branches.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 17/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
4.2.2 Branch To Branch Signal Timing
The signal timings from a receiving branch m to another transmitting branch are illustrated in figures 4.2.2 - 4.2.4.
uBus_m
(Receiving
branch m)
uRxData
150mV
0V
-150mV
t
Idle
Data_0
Data_1
-uRx Data
dTSS_m
uBus_n
(Transmitting
branch n )
dTSS_n
uStarTx active
300mV
0V
Idle
Data_0
t
Data_1
-300mV
-uStarTx active
Figure 4.2.2: Signal timing between receiving branch m and transmitting branch n at the frame start
uBus_m
(Receiving
branch m)
uRxData
Data_1
Data_0
Data_1
150mV
0V
-150mV
t
-uRx Data
uBus_n
(Transmitting
branch n )
dStarDelay 10
dStarDelay01
uStarTx active
300mV
Data_1
Data_0
Data_1
0V
t
-300mV
-uStarTx active
Figure 4.2.3: Signal timing between receiving branch m and transmitting branch n
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 18/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
uBus_m
(Receiving
branch m)
uRxData
150mV
30mV
0V
-150mV
Data_0
Data_1
Idle
t
-uRx Data
dFES1_m
uBus_n
(Transmitting
branch n )
dFES1_n
uStarTx active
300mV
Data_0
Data_1
Idle
30mV
0V
t
-300mV
-uStarTx active
Figure 4.2.4: Signal timing between receiving branch m and transmitting branch n at the end of a frame
uBus_m
(Receiving
branch m)
0V
-30mV
-300mV
t
Idle
Data_0
Idle
-uRx Data
dSymbol _m
uBus_n
(Transmitting
branch n )
0V
-30mV
-300mV
dSymbol _n
t
Idle
Data_0
Idle
-uStarTx active
Figure 4.2.5: Signal timing between receiving branch m and transmitting branch n at a symbol
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 19/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
4.2.3 Branch Receiver Input
When the branch is in an idle or receiving phase the terminal behaviour of the ASD is determined by the biasing
voltage and the input voltage divider. Fig. 4.2.6 shows a simplified equivalent circuit.
iBP
Receiver
input
= uBias
BP
RCM1
RCM2
BM
GND
iBM
Figure 4.2.6: Biasing circuit of the receiver
4.2.4 Branch Transmitter Output
Data_0
Data_1
Idle (low Idle
power)
uBus
uCM
uBP
uBM
t
Figure 4.2.7: Bus signal in the Idle (low power), Idle (both biased by the receiver) and active state (driven by the receiver)
In the Idle state the bus voltages uBP and uBM are about zero, if the ASD is in a low power mode (AS_Standby or
AS_Sleep). After entering the mode AS_Normal the receiver input circuit drives the bus voltage to uBias (via the
resistance RCM1 or RCM2).
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 20/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
4.3 CC-and Host-Interface
4.3.1 Block Diagram Of An ECU With ASD
The E981.56 may be housed in a FlexRay node with host and communication controller. It is possible to send and
receive data from/to the local ECU via the communication controller interface (TXD, TXEN, RXD). The host has the
full access for mode control and diagnosis via Host-IF (SPI+INTN).
VBAT
4
Supervisor
Communication
Controller
TxEN
TxD
RxD
RSTN
VIO
VCC
SPI
INTN
Local
Wake-up
LWU
ECU 1
Power
Supply
Microcontroller
(HOST)
INH
BGE
Bus Driver
E981.56
DCN
additional
intra star
interface
if needed
Bus Driver
E981.56
TRXD0
TRXD1
VBUF
BP_1 BM_1 BP_2 BM_2 BP_3 BM_3 BP_4 BM_4
GND
Figure 4.3.1: The active star device (ASD) positioned at an ECU
An ECU board with an active star (fig. 4.3.1) includes the controller (host and CC or host including CC, respectively),
the ASD itself and the power supply unit. The supply voltages are derived from the voltage VBAT. VBAT is the reverse bias protected alternator voltage. Optionally local wake-up (LWU) and bus guardian enable (BGE) are applicable. LWU is an additional possibility to wake the ASD (switch to AS_Normal). BGE=0 disables the transmitting
function from TXD to all branches.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 21/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
ECU
VBAT
Power
Supply
VIO
VIO
SCSN1
Controller
INTN2
(HOST)
INTN1
Communication
SDO
SDI
SCSN2
Supervisor
SCK
VECU
Microcontroller
BGE
TxEN
Local
Wake-up
TxD
VIO
VCC
SPI+INTN2
INH
E981.56 Device 2
(banked)
LWU
DCN
BP1
RxD
BM1
BP2
BM2
BP3
BM3
BP4
SPI+INTN1
TRXD0
TRXD0
TRXD1
TRXD1
VBUF
VBUF
BM4
BM1
GND
INH
VCC
VIO
RxD
TxD
TxEN
E981.56 Device 1
(CC and Host IF used)
BP1
BM2
BP2
BM3
BP3
LWU
DCN
BM4
Local
Wake-up
BP4
GND
Figure 4.3.2: Two banked star couplers for stars up to eight buses
Two banked active star devices (ASDs) at fig. 4.3.2 are connected via the intra star interface (TRXD0 and TRXD1). It
extends the FlexRay AS to 8 branches. The open drain output concept with external pull up resistors permits the
extension to further ASDs. In this example the right ASD is connected to the Communication Controller of a local
ECU. The second ASD extends the number of branches to 8. Its CC interface is unused. The host shall address the
SCSN pins of both ASDs. Also INTN1 and INTN2 are connected separately to the host.
4.4 Communication Controller Timing
4.4.1 Signal Timing Between CC- And Bus-Interface
The figures 4.4.1 - 4.4.4 show the timing behavior of the signal paths from the CC-Interface to the bus lines at the
branches and vice versa. The parameters are specified in section 3.4.3.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 22/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
4.4.1.1 Signal Timing Bus To RXD: Idle-Active And Active-Idle Transition
uBus
dBusRxia
dBusRxai
0V
-30mV
t
-150mV
-300mV
-uRx
dBusActive
dBusldle
dStarRxia
VRxD/VIO
dStarRxai
1
0.5
0
Figure 4.4.1: Signal bus to RXD: Transition Idle to Active and vice versa
No.
Parameter
Symbol
Min.
Max.
Unit
uBus
400
3000
mV
Transition time Idle to Data_0
dBusRxia
18
22
ns
3
Transition time Data_0 to Idle
dBusRxai
18
22
ns
4
Data_0 time
dBusActive
590
810
ns
5
Idle time
dBusIdle
590
810
ns
1
Differential bus voltage at the receiver input
2
Table 4.4.1: Bus signal parameter of the receiver test (Active/Idle detection)
4.4.1.2 Signal Timing Branch Bus to RXD: Data Transition
uBus
dBusRx10
dBusRx01
uRxData
300mV
150mV
0V
-150mV
-300mV
t
-uRx Data
dBusRx0Star
VRxD/VIO
dStarRx10
dBusRx1 Star
dStarRx01
1
0.5
0
Figure 4.4.2: Signal bus to RXD: Transition Data_1 to Data_0 and vice versa
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 23/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
No.
Parameter
Symbol
Min.
Max.
Unit
uBus
400
1
Differential bus voltage at the receiver input
3000
mV
2
Transition time Data_1 to Data_0
dBusRx10
22.5
ns
3
Transition time Data_0 to Data_1
dBusRx01
22.5
ns
4
Time span Data_0
dBusRx0Star
80
4320
ns
5
Time span Data_1
dBusRx1Star
80
4320
ns
Table 4.4.2: Bus signal parameter of the receiver test
4.4.3 Signal Timing TXEN To Bus: Idle-Active And Active-Idle Transition
VTxEN/VIO
dTxENLOW
1
0.5
0
dStarTxia
dStarTxai
uBus
0V
-30mV
t
-300mV
-uStarTx active
dBusTxia
dBusTxai
Figure 4.4.3: Signal TXEN to bus: Transmitter behavior at Idle to Active transition and vice versa
Note: BGE=1 is assumed. The signal TXEN controls the start and the end of the transition. TXD=0 is assumed in the figure
above.
No.
1
Parameter
Time span of bus activity
Symbol
Min.
dTxENLOW
550
Typ.
Max.
Unit
650
ns
Table 4.4.3: Parameter of the TxEN input signal of the transmitter test
The E981.56 provides the High-Low transient of TxEN at the start of a frame or a symbol, if the TxD signal has already the low level state.
A time span of dStarTxreaction after the Low-High transition of TxEN, the E981.56 suppresses any reaction on
canges at TxD.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 24/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
4.4.1.4 Signal Timing TXD To Bus: Data Transition
VTxD/VIO
100...4400ns
1
0.5
0
dStarTx 10
dStarTx 01
uBus
uStarTx active
0.6*uStarTxactive
300mV
0V
t
-300mV
-0.6*uStarTxactive
-uStarTx active
dBusTx10
dBusTx 01
Figure 4.4.4: Transmitter behavior while transmitting Data_0 and Data_1
Note: BGE=1 and TxEN=0 are assumed.
4.4.2 Loop Back TxEN – RxD
A symbol transmission sent by the Communication Controller shows the low state of TxEN and TxD. The end of the
symbol transmission is accompanied by the 0-1 transient of TxEN and RxD (idle state). The time span between the
TxEn and RxD transition is defined as dStarTxRxai.
4.5 Host Interface Control
The interface between host (master) and ASD (slave) comprises a Serial Peripheral Interface (SPI) plus INTN with
the signals and their corresponding pins:
• SCSN - SPI chip select (low active)
• SCK - SPI clock (input signal)
• SDI - SPI input data (from the host to the ASD)
• SDO - SPI output data (from the ASD to the host)
• INTN - additional pin for wake event and error sum signals (low active)
There are two possibilities to use the SPI:
• The host interface commands are compatible to the requirements of the EPL specification [EPL09], if the
pin 43 (DCN) is connected to VIO (signal DCN=1)
• The host interface commands are compatible to the former ASD E910.56B, if the pin 43 (DCN) is connected
to GND (signal DCN=0)
An external reset of the Active Star Device is possible by a signal RSTN=0 at the pin RSTN.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 25/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
4.5.1 Timing of the SPI
The properties of the SPI are:
• The SPI required a pure master-slave protocol with host controller as master
• Only one register is accessible within one telegram
• The SPI access is within the LOW state of SCSN
• The frequency of the clock at SCK is defined by fSPI. The clock polarity is fix CPOL = 0
• The MSB is the first transmitted bit, the LSB the last one
• The shift out is done at the rising edge of SCK, the shift in at the falling edge of SCK
• dspis is the setup time of from the 1-0 transient of the SPI selection signal SCSN to the 0-1 transient of the first
clock of SCK
• dspih is the hold time of from the 1-0 transient of the 16th clock of SCK to the 0-1 transient of the SPI selection
signal SCSN
• The time between two consecutive SPI accesses is defined as dSPId.
Figures 4.5.1 and 4.5.2 illustrate the SPI signal flow.
dspih
dspis
SCSN
16 clocks/cycle
1
SCK
2
3
4
15
16
sample (AS)
SDI
X
MSB
14
13
12
1
LSB
X
13
12
1
LSB
float
sample (host)
SDO
float
X
MSB
14
Figure 4.5.1: SPI diagram based on 16 clocks per cycle
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 26/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
dspid
READ registers cycle
SCSN
READ CMD
NEXT COMMAND
PREVIOUS DATA
DATA FROM STAR COUPLER
SDI
SDO
...
...
SCK
READ and RESET registers cycle
SCSN
...
SCK
...
SDI
READ/RES CMD
NEXT COMMAND
SDO
PREVIOUS DATA
DATA FROM STAR COUPLER
WRITE registers cycle
SCSN
...
SCK
...
SDI
WRITE CMD
NEXT COMMAND
SDO
PREVIOUS DATA
DATA FROM STAR COUPLER
Figure 4.5.2: SPI diagrams of the Read, Read-Reset and Write procedures
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 27/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
4.5.2 SPI Registers With Enhanced Instruction Set
The SPI commands and messages are compatible with the requirements of the EPL specification V3.0 [EPL09].
Register Entries (Conditions: VDCN=VIO => enhanced instruction set)
Bit
SDI
SDO
15
WRITE
AS_MODE[1]
14
RESET
AS_MODE[0]
13
ADR[3]
ADR[3]
12
ADR[2]
ADR[2]
11
ADR[1]
ADR[1]
10
ADR[0]
ADR[0]
9
reserved (has to be set to 0)
APM-Flag
8
PARITY
PARITY
7
W_DATA[7]
R_DATA[7]
6
W_DATA[6]
R_DATA[6]
5
W_DATA[5]
R_DATA[5]
4
W_DATA[4]
R_DATA[4]
3
W_DATA[3]
R_DATA[3]
2
W_DATA[2]
R_DATA[2]
1
W_DATA[1]
R_DATA[1]
0
W_DATA[0]
R_DATA[0]
Table 4.5.1: SPI register entries
4.5.2.1 SPI Input Description (SDI)
Name
Description
WRITE
W_DATA[7:0] will be evaluated, if this bit is set to 1, otherwise it will be ignored.
RESET
When set to 1, all error registers, the POR_FLAG and WU sources will be reset to the corresponding reset values after the SPI access.
ADR[3:0]
Sets the address of the register that will be output during next SPI access.
Defines the address of the register that will be written (only if WRITE = 1) and that will be
output during next SPI access.
PARITY
Odd parity bit for both SDI command bytes.
W_DATA[7:0]
Write data. Only evaluated if WRITE = 1. See register description for effects.
Table 4.5.2-a: SPI input description
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 28/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
4.5.2.2 SPI Output Description (SDO)
Name
Description
AS_MODE[1:0] Signals the current MODE of the ASD.
01: ASD is in Normal Mode
10: ASD is in Standby Mode
11: ASD is in Sleep Mode
ADR[3:0]
Signals address of register that is output with the current SPI access.
APM-Flag
Signals if the ASD is in autonomous power mode (APM)
PARITY
Odd parity bit for both SDO output bytes.
R_DATA[7:0]
Read data corresponding to ADR[3:0] of the current output word. See register description for
details.
Table 4.5.2-b: SPI output description
4.5.2.3 SPI Registers
Name
Adress
Description
ASD_ERR
0x0
global error register
BR_ERR
0x1
branch error register
Wake-up
0x2
wake-up source register
ASD_CFG
0x3
global configuration register
BR1_CFG
0x4
branch 1 configuration register
BR2_CFG
0x5
branch 2 configuration register
BR3_CFG
0x6
branch 3 configuration register
BR4_CFG
0x7
branch 4 configuration register
Register ASD_ERR (address 0x0)
MSB
Content
LSB
VBATOK
VIOOK
VCCOK
VBUFOK
-
POR
OTEMP
TXENL
Reset value
1
1
1
1
0
*
0
0
Access modes
R
R
R
R
R
R
R
R
Bit description
VBATOK : 0 if uVBAT < uStarUVVBAT
VIOOK : 0 if uVIO < uStarUVVIO
VCCOK : 0 if uVCC < uStarUVVCC
VBUFOK : 0 if uVBUF < uStarUVVBUF
OTEMP : 1 if Tj > Tover
TXENL : 1 if TXEN = 0 for longer than dStarTxActiveMax
POR : POR occurred (1 after POR, 0 after RESET command)
Table 4.5.3-a: Register ASD_ERR.
Note: This register contains global error flags of the ASD.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 29/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
Register BR_ERR (address 0x1)
MSB
Content
LSB
NOISE_B1 NOISE_B2 NOISE_B3 NOISE_B4 LINE_B1
LINE_B2
LINE_B3
LINE_B4
Reset value
0
0
0
0
0
0
0
0
Access modes
R
R
R
R
R
R
R
R
Bit description
NOISE_Bn : 1 when a noise error occurred at branch n (noise for longer than
dBranchRxActiveMax)
LINE_Bn : 1 when a line error occurred at branch n
Table 4.5.3-b: Register BR_ERR.
Note: This register contains branch error flags.
Register WAKE-UP (address 0x2)
MSB
Content
LSB
RWU_B1 RWU_B2 RWU_B3 RWU_B4
-
TRXD
LWU
SPI
Reset value
0
0
0
0
0
0
0
0
Access modes
R
R
R
R
R
R
R
R
Bit description
RWU_Bn : remote wake-up via branch n
TRXD : wake-up via activity on TRXD bus
LWU : wake-up because of a level change of the LWU pin
SPI : wake-up via SPI command
Table 4.5.3-c: Register WAKE-UP
Note: This register signals the last wake-up source.
Register ASD_CFG (address 0x3)
MSB
LSB
AS_
AS_
APM_FLAG
MODE[1] MODE[0]
Content
-
Reset value
0
1
0
R
R/W
R/W
Access modes
Bit description
-
-
LWU_VIO
MASK_
VBATUV
1
0
0
1
0
R/W
R
R
R/W
R/W
AS_MODE : sets/reads AS_MODE
01 means Normal Mode
10 means Standby Mode
11 means Sleep Mode
00 (write) means no mode change
APM_FLAG : 1 means that the ASD is in autonomous power mode (APM)
LWU_VIO : 1 means that LWU uses VIO-level threshold VTH_LWU_VIO
else VBAT-level threshold VTH_LWU_VBAT
MASK_VBATUV : 1 means that undervoltage at VBAT doesn’t reset VBATOK in register
ASD_ERR
Table 4.5.3-d: Register ASD_CFG
Note: This register contains the global ASD configuration.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 30/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
Register BR1_CFG (address 0x4)
MSB
LSB
Content
-
-
-
-
Reset value
0
0
0
0
0*
0*
0*
0*
Access modes
R
R
R
R
R/W
R/W
R/W
R/W
Bit description
RWU_DIS
TX_DIS
RX_DIS
TX_ONLY
RWU_DIS : 1 means that this branch won’t react to any incoming remote wake-up in
the next low power mode
reset after next wake-up
TX_DIS: 1 means that the transmitter of this branch is disabled
RX_DIS: 1 means that the receiver of this branch is disabled
TX_ONLY: 1 means that transmitting is allowed if Idle has been received in Branch_
FailSilent
* BR1_CFG is reset after wake-up
Table 4.5.3-e: Register BR1_CFG
Note: This register contains the branch configuration for branch 1.
Register BR2_CFG (address 0x5)
This register contains the branch configuration for branch 2. See BR1_CFG for details.
Register BR3_CFG (address 0x6)
This register contains the branch configuration for branch 3. See BR1_CFG for details.
Register BR4_CFG (address 0x7)
This register contains the branch configuration for branch 4. See BR1_CFG for details.
4.5.2.4 SPI Access In The ASD Operation Modes
ASD operation mode
Read
Read/Reset
Write
AS_Normal
Full access
Full access
Full access
AS_Standby
Full access
Full access
Full access
AS_Sleep
Only: Register ASD_ERR (0x0)
Not operable
Only register AS_CFG (0x3)
AS_Off
No access
No access
No access
Table 4.5.3-f: SPI access
Note: Prerequisite is that VIO and (if required) VCC are available.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 31/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
4.5.3 SPI Register Compatible To E910.56B
The downward compatibility to the former version of the active star device (E910.56B) is given by connecting DCO
to GND (hard wired condition).
Exception: Only a generic bus error flag is set.
Register Entries (Conditions: VDCN=0 Y downward compatible to E910.56B)
clk
Bit
SDI_E910.56B
SDO_E910.56B
1
15
CMD [1]
AS_OPM
2
14
CMD [0]
BRANCH_ADR [1]
3
13
BRANCH_ADR [1]
BRANCH_ADR [0]
4
12
BRANCH_ADR [0]
BRANCH_OPM [1]
5
11
BRANCH_OPM [1]
BRANCH_OPM [0]
6
10
BRANCH_OPM [0]
0 (former ULOAD)
7
9
AS_OPM
0 (former OLOAD)
8
8
X
Y Branch_n_Line_Error (n respective to
Branch_ADR) (former BM2VSUP)
9
7
MASK_VBATOK=0
Y Branch_n_Line_Error (n respective to
Branch_ADR) (former BM2GND)
10
6
Disable RWU Branch 1
Y Branch_n_Line_Error (n respective to
Branch_ADR) (former BP2VSUP)
11
5
Disable RWU Branch 2
Y Branch_n_Line_Error (n respective to
Branch_ADR) (former BP2GND)
12
4
Disable RWU Branch 3
TXENL
13
3
Disable RWU Branch 4
OTEMP
14
2
X
VBATOK
15
1
X
VIOOK
16
0
X
VCCOK
Table 4.5.4: Register entries with E910.56B compatibility
•
•
•
•
The failure registers (Table 4.5.4) are cleared within the read and reset command (see Read-Reset cycle in the
diagram below) or wake-up.
The register entries of the mode control and branch addressing are not affected by the read/reset command.
The host can control a part of the ASD transitions (from AS_Normal to AS_Standby and vice versa)
The host can enable/disable the Tx, Rx and RWU functionality of each branch separately.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 32/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
CMD[1:0]
CMD[1]
CMD[0]
Action
Note
0
0
READ
READ registers (SDI bits 0…13 are ignored): the bits 5…12 are
related to the branch (previous set address seen in bits 14
and 13), the other bits show generic values of the AS;
0
1
READ /RESET
Read and reset, reset of the failure registers (SDI bits 0…13
are ignored), reset of the failure registers of all branches
1
0
WRITE
WRITE registers
1
1
SET BRANCH ADDRESS
Set branch address only (SDI bits 0…11 are ignored)
Table 4.5.5-a: SPI command CMD[1:0]
BRANCH_ADR[1:0]
CMD[1]
CMD[0]
Action
Note
0
0
Addresses Branch 1
0
1
Addresses Branch 2
1
0
Addresses Branch 3
Branch m means that that the following SPI access will
show the SDO failure bits 5…10 of the branch m. The default
value after power up is the address of branch 1.
1
1
Addresses Branch 4
Table 4.5.5-b: Setting of the branch address BRANCH_ADR[1:0]
AS_OPM
AS_OPM
Command
Note
0
NORMAL MODE
Goto AS_Normal, AS_OPM=0 is the default value after power on.
1
STANDBY MODE
Goto AS_Standby_NAPM
Table 4.5.5-c: SPI command CMD[1:0]
BRANCH_OPM[1:0]
BRANCH_ BRANCH_
Command
OPM[0]
OPM[1]
0
Note
Branch is able to send data from the bus to the central
logic and to transmit data from the central logic to the bus.
BRANCH_OPM=[0,0] is the default value after power on.
0
ENABLE_ BRANCH_RX/
ENABLE_ BRANCH_TX
1
Branch is not able to receive data from the bus but it can
DISABLE_ BRANCH_RX/
transmit data from the central logic to the bus (transmit
ENABLE_ BRANCH_TX
only).
0
ENABLE_ BRANCH_RX/
DISABLE_ BRANCH_TX
1
Branch is neither able to receive data from the bus to the
DISABLE_ BRANCH_TX/
central logic nor to transmit data form the central logic to
DISABLE_ BRANCH_TX
the bus.
0
1
1
Branch is able to send data from the bus to the central logic
and not to transmit data form the central logic to the bus
(receive only).
Table 4.5.5-d: Branch operation mode
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 33/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
4.5.4 INTN Output
If any error occurs (undervoltage signals are low or another failure flag in the tables 4.5.3-a, 4.5.3-b or 4.5.4 is high,
the failure sum signal INTN becomes low. The INTN also signals wake-up events, when DCN=1.
INTN
Action
Note
0
Active low
Error or wake sum signal, also usable as interrupt
1
Inactive
Table 4.5.6: INTN output signal
4.6 Intra Star Interface
•
•
•
•
All FlexRay signal paths pass the I/O pins TRxD0 and TRxD1.
2 external pull up resistors connect TRxD0 and TRxD1 with VBUF.
The signals uTRxD0 and uTRxD1 represent the signal states of Data_0, Data_1 and Idle.
The intra star interface permits to bank two or more star couplers to an active star with 8 ore more branches.
TRxD1
TRxD0
uBus (input)
uBus (output)
RxD
1
1
Idle
Idle
1
0
1
Data_1
Data_1
1
1
0
Data_0
Data_0
0
0
0
Collision
X
X
Note
Table 4.6.1 Assign of the signals TRXD0 and TRXD1
4.7 Bus Guardian Interface
The pin BGE enables the ability to transmit signals from TxD to the buses. The Bus Guardian or another controlling
device can prevent the propagation of data from the CC to the branches and to TRXD by setting BGE=LOW.
BGE
Action
0
Disable Tx from local CC
1
Enable Tx from local CC
Note
BGE has no impact to the branch to branch data propagation.
Table 4.7.1 Signal Bus Guardian Enable
4.8 Level Shift Interface
The pin VIO permits to use Communication Controller Interfaces, Host Interfaces, Bus Guardian Interfaces and
DCN signal with HIGH levels of 5.0V or 3.3V. VIO supplies the interface inputs (SCSN, SCK, SDI, TxD, TxEN, BGE and
DCN) and outputs (SDO, INTN and RxD).
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 34/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
4.9 Operation Modes Of Active Star Device
4.9.1 Active Star Operation Modes
• The Active Star Device supports 3 operation modes: AS_Normal, AS_Standby and AS_Sleep (two low power
modes).
• A fourth state AS_Off is defined when the Active Star Device is unsupplied.
• The modes (defined in chapter 4.9.2) of the branches are derived from the AS operation modes.
4.9.1.1 AS_Off
•
•
•
•
The internal supply voltage of the central logic VDD is lower than the threshold uStarUVVDDoff , and no analog
and digital functions are possible. In this case neither VBAT nor VCC are able to provide the voltage for the
internal voltage VDD.
All branches are in the state Branch_Off.
INH shows the signal Sleep (high impedance output).
If VDD becomes higher than uStarUVVDDon the ASD resets all logical states and the active star device leaves
AS_Off and enters AS_Standby.
4.9.1.2 AS_Standby
•
•
•
•
•
•
•
•
•
The mode AS_Standby mode is a low power mode (reduced supply current).
The branches are forced to Branch_LowPower,
The INH signals Not_Sleep (INH shows high on VBAT level).
The bus wires are terminated to GND via the receiver input resistances RCM1 and RCM2.
After power-on the ASD enters AS_Standby in the autonomous power moding (flag APM=1). The mode change
is controlled by voltage monitoring and wake-up events only.
A dedicated host command resets APM. Therefore the SPI commands for mode control are applicable. If the
host control sets APM=1 the autonomous power moding is activated (no access by SPI commands but reset of
the APM flag).
The ASD is able to detect remote wake-up at the branches (RWU), TRXD0, TRXD1 activities and local wake-up
events (LWU) and enters AS_Normal (if the supply voltages are available).
The ASD is able to monitor the supply voltages (VCC and VBAT) and the reference voltage (VIO) and to change
to the corresponding power modes.
The SPI registers are readable and writeable (including commands for mode change)
4.9.1.3 AS_Normal Mode
• The ASD is able to receive data from the bus lines and TRXD0, TRXD1 to the central logic.
• The ASD is able to transmit data from one bus line, TRXD0, TRXD1 and TxD to the remaining bus lines, and
TRXD0, TRXD1.
• Not_Sleep is signaled on the AS – power supply interface (the INH signal is high on VBAT level).
• If all branches are in Branch_Idle or Branch_FailSilent for longer than dStarGoToSleep, the active star enters
AS_Sleep.
• If the APM flag is 0, the host is able to drive the AS in the AS_Standby mode.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 35/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
AS_Sleep mode
•
•
•
•
•
•
•
•
•
The AS_Sleep mode is the 2nd low power mode with very low power consumption.
The AS is not able to send or receive data from the buses, but the remote and local wake-up monitoring
functions are active.
The branches are forced to Branch_LowPower
The INH shows high impedance.
The bus lines are terminated to GND via receiver input resistances RCM1 and RCM2.
The ASD is able to detect remote wake-up at the branches (RWU), TRXD0, TRXD1 activities and local wake-up
events (LWU) and enters AS_Standby and AS_Normal (if the supply voltages are available).
The ASD is able to monitor the supply voltages (VCC and VBAT) and the reference voltage (VIO) and to change
to the corresponding power modes.
The logical states remain stored.
A reduced access to the host interface is possible (reading of register 0x0)
4.9.2 Operation Mode Transitions Of The Active Star Device (ASD)
The transitions are depicted in the following state diagram of fig. 4.9.1. It shows the 4 states AS_Off, AS_Standby,
AS_Normal and AS_Sleep. There are two kinds of control of the power mode.
1. The autonomous power moding (flag APM=1) is the default value after power-on. If the ASD has no host
interface or the host interface is out of operation or the level shift interface voltage VIO is not available, the
ASD states can enter and leave all states by wake-up events, undervoltage signals and timeouts of data
traffic.
2. The non-autonomous power moding (flag APM=0) can be set by host control. The host can drive the ASD
in all states (provided that the corresponding supply voltages are available). The host can set APM=1 and
leave its control. The control of the autonomous power moding has higher priority than the host control.
Transitions forced by undervoltage conditions have the highest priority, followed by wake-up events. The control
by host commands (APM=0) has the lowest priority.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 36/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
AS_Normal
AS_Normal_
NAPM
AS_Normal_
APM
11, H1
10
AS_Normal_
APM_RWU
H2
12
H3
2
8
3
9
AS_Standby
4
AS_Standby_
NAPM
5, H5
AS_Standby_
APM
H3
1
AS_Off
(unsupplied)
7
6
H4
13
AS_Sleep
Figure 4.9.1: State diagram of the modes of the Active Star Device
Transition
Conditions
Notes
1
Power on (VDD > uStarUVVDDon)
Power up of VBAT or VCC feed the internal
supply voltage VDD, reset of all logical states,
monitoring of VBAT,VCC, VIO, VDD and VBUF
2
uVCC > uStarUVVCC
3
uVCC < uStarUVVCC ‘AND’ dStarUVVCC expired
4
dStarGotoSleep expired
Bus signals, TRXD, TXEN, SPI and LWU are not
active.
5
uVIO < uStarUVVIO ‘AND’ dStarUVVIO expired
ASD sets APM=1, (wake-up events and undervoltage have higher priority than host control)
6
dStarGotoSleep expired
TRXD, SPI and LWU are not active.
7
(RWU ‘OR’ LWU ‘OR’ activity at TRXD-IF ‘OR’
SPI_WU) 1) 2)
ASD sets APM=1
8
(RWU ‘OR’ LWU ‘OR’ activity at TRXD-IF ‘OR’
SPI_WU) ‘AND’ uVCC < uStarUVVCC 1) 2)
Immediate entry in AS_Normal also at undervoltage of VCC is necessary for the propagation of the wake-up symbols, power is supplied
by external capacitors, ASD sets APM=1
9
dStarWake-upGotoStandby expired ‘AND’ uVCC AS returns to AS_Standby after transmitting of
< uStarUVVCC
wake-up symbols, if VCC shows undervoltage
10
uVCC > uStarUVVCC
11
uVIO < uStarUVVIO ‘AND’ dStarUVVIO expired
12
uVCC < uStarUVVCC ‘AND’ dStarUVVCC expired Set APM=1
13
Power off (VDD < uStarUVVDDoff)
Transition can start from any state.
H1
Host command Goto Normal_APM
Host sets APM=1
AS sets APM=1
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 37/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
Transition
Conditions
Notes
H2
Host command Goto Normal_NAPM
Host sets APM=0
H3
Host command Goto Standby_NAPM
Host sets APM=0
H4
Host command Goto Sleep
ASD sets APM=1
H5
Host command Goto Standby_APM
Host sets APM=1
1) Wake-up events are: local wake-up (LWU) via LWU pin ‘OR’ remote wake-up (RWU) ‘OR’ activity at TRXD interface (if
banked active star devices are applied)
2) SPI_WU is the transition from AS_Sleep or AS_STANDBY after setting the SPI register ASD_CFG (see table 4.5.3-d and section 4.10.3))
4.9.3 Operating States Of The Branches
4.9.3.1 Branch_Off
• The branches fall in the state Branch_Off, if the ASD has entered AS_Off.
• uBus between the pins BP_m and BM_m shows Idle.
• The input bus currents iBP and iBM are less than iBPleak, iBMleak
4.9.3.2 Branch_LowPower
• Condition: The ASD has entered AS_Standby or AS_Sleep.
• Branch transmitter and branch receiver functions are disabled.
• RWU function is active and can signal a remote wake-up event from the bus to the central logic.
4.9.3.3 Branch_RWUDisabled
•
•
•
•
Condition: The ASD has changed from AS_Normal to AS_Standby or AS_Sleep and the host has set Disable_Branch_RWU previously.
Branch transmitter and branch receiver functions are disabled.
The RWU is deactivated.
The branch has lower power consumption (significantly in AS_Sleep).
4.9.3.4 Branch_Idle
•
•
•
•
Condition: The ASD is in AS_Normal and presently there are no data to be sent from any other branch,
TRXD-Interface or CC-Interface to the bus.
If ASD enters AS_Normal, the branches are forced to Branch_Idle firstly.
The transmitter function is disabled.
The receiver function attends the bus activity on this branch and signals bus activity to the central logic.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 38/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
4.9.3.5 Branch_Transmit
• Condition: The ASD is in AS_Normal and the branch shall transmit data from any other branch,
TRXD-Interface or CC-Interface to the bus.
• The receiver function attends the own bus activity and loops back to the central logic.
4.9.3.6 Branch_Receive
•
•
•
Condition: The ASD is in AS_Normal and the branch receiver has detected activity on the bus.
The branch receives the data from the bus and sends them to the other branches, RXD and the TRX_IF.
A timer checks if the non interrupted data stream is longer than the noise detection time dBranchRxActivemax.
Then the propagation of the received data is stopped. The branch is forced to Branch_FailSilent.
4.9.3.7 Branch_FailSilent
•
•
•
Condition: The ASD is in AS_Normal and dBranchRxActivemax has expired.
The branch prevents the propagation of the wrong data stream until the next Idle phase occurs at all other
signal sources (bus interface of all branches, TRXD interface, CC interface).
After recognizing Idle the branch enters Branch_TxOnly, if APM=1 or a dedicated host command is set before.
4.9.3.8 Branch_TxOnly
•
•
•
•
•
Condition: The ASD is in AS_Normal and the branch is forced from Branch_FailSilent.
The branch does not receive data from the bus but is able to transmit to the bus.
The results of the bus error detection are available after the transmitting of the next frame to the bus.
The branch enters Branch_Idle if no bus error has occurred (Branch_m_Line_Error=0, Note: The error flag is
reset after the corresponding SPI access.)
The branch returns to Branch_FailSilent if a bus error has occurred (Branch_m_Line_Error =1)
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 39/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
4.9.4 Branch Operating State Transitions
AS_Standby
AS_Sleep
1
AS_Off
Branch_
LowPower
Branch_
RWUDisabled
H4
Branch_Off
11
12
13
AS_Normal
Branch _ Disabled
2
Branch_
TxDisabled
Branch_
RxDisabled
H2
H1
Branch_Idle
4
5
3
6
Branch_
Receive
Branch_
Transmit
9
7
10
Branch_
FailSilent
Branch_
TxOnly
8, H3
Figure 4.9.2: State diagram of the branch states
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 40/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
Transition
Conditions
Notes
1
ASD enters AS_Standby
After power up of VBAT or VCC
2
ASD enters AS_Normal
Repetition of the BranchRWU_disable host
command after re-entering AS_Normal is
necessary.
3
Signal router of the central logic sets the
branch to transmit
A signal from another branch, TRXD0/TRXD1,
TXD shall be transmitted
4
Signal router of the central logic resets the
branch from transmit
The transmission of a frame or symbols has
finished
5
The branch has recognized a signal at its bus
line. The signal router of the central logic sets
the branch to receive
All branches, TRXD-IF and the CC-IF has shown
Idle before.
6
The branch has recognized Idle at its bus line.
The signal router of the central logic waits for
the next signal from any branch, TRXD-IF or
CC-IF .
7
dBranchRxActivemax expired
Noise, bus line short circuit or bubbling idiot is
assumed
8
Idle on all branches CC-IF and TRXD-IF recognized ‘AND’ (APM=1 ‘OR’ TX_ONLY)
Propagation of faultily received signals shall be
prevented, but transmitting (with included bus
error detection) remains active.
9
BusError=0
Bus error detection is possible after the transmitting of a frame on this branch.
10
BusError=1
11
ASD enters AS_Standby ‘OR’ enters AS_Sleep
ASC mode change forces branch states
12
ASD enters AS_Off
Starting from any state within AS_Standby or
AS_Sleep (ASD is unsupplied).
13
ASD enters AS_Off
Starting from any state within AS_Normal
(ASD is unsupplied).
H1
Host command (SPI) disables Rx ‘OR’ Tx functionality
H2
Host command (SPI) cancels the disabled TX
and/orRx functionality
Reset of the disable state (TX or RX)
H3
Host command (SPI) for Tx
see transition 8
H4
ASD enters AS_Standby ‘OR’ enters AS_Sleep
‘WHILE’ disabled RWU function
A host command has disabled the RWU detector already. The flag Branch_RWUDisabled will
be reset after leaving AS_Standby or AS_Sleep.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 41/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
4.10 Wake-up Capabilities
4.10.1 Remote Wake-up (RWU)
Remote wake-up (RWU) wakes the ASD from a low power mode to enter AS_Normal. The wake-up patterns are
received from the bus)
Idle
1st Data_0
phase
dWU0DetectMin
dWU0DetectMax
1st Idle or
Data_1
phase
2nd Data_0
phase
2nd Idle or
Data_1
phase
dWU Phase3
dWU Phase4
dWUIdleDetectMin
dWUIdleDetectMax
uBus
dWU Phase0
dWU Phase1
dWU Phase2
dWU
Figure 4.10.1: Differential bus signal of a wake-up pattern
Fig. 4.10.1 shows the signal uBus of a wake-up pattern consisting of two wake-up symbols (WUS). Starting point
is the Idle-Active transition after an idle phase (dWUPhase0). The duration of the following Data_0 phase is dWUPhase1. The Data_0 state is detected between dWU0DetectionMin and dWU0DetectionMax. The resulting condition is dWUPhase1 > dWU0DetectionMax. The following Idle phase (alternatively Data_1 is possible, see the dotted line of uBus) is detected in the time dWUIdleDetection. The detection of Data_0 and Idle (or Data_1) occurs
in the same manner. The detection of the full wake-up pattern (with the duration dWU) has to be happen within
dWUTimeout, otherwise RWU is not detected.
dWU-Phases < dWU0DetectionMin are not recognized. Thus, the ASD 981.56 wakes up by the mean of a specially
configured payload of a frame:
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
The wake-up mechanism is depicted in fig. 4.10.2 as state diagram.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 42/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
Power on
Wait I’
Idle (Data_1) on bus
Data_0 for longer than dWUInterrupt
dWUIdleDetect expired
Wait S’
dWUTimeout expired
Data_0 on bus
Idle (Data_1) for longer than dWU Interrupt
dWU0Detect expired
Wait A’
dWUTimeout expired
Idle (Data_1) on bus
Data_0 for longer than dWUInterrupt
dWUI dleDetect expired
Wait B’
dWUTimeout expired
Data_0 on bus
Idle (Data_1) for longer than dWU Interrupt
dWU0Detect expired
Wait C’
Wake up
Idle (Data_1) on bus
Data_0 for longer than dWUInterrupt
Start dWUIdleDetect
Initial state
Start dWU0Detect
Start state
Start dWUIdleDetect
dWU Timeout expired
Wait state A
Start dWU0Detect
dWU Timeout expired
Wait state B
Start dWUIdleDetect
dWU Timeout expired
Wait state C
dWUIdleDetect expired
Figure 4.10.2: Sequence of operations at RWU
After RWU the ASD enters AS_Standby and then AS_Normal. If uVCC > uStarUVVCC the ASD remains in AS_Normal (see state diagram of the ASD in fig. 4.x.x). If uVCC ≤ uStarUVVCC the ASD enters AS_Normal_APM_RWU to
propagate wake-up symbols. The ASD returns to AS-Standby after dStarWake-upGotoStandby.
The number of the branch which received a valid wake-up pattern is stored in a SPI register.
4.10.2 Local Wake-up (LWU)
The E981.56 has a local wake-up capability at the pin LWU. A negative or positive pulse that crosses the thresholds
VIH_LWU or VIL_LWU and is longer than dWakePulseFilter is recognized as wake-up event.
The LWU signal is GND related. The permissible signal voltage V_LWU is from the minimum of uVIO up to the maximum of VBAT. As result the ASD leaves AS_Sleep and enters AS_Standby and AS_Normal (if uVCC > uStarUVVCC).
There is no internal pull up or pull down circuit.
4.10.3 Wake-up By SPI Command And TRXD Activity
The ASD also leaves AS_Sleep after the dedicated SPI commands “1x00 110x x010 xxxx” (Goto_Normal_NAPM),
“1x00 110x x011 xxxx” (Goto_Normal_APM) or “1x00 110x x100 xxxx” (Goto_Standby_NAPM). “x” stands for
don’t care. All “x”-ed bits are evaluated only if the ASD is in AS_STANDBY and the parity bit is correct.
If the ASD is in a low power mode activities at the TRXD0, TRXD1 inputs lead to the mode change too.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 43/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
4.11 Power Supply Voltage Conditions
uVBAT
uVCC
Possible operation modes
Wake-up detection
≥ 7V
UV
Low power modes
possible
≥ 7V
5V
All operation modes
possible
UV
5V
All operation modes
LWU not possible
4.12 Active Star Device E981.56 Under Fault Conditions
No. Fault description
SBehavior at BP_x and BM_m
Behavior at CC and host interface 1)
BP_x and BM_x show high impedance (iBP≤iBPleak, iBM≤iBMleak)
uSDO, uRXD show low level
1
AS is without any supply
voltage
2
Undervoltage on the supAll transmitters are switched off
ply voltages VBAT and VCC
INTN=0, SPI register ASD_ERR bits
VBATOK=0 and VCCOK=0, as long
as uVDD>uVDDon
3
Undervoltage on VBAT
(VCC available)
No restrictions of functionality
INTN=0, VBATOK=0 (SPI register)
4
Undervoltage on VIO (VCC
ASD sends Idle to the branches
available)
INTN=0, SPI register ASD_ERR bit
VIOOK=0
5
BP_x/BM_x line shorted
to ground
iBPGNDShortMax, iBMGNDShortMax
6
BP_x /BM_x line shorted
to supply voltage 27V
iBPBAT27ShortMax, iBMBAT27ShortMax
7
BP_x /BM_x line shorted
to -5V
iBP-5VShortMax, iBM-5VShortMax
8
BP_x line shorted to
BM_x line
iBPBMShortMax, iBMBPShortMax
9
BP_x/Bm_x receives
data or noise longer than
dBranchRxActiveMax
10
Error signaling lines (INTN
and SDO) are interrupted
11
Error signaling lines (INTN
and SDO) are shorted to
ground
12
Error signaling lines (INTN
and SDO) are shorted to
VIO or VCC voltage
13
TxD line becomes interrupted
AS branches send Data_0, when
enabled by TxEN
-
14
TxEN line becomes interrupted
AS branches send idle state to the
channels
-
15
TxEN signal is permanent- After the timeout the AS sends idle
ly asserted
states to the channels
ASD sets TXENL in SPI register
ASD_ERR and INTN=0
16
AS detects an overtemperature condition
ASD sets OTEMP in SPI register
ASD_ERR and INTN=0
Bus line error message (bit Line_Bx
in SPI register BR_ERR)
Bus line error message (bit Noise_Bx in SPI register BR_ERR)
Error detection by host (e.g. write
and read of a branch address).
AS sends idle states to the channels
1) Column is valid for signal uDCN=uVIO at pin DCN (enhanced SPI registers)
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 44/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
5 General
5.1 List of Abbreviations
AS:Active Star
ASD: Active Star Device
BD: Bus Driver (transceiver)
BM: FlexRay bus line (minus)
BP: FlexRay bus line (plus)
CC: Communication Controller
DC: Direct current
dXXX: Parameter prefix of a time duration
ECU: Electronic Control Unit (also: node)
EME: Electro Magnetic Emission
ESD: Electro Static Discharge
INTN: Interrupt (error sum signal, low active)
LWU: Local wake-up
OTP: One time programmable
POR: Power on reset
PTAT: Proportional to absolute temperature
RWU: Remote wake-up (WU by pattern)
SCK: SPI clock
SCSN: SPI chip select (low active)
SDI: SPI data input (ASD (=slave) viewpoint)
SDO: SPI data output (ASD (=slave) viewpoint)
SPI: Serial Peripheral Interface
uXXX: parameter prefix of a voltage
WU: Wake-up
WUS: Wake-up symbol
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 45/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
5.2 Reference List To Symbol Names Of EPL Spec. 3.0
Name in Device
Specification
Name in EPL
Specification V3.0
Description
LWU
WAKE
Local wake-up pin or signal
VBUF
uVStarSupply
Voltage for forwarding wake-up symbols also in undervoltage VCC
uINH1Not_Sleep
Output voltage at INH in AS_Normal and AS_Standby
iINHleak
iINH1leak
Output current at INH in AS_Sleep)
VIH_xx,
uVDIG-IN-HIGH
Threshold for detection high level of logic signals (xx is for
TxEN, SCSN, SDI, SCK, BGE)
VIL_xx
uVDIG-IN-LOW
Threshold for detection low level of logic signals(xx is for
TxEN, SCSN, SDI, SCK, BGE)
VIH_TXD
uStarLogic_1
Threshold for detection high level of TxD
VIL_TXD
uStarLogic_0
Threshold for detection low level of TxD
VOH_xx
uVDIG-OUT-HIGH
High level of a logic signal (xx is for RxD, SDO, INTN)
VOL_xx
uVDIG-OUT-LOW
Low level of a logic signal (xx is for RxD, SDO, INTN)
uVxx-OUT-UV
uVVIO-OUT-UV
Digital output voltage at under voltage VIO (xx is for RxD,
SDO, INTN)
uVxx-OUT-OFF
uVVIO-OUT-OFF
Digital output voltage at AS_Off (xx is for RxD, SDO, INTN)
uINHNot_Sleep
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 46/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
6 Package Reference
PACKAGE OUTLINE SPECIFICATION
Date : 04.01.2012
The E981.56 is available in a Pb free, RoHS compliant, QFN44L9 plastic package according to JEDEC MO-220 VMMC1, except of exposed pad size and44
terminal
length Flat
(see drawing
below).Package
The package is classified to Moisture SenLead Quad
Non Leaded
08SP0643.00
ASto
sitivity Author:
Level 3 (MSL
3) according to JEDEC J-STD-020D with a soldering peak temperatureQM-No.:
of (260±5)
°C.
QFN44L9, variant 1
Special leadframe, the exposed pad size and the terminal length are not conform JEDEC MO-220 K.
Description
min
mm
typ
max
min
in ch
typ
max
A
0.80
0.90
1.00
0.031
0.035
0.039
Stan d off
A1
0.00
0 .02
0.05
0.000
0.00079
0.002
Thickness of terminal leads, including lead finish
A3
--
0.20 REF
--
--
0.0079 REF
--
Width of terminal leads
b
0.25
0.30
0.35
0.010
0.012
0.014
Package length / width
D/E
--
9.00 BSC
--
--
0.354 BSC
--
D2 / E2
7.00
7.15
7.25
0.276
0.281
0.285
e
--
0.65 BSC
--
--
0.026 BSC
--
Length of terminal for soldering to substrate
L
0.45
0.55
0.65
0.018
0.022
0.026
Number of terminal positions
N
Package height
Length / width of exposed pad
Lead pitch
Symbol
44
44
Note: the mm values are valid, the inch values contains rounding errors
Note 1: for assembler specific pin1 identification please see QM-document 08SP0363.xx (Pin 1 Specification)
Page 1 of 1
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 47/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
Revision History
Revision Number Revision Date
Description of Change
Page/Chapter
01
Corrected package description. Package drawing added.
47/6
May 21, 2012
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 48/49
QM-No.: 25DS0059E.01
E981.56
FLEXRAY™ ACTIVE STAR DEVICE
PRODUCTION DATA - MAY 21, 2012
WARNING – Life Support Applications Policy
ELMOS Semiconductor AG is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and
vulnerability to physical stress. It is the responsibility of the buyer, when utilizing ELMOS Semiconductor AG
products, to observe standards of safety, and to avoid situations in which malfunction or failure of an ELMOS
Semiconductor AG Product could cause loss of human life, body injury or damage to property. In the development of your design, please ensure that ELMOS Semiconductor AG products are used within specified operating
ranges as set forth in the most recent product specifications.
General Disclaimer
Information furnished by ELMOS Semiconductor AG is believed to be accurate and reliable. However, no responsibility is assumed by ELMOS Semiconductor AG for its use, nor for any infringements of patents or other rights
of third parties, which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of ELMOS Semiconductor AG. ELMOS Semiconductor AG reserves the right to make changes
to this document or the products contained therein without prior notice, to improve performance, reliability, or
manufacturability.
Application Disclaimer
Circuit diagrams may contain components not manufactured by ELMOS Semiconductor AG, which are included as means of illustrating typical applications. Consequently, complete information sufficient for construction
purposes is not necessarily given. The information in the application examples has been carefully checked and is
believed to be entirely reliable. However, no responsibility is assumed for inaccuracies. Furthermore, such information does not convey to the purchaser of the semiconductor devices described any license under the patent
rights of ELMOS Semiconductor AG or others.
Contact Information
Headquarters
ELMOS Semiconductor AG
Heinrich-Hertz-Str. 1 • D-44227 Dortmund (Germany)
Regional Sales and Application Support Office Munich
ELMOS Semiconductor AG
Am Geflügelhof 12 • D-85716 Unterschleißheim/Eching (Germany)
: +492317549100
: sales@elmos.com  : www.elmos.com
: +49893183700
Sales and Application Support Office North America
ELMOS NA. Inc.
32255 Northwestern Highway, Suite 45 Farmington Hills, MI 48334 (USA) : +12488653200
Sales and Application Support Office Korea and Japan
ELMOS Korea
Dongbu Root building, 16-2, Suite 509 • Sunae-dong, Bundang-gu,
Seongnam-shi, Kyonggi-do (Korea)
: +82317141131
Sales and Application Support Office China
ELMOS Semiconductor Technology (Shanghai) Co., Ltd.
Unit London, 1BF GC Tower • No. 1088 Yuan Shen Road,
Pudong New District • Shanghai, PR China, 200122
: +862151785178
Sales and Application Support Office Singapore
ELMOS Semiconductor Singapore Pte Ltd.
60 Alexandra Terrace • #09-31 The Comtech • Singapore 118502
: +6566351141
: sales_china@elmos.com
© ELMOS Semiconductor AG, 2012. Reproduction, in part or whole, without the prior written consent of ELMOS Semiconductor AG, is prohibited.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ELMOS Semiconductor AG
Data Sheet 49/49
QM-No.: 25DS0059E.01