CZC Technology
Transcription
CZC Technology
5 4 CZC Confidential 3 1 CZC Digital technologies Co.,LTD D Board name: Mother Board Schematic Project name: CPL S01 (R48) Version: VerC Start Date:JAN 6,2010 C 2 VerA Release Data: 1. System Block Diagram & Schematic page description; 2. Power Block Diagram & Discription; 3. Annotations & information; 4. Schematic modify Item and history; 5. Power on & off Sequence; 6. ACPI Mode Switch Timings; 7. Power On Sequence Map; 8. CLOCK Distribution; B A Hardware drawing by: Hardware check by: Power drawing by: Power check by: EMI Check by: Manager Sign by: CZC Technology Title Size A4 Date: A zw <Title> Project Name Rev R48 Thursday, April 22, 2010 Sheet 1 of C 56 5 4 3 2 1 S45 System Block Ver:A PWR_BTN Board MB RJ45 Board D D DDR3 1GB/512M QKey & LID Board LVDS VGA HDMI SO-DIMM 0 DDRIII Madison/Park +V1.5,+V0.75S PCIE X16 Arrandale SO-DIMM 1 DDRIII +V1.5,+V0.75S TFT MUX FDI To RJ45 DMI X4 PWR Switch MUX LAN Controller PCIE X1 LVDS VGA R5538/TPS2231/OZ2709 AR8131M VGA PCIE X1 HDMI MUX Express Card USB2.0 HDMI PCIE X1 PCIE X1 C USB2.0 mini PCIE Card 3G C PCH HM55/HM57 ODD HDD 2.5" SIM SLOT SATA SATA USB2.0 mini PCIE Card R SPI AZALIA LINK Azalia Codec ALC662 USB AUDIO Board AN12948A SATA L HP Out BIOS Mic In LPC BUS USB2.0 B SPI KB Ctrl & USB Port B EC WPC8763L SD/MS/MS Pro CARD USB2.0 Cardreader UB6238N USB Port + eSATA EC Code USB2.0 USB Port KB Matrix USB2.0 Camera USB2.0 BT LED TP A CZC Technology Title A zw <Title> Size Project Name A4 Date: Rev R48 Thursday, April 22, 2010 C Sheet 2 of 56 5 4 POWER RAIL D S0 3 AC Mode S1 S3 S4 S5 S0 Battery Mode S1 S3 S4 S5 +V3.3AUX ON ON ON ON ON ON ON ON OFF OFF +V5AUX ON ON ON ON ON ON ON ON OFF OFF +V1.5 ON ON ON OFF OFF ON ON ON OFF OFF +V0.75S ON ON OFF OFF OFF ON ON OFF OFF OFF +V5S ON ON OFF OFF OFF ON ON OFF OFF OFF +V3.3S ON ON OFF OFF OFF ON ON OFF OFF OFF +V1.5S ON ON OFF OFF OFF ON ON OFF OFF OFF +V1.8S ON ON OFF OFF OFF ON ON OFF OFF OFF +V1.5S ON ON OFF OFF OFF ON ON OFF OFF OFF +V1.1S ON ON OFF OFF OFF ON ON OFF OFF OFF +Vcore ON ON OFF OFF OFF ON ON OFF OFF OFF GFXCORE ON ON OFF OFF OFF ON ON OFF OFF OFF 14.31818MHz XTAL 2 1 D 25MHz XTAL C C 133MHz BCLK 100MHz DMI 120MHz DP 133MHz BCLK 100MHz DMI CK505 B 100MHz SATA 96MHz DOT 14.31818MHz REF CPU PCH Buffered Mode 100MHz PEG A 100MHz PCIE 33MHz PCI GPU NEW CARD Mini PCIE SLOT X2 B KBC 100MHz PCIE 48MHz A LAN 25MHz XTAL A No stuff CZC Technology zw Title <Title> Size A3 Date: Project Name Rev R48 Thursday, April 22, 2010 C Sheet 3 of 56 5 4 3 2 1 Board stack up description Voltage Rails D +Vcore:0.75V-1.1V +VDC Primary DC system power supply(9V-12V) +VCC_core Core/VTT voltage for processor +V1.8S 1.8V For PCH CPU +V1.1S 1.05V /1.1V For PCH CPU GPU +V0.75S 0.75V DDRIII Termination voltage +V1.5S 1.5V for system power +V1.5 1.5V power rail for DDRIII +V3.3AUX 3.3V always on power rail I2C SMB Address Device PCB Layers Address Hex(W/R) Bus Clock Generator 1101 001x D2H/D3H SO-DIMM0 1010 000x 0xA0 SO-DIMM1 1010 010x 0xA4 OZ8805LN 0001 011x 16H/17H EC_I2C_CLK2/DATA2 Thermal Diode G781 1001 100x 98H/99H EC_I2C_CLK/DATA Master Top(Signal1) D Ground SMB_CLK/DATA PCH Signal2 Signal3 Trace Impedence:50ohm +/-15% Power EC Signal4 Ground Bottom(Signal5) C +V3.3S 3.3V main power rail +V5AUX 5V always on power rail +V5S 5V main power rail PCB Layer Difference signal Impedence list C USB signal difference impedence 85ohm LVDS signal difference impedence 85ohm DDRIII signal difference impedence 85ohm DDRIII CLK signal difference impedence 68ohm Power States signal state PM_SLP_S4# PM_SLP_S3# +V*AUX +V* +V*S CLOCKS Full ON HIGH ON ON ON ON S1M(Power On Suspend) HIGH ON ON LOW S3(Suspend to RAM) HIGH LOW ON ON ON OFF S4(Suspend to DISK) LOW LOW ON OFF OFF OFF LOW LOW ON OFF OFF OFF LOW LOW OFF OFF OFF OFF S5/Soft Off With AC IN G3 With Battery B Wake up Events OFF Wake Events State Supported(AC) LID switch from EC S3 support Power Button from EC S3,S4,S5 support Keyboard from EC No USB device No B [Option]:ns -- Component marked "ns" is not stuff [Use State]:new --Component Marked "new" is new Materiel. PCB Footprints 3 5 SOT23 A 1 2 4 SOT23_5 1 2 3 A CZC Technology zw Title <Title> Size A3 Date: Project Name Rev R48 Thursday, April 22, 2010 C Sheet 4 of 56 5 4 3 2 1 +V3.3AUX 13,14,15,16,17,19,21,22,24,25,27,28,29,30,31,32,34,35 +V1.5S 7,16,21,22,28,35,36 +V1.5 7,8,10,11,33,35 +V1.1S_VTT 7,12,16,17,35,36 +V3.3S 9,10,11,12,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48 U1A DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3] 14 DMI_TXP0 14 DMI_TXP1 14 DMI_TXP2 14 DMI_TXP3 B24 D23 B23 A22 DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3] D24 G24 F23 H23 DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3] D25 F24 E23 G23 DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3] 14 DMI_RXN0 14 DMI_RXN1 14 DMI_RXN2 14 DMI_RXN3 14 DMI_RXP0 14 DMI_RXP1 14 DMI_RXP2 14 DMI_RXP3 FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7 E22 D21 D19 D18 G21 E19 F21 G18 FDI_TX#[0] FDI_TX#[1] FDI_TX#[2] FDI_TX#[3] FDI_TX#[4] FDI_TX#[5] FDI_TX#[6] FDI_TX#[7] 14 FDI_TXP[7:0] FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7 D22 C21 D20 C18 G22 E20 F20 G19 FDI_TX[0] FDI_TX[1] FDI_TX[2] FDI_TX[3] FDI_TX[4] FDI_TX[5] FDI_TX[6] FDI_TX[7] 14 FDI_FSYNC0 14 FDI_FSYNC1 F17 E17 FDI_FSYNC[0] FDI_FSYNC[1] 14 FDI_INT C17 FDI_INT 14 FDI_LSYNC0 14 FDI_LSYNC1 F18 D17 FDI_LSYNC[0] FDI_LSYNC[1] Intel(R) FDI 14 FDI_TXN[7:0] PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO PEG_RBIAS PCI EXPRESS -- GRAPHICS A24 C23 B22 A21 DMI D 14 DMI_TXN0 14 DMI_TXN1 14 DMI_TXN2 14 DMI_TXN3 C B26 PEG_IRCOMP_R A26 B27 EXP_RBIAS A25 R1 +V1.5S_CPU 7 49.9,1% R2 750 PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15 PEG_RXN[15:0] PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15 PEG_RXP[15:0] 41 PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15] K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31 PEG_RXN15 PEG_RXN14 PEG_RXN13 PEG_RXN12 PEG_RXN11 PEG_RXN10 PEG_RXN9 PEG_RXN8 PEG_RXN7 PEG_RXN6 PEG_RXN5 PEG_RXN4 PEG_RXN3 PEG_RXN2 PEG_RXN1 PEG_RXN0 PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15] J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30 PEG_RXP15 PEG_RXP14 PEG_RXP13 PEG_RXP12 PEG_RXP11 PEG_RXP10 PEG_RXP9 PEG_RXP8 PEG_RXP7 PEG_RXP6 PEG_RXP5 PEG_RXP4 PEG_RXP3 PEG_RXP2 PEG_RXP1 PEG_RXP0 PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15] L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU PEG_TXN15 PEG_TXN14 PEG_TXN13 PEG_TXN12 PEG_TXN11 PEG_TXN10 PEG_TXN9 PEG_TXN8 PEG_TXN7 PEG_TXN6 PEG_TXN5 PEG_TXN4 PEG_TXN3 PEG_TXN2 PEG_TXN1 PEG_TXN0 PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15 PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15] L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU DGPU PEG_TXP15 PEG_TXP14 PEG_TXP13 PEG_TXP12 PEG_TXP11 PEG_TXP10 PEG_TXP9 PEG_TXP8 PEG_TXP7 PEG_TXP6 PEG_TXP5 PEG_TXP4 PEG_TXP3 PEG_TXP2 PEG_TXP1 PEG_TXP0 PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15 41 D lane reversal PEG_TXN[15:0] 41 PEG_TXP[15:0] 41 C IC,ARD_CFD_rPGA,R1P5 Layout Note: All resistors need to be close to Processor (ARD/CFD) to avoid stubs COMP0 TP_SKTOCC_L AH24 SKTOCC# H_CATERR_L AK14 CATERR# AT15 PECI AN26 PROCHOT# BUF_PLT_RST_L 0 H_CPURST_L ns THERMTRIP# AP26 RESET_OBS# 14 H_PM_SYNC AL15 PM_SYNC 16 H_CPUPWRGD AN14 VCCPWRGOOD_1 16 H_CPUPWRGD 14 PM_DRAM_PWRGD R10 VCCPWRGOOD_R 0 R0402_0 AN27 VCCPWRGOOD_0 R318 VDDPWRGOOD_R 0 R0402_0 AK13 SM_DRAMPWROK H_VTTPWRGD TP13 R12 15,41 BUF_PLT_RST_L PLT_RSTL_R AM15 VTTPWRGOOD AM26 TAPPWRGOOD AL14 PWR MANAGEMENT R489 AK15 CLOCKS AR30 AT30 PEG_CLK PEG_CLK# E16 D16 DPLL_REF_SSCLK DPLL_REF_SSCLK# A18 A17 SM_DRAMRST# DDR3 MISC H_THRMTRIP_L BCLK_ITP BCLK_ITP# CLK_MCP_BCLK 12,16 CLK_MCP_BCLK_L 12,16 CK_BCK1 CK_BCK1_L R877 1K TP53 TP54 CLK_MCH_PEG 12,14 CLK_MCH_PEG_L 12,14 R872 CLK_DP_P 14 CLK_DP_N 14 +V1.1S_VTT CPU_DRAMRST_L R873 0 R0402_0 0 ns 2 SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2] AL1 AM1 AN1 SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2 AN15 AP15 PM_EXTTS_L0 PM_EXTTS_L1 R7 10K,1% R8 10K,1% R874 100K R1054 0 ns TCK TMS TRST# AN28 AP28 AT27 XDP_TCLK XDP_TMS XDP_TRST_L TDI TDO TDI_M TDO_M AT29 AR27 AR29 AP29 XDP_TDI_R XDP_TDO_R XDP_TDI_M XDP_TDO_M R22 DBR# AN25 BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7] AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23 DDR3_DRAMRST_L 10,11 R876 8,27 DRAMRST_CNTRL 0 DRAMRST_CNTRL_PCH R0402_0 16 PM_EXTTS#0_EC 9,27 PM_EXTTS_L1 9 C1043 470pF/50V,X7R NO_STUFF AT28 AP27 0 R0402_0 BSS138 Q6 B R9 12.4K,1% ns TP64 PRDY# PREQ# R875 3 CPU_DRAMRST_L F6 PM_EXT_TS#[0] PM_EXT_TS#[1] JTAG & BPM H_PROCHOT_L R0402_0 A16 B16 XDP_PREQ_L CAD Note: TCLK: Provide a scope test point at the Processor socket breakout via to verify signal integrity of the first platforms. +V1.1S_VTT R161 51.1,1% 0 R0402_0 R21 +V3.3S +V3.3AUX 1K C314 0.1uF/16V,X7R R927 10K 5 COMP1 AT26 BCLK BCLK# 1 2 33,36 V1_1S1_5S_PWROK VCC 4 GND 3 G16 H_COMP0 COMP3 1 COMP2 H_COMP1 PECI_PCH 0 16 H_THRMTRIP_L B AT24 0 R0402_0 R319 38 H_PROCHOT# AT23 H_COMP2 THERMAL R6 16 H_PECI H_COMP3 MISC TP1 +V1.5 U1B +V1.1S_VTT DRAMPWRGD_CPU SOT23_5 SN74AHC1G08DBV U34 NO_STUFF RSTIN# 1.5K,1% XDP_TMS R11 XDP_TDI_R 51.1,1% ns R13 51.1,1% ns XDP_PREQ_L R15 51.1,1% ns XDP_TCLK 51.1,1% ns XDP_TRST_L IC,ARD_CFD_rPGA,R1P5 R18 750 R19 R17 51.1,1% ns +V3.3S +V1.5S_CPU C235 0.1uF/16V,X7R R490 1K 1 2 C312 0.1uF/16V,X7R H_COMP3 +V1.1S_VTT 4 GND R14 SOT23_5 SN74AHC1G08DBV U33 1.5K,1% H_VTTPWRGD 1.5K,1% R20 750 R23 1.1K,1% ns H_COMP0 A SM_RCOMP_2 SM_RCOMP_1 NO_STUFF R24 R25 20,1% R28 49.9,1% R29 20,1% R26 49.9,1% R27 49.9,1% SM_RCOMP_0 R30 68 ns R32 H_PROCHOT_L R31 CZC Technology R33 130,1% 100,1% H_CATERR_L 24.9,1% 68 VDDPWRGOOD_R R34 750 DDR3 Compensation Signals H_COMP1 H_COMP2 R16 VCC 3 33,36 V1_1S1_5S_PWROK Processor Compensation Signals Processor Pullups DRAMPWRGD_CPU 5 A Layout Note: Place these resistors near Processor H_CPURST_L Panel &VGA connect Size Project Name A3 Date: 5 4 3 2 zw Title Rev R48 C Thursday, April 22, 2010 Sheet 1 5 of 56 5 4 3 2 1 U1D U1C 11 M_B_DQ[63:0] 10 M_A_DQ[63:0] C B A10 C10 C7 A7 B10 D10 E10 A8 D8 F10 E6 F7 E9 B7 E7 C6 H10 G8 K7 J8 G7 G10 J7 J10 L7 M6 M8 L9 L6 K8 N8 P9 AH5 AF5 AK6 AK7 AF6 AG5 AJ7 AJ6 AJ10 AJ9 AL10 AK12 AK8 AL7 AK11 AL8 AN8 AM10 AR11 AL11 AM9 AN9 AT11 AP12 AM12 AN12 AM13 AT14 AT12 AL13 AR14 AP14 AC3 AB2 U7 10 M_A_BS0 10 M_A_BS1 10 M_A_BS2 M_A_CAS_L M_A_RAS_L M_A_WE_L 10 M_A_CAS_L 10 M_A_RAS_L 10 M_A_WE_L AE1 AB3 AE9 SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63] SA_BS[0] SA_BS[1] SA_BS[2] SA_CAS# SA_RAS# SA_WE# AA6 AA7 P7 SA_CK[1] SA_CK#[1] SA_CKE[1] Y6 Y5 P6 SA_CS#[0] SA_CS#[1] AE2 AE8 M_CS_L0 10 M_CS_L1 10 SA_ODT[0] SA_ODT[1] AD8 AF9 M_ODT0 10 M_ODT1 10 SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7] DDR SYSTEM MEMORY A M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 SA_CK[0] SA_CK#[0] SA_CKE[0] B9 D7 H7 M7 AG6 AM7 AN10 AN13 M_CKE0 M_CKE1 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7] C9 F8 J9 N9 AH7 AK9 AP11 AT13 M_A_DQS_L0 M_A_DQS_L1 M_A_DQS_L2 M_A_DQS_L3 M_A_DQS_L4 M_A_DQS_L5 M_A_DQS_L6 M_A_DQS_L7 SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7] C8 F9 H9 M9 AH8 AK10 AN11 AR13 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8] SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15] Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 M_CLK_DDR0 10 M_CLK_DDR0_L 10 M_CKE0 10 M_CLK_DDR1 10 M_CLK_DDR1_L 10 M_CKE1 10 M_A_DM[7:0] 10 M_A_DQS_L[7:0] 10 M_A_DQS[7:0] 10 M_A_A[15:0] 10 11 M_B_BS0 11 M_B_BS1 11 M_B_BS2 11 M_B_CAS_L 11 M_B_RAS_L 11 M_B_WE_L M_B_CAS_L M_B_RAS_L M_B_WE_L B5 A5 C3 B3 E4 A6 A4 C4 D1 D2 F2 F1 C2 F5 F3 G4 H6 G2 J6 J3 G1 G5 J2 J1 J5 K2 L3 M1 K5 K4 M4 N5 AF3 AG1 AJ3 AK1 AG4 AG3 AJ4 AH4 AK3 AK4 AM6 AN2 AK5 AK2 AM4 AM3 AP3 AN5 AT4 AN6 AN4 AN3 AT5 AT6 AN7 AP6 AP8 AT9 AT7 AP9 AR10 AT10 SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63] AB1 W5 R7 SB_BS[0] SB_BS[1] SB_BS[2] AC5 Y7 AC6 SB_CAS# SB_RAS# SB_WE# SB_CK[0] SB_CK#[0] SB_CKE[0] W8 W9 M3 M_CLK_DDR2 11 M_CLK_DDR2_L 11 M_CKE2 11 SB_CK[1] SB_CK#[1] SB_CKE[1] V7 V6 M2 M_CLK_DDR3 11 M_CLK_DDR3_L 11 M_CKE3 11 SB_CS#[0] SB_CS#[1] AB8 AD6 M_CS_L2 11 M_CS_L3 11 SB_ODT[0] SB_ODT[1] AC7 AD1 M_ODT2 11 M_ODT3 11 SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7] D4 E1 H3 K1 AH1 AL2 AR4 AT8 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7] D5 F4 J4 L4 AH2 AL4 AR5 AR8 M_B_DQS_L0 M_B_DQS_L1 M_B_DQS_L2 M_B_DQS_L3 M_B_DQS_L4 M_B_DQS_L5 M_B_DQS_L6 M_B_DQS_L7 SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7] C5 E3 H4 M5 AG2 AL5 AP5 AR7 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15] U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 D M_B_DM[7:0] 11 C DDR SYSTEM MEMORY - B D M_B_DQS_L[7:0] 11 M_B_DQS[7:0] 11 M_B_A[15:0] 11 B IC,ARD_CFD_rPGA,R1P5 IC,ARD_CFD_rPGA,R1P5 OCD_CPU OCD_CPU CZC Technology A A zw Title Panel &VGA connect Size Project Name A Thursday, April 22, 2010 Date: 5 4 3 Rev R48 2 C 6 Sheet 1 of 56 5 4 3 2 1 U1F +V1.1S_VTT +VCORE C65 10uF/10V X5R +V1.1S_VTT C52 22uF/6.3V,X5R C53 22uF/6.3V,X5R +VTT_43 +VTT_44 R38 R39 +V1.1S_VTT 0 0 SENSE LINES VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 +V1.1S_VTT C54 C55 22uF/6.3V,X5R 22uF/6.3V,X5R VTT1_45 VTT1_46 VTT1_47 FDI +V1.1S J24 J23 H25 GRAPHICS VIDs +VCC_GFXCORE C64 10uF/10V X5R GFXVR_DPRSLPVR_R R128 U1G AT21 AT19 AT18 C41 C43 C42 C44 AT16 22uF/6.3V,X5R22uF/6.3V,X5R10uF/10V X5R 10uF/10V X5RAR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16 AM21 AM19 AM18 AM16 AL21 AL19 AL18 AL16 AK21 AK19 AK18 AK16 AJ21 AJ19 AJ18 AJ16 AH21 AH19 AH18 AH16 VAXG_SENSE VSSAXG_SENSE AR22 AT22 GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6] AM22 AP22 AN22 AP23 AM23 AP24 AN24 GFX_VR_EN GFX_DPRSLPVR GFX_IMON AR25 AT25 AM24 VTT_SELECT G15 38 R1167 1K +V1.1S C56 C57 22uF/6.3V,X5R 22uF/6.3V,X5R R1168 1K H_VTTVID1 10K ns R35 470 GFXVR_VID_0 GFXVR_VID_1 GFXVR_VID_2 GFXVR_VID_3 GFXVR_VID_4 GFXVR_VID_5 GFXVR_VID_6 37 37 37 37 37 37 37 +V1.1S_VTT R36 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1 VTT0_59 VTT0_60 VTT0_61 VTT0_62 P10 N10 L10 K10 VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68 J22 J20 J18 H21 H20 H19 VCCPLL1 VCCPLL2 VCCPLL3 L26 L27 M26 1K GFXVR_EN ns +V1.5 GFXVR_EN GFXVR_EN 37 GFXVR_DPRSLPVR_R GFXVR_IMON TP23 C45 C46 C47 C48 C49 1uF/10V,X5R 1uF/10V,X5R 1uF/10V,X5R 1uF/10V,X5R 1uF/10V,X5R +V1.5S_CPU C50 22uF/6.3V,X5R FB92 120ohm/100MHz,2.5A ns FB93 120ohm/100MHz,2.5A ns FB90 120ohm/100MHz,2.5A FB91 120ohm/100MHz,2.5A +V1.5S C51 22uF/6.3V,X5R +V1.5S_CPU C136 C137 C138 C139 C143 C144 +V1.5 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R DIMM0 DIMM1 +V1.1S_VTT +V1.1S_VTT TP14 H_VID[0:6] TP4 C58 22uF/6.3V,X5R K26 J27 J26 J25 H27 G28 G27 G26 F26 E26 E25 VTT1_48 VTT1_49 VTT1_50 VTT1_51 VTT1_52 VTT1_53 VTT1_54 VTT1_55 VTT1_56 VTT1_57 VTT1_58 1.1V PSI_L H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6 PM_DPRSLPVR_R 1.8V POWER CPU VIDS AN33 AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34 PEG & DMI PSI# GFXVR_EN GFX_IMON 37 R1166 1K ns VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6] PROC_DPRSLPVR VCC_AXG_SENSE 37 VSS_AXG_SENSE 37 D - 1.5V RAILS AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15 +VCC_GFXCORE DDR3 VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44 C33 C34 C35 C36 C37 C38 C39 C40 10uF/10V X5R 10uF/10V X5R 10uF/10V X5R 10uF/10V X5R 10uF/10V X5R 10uF/10V X5R 10uF/10V X5R 10uF/10V X5R ns POWER 1.1V RAIL POWER VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8 VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32 AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11 GRAPHICS CPU CORE SUPPLY C VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100 +V1.1S_VTT C +V1.8S C59 C60 C61 1uF/10V,X5R1uF/10V,X5R2.2uF/6.3V,X7R +VCORE C62 4.7uF/10V,X5R C63 22uF/6.3V,X5R CORE_IMON 38 IC,ARD_CFD_rPGA,R1P5 SENSE LINES D AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26 Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26 ISENSE AN35 VCC_SENSE VSS_SENSE AJ34 AJ35 VTT_SENSE VSS_SENSE_VTT B15 A15 TP5 R41 100 VCC_SENSE 38 VSS_SENSE 38 TP_VTT_SENSE TP_VSS_SENSE_VTT TP2 TP3 R42 100 IC,ARD_CFD_rPGA,R1P5 +V1.1S 13,14,16,17,34,35,36 +VCC_GFXCORE 37 +V1.8S 15,16,28,34,36 +V1.1S_VTT 5,12,16,17,35,36 +VCORE 28,38 +V1.5 5,8,10,11,33,35 +V1.5S 16,21,22,28,35,36 +V1.5S_CPU 5 B 22u*12 +VCORE C66 22uF/6.3V,X5R C67 22uF/6.3V,X5R C68 22uF/6.3V,X5R C69 22uF/6.3V,X5R C70 22uF/6.3V,X5R C71 22uF/6.3V,X5R C79 10uF/10V X5R C80 10uF/10V X5R C81 10uF/10V X5R C82 10uF/10V X5R C83 10uF/10V X5R C91 10uF/10V X5R C92 10uF/10V X5R C93 10uF/10V X5R +VCORE A B C72 22uF/6.3V,X5R C73 22uF/6.3V,X5R C74 22uF/6.3V,X5R C75 22uF/6.3V,X5R C76 22uF/6.3V,X5R C77 22uF/6.3V,X5R C84 10uF/10V X5R C85 10uF/10V X5R C86 10uF/10V X5R C87 10uF/10V X5R C88 10uF/10V X5R C89 10uF/10V X5R 10u*16 C78 10uF/10V X5R A +VCORE CZC Technology C90 10uF/10V X5R zw Title Panel &VGA connect Size Project Name A3 Date: 5 4 3 2 Rev R48 C Thursday, April 22, 2010 Sheet 1 7 of 56 5 4 3 D C 1 U1I VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30 K27 K9 K6 K3 J32 J30 J21 J19 H35 H32 H28 H26 H24 H22 H18 H15 H13 H11 H8 H5 H2 G34 G31 G20 G9 G6 G3 F30 F27 F25 F22 F19 F16 E35 E32 E29 E24 E21 E18 E13 E11 E8 E5 E2 D33 D30 D26 D9 D6 D3 C34 C32 C29 C28 C24 C22 C20 C19 C16 B31 B25 B21 B18 B17 B13 B11 B8 B6 B4 A29 A27 A23 A9 IC,ARD_CFD_rPGA,R1P5 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 D VSS NCTF U1H AT20 AT17 AR31 AR28 AR26 AR24 AR23 AR20 AR17 AR15 AR12 AR9 AR6 AR3 AP20 AP17 AP13 AP10 AP7 AP4 AP2 AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11 AM8 AM5 AM2 AL34 AL31 AL23 AL20 AL17 AL12 AL9 AL6 AL3 AK29 AK27 AK25 AK20 AK17 AJ31 AJ23 AJ20 AJ17 AJ14 AJ11 AJ8 AJ5 AJ2 AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13 AH9 AH6 AH3 AG10 AF8 AF4 AF2 AE35 2 VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 AT35 AT1 AR34 B34 B2 B1 A35 C IC,ARD_CFD_rPGA,R1P5 +V1.5 5,7,10,11,33,35 U1E RSVD32 RSVD33 R43 R44 10 M_VREF_DQ_DIMM0C 11 M_VREF_DQ_DIMM1C VREF_CH_A_DIMM VREF_CH_B_DIMM 0 ns 0 ns 3 2 2N7002K Q7 R1047 100K R1046 100K RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 SA_DIMM_VREFDQ SB_DIMM_VREFDQ RSVD11 RSVD12 RSVD13 RSVD14 1 B AP25 AL25 AL24 AL22 AJ33 AG9 M27 L28 J17 H17 G25 G17 E31 E30 3 CFG7 Close to DIMM +V1.5 AM30 AM28 AP31 AL32 AL30 AM31 AN29 AM32 AK32 AK31 AK28 AJ28 AN30 AN32 AJ32 AJ29 AJ30 AK30 H16 CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17] RSVD_TP_86 R1042 1K,1% 0 M_VREF_DQ_DIMM0C R0402_0 R1043 1K,1% R50 R51 0 ns 0 ns H_RSVD17_R H_RSVD18_R +V1.5 CFG7 M_VREF_DQ_DIMM1C 0 R0402_0 R1045 1K,1% R46 B19 A19 RSVD15 RSVD16 A20 B20 RSVD17 RSVD18 U9 T9 RSVD19 RSVD20 AC9 AB9 RSVD21 RSVD22 C1 A3 3.01K,1% RSVD_NCTF_23 RSVD_NCTF_24 ns NO_STUFF A J29 J28 RSVD26 RSVD27 A34 A33 RSVD_NCTF_28 RSVD_NCTF_29 C35 B35 RSVD_NCTF_30 RSVD_NCTF_31 RESERVED 1 CFG3 CFG4 R91 AH25 AK26 AL26 AR2 RSVD38 RSVD39 AJ26 AJ27 RSVD_NCTF_40 RSVD_NCTF_41 AP1 AT2 RSVD_NCTF_42 RSVD_NCTF_43 AT3 AR1 RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52 RSVD53 RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57 RSVD58 AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32 CFG0 B PCI-Express Configuration Select CFG0 5,27 DRAMRST_CNTRL R1044 1K,1% RSVD34 RSVD35 RSVD36 RSVD_NCTF_37 2 2N7002K Q8 R71 AJ13 AJ12 CFG0 NO_STUFF R45 3.01K,1% ns 1:Single PEG 0:Bifurcation enabled Layout Note: Location of all CFG strap resistors needs to be close to trace to minimize stub CFG3 CFG3 - PCI-Express Static Lane Reversal RSVD_TP_59 RSVD_TP_60 KEY RSVD62 RSVD63 RSVD64 RSVD65 E15 F15 A2 D15 C15 AJ15 AH15 RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75 AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3 RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85 V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9 R48 R49 R47 3.01K,1% 1 :Normal Operation 0 :Lane Numbers Reversed 15 -> 0, 14 -> 1, ... CFG3 RSVD64_R RSVD65_R 0 ns 0 ns CFG4 VSS AP34 CFG4 - Display Port Presence 1:Disabled; No Physical Display Port attached to Embedded Display Port CFG4 R52 3.01K,1% ns NO_STUFF 0:Enabled; An external Display Port device is connected to the Embedded Display Port A TP_RSVD86 R61 0 ns CZC Technology IC,ARD_CFD_rPGA,R1P5 zw Title Panel &VGA connect Size Project Name A3 Date: 5 4 3 2 Rev R48 C Thursday, April 22, 2010 Sheet 1 8 of 56 5 4 3 D +V3.3S 2 1 D +V3.3S 5,10,11,12,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48 +V3.3S vdd ns 1 R320 100 C141 Under DIMM U2 THERMDA Q155 MMBT3904-F 1 DXP R1048 0 ns PM_THRM_DN# 6 ALERT# R1049 0 ns G781_PULLHIGH 4 THERM# TO EC output SOIC8_1P27_3P9 DXN 2 2200pF/25V,X7R 3 2 SMBDATA 2 SMBCLK 7 C G781 ADM1032AR LM86CIM MAX6657MSA SOIC-8 vdd W83L771ASG ns 5 PM_EXTTS_L1 SMBCLK 7 SMBDATA 6 ALERT# 4 THERM# G781_PULLHIGH TSSOP8_P65_3P0 R1051 0 ns R1052 0 ns U28 DXP 2 THERMDA DXN 3 THERMDC G781 ADM1032AR LM86CIM MAX6657MSA SOIC-8 GND 8 14,22,27 EC_SMB1_DAT PM_THRM_DN# Input To EC 27 PM_EXTTS_DIMM 14,22,27 EC_SMB1_CLK 5 R1050 10K ns VCC +V3.3S R1053 10K ns ns ns THERMDC 1 5,27 PM_EXTTS#0_EC 8 14,22,27 EC_SMB1_DAT C140 GND 10,11 TS#_DIMM0_1 14,22,27 EC_SMB1_CLK 5 C VCC 1 1 3 2 0.1uF/16V,X7R ns W83L771 TSSOP8 ns TS#_DIMM0_1 B B A A CZC Technology zw Title <Title> Size A3 Date: Project Name Rev R48 Thursday, April 22, 2010 C Sheet 9 of 56 5 4 3 2 1 Channel A High :9.2mm M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 D 6 6 6 6 6 6 6 6 6 6 6 6 6 6 M_A_BS0 M_A_BS1 M_A_BS2 M_CS_L0 M_CS_L1 M_CLK_DDR0 M_CLK_DDR0_L M_CLK_DDR1 M_CLK_DDR1_L M_CKE0 M_CKE1 M_A_CAS_L M_A_RAS_L M_A_WE_L M_CS_L0 M_CS_L1 SA0_DIM0 SA1_DIM0 SODIMM0_1_SMB_CLK_R SODIMM0_1_SMB_DATA_R 11,12,14 SMB_CLK_S2 11,12,14 SMB_DATA_S2 M_A_DQ[63:0] 6 DIMM1A 6 M_A_A[15:0] 6 M_ODT0 6 M_ODT1 6 M_A_DM[7:0] M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 C 6 M_A_DQS[7:0] 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA 116 120 ODT0 ODT1 11 28 46 63 136 153 170 187 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 M_A_DQS0 12 M_A_DQS1 29 M_A_DQS2 47 M_A_DQS3 64 M_A_DQS4 137 M_A_DQS5 154 M_A_DQS6 171 M_A_DQS7 188 M_A_DQS_L0 10 M_A_DQS_L1 27 M_A_DQS_L2 45 M_A_DQS_L3 62 M_A_DQS_L4135 M_A_DQS_L5152 M_A_DQS_L6169 M_A_DQS_L7186 6 M_A_DQS_L[7:0] DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 +V1.5 DIMM1B M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 +V3.3S C94 C95 0.1uF/16V,X7R 2.2uF/6.3V,X7R 9,11 TS#_DIMM0_1 5,11 DDR3_DRAMRST_L M_VREF_DQ_DIMM0C 8 M_VREF_DQ_DIMM0C C96 C97 0.1uF/16V,X7R 2.2uF/6.3V,X7R 11,33 M_VREF R1157 0 ns 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD 199 VDDSPD 77 122 125 NC1 NC2 NCTEST 198 30 EVENT# RESET# 1 126 VREF_DQ VREF_CA 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 M_VREF_DQ_DIMM0 C98 C99 0.1uF/16V,X7R 2.2uF/6.3V,X7R 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS D +V0.75S C VTT VTT 203 204 205 206 205 206 DDRIIISODIMM-204PS_BLACK-RH-1 VRefCA on both SO-DIMMs can be connected by a single M_VREF_MCH trace VRefDQ on both SO-DIMMs can be shared by a second separate M_VREF_MCH trace Place these caps close to VTT1 and VTT2. Place C21 on common path for both DIMM's +V0.75S DDRIIISODIMM-204PS_BLACK-RH-1 C100 1uF/10V,X5R B C101 1uF/10V,X5R C102 1uF/10V,X5R C103 1uF/10V,X5R Place near Vtt pins B +V1.5 C104 10UF/6.3V,X5R C105 10UF/6.3V,X5R C106 10UF/6.3V,X5R C107 10UF/6.3V,X5R C108 10UF/6.3V,X5R C109 10UF/6.3V,X5R + C110 220uF/6.3V,POSCAP Place two capacitors close to the VR and one between the two DIMMs Layout Note: Place these Caps near SO-DIMM1. ns NO_STUFF +V1.5 +V3.3S C111 1uF/10V,X5R NO_STUFF Note: If SA0_DIM0 = 0, SA1_DIM0 = 0 SO-DIMM0 SPD Address is 0xA0 SO-DIMM0 TS Address is 0x30 A R53 10K ns R54 10K C114 1uF/10V,X5R R55 10K A zw Title Panel &VGA connect Size Project Name A 4 3 Rev R48 Thursday, April 22, 2010 Date: 5 C113 1uF/10V,X5R CZC Technology SA0_DIM0 SA1_DIM0 If SA0_DIM0 = 1, SA1_DIM0 = 0 SO-DIMM0 SPD Address is 0xA2 SO-DIMM0 TS Address is 0x32 C112 1uF/10V,X5R +V1.5 5,7,8,11,33,35 +V3.3S 5,9,11,12,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48 +V0.75S 11,28,33 2 C 10 Sheet 1 of 56 5 4 3 2 +V1.5 5,7,8,10,33,35 +V3.3S 5,9,10,12,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48 +V0.75S 10,28,33 Channel B High :5.2mm DIMM2A 6 M_B_A[15:0] D 6 6 6 6 6 6 6 6 6 C 6 M_B_BS0 6 M_B_BS1 6 M_B_BS2 6 M_CS_L2 6 M_CS_L3 M_CLK_DDR2 M_CLK_DDR2_L M_CLK_DDR3 M_CLK_DDR3_L M_CKE2 M_CKE3 M_B_CAS_L M_B_RAS_L M_B_WE_L M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA 116 120 ODT0 ODT1 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 11 28 46 63 136 153 170 187 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS_L0 M_B_DQS_L1 M_B_DQS_L2 M_B_DQS_L3 M_B_DQS_L4 M_B_DQS_L5 M_B_DQS_L6 M_B_DQS_L7 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 SA0_DIM1 SA1_DIM1 10,12,14 SMB_CLK_S2 10,12,14 SMB_DATA_S2 6 M_ODT2 6 M_ODT3 6 M_B_DM[7:0] 6 M_B_DQS[7:0] 6 M_B_DQS_L[7:0] 1 B M_B_DQ[63:0] 6 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 +V1.5 DIMM2B M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 +V3.3S C115 0.1uF/16V,X7R C116 2.2uF/6.3V,X7R 9,10 TS#_DIMM0_1 5,10 DDR3_DRAMRST_L M_VREF_DQ_DIMM1C 8 M_VREF_DQ_DIMM1C C117 0.1uF/16V,X7R 10,33 M_VREF R1158 0 ns C118 2.2uF/6.3V,X7R VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD 199 VDDSPD 77 122 125 NC1 NC2 NCTEST 198 30 EVENT# RESET# 1 126 VREF_DQ VREF_CA 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 M_VREF_DQ_DIMM1 C119 0.1uF/16V,X7R 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 C120 2.2uF/6.3V,X7R VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 D VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VTT 203 VSS VTT 204 VSS VSS 205 205 VSS 206 206 VSS DDRIIISODIMM-204PS_BLACK-RH C +V0.75S VRefCA on both SO-DIMMs can be connected by a single M_VREF_MCH trace VRefDQ on both SO-DIMMs can be shared by a second separate M_VREF_MCH trace +V0.75S B DDRIIISODIMM-204PS_BLACK-RH Note: SO-DIMM1 SPD Address is 0xA4 SO-DIMM1 TS Address is 0x34 C121 1uF/10V,X5R SO-DIMM1 is placed farther from the Processor than SO-DIMM0 C122 1uF/10V,X5R C123 1uF/10V,X5R C124 1uF/10V,X5R Place near Vtt pins +V1.5 +V3.3S C125 10uF/10V X5R R56 10K SA1_DIM1 C126 10uF/10V X5R C127 10uF/10V X5R C128 10uF/10V X5R C129 10uF/10V X5R C130 10uF/10V X5R Layout Note: Place these Caps near SO-DIMM1. + C131 220uF/2.5V ns +V1.5 SA0_DIM1 R57 10K A C132 1uF/10V,X5R C133 0.1uF/16V,X7R C134 0.1uF/16V,X7R CZC Technology C135 0.1uF/16V,X7R A zw Title Panel &VGA connect Size Project Name A Thursday, April 22, 2010 Date: 5 4 3 Rev R48 2 C 11 Sheet 1 of 56 4 3 2 +V3.3S U44 IDTCV186-2C TSSOP56_P5_6P1 +V3.3S_CLK FB83 C939 C935 C936 C937 C938 C941 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R Reserved for ICS9LPRS525 C948 10UF/6.3V,X5R 300ohm/100MHz,1A ns C949 C942 C943 C944 C945 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R TP66 PCI2_TME PCI3/CFGP PCI4_SRC5_EN PCIF5_ITP_EN +V3.3S_CLK R796 10K ns R791 10K ns PCI3/CFGP C R792 10K ns PCI2_TME R797 10K R793 10K PCIF5_ITP_EN R795 10K PCI4_SRC5_EN 24 EXT_25/48 12 20 26 37 41 1 3 4 5 6 7 VDD_PCI VDD_48 VDD VDD_SRC VDD_CPU VDD_REF NC CKPWRGD/PWRDWN# SCLK SDATA 56 55 52 51 CPU0# CPU0 45 46 CPU1# CPU1 42 43 SRC8#/ITP# SRC8/ITP 38 39 SRC7#/CR#_E SRC7/CR#_F 35 36 SRC6# SRC6 32 33 SRC5#/CPU_STOP# SRC5/PCI_STOP# 29 30 VDD_96_IO VDD_PLL3_IO VDD_SRC_IO1 VDD_SRC_IO2 VDD_CPU_IO IO_VOUT VR_PWRGD_CLKEN 40 48 XTAL_IN XTAL_OUT CPU_STOP# PCI_STOP#_R SMB_CK SMB_DAT 0 0 SMB_CLK_S2 SMB_DATA_S2 SMB_CLK_S2 10,11,14 SMB_DATA_S2 10,11,14 PCI0/CR#A PCI1/CR#B PCI2/TME PCI3 PCI4/SRC5_EN PCI_F5/ITP_EN CK505_CPU0_L CK505_CPU0 R62 R60 0 0 R75 R74 CLK_BUF_CPU_BCLK_L CLK_BUF_CPU_BCLK 0 ns 0 ns CPU_STOP# PCI_STOP#_R R99 10K R72 R73 0 ns 0 ns R98 0 ns PCI_STOP# D R76 R77 0 ns 0 ns PCIE_REFCLKN PCIE_REFCLKP R786 22 54 1K 49 FSB/TEST_MODE CK505_FSA R787 10 USB_48MHz/FSA SRC3#/CR#_D SRC3/CR#_C 25 24 8 11 15 19 23 34 44 50 VSS_PCI VSS_48 VSS_IO VSS_PLL3 VSS_SRC1 VSS_SRC2 VSS_CPU VSS_REF SRC2#/SATA# SRC2/SATA 22 21 CK505_SRC2_L CK505_SRC2 R68 R67 0 0 CLK_BUF_EXP_N CLK_BUF_EXP_P SRC1#/DREFSSCLK# SRC1/DREFSSCLK 18 17 CK505_SRC1_L CK505_SRC1 R66 R65 0 0 CLK_BUF_CKSSCD_N CLK_BUF_CKSSCD_P SRC0#/DOT96# SRC0/DOT96 14 13 CK505_SRC0_L CK505_SRC0 R64 R63 0 0 CLK_BUF_DOT96_N CLK_BUF_DOT96_P 22 SRC4# SRC4 R866 33 Q92 MMBT3904-F 1 C1034 VDDIO_CLK 100pF/50V,NPO CLK_MCH_PEG_L 5,14 CLK_MCH_PEG 5,14 R782 Design Note: 1.PCI2_TME 0=overclocking of CPU and SRC allowed 1=overclocking of CPU and SRC NOT allowed ns C927 0.1uF/16V,X7R CK505_FSB REF0/FSC/TEST_SEL IO_VOUT CLK_BUF_CPU_BCLK_L 14 CLK_BUF_CPU_BCLK 14 CLK_MCP_BCLK_L 5,16 CLK_MCP_BCLK 5,16 10K 2.2K 10K 10K R865 15,1% XTAL_IN XTAL_OUT R781 R788 R59 R108 +V3.3S R70 R69 CK505_FSC 14 CLK_BUF_REF14 R794 10K 2 9 16 31 47 53 +V3.3S 3 C934 4.7uF/10V,X5R C947 10UF/6.3V,X5R FB84 VDDIO_CLK C940 4.7uF/10V,X5R +V1.1S_VTT 300ohm/100MHz,1A C946 10UF/6.3V,X5R C933 10UF/6.3V,X5R D +V3.3S 5,9,10,11,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48 +V1.1S_VTT 5,7,16,17,35,36 Total Power:495mW Typical current:IDD=150mA @3.3V Core and 3.3V IO C950 10UF/6.3V,X5R +V3.3S 1 2 5 28 27 R127 R112 0 ns 10K PCI_STOP# 16 PCIE_REFCLKN 14,41 PCIE_REFCLKP 14,41 PEG_CLKREQ#_CLK 14,42 C CLK_BUF_EXP_N 14 CLK_BUF_EXP_P 14 CLK_BUF_CKSSCD_N 14 CLK_BUF_CKSSCD_P 14 CLK_BUF_DOT96_N 14 CLK_BUF_DOT96_P 14 2..PCIF5_ITP_EN 0=SRC8/SRC8# 1=ITP/ITP# On powerup,The logic value on this pin determines Function 0 or Function 1 3.PCI4_SRC5_EN 0=PCI_STOP#/CPU_STOP# 1=SRC5/SRC5# On powerup,The logic value on this pin determines Function 0 or Function 1 +V1.1S_VTT FSC BSEL2 FSB BSEL1 FSA BSEL0 R778 1K ns Host Clock frequency MHz R776 1K ns R780 56 CK505_FSA 1 0 1 100 0 0 1 133 1 1 166 0 1 0 200 0 0 0 266 1 0 0 333 1 1 0 400 1 1 1 Reserved CLK_BUF_REF14 C931 100pF/50V,NPO ns EXT_25/48 CK505_FSB X2S60X35 CK505_FSC C925 27pF/50V,NPO XTAL_OUT C932 100pF/50V,NPO ns R783 10K C926 27pF/50V,NPO VR_PWRGD_CLKEN R918 10K R777 0 R770 0 B +V3.3S XTAL_IN Y7 14.318MHz,18pf 2 Q91 2N7002K R772 1K ns 1 38 CLKEN# R774 10K ns 2 0 1 3 B A A CZC Technology zw Title Panel &VGA connect Size Project Name A4 Date: 5 4 3 2 Rev R48 Thursday, April 22, 2010 C Sheet 1 12 of 56 5 4 +V3.3AUX D1 C147 1uF/10V,X5R 2 1 +V1.1S 7,14,16,17,34,35,36 +V3.3S 5,9,10,11,12,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48 +V3.3AUX 5,14,15,16,17,19,21,22,24,25,27,28,29,30,31,32,34,35 JCMOS - CMOS SETTING SAVE CMOS -- (1- 2) DEFAULT CLEAR CMOS -- (2-3) +V3.3_RTC 17 +V3.3S R79 20K,1% 20K,1% RTCRST_C C148 18pF/50V,NPO C149 1uF/10V,X5R 1 R78 3 2 BAT54C LDRQ0_L LDRQ1_L R870 R871 10K 10K 32.768kHz,20ppm,12.5pF R80 10M 4 X4S67x15 C151 18pF/50V,NPO D Cap values depend on Xtal RTC_RST_L SRTC_RST_L SM_INTRUDER_L B13 D13 RTCX1 RTCX2 C14 RTCRST# D17 SRTCRST# A16 INTRUDER# A14 INTVRMEN A30 HDA_BCLK D29 HDA_SYNC +V3.3_RTC R83 25 HDA_BIT_CLK HWS2_1P25R 1 2 25 HDA_SYNC 10pF/50V,NPO R164 33 R165 33 PCH_INTVRMEN 332K,1% HDA_SPKR 4 R173 P1 33 C30 25 HDA_SDIN0 + - RTC_Adhesive assembly RTCBAT with Cable assembly 25 HDA_SDOUT R229 HDA_SDIN1 E32 HDA_SDIN2 TP8 HDA_SDIN3 F32 HDA_SDIN3 B29 HDA_SDO HDA_DOCK_EN_L H32 HDA_DOCK_EN# / GPIO33 TP_HDA_DOCK_RST_L J30 HDA_DOCK_RST# / GPIO13 PCH_JTAG_TCK M3 JTAG_TCK PCH_JTAG_TMS K3 JTAG_TMS PCH_JTAG_TDI K1 JTAG_TDI PCH_JTAG_TDO J2 JTAG_TDO PCH_JTAG_RST_L J4 TRST# 33 +V1.1S R84 51ns PCH_JTAG_TDI R85 51ns PCH_JTAG_TDO R86 51ns PCH_JTAG_RST_L R88 SERIRQ AB9 21,27 21,27 21,27 21,27 LPC_FRAME# 21,27 LDRQ0_L LDRQ1_L INT_SERIRQ 21,27 SATA0RXN SATA0RXP SATA0TXN SATA0TXP AK7 AK6 AK11 AK9 C152 0.01uF/25V,X7R C153 0.01uF/25V,X7R SATA1RXN SATA1RXP SATA1TXN SATA1TXP AH6 AH5 AH9 AH8 C156 0.01uF/25V,X7R C157 0.01uF/25V,X7R SATA2RXN SATA2RXP SATA2TXN SATA2TXP AF11 AF9 AF7 AF6 SATA3RXN SATA3RXP SATA3TXN SATA3TXP AH3 AH1 AF3 AF1 SATA4RXN SATA4RXP SATA4TXN SATA4TXP AD9 AD8 AD6 AD5 SATA5RXN SATA5RXP SATA5TXN SATA5TXP AD3 AD1 AB3 AB1 SATA_RXN0 23 SATA_RXP0 23 SATA_TXN0 23 SATA_TXP0 23 SATA_RXN1 23 SATA_RXP1 23 SATA_TXN1 23 SATA_TXP1 23 Distance between the PCH and cap on the "P" signal should be identical distance between the PCH and cap on the "N" signal for same pair. HM55 No function. SATAICOMPO AF16 SATAICOMPI AF15 C C158 C159 C160 C161 0.01uF/25V,X7R 0.01uF/25V,X7R 0.01uF/25V,X7R 0.01uF/25V,X7R SATA_RXN2 22 SATA_RXP2 22 SATA_TXN2 22 SATA_TXP2 22 +V1.1S +V3.3S SATACOMP R87 37.4,1% 10K ns R89 51 ns NO_STUFF PCH_JTAG_TCK HDA_SDIN0 F30 HDA_SDIN2 TP9 PCH_JTAG_TMS A34 F34 HDA_RST# G30 HDA_SDIN1 RTC_CBL1 C34 LDRQ0# LDRQ1# / GPIO23 SPKR TP7 25 HDA_SDIN1 RTC_ADHESIVE1 FWH4 / LFRAME# LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 ns 25 HDA_SPKR 25 HDA_RST_L D33 B33 C32 A32 IHDA Wafer2P125 RTCCN1 C247 FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3 SATA 3 INTVRMEN - Integrated SUS 1.1V VRM Enable ?HIGH LPC RTC_X1 RTC_X2 R82 1K RTC U3A J4 JOPEN ns JTAG J1 JOPEN ns 3 BAT_D Y2 C150 1uF/10V,X5R R81 1M C 2 RTC Circuitry 1 D 3 +V3.3_RTC R90 4.7K iTPM Enable/Disable Enable iTPM : R333 stuff Disable iTPM : R333 no stuff TP58 SPI_CLK BA2 SPI_CLK SPI_CS_L0 AV3 SPI_CS0# SPI_CS_L1 AY3 SPI_CS1# SPI_SI AY1 SPI_MOSI SPIMISO AV1 SPI_MISO R869 10K SATALED# T3 SATA0GP / GPIO21 Y9 SATA_DET_L0 R94 10K SATA1GP / GPIO19 V1 SATA_DET_L1_R R92 10K SATA_LED# 29 +V3.3S +V3.3S R248 8.2K ns SPI_SI SPI SPI_SI IbexPeak-M_Rev1_5 +V3.3S B B R95 1K R463 R464 ns HDA_SPKR ns NO_STUFF L1 = 1-5" R96 10K 3.3K INT_SERIRQ L2 or L3 = 0.5-2" No Reboot Strap R86 L2 +/- L3 <= 0.1" SPI Device 1 HDA_SPKR L2 No stuff = Default Stuff = No Reboot Flash Descriptor Security Override L1 HDA_DOCK_EN# PCH GPIO33 SPI_CS_L01 SPIMISO 2 WP# 3 4 BIOS_LOCK: LOCK=2-3 (default) UNLOCK=1-2 L3 ns U30 W25Q32BVSSIG SOP8_1P27_5P3 CE# VDD 8 SO HOLD# 7 WP# SCK 6 VSS SI 5 R462 10K HOLD# SPI_CLK SPI_SI HOLD# SPI_CLK SPI_SI +V3.3S 1 2 3 4 8 7 6 5 8 7 6 5 HOLD# SPI_CLK SPI_SI 5 3 HDA_DOCK_EN_L C405 0.1uF/16V,X7R +V3.3S SPI_CS_L01 SPIMISO 2 WP# 3 4 SPI Device 2 4 MISO Topology Open U31 W25Q32BVSSIG SOIC8_1P27_3P9 3.3K SPI_CS_L01 VDD 8 SPIMISO 2 CE# SO HOLD# 7 WP# 3 WP# SCK 6 4 VSS SI 5 2 Layout Toplogy for SPI CLK and MOSI 1 +V3.3S BIOS_CN2 H2X4KZ 2X4 2mm ns BIOS_LOCK DIP MSS3 SWS7D67x26 2 A 1 6 7 Panel &VGA connect Size Project Name A4 Date: 4 zw Title R97 1K 5 A CZC Technology 放在后盖下方。 3 2 Rev R48 Thursday, April 22, 2010 C Sheet 1 13 of 56 5 4 3 U3B PERN3 PERP3 PETN3 PETP3 0.1uF/16V,X7R 0.1uF/16V,X7R D 24 PCIE_RXN6_LAN 24 PCIE_RXP6_LAN 24 PCIE_TXN6_LAN 24 PCIE_TXP6_LAN C173 C174 PCIE_RXN6_R PCIE_RXP6_R PCIE_TXN6_C PCIE_TXP6_C 0.1uF/16V,X7R 0.1uF/16V,X7R +V3.3AUX CK_PEG1_N CK_PEG1_P CLK_PCIE_MINICARD2_L CLK_PCIE_MINICARD2 PERN7 PERP7 PETN7 PETP7 PERN8 PERP8 PETN8 PETP8 AK48 AK47 CLKOUT_PCIE0N CLKOUT_PCIE0P P9 AM43 AM45 AM47 AM48 21 CLK_MINICARD2_OE_L N4 TP_CLKOUT_PCIE3N TP_CLKOUT_PCIE3P AH42 AH41 PCH_SRC3_CLKREQ_L 22 EXPRESS_CLKREQ# R114 CLK_PCIE_LAN_L CLK_PCIE_LAN 24 CLK_PCIE_LAN_L 24 CLK_PCIE_LAN A8 AM51 AM53 +V3.3AUX 10K PCH_SRC4_CLKREQ_L R118 R119 0 R0402_0CK_PEGB_N AJ50 0 R0402_0CK_PEGB_P AJ52 M9 H6 24 CLK_PCIE_LAN_REQ_L AK53 AK51 R117 PCH_SRC5_CLKREQ_L 10K P13 SMB_DATA J14 PCH_UPEK_INIT_L SML0CLK C6 SML0DATA G8 SML1ALERT# / GPIO74 SML0_CLK SML0_DATA PCH_GPIO74 M14 SML1CLK / GPIO58 E10 SML1_CLK R109 0 R0402_0 SML1DATA / GPIO75 G12 SML1_DATA R110 0 R0402_0 CL_CLK1 T13 CL_DATA1 T11 CL_RST1# T9 PCIECLKRQ0# / GPIO73 PEG_CLKREQ_L CK_PEG_N CK_PEG_P R100 R101 0 DGPU 0 DGPU CK_DMI_N CK_DMI_P R102 R103 0 R0402_0 0 R0402_0 CLKOUT_DP_N / CLKOUT_BCLK1_N AT1 CLKOUT_DP_P / CLKOUT_BCLK1_P AT3 CK_DP0_N CK_DP0_P R104 R105 0 R0402_0 0 R0402_0 CLKOUT_PCIE1N CLKOUT_PCIE1P PCIECLKRQ1# / GPIO18 CLKOUT_PCIE2N CLKOUT_PCIE2P PCIECLKRQ2# / GPIO20 CLKIN_DMI_N CLKIN_DMI_P AP3 AP1 CLKIN_DOT_96N CLKIN_DOT_96P F18 E18 REFCLK14IN R111 PCIE_REFCLKN PCIE_REFCLKP CLK_MCH_PEG_L CLK_MCH_PEG 12,41 12,41 CLK_DP_N CLK_DP_P PEG_CLKREQ_L R107 CLK_BUF_DOT96_N CLK_BUF_DOT96_P CLK_BUF_DOT96_N CLK_BUF_DOT96_P CLK_BUF_CKSSCD_N CLK_BUF_CKSSCD_P CLK_BUF_REF14 P41 CLK_BUF_REF14 12 12 12 +V1.1S PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK CLK_PCI_FB J42 XTAL25_IN XTAL25_OUT AH51 AH53 25M_PCH01 XTAL25_OUT XCLK_RCOMP CLKOUT_PCIE4N CLKOUT_PCIE4P XCLK_RCOMP T45 TP_CLK_FLEX0 PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65 P43 TP_CLK_FLEX1 TP11 CLKOUTFLEX2 / GPIO66 T42 TP_CLK_FLEX2 TP12 CLKOUTFLEX3 / GPIO67 N50 TP_CLK_FLEX3 PEG_B_CLKRQ# / GPIO56 15 C177 0 R0402_0 XTAL25_IN IGP Stuff AF38 CLKOUTFLEX0 / GPIO64 CLKOUT_PEG_B_N CLKOUT_PEG_B_P CLK_PCI_FB R113 CLKOUT_PCIE5N CLKOUT_PCIE5P PCIECLKRQ4# / GPIO26 R115 TP10 91,1% R351 If no IGP,stuff 0 ns R116 1M X2 : D04-1001100-T16 D04-1001100-T02 18pF/50V,NPO Y10 25MHz,20pF 1 3 18pF/50V,NPO TP15 SMB_DATA_S2 2 2N7002K Q5 SMB_CLK_S2 10,11,12 SMB_DATA_S3 SMB_CLK_S3 PCH_GPIO74 R120 10K PCH_GPIO11 R121 10K PCH_UPEK_INIT_L R122 10K SMB_CLK R123 2.2K SMB_DATA R124 2.2K SML0_CLK R125 2.2K SML0_DATA R126 2.2K SMB_DATA_S2 10,11,12 SML1_CLK R130 2.2K ns SML1_DATA R132 2.2K ns SMB_DATA_S3 10,11,12 SMB_CLK_S3 10,11,12 R359 R360 0 R0402_0 0 R0402_0 R353 R352 C C178 R131 4.7K 1 SMB_DATA SMB_CLK_S2 Cap values depend on Xtal +V3.3AUX R129 4.7K 2N7002K Q4 10K DGPU 12 12 CLK_BUF_CKSSCD_N CLK_BUF_CKSSCD_P +V3.3S 2 16 CLK_BUF_CPU_BCLK_L 12 CLK_BUF_CPU_BCLK 12 +V5S 3 DGPU_PWROK CLK_DP_N 5 CLK_DP_P 5 +V3.3S SMB_CLK 1 CLK_MCH_PEG_L 5,12 CLK_MCH_PEG 5,12 IbexPeak-M_Rev1_5 +V5S 0 R0402_0 Q171 2N7002K SOT23 DGPU CLK_BUF_EXP_N 12 CLK_BUF_EXP_P 12 CLKIN_SATA_N / CKSSCD_N AH13 CLKIN_SATA_P / CKSSCD_P AH12 CLKOUT_PCIE3N CLKOUT_PCIE3P PCIE_REFCLKN PCIE_REFCLKP AW24 BA24 CLKIN_BCLK_N CLKIN_BCLK_P D PEG_CLKREQ#_CLK PEG_CLKREQ_L AD43 AD45 CLKOUT_DMI_N CLKOUT_DMI_P EC_SMB1_DAT 9,22,27 R1055 1K AN4 AN2 CLKOUT_PEG_A_N CLKOUT_PEG_A_P +V3.3S EC_SMB1_CLK 9,22,27 12,42 PEG_CLKREQ#_CLK PEG_A_CLKRQ# / GPIO47 H1 BG34 BJ34 BG36 BJ36 U4 CK_PEG2_N CK_PEG2_P PERN6 PERP6 PETN6 PETP6 AT34 AU34 AU36 AV36 CLK_MINICARD2_OE_L 22 GPP_CLK2_N 22 GPP_CLK2_P C PERN5 PERP5 PETN5 PETP5 CLK_MINICARD1_OE_L 21 CLK_MINICARD1_OE_L 21 CLK_PCIE_MINICARD2_L 21 CLK_PCIE_MINICARD2 BF33 BH33 BG32 BJ32 PCH_SRC0_CLKREQ_L 10K CLK_PCIE_MINICARD1_L CLK_PCIE_MINICARD1 21 CLK_PCIE_MINICARD1_L 21 CLK_PCIE_MINICARD1 PERN4 PERP4 PETN4 PETP4 BA34 AW34 BC34 BD34 HM55 No function. R106 BA32 BB32 BD32 BE32 C8 3 AU30 AT30 AU32 AV32 SMBDATA SML0ALERT# / GPIO60 SMB_CLK 2 PERN2 PERP2 PETN2 PETP2 PCH_GPIO11 2 AW30 BA30 BC30 BD30 1 +V3.3S 5,9,10,11,12,13,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48 +V3.3AUX 5,13,15,16,17,19,21,22,24,25,27,28,29,30,31,32,34,35 +V5AUX 17,19,22,24,27,28,29,32,33,34,35,36 +V1.1S 7,13,16,17,34,35,36 +V5S 15,16,17,18,19,20,21,23,25,26,28,29,35,36,37,38 B9 H14 1 C358 C357 PCIE_TXN2_C PCIE_TXP2_C SMBCLK SMBus 22 PCIE_RXN2_EXPRESS 22 PCIE_RXP2_EXPRESS 22 PCIE_TXN2_EXPRESS 22 PCIE_TXP2_EXPRESS 3G 3G SMBALERT# / GPIO11 Link 0.1uF/16V,X7R 0.1uF/16V,X7R PERN1 PERP1 PETN1 PETP1 PCI-E* C172 C169 BG30 BJ30 BF29 BH29 Controller 21 PCIE_RXN2 21 PCIE_RXP2 21 PCIE_TXN2 21 PCIE_TXP2 PCIE_TXN1_C PCIE_TXP1_C PEG 0.1uF/16V,X7R 0.1uF/16V,X7R From CLK BUFFER C170 C171 Clock Flex 21 PCIE_RXN1 21 PCIE_RXP1 21 PCIE_TXN1 21 PCIE_TXP1 2 0 ns 0 ns SMB_DATA_A 21,22,24 SMB_CLK_A 21,22,24 DMI0RXN DMI1RXN DMI2RXN DMI3RXN B 5 DMI_RXP0 5 DMI_RXP1 5 DMI_RXP2 5 DMI_RXP3 BD24 BG22 BA20 BG20 DMI0RXP DMI1RXP DMI2RXP DMI3RXP +V1.1S BE22 BF21 BD20 BE18 DMI0TXN DMI1TXN DMI2TXN DMI3TXN BD22 BH21 BC20 BD18 DMI0TXP DMI1TXP DMI2TXP DMI3TXP BH25 DMI_ZCOMP BF25 DMI_IRCOMP 5 DMI_TXN0 5 DMI_TXN1 5 DMI_TXN2 5 DMI_TXN3 R133 5 DMI_TXP0 5 DMI_TXP1 5 DMI_TXP2 5 DMI_TXP3 49.9,1% DMI_COMP_R FDI BC24 BJ22 AW20 BJ20 DMI U3C DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 5 5 5 5 FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7 BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12 FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7 FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7 BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12 FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7 FDI_INT BJ14 FDI_INT FDI_FSYNC0 BF13 FDI_FSYNC0 FDI_FSYNC1 BH13 FDI_FSYNC1 FDI_LSYNC0 BJ12 FDI_LSYNC0 FDI_LSYNC1 BG14 FDI_LSYNC1 FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7 5 5 5 5 5 5 5 5 FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7 5 5 5 5 5 5 5 5 B FDI_INT 5 FDI_FSYNC0 5 FDI_FSYNC1 5 FDI_LSYNC0 5 FDI_LSYNC1 5 +V3.3AUX +V3.3S PM_CLKRUN_L R136 PM_RSMRST_PCHL SYS_PWROK R141 10K PM_PCH_PWROK 0 ns 0 AUXPWROK_R MPWROK_R R146 0 AUXPWROK_R ns M6 SYS_PWROK CLKRUN# / GPIO32 R233 0 R304 0 PWROK K5 MEPWROK A10 LAN_RST# DRAMPWROK PM_RSMRST_PCHL C16 SUS_PWR_ACK M1 SUS_PWR_DN_ACK / GPIO30 P5 PWRBTN# P7 ACPRESENT / GPIO31 A6 BATLOW# / GPIO72 RSMRST# LAN DISABLE 27 SUS_PWR_ACK_EC ns 27 PWR_BTN# R231 27,42 AC_PRESENT_EC AC_PRESENT 0 ns J12 Y1 SUS_STAT# / GPIO61 P8 SUSCLK / GPIO62 F3 PM_CLKRUN_L R322 0 R0402_0 PM_BATLOW# TP_SUS_CLK E4 PM_SLP_S5_L H7 PM_SLP_S4_L R230 0 R0402_0 SLP_S4# 22,27,28,29 SLP_S3# P12 PM_SLP_S3_L R232 0 R0402_0 SLP_S3# 22,27,28,36 SLP_M# K8 PM_SLP_M_L R305 0 SLP_S3# N2 BJ10 TP_PM_SLP_DSWL TP61 F14 RI# SLP_LAN# / GPIO29 IbexPeak-M_Rev1_5 F6 PM_BATLOW# R139 8.2K PCIE_WAKE# R140 1K PM_SLP_LAN_L R142 10K ns PM_SYSRST_L R143 10K ns PWR_BTN# R145 10K 10K +V3.3S A C406 0.1uF/16V,X7R TP18 H_PM_SYNC SYS_PWROK R466 0 R0402_0 PM_PCH_PWROK R467 0 R0402_0 VCC H_PM_SYNC 5 PM_MPWROK must be high to startup PM_RI_L 100K TP16 SLP_S4# TP23 10K R137 SUS_STAT# 19 SLP_S5# / GPIO63 PMSYNCH R135 PM_RI_L PM_CLKRUN# 27 EC OD output 27 PM_BATLOW# R138 AC_PRESENT PCIE_WAKE# 21,22,24 4 GND 3 A WAKE# D9 5 PM_DRAM_PWRGD 27,28,32,36 PM_RSMRST# SYS_RESET# B17 MAIN_PWROKR465 PM_MPWROKR144 R147 10K T6 10K 5 PM_SYSRST_L 1K System Power Management R1151 R134 8.2K +V3.3S PM_PCH_PWROK SUS_PWR_ACK PM_SLP_LAN_L 1 2 MAIN_PWROK 27,36 CZC Technology IMVP_OK 19,27,28,38 U32 SOT23_5 SN74AHC1G08DBV Panel &VGA connect Size Project Name A3 Date: 5 4 zw Title If integrated Intel LAN is not supported on the platform, GPIO29 must be left as No Connect. In addition, this GPIO29 can not be used for any other purposes. 3 2 Rev R48 C Thursday, April 22, 2010 Sheet 1 14 of 56 5 4 3 2 1 U3D T48 T47 L_BKLTEN L_VDD_EN L_BKLT_CTRL Y48 L_BKLTCTL LVDS_DDC_CLK LVDS_DDC_DATA L_CTRL_CLK L_CTRL_DATA LVDS_IBG TP_LVDS_VBG TP19 R148 2.37K,1% Place near PCH LVDSA_CLK_L 19 LVDSA_CLK_L 19 LVDSA_CLK AB48 Y45 L_DDC_CLK L_DDC_DATA AB46 V48 L_CTRL_CLK L_CTRL_DATA AP39 AP41 LVD_IBG LVD_VBG AT43 AT42 LVD_VREFH LVD_VREFL AV53 AV51 LVDSA_CLK# LVDSA_CLK BB47 BA52 AY48 AV47 LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3 BB48 BA50 AY49 AV48 LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3 AP48 AP47 LVDSB_CLK# LVDSB_CLK AY53 AT49 AU52 AT53 LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3 AY51 AT48 AU50 AT51 LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3 AA52 AB53 AD53 CRT_BLUE CRT_GREEN CRT_RED D 19 LVDSA_DATA0_L 19 LVDSA_DATA1_L 19 LVDSA_DATA2_L LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 19 LVDSA_DATA0 19 LVDSA_DATA1 19 LVDSA_DATA2 19 LVDSB_CLK_L 19 LVDSB_CLK 19 LVDSB_DATA0_L 19 LVDSB_DATA1_L 19 LVDSB_DATA2_L LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 19 LVDSB_DATA0 19 LVDSB_DATA1 19 LVDSB_DATA2 R310 R311 R312 20 CRT_BLUE 20 CRT_GREEN 20 CRT_RED CRT_DDC_CLK CRT_DDC_DATA 20 CRT_DDC_CLK 20 CRT_DDC_DATA 20 CRT_HSYNC 20 CRT_VSYNC 0 0 0 R153 R154 HSYNC VSYNC 0 0 DAC_IREF_R R155 1K,1% CRT_DDC_CLK CRT_DDC_DATA Y53 Y51 CRT_HSYNC CRT_VSYNC DAC_IREF CRT_IRTN BJ46 BG46 SDVO_STALLN SDVO_STALLP BJ48 BG48 SDVO_INTN SDVO_INTP BF45 BH45 T51 T53 DDPB_AUXN DDPB_AUXP DDPB_HPD BG44 BJ44 AU38 DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38 DDPC_CTRLCLK DDPC_CTRLDATA Y49 AB49 DDPC_AUXN DDPC_AUXP DDPC_HPD BE44 BD44 AV40 DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36 HW Strap Purpose PCH PIn No Reboot RSVD A16 swap override Integrated VRM Enable/Disable Boot BIOS Strap bit [1] BBS[1] Boot BIOS Strap bit[0] BBS[0] ESI Strap (Server only) Intel Anti-Theft Technology Enable Flash Descriptor Security Override TPM Functionality Disable DMI Termination Voltage RSVD RSVD RSVD RSVD RSVD SPKR GPIO[34] GNT[3]#/ GPIO[55] INTVRMEN GNT[1]#/ GPIO[51] GNT[0]# GNT[2]#/ GPIO[53] NV_ALE GPIO33/DOCK_EN# SPI_MOSI NV_CLE HDA_SDO GPIO[8] GPIO[27] HDA_SYNC GPIO[15] DDPD_AUXN DDPD_AUXP DDPD_HPD BC46 BD46 AT38 DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36 NO_STUFF PCH_GPIO53 Low High R149 1K ns = Enabled = Disabled +V1.8S DMI Termination Voltage NO_STUFF PCI_GNT_L3 R150 1K ns NV_CLE Set to Vcc/2 when HIGH NO_STUFF NV_CLE DPD_CTRLCK DPD_CTRLDAT R151 1K ns A16 swap override Strap/Top-Block Swap Override jumper PCI_GNT#3 +V1.8S Low = A16 swap override/Top-Block Swap Override enabled High = Default NO_STUFF Intel Anti-Theft Technology Enable U50 U52 PCH_GPIO53 ESI Strap (Server only) D Set to Vcc when LOW DDPD_CTRLCLK DDPD_CTRLDATA V51 V53 AD48 AB51 SDVO_TVCLKINN SDVO_TVCLKINP SDVO_CTRLCLK SDVO_CTRLDATA LVDS 19 LVDS_DDC_CLK 19 LVDS_DDC_DATA L_BKLT_EN LVDS_VDD_EN Digital Display Interface 19 L_BKLT_CTRL CRT 19 L_BKLT_EN 19 LVDS_VDD_EN R152 10K ns DPD_CTRLCK 18 DPD_CTRLDAT 18 NV_ALE High = Enabled Stuff PU Low = Disabled Unstuff PU (Default) DPD_HPD_PCH NV_ALE DPD_LANE0_N DPD_LANE0_P DPD_LANE1_N DPD_LANE1_P DPD_LANE2_N DPD_LANE2_P DPD_LANE3_N DPD_LANE3_P 18 18 18 18 18 18 18 18 IbexPeak-M_Rev1_5 J50 G42 H47 G34 C/BE0# C/BE1# C/BE2# C/BE3# INT_PIRQA_L G38 INT_PIRQB_L H51 INT_PIRQC_L B37 INT_PIRQD_L A44 PIRQA# PIRQB# PIRQC# PIRQD# +V5S 1 DPD_HPD_PCH R174 100K +V3.3S R468 2.2K CRT_DDC_CLK R469 2.2K CRT_DDC_DATA R292 2.2K LVDS_DDC_CLK R293 2.2K LVDS_DDC_DATA R156 10K L_CTRL_CLK R157 10K L_CTRL_DATA UMA CRT_BLUE L_BKLT_EN R158 150,1% CRT_GREEN R160 150,1% CRT_RED 150,1% R162 2 3 R317 0 UMA DPD_HPD 18 Q154 2N7002K UMA +V3.3S R1040 10K UMA R163 100K R234 18 DGPU_SELECT# R1041 10K DGPU Place the 3 resistors close to PCH 0 ns DGPU_PWM_SELECT# PCI_REQ_L0 PCI_REQ_L1 PCI_REQ_L2 PCI_REQ_L3 F51 A46 B45 M53 REQ0# REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54 PCI_GNT_L0 PCI_GNT_L1 PCH_GPIO53 PCI_GNT_L3 F48 K45 F36 H53 GNT0# GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55 B41 K53 A36 A48 PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5 INT_PIRQE_L INT_PIRQF_L INT_PIRQG_L INT_PIRQH_L TP34 PCIRST_L TP20 B K6 PCI_SERR_L PCI_PERR_L E44 E50 PCI_IRDY_L A42 H44 PCI_DEVSEL_L F46 PCI_FRAME_L C46 21,22,24 PLT_RST_L 27 CLK_LPC_KBC 14 CLK_PCI_FB 21 CLK_PCIF_PORT80 SERR# PERR# PLOCK# PCI_STOP_L PCI_TRDY_L D41 C48 STOP# TRDY# M7 PME# R168 R170 47 22 CLKOUT_PCI0 CLKOUT_PCI1 CLK_PCIF_PORT80 R171 47 CLKOUT_PCI3 D5 N52 P53 P46 P51 P48 C179 C180 C181 10pF/50V,NPO 10pF/50V,NPO ns ns 10pF/50V,NPO ns AY9 BD1 AP15 BD8 AV9 BG8 NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8 NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11 NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15 AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6 NV_ALE NV_CLE BD3 AY6 NV_RCOMP AU2 NV_RB# AV7 NV_WR#0_RE# NV_WR#1_RE# AY8 AY5 NV_WE#_CK0 NV_WE#_CK1 AV11 BF5 USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P IRDY# PAR DEVSEL# FRAME# D49 CLK_PCI_FB NO_STUFF PCIRST# PCI_LOCK_L PLT_RST_L NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3 NV_DQS0 NV_DQS1 USB C PCI AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 NVRAM U3E H40 N34 C44 A38 C36 J34 A40 D45 E36 H48 E40 C40 M48 M45 F53 M40 M43 J36 K48 F40 C42 K46 M51 J52 K51 L34 F42 J40 G46 F44 M47 H36 LO note: Place near PCH PLTRST# CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4 C NV_ALE NV_CLE NV_RCOMP R159 32.4,1% ns USB_PN0 USB_PP0 USB_PN1 USB_PP1 USB_PN2 USB_PP2 USB_PN3 USB_PP3 USB_PN4 USB_PP4 USB_PN5 USB_PP5 H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24 USBRBIAS# B25 USBRBIAS D25 OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43 OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14 N16 J16 F16 L16 E14 G16 F12 T15 USB_PN0 USB_PP0 USB_PN1 USB_PP1 USB_PN2 USB_PP2 USB_PN3 USB_PP3 USB_PN4 USB_PP4 USB_PN5 USB_PP5 21 21 21 21 22 22 26 26 29 29 19 19 to rear IO to PIN header HM55 No function. USB_PN8 USB_PP8 USB_PN6 USB_PP6 USB_PN7 USB_PP7 USB_PN8 29 USB_PP8 29 USB_PN9 28 USB_PP9 28 USB_PN10 28 USB_PP10 28 USB_PN11 24 USB_PP11 24 USB_PN6 22 USB_PP6 22 USB_PN7 22 USB_PP7 22 to rear IO B USB_BIAS +V3.3AUX R166 22.6,1% USB_OC_L0 USB_OC_L1 USB_OC_L2 USB_OC_L3 USB_OC_L4 USB_OC_L5 USB_OC_L6 USB_OC_L7 USB_OC_L6 USB_OC_L5 USB_OC_L7 USB_OC_L0 USB_OC_L2 USB_OC_L1 USB_OC_L3 USB_OC_L4 USB_OC_L3 22 USB_OC_L4 29 R167 R169 R301 R178 R172 R303 R249 R309 10K 10K 10K 10K 10K 10K 10K 10K IbexPeak-M_Rev1_5 PCI_GNT_L0 +V3.3S PCI_GNT_L1 +V3.3S INT_PIRQA_L PCI_FRAME_L PCI_TRDY_L INT_PIRQH_L INT_PIRQG_L INT_PIRQC_L INT_PIRQE_L PCI_STOP_L A RN4 RN5 1 3 5 7 1 3 5 7 28.2K 4 6 8 28.2K 4 6 8 28.2K 4 6 8 Boot BIOS Strap PCI_GNT_L0 PCI_GNT_L1 0 0 0 1 1 0 1 1 C182 0.1uF/16V,X7R 21,27 LPC_RST# R715 5 +V5S 14,16,17,18,19,20,21,23,25,26,28,29,35,36,37,38 +V1.8S 7,16,28,34,36 +V3.3S 5,9,10,11,12,13,14,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48 +V3.3AUX 5,13,14,16,17,19,21,22,24,25,27,28,29,30,31,32,34,35 +V5AUX 17,19,22,24,27,28,29,32,33,34,35,36 RN1 1 3 5 7 RN2 1 3 5 7 RN3 1 3 5 7 0 1 VCC 5,41 BUF_PLT_RST_L 4 28.2K 4 6 8 28.2K 4 6 8 PLT_RST_L Boot BIOS Location LPC Reserved PCI SPI R175 1K ns R176 1K ns NO_STUFF 2 GND R177 SOT23_5 100KSN74AHC1G08DBV 3 PCI_IRDY_L INT_PIRQD_L PCI_REQ_L2 PCI_REQ_L1 PCI_SERR_L PCI_DEVSEL_L PCI_LOCK_L PCI_PERR_L PCI_REQ_L0 INT_PIRQB_L INT_PIRQF_L PCI_REQ_L3 U4 A Buffer to reduce loading on PLT_RST#. CZC Technology zw Title Panel &VGA connect Size Project Name A3 Date: 5 4 3 2 Rev R48 C Thursday, April 22, 2010 Sheet 1 15 of 56 5 4 3 2 1 U3F R302 0 DGPU BIOS_REC TP57 TP_GPIO24 NO_STUFF SPI_CS_L2 R188 10K ns 12 PCI_STOP# GPIO35 +V3.3AUX DGPU_PWR_EN# R195 10K SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N AM3 CK_BCK0_N R181 0 R0402_0 CLK_MCP_BCLK_L F38 TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P AM1 CK_BCK0_P R183 0 R0402_0 CLK_MCP_BCLK SCLOCK / GPIO22 PECI H10 GPIO24 AB12 GPIO27 V13 GPIO28 M11 STP_PCI# / GPIO34 RCIN# BG10 H_PECI_R R186 BE10 THRMTRIP# BD10 0 R0402_0 TP1 BA22 TP52 TP2 AW22 TP65 TP3 BB22 SDATAOUT0 / GPIO39 TP4 AY45 PCIECLKRQ6# / GPIO45 TP5 AY46 PCIECLKRQ7# / GPIO46 TP6 AV43 AB6 SDATAOUT1 / GPIO48 TP7 AV45 GPIO49 AA4 SATA5GP / GPIO49 / TEMP_ALERT# TP8 AF13 GPIO57 F8 TP9 M18 TP10 N18 TP11 AJ24 H3 F1 SV_SET_UP GPIO57 R156 C NCTF Stuff : Disable PLL On DIE No Stuff : Enable PLL On DIE VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31 RSVD A4 A49 A5 A50 A52 A53 B2 B4 B52 B53 BE1 BE53 BF1 BF53 BH1 BH2 BH52 BH53 BJ1 BJ2 BJ4 BJ49 BJ5 BJ50 BJ52 BJ53 D1 D2 D53 E1 E53 +V1.1S_VTT TP12 AK41 TP13 AK42 TP14 M32 TP15 N32 TP16 M30 TP17 N30 TP18 H12 TP19 AA23 NC_1 AB45 NC_2 AB38 NC_3 AB42 NC_4 AB41 NC_5 T39 INIT3_3V# TP24 1K HOST_ALERT_L2 R180 10K SPI_CS_L2 R182 10K GPIO57 R184 10K H_RCIN_L R190 10K DGPU_PWR_EN# R191 R187 5 D 1K DGPU_HPD_INTR_L R192 10K DGPU_PRSNT# R194 10K GPIO35 R196 10K DGPU_HOLD_RST# R197 10K PCH_GPIO0 R198 10K MFG_MODE R199 10K SV_SET_UP R200 10K LPC_SMI# R201 10K SCI# R202 10K GPIO49 R203 10K PCI_STOP# R58 NO_STUFF R205 3.01K,1% ns DGPU_PWROK R204 INIT3_3V_L TP68 C10 TP_PCH_SST TP67 +V3.3S R207 10K R1005 10K DGPU +V1.1S_VCCAPLL_EXP 10uH/500mAns C189 10uF/10V X5R ns NO_STUFF 35,36 R235 10K ns 3 VDDC_VR_EN 0 1 7,13,14,17,34,35,36 +V1.1S_VCC_EXP JCRV - BIOS RECOVERY DISABLE -- (1- X) DEFAULT ENABLE -- (1-2) 2 ns C191 10uF/10V X5R R1006 100K ns C192 0.1uF/16V,X7R C193 0.1uF/16V,X7R C194 0.1uF/16V,X7R C195 0.1uF/16V,X7R B +V3.3S +V3.3S CRB_SV_DET R213 10K ns NO_STUFF C197 0.1uF/16V,X7R +V1.1S R214 100K VCCCORE[1] VCCCORE[2] VCCCORE[3] VCCCORE[4] VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15] AK24 VCCIO[24] BJ24 VCCAPLLEXP L3 +V1.5S_1.8S 10uH/500mAns NO_STUFF C201 10uF/10V X5R ns +V1.1S +V1.1S_VCCAPLL_FDI AN20 AN22 AN23 AN24 AN26 AN28 BJ26 BJ28 AT26 AT28 AU26 AU28 AV26 AV28 AW26 AW28 BA26 BA28 BB26 BB28 BC26 BC28 BD26 BD28 BE26 BE28 BG26 BG28 BH27 VCCIO[25] VCCIO[26] VCCIO[27] VCCIO[28] VCCIO[29] VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49] VCCIO[50] VCCIO[51] VCCIO[52] VCCIO[53] AN30 AN31 VCCIO[54] VCCIO[55] AN35 VCC3_3[1] AT22 VCCVRM[1] BJ18 AM23 AE50 VCCADAC[2] AE52 VSSA_DAC[1] AF53 VSSA_DAC[2] AF51 +VCCA_DAC_1_2 C184 0.01uF/25V,X7R 300ohm/100MHz,1A C185 0.1uF/16V,X7R VCCALVDS AH38 VSSA_LVDS AH39 VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4] AP43 AP45 AT46 AT45 VCC3_3[2] AB34 VCC3_3[3] AB35 VCC3_3[4] AD35 VCCVRM[2] AT24 VCCDMI[1] AT16 VCCDMI[2] AU16 R206 R208 0 ns 0 R0603 +V1.8S NO_STUFF L1 VCCTX_LVD_J 0.1uH/300mA C186 0.01uF/25V,X7R C187 0.01uF/25V,X7R C188 22uF/6.3V,X5R R209 0 NO_STUFF +V3.3S ns C190 1uF/10V,X5R +V1.5S_1.8S +V1.1S_VTT R210 20K,1% R0402 U5 APL5315BI-TRL SOT23_5 +V5S R211 100K C196 1uF/10V,X5R VCCFDIPLL VCCIO[1] +V3.3S_LDO FB2 VCCADAC[1] +V3.3S L2 +V1.1S_VCCAPLL_EXP_R1 BIOS_REC Q169 2N7002K SOT23 ns POWER U3G AB24 AB26 AB28 AD26 AD28 AF26 AF28 AF30 AF31 AH26 AH28 AH30 AH31 AJ30 AJ31 +V1.1S ns R338 ns +V1.1S VDDR3 DGPU_PWR_EN# 100K C P6 C183 0.1uF/16V,X7R 1K 10K TP13_PCH +V1.1S_PCH_VCC R1072 +V1.5S 7,21,22,28,35,36 +V5S 14,15,17,18,19,20,21,23,25,26,28,29,35,36,37,38 +V3.3S H_THRMTRIP_L 5 IbexPeak-M_Rev1_5 48 DGPU_PWR_EN#_VDDR3 +V1.5S_1.8S 17 +V1.1S_VTT 5,7,12,17,35,36 56 R189 GPIO35 SLOAD / GPIO38 P3 CLK_MCP_BCLK 5,12 H_CPUPWRGD 54.9K,1% SATA3GP / GPIO37 CRB_SV_DET R179 VDDR3 36,41,42,43,45,48 CLK_MCP_BCLK_L 5,12 KB_RST# 27 PCH_THRMTRIPL_R SATA2GP / GPIO36 V3 10K ns HOST_ALERT_L1 H_PECI 5 H_RCIN_L T1 PROCPWRGD PM_LANPHY_ENABLE R371 A20M# 27 AB7 5 DRAMRST_CNTRL_PCH GPIO27 GPIO15 U2 AA2 MFG_MODE PCH_GPIO45 PLL On DIE VR Enable T7 A20GATE AB13 DGPU_PRSNT# R193 10K LAN_PHY_PWR_CTRL / GPIO12 V6 +V1.1S 7,13,14,17,34,35,36 +V1.8S 7,15,28,34,36 +V3.3S 5,9,10,11,12,13,14,15,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48 +V3.3AUX 5,13,14,15,17,19,21,22,24,25,27,28,29,30,31,32,34,35 +V5AUX 17,19,22,24,27,28,29,32,33,34,35,36 +V3.3AUX K9 Y7 GPIO27 D TP21 TP22 CRT 41 DGPU_HOLD_RST# DGPU_PWROK GPIO8 AF48 AF47 VCC CORE 14 DGPU_PWROK 36,42 MADISON_POWOK R185 10K ns TACH3 / GPIO7 CLKOUT_PCIE7N CLKOUT_PCIE7P LVDS HOST_ALERT_L1 +V3.3AUX J32 F10 CLKOUT_PCIE6N CLKOUT_PCIE6P HVCMOS PM_LANPHY_ENABLE TACH2 / GPIO6 DMI HOST_ALERT_L2 TACH1 / GPIO1 D37 PCI E* 27 SCI# BMBUSY# / GPIO0 C38 NAND / SPI SCI# AH45 TP_CLKOUT_SRC6N AH46 TP_CLKOUT_SRC6P VCCPNAND[1] VCCPNAND[2] VCCPNAND[3] VCCPNAND[4] VCCPNAND[5] VCCPNAND[6] VCCPNAND[7] VCCPNAND[8] VCCPNAND[9] AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15 VCCME3_3[1] VCCME3_3[2] VCCME3_3[3] VCCME3_3[4] AM8 AM9 AP11 AP9 +V1.8S 1 EN 2 GND 3 VIN B R212 63.4K,1% SET 5 VOUT 4 0.8V 61.9k,1% ---63.4k +V3.3S_LDO R0402 C198 C0402 1uF/10V,X5R C199 22uF/6.3V,X5R C200 0.1uF/16V,X7R C202 1uF/10V,X5R FDI DGPU_HPD_INTR_L TP56 GPIO LPC_SMI# 27 LPC_SMI# MISC Y3 CPU PCH_GPIO0 +V3.3S C203 1uF/10V,X5R IbexPeak-M_Rev1_5 +V1.1S R215 0 ns R0805 NO_STUFF A A +V1.5S NO_STUFF R216 +V1.8S R217 0 +V1.5S_1.8S ns R0805 CZC Technology 0 R0805 zw Title Panel &VGA connect Size Project Name A3 Date: 5 4 3 2 Rev R48 C Thursday, April 22, 2010 Sheet 1 16 of 56 5 +V1.1S 4 3 2 1 L4 +V1.1S VCCME[3] VCCME[4] AF41 VCCME[5] AF42 VCCME[6] V39 VCCME[7] V41 VCCME[8] V42 VCCME[9] Y39 VCCME[10] Y41 VCCME[11] Y42 VCCME[12] V9 C214 0.1uF/16V,X7R DCPRTC AU24 VCCVRM[3] BB51 BB53 VCCADPLLA[1] VCCADPLLA[2] BD51 BD53 VCCADPLLB[1] VCCADPLLB[2] AH23 AJ35 AH35 VCCIO[21] VCCIO[22] VCCIO[23] AF34 VCCIO[2] AH34 C219 1uF/10V,X5R AF32 VCCIO[3] V12 DCPSST Y22 DCPSUS +V1.1S_VCCA_A_DPL +V1.1S +V1.1S_VCCA_B_DPL C217 1uF/10V,X5R C218 0.1uF/16V,X7R +VCCSST C221 0.1uF/16V,X7R +V1.1A_INT_VCCSUS C224 0.1uF/16V,X7R +V3.3AUX C C226 0.1uF/16V,X7R +V1.1S_VTT C227 0.1uF/16V,X7R +V3.3_RTC P18 F24 +V3.3AUX +V3.3S +V3.3AUX C211 0.1uF/16V,X7R D3 BAT54C +V1.1S D2 BAT54C +V5AUX R218 +V5A_PCH_VCC5REFSUS +V5S 10 R219 +V5S_PCH_VCC5REF V5REF K49 VCC3_3[8] J38 VCC3_3[9] L38 VCC3_3[10] M36 VCC3_3[11] N36 VCC3_3[12] P36 VCC3_3[13] U35 VCC3_3[14] AD13 VCCIO[9] VCCSUS3_3[29] VCCSUS3_3[30] U20 VCCSUS3_3[31] U22 VCCSUS3_3[32] V15 VCC3_3[5] V16 VCC3_3[6] Y16 VCC3_3[7] C228 AU18 0.1uF/16V,X7R C232 0.1uF/16V,X7R V5REF_SUS VCCSATAPLL[1] VCCSATAPLL[2] U19 A12 C231 0.1uF/16V,X7R V23 C209 0.1uF/16V,X7R 10 C215 1uF/10V,X5R +V3.3S C216 0.1uF/16V,X7R +V3.3S C220 0.1uF/16V,X7R +V1.1S_VCCAPLL_L AK3 AK1 C222 1uF/10V,X5R ns AH22 +V1.1S L5 +V1.1S_VCCAPLL ns 10uH/500mA C223 10uF/10V X5R ns NO_STUFF +V1.1S +V1.5S_1.8S +V1.1S_VCC_SATA AT18 C229 4.7uF/10V,X5R U23 VCCIO[56] C208 0.022uF/16V,X7R C213 1uF/10V,X5R VCCIO[4] +V3.3S +V3.3S_VCCPCORE VCCSUS3_3[28] U3I U3H +V3.3AUX 2 VCCME[2] AF43 +VCCRTCEXT C212 0.1uF/16V,X7R +V1.5S_1.8S VCCME[1] AD41 +V1.1S_VCCUSBCORE C207 1uF/10V,X5R 1 D DCPSUSBYP AD39 VCCSUS3_3[1] VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5] VCCSUS3_3[6] VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20] VCCSUS3_3[21] VCCSUS3_3[22] VCCSUS3_3[23] VCCSUS3_3[24] VCCSUS3_3[25] VCCSUS3_3[26] VCCSUS3_3[27] V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26 3 C210 0.1uF/16V,X7R Y20 AD38 USB TP_PCH_DSW 0.1uF/16V,X7R VCCVRM[4] AH19 VCCIO[11] AD20 VCCIO[12] AF22 VCCIO[13] VCCIO[14] VCCIO[15] VCCIO[16] AD19 AF20 AF19 AH20 VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20] AB19 AB20 AB22 AD22 VCCME[13] VCCME[14] VCCME[15] VCCME[16] AA34 Y34 Y35 AA35 VCCSUSHDA V_CPU_IO[1] V_CPU_IO[2] VCCRTC IbexPeak-M_Rev1_5 AT20 VCCIO[10] SATA C248 VCCLAN[2] PCI/GPIO/LPC +V1.1S AF24 V24 V26 Y24 Y26 CPU C206 0.1uF/16V,X7R VCCLAN[1] VCCIO[5] VCCIO[6] VCCIO[7] VCCIO[8] 2 VCCACLK[2] AF23 1 VCCACLK[1] AP53 3 AP51 +V1.1S RTC C205 1uF/10V,X5R ns HDA C204 10uF/10V X5R ns Clock and Miscellaneous 10uH/500mA NO_STUFF +V1.1S POWER U3J PCI/GPIO/LPC +V1.1S_VCCA_CLK ns C225 1uF/10V,X5R AB16 VSS[0] AA19 AA20 AA22 AM19 AA24 AA26 AA28 AA30 AA31 AA32 AB11 AB15 AB23 AB30 AB31 AB32 AB39 AB43 AB47 AB5 AB8 AC2 AC52 AD11 AD12 AD16 AD23 AD30 AD31 AD32 AD34 AU22 AD42 AD46 AD49 AD7 AE2 AE4 AF12 Y13 AH49 AU4 AF35 AP13 AN34 AF45 AF46 AF49 AF5 AF8 AG2 AG52 AH11 AH15 AH16 AH24 AH32 AV18 AH43 AH47 AH7 AJ19 AJ2 AJ20 AJ22 AJ23 AJ26 AJ28 AJ32 AJ34 AT5 AJ4 AK12 AM41 AN19 AK26 AK22 AK23 AK28 VSS[1] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98] VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] AY7 B11 B15 B19 B23 B31 B35 B39 B43 B47 B7 BG12 BB12 BB16 BB20 BB24 BB30 BB34 BB38 BB42 BB49 BB5 BC10 BC14 BC18 BC2 BC22 BC32 BC36 BC40 BC44 BC52 BH9 BD48 BD49 BD5 BE12 BE16 BE20 BE24 BE30 BE34 BE38 BE42 BE46 BE48 BE50 BE6 BE8 BF3 BF49 BF51 BG18 BG24 BG4 BG50 BH11 BH15 BH19 BH23 BH31 BH35 BH39 BH43 BH47 BH7 C12 C50 D51 E12 E16 E20 E24 E30 E34 E38 E42 E46 E48 E6 E8 F49 F5 G10 G14 G18 G2 G22 G32 G36 G40 G44 G52 AF39 H16 H20 H30 H34 H38 H42 AK30 AK31 AK32 AK34 AK35 AK38 AK43 AK46 AK49 AK5 AK8 AL2 AL52 AM11 BB44 AD24 AM20 AM22 AM24 AM26 AM28 BA42 AM30 AM31 AM32 AM34 AM35 AM38 AM39 AM42 AU20 AM46 AV22 AM49 AM7 AA50 BB10 AN32 AN50 AN52 AP12 AP42 AP46 AP49 AP5 AP8 AR2 AR52 AT11 BA12 AH48 AT32 AT36 AT41 AT47 AT7 AV12 AV16 AV20 AV24 AV30 AV34 AV38 AV42 AV46 AV49 AV5 AV8 AW14 AW18 AW2 BF9 AW32 AW36 AW40 AW52 AY11 AY43 AY47 IbexPeak-M_Rev1_5 +V1.1S +V3.3AUX L30 C230 1uF/10V,X5R +V1.1S L6 VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237] VSS[238] VSS[239] VSS[240] VSS[241] VSS[242] VSS[243] VSS[244] VSS[245] VSS[246] VSS[247] VSS[248] VSS[249] VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258] VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[326] VSS[327] VSS[328] VSS[329] VSS[330] VSS[331] VSS[332] VSS[333] VSS[334] VSS[335] VSS[336] VSS[337] VSS[338] VSS[339] VSS[340] VSS[341] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352] VSS[353] VSS[354] VSS[355] VSS[356] VSS[366] H49 H5 J24 K11 K43 K47 K7 L14 L18 L2 L22 L32 L36 L40 L52 M12 M16 M20 N38 M34 M38 M42 M46 M49 M5 M8 N24 P11 AD15 P22 P30 P32 P34 P42 P45 P47 R2 R52 T12 T41 T46 T49 T5 T8 U30 U31 U32 U34 P38 V11 P16 V19 V20 V22 V30 V31 V32 V34 V35 V38 V43 V45 V46 V47 V49 V5 V7 V8 W2 W52 Y11 Y12 Y15 Y19 Y23 Y28 Y30 Y31 Y32 Y38 Y43 Y46 P49 Y5 Y6 Y8 P24 T43 AD51 AT8 AD47 Y47 AT12 AM6 AT13 AM5 AK45 AK39 AV14 D C +V1.1S_VCCA_A_DPL 10uH/500mA IbexPeak-M_Rev1_5 CT1 22uF/6.3V,TAN L7 C234 1uF/10V,X5R +V1.1S_VCCA_B_DPL 10uH/500mA C1279 C233 220uF/6.3V,FPCAP + + CESD66 220uF/6.3V,POSCAP ns ns B CT2 22uF/6.3V,TAN C236 1uF/10V,X5R B +V5S 14,15,16,18,19,20,21,23,25,26,28,29,35,36,37,38 +V1.5S_1.8S 16 +V1.1S_VTT 5,7,12,16,35,36 +V1.1S 7,13,14,16,34,35,36 +V3.3_RTC 13 +V3.3S 5,9,10,11,12,13,14,15,16,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48 +V3.3AUX 5,13,14,15,16,19,21,22,24,25,27,28,29,30,31,32,34,35 +V5AUX 19,22,24,27,28,29,32,33,34,35,36 A A CZC Technology zw Title Panel &VGA connect Size Project Name A3 Date: 5 4 3 2 Rev R48 C Thursday, April 22, 2010 Sheet 1 17 of 56 3 2 D4 +V3.3S 5,9,10,11,12,13,14,15,16,17,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48 +V5S 14,15,16,17,19,20,21,23,25,26,28,29,35,36,37,38 R220 R221 CHK1 TXOUT_L2_P R224 R225 23 TXOUT_L0_N C 3 2 TXOUT_L1_P ns TXOUT_L1_N L4S2012 C TMDS_CLK_P 1 4 2 3 ns TMDS_CLK_N CHK4 90ohm@100MHz,0.5A L4S2012 DDC_DATA_5V 16 17 DVI2_HPD 2 3 CHK2 90ohm@100MHz,0.5A R226 0 R0402_0 R227 0 R0402_0 14 15 FS1206 0 R0402_0 0 R0402_0 1 4 12 13 I2C_CLK_5V 1 1.1A R222 R223 10 11 2 1 8 9 CHK3 90ohm@100MHz,0.5A L4S2012 220ohm/100MHz,2A FB0603 6 7 ns F1 BAT54C 4 5 TXOUT_L0_P 3 2 3 +V5S 2 FB3 20 1 0 R0402_0 0 R0402_0 4 1 VCC5V_HDMI J2 L4S2012 90ohm@100MHz,0.5A 3 ns 2 4 1 TXOUT_L2_N 0 R0402_0 0 R0402_0 1 18 19 22 C237 0.1uF/16V,X7R 21 R240 GND_HDMI 2041003 TYCO HDMID19_H56IN_REV GND_HDMI 0 ns GND_HDMI GND_HDMI 2041003 TYCO R236 33 27 HDMI_HPD_EC R238 20K,1% DVI2_HPD R239 100K U40 VCC5V_HDMI PS8271 QFN48_P5 TMDS CLK B 42 DDC1CLK 42 DDC1DATA 41 42 IN1_SCL IN1_SDA 42 TXCAM_DPA3N 42 TXCAP_DPA3P 44 45 IN1_D1n IN1_D1p 42 HPD1 46 IN1_HPD TMDS TX0 42 TX0M_DPA2N 42 TX0P_DPA2P 47 48 IN1_D2n IN1_D2p TMDS TX1 42 TX1M_DPA1N 42 TX1P_DPA1P 1 2 IN1_D3n IN1_D3p 3 IN1_PEQ 4 5 IN1_D4n IN1_D4p IN2_PEQ TMDS TX2 42 TX2M_DPA0N 42 TX2P_DPA0P TMDS CLK15 DPD_LANE3_N 15 DPD_LANE3_P +V3.3S OUT_D1n OUT_D1p 36 35 TMDS_CLK_N TMDS_CLK_P OUT_D2n OUT_D2p 33 32 TXOUT_L0_N TXOUT_L0_P OUT_D3n OUT_D3p 30 29 TXOUT_L1_N TXOUT_L1_P OUT_D4n OUT_D4p 27 26 TXOUT_L2_N TXOUT_L2_P DDCBUF OUT_HPD 40 39 CFG_HPD 28 PRE_EMI 34 I2C_CLK_5V R242 2.2K DDC_DATA_5V HDMI_SEL# DDC_BUF DVI2_HPD TP55 IN2_HPD REXT 24 R867 499,1% IN2_D2n IN2_D2p CEXT 23 C1039 2.2uF/6.3V,X7R TMDS TX115 DPD_LANE1_N 15 DPD_LANE1_P 13 14 IN2_D3n IN2_D3p 15 IN2_PEQ TMDS TX215 DPD_LANE0_N 15 DPD_LANE0_P 16 17 IN2_D4n IN2_D4p 15 DPD_CTRLCK 15 DPD_CTRLDAT 19 20 IN2_SCL IN2_SDA SW_DDC 22 SW_MAIN 21 PWDN 25 VDD1 VDD2 6 31 GND1 GND2 GND_PAD NC 18 43 49 7 HDMI_SEL# R868 0 GPU H IGP DGPU_SELECT# 15 +V3.3S FB85 C1042 DDC_BUF DPD_CTRLCK DPD_CTRLDAT OUT L PRE_EMI 11 12 4.7K 4.7K 4.7K 2.2K 2.2K 4.7K ns ns ns ns A B VCC5V_HDMI 10 IN1_PEQ R711R706R707R336R337R710 IN2_D1n IN2_D1p 38 37 TMDS TX015 DPD_LANE2_N 15 DPD_LANE2_P 15 DPD_HPD +V3.3S 8 9 R241 2.2K I2C_CLK_5V DDC_DATA_5V OUT_SCL OUT_SDA C1041 300ohm/100MHz,1A C1040 0.01uF/25V,X7R 0.1uF/16V,X7R4.7uF/10V,X5R A IN1_PEQ IN2_PEQ PRE_EMI CZC Technology R712R708R709 zw Title 4.7K 4.7K 4.7K ns ns ns HDMI Size A3 Project Name 3 2 Rev C R48 Date: Thursday, April 22, 2010 1 Sheet 18 of 56 5 4 +V3.3AUX +V3.3S +V5S +V5AUX +VDC +V5S +V5S LCDVDD FB5 Q15 AO3415 0 ns FB0805 0 FB0805 R244 1M 33 D42 DGPU 1N4148WS D43 UMA Q16 BSS138 3 ns 2 R246 C239 C240 0.1uF/16V,X7R 10UF/6.3V,X5R D 3 1N4148WS SOT23 100K Q17 2N7002K 1 R247 100K 0 ns +V3.3S FB6 2 42,44 FPVCC 1 R245 500mA 0 FB0805 C238 1000pF/50V,X7R 1 VLDT_PWRGD_5V 15 LVDS_VDD_EN 3 FB76 2 LCDVDD 42 1 +V3.3S D R339 1 +V3.3S 5,9,10,11,12,13,14,15,16,17,18,20,21,22,24,25,27,28,29,34,35,36,37,38,48 +V5S 14,15,16,17,18,20,21,23,25,26,28,29,35,36,37,38 +V5AUX 17,22,24,27,28,29,32,33,34,35,36 +VDC 22,28,30,32,33,34,35,37,38,39 +V3.3AUX 5,13,14,15,16,17,21,22,24,25,27,28,29,30,31,32,34,35 VLDT_PWRGD_5V FB75 42 BLON_PWM 2 R243 4.7K Q14 BSS138 3 2 14,27,28,38 IMVP_OK 3 120ohm/100MHz,1A 33 R460 27 AUO_E-Color_EN 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 0 I2C_CLK I2C_DATA FB7 120ohm/100MHz,1A 33 BKLT_PWM ns R250 100K +VDC FB12 1000pF/50V,X7R 3FB8 C242 R252 Q19 BSS138 1N4148WS D44 UMA 3 4.7K 22,27 LIDSW# 14 SUS_STAT# 27 HW_OFF_BKLT# R714 R260 0 R261 0 ns FB11 120ohm/100MHz,1A BKLT_ON LIGHT_ON 4.7K R259 100K 1000pF/50V,X7R ns ns C246 D5 1N4148WS D6 1N4148WS 10uF/25V,X5R ns 1K Q20 2N7002K 1 4 1 15 USB_PP5 15 USB_PN5 ns +V3.3AUX FB9 LEDVDD BKLT_PWM BKLT_ON D+ D- ECR_EN 27 3 2 C D+ DUSBCAM_VCC ns L4S2012 120ohm/100MHz,1A FB0603 C245 10UF/6.3V,X5R C0805 FB10 120ohm/100MHz,1A FB0603 HONDA-LVCC40SFYG-40PIN HONDA OUT L GPU H IGP CHANEL A CHANEL B B_LCDCLK1+ B_LCDCLK1- B B_LCD2+ B_LCD2- R253 0 R254 0 CHK5 90ohm@100MHz,0.5A +V5AUX ns LVDS_SEL# B_LCD1+ B_LCD1- ns 4.7K ns 2 R258 USBCAM_VCC 0.1uF/25V,X7R 3 R256 100K 1 DGPU LCDCLK1LCDCLK1+ C244 ns 2 15 L_BKLT_EN D45 LCD2LCD2+ 500mA B_LCDCLK1+ B_LCDCLK1B_LCD0+ B_LCD0- R255 20K ns R257 1N4148WS 0 FB0805 ns C243 1000pF/50V,X7R ns +V3.3S VLDT_PWRGD_5V SOT23 1 R251 20K ns 42 GPIO7_BLON LCD1LCD1+ LEDVDD Q18 AO3415 2 C LCD0LCD0+ 0 FB0805 C241 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 R486 15 L_BKLT_CTRL ACES 88242-40xx R299 27 TTL_ADJ LCDCON1 Panel CON. 2x20Pin LCD2X20_1P0 LCDCLK1+ LCDCLK1- R262 R459 0 0 DGPU DGPU LCD0+ LCD0- R491 R492 0 0 DGPU DGPU LCD1+ LCD1- R493 R494 0 0 DGPU DGPU LCD2+ LCD2- R495 R496 0 0 DGPU DGPU TXCLK_L+ 42 TXCLK_L- 42 TXOUT_L0+ 42 TXOUT_L0- 42 TXOUT_L1+ 42 TXOUT_L1- 42 LVDSB_CLK 15 LVDSB_CLK_L 15 B_LCD0+ B_LCD0- LVDSB_DATA0 15 LVDSB_DATA0_L 15 B_LCD1+ B_LCD1- LVDSB_DATA1 15 LVDSB_DATA1_L 15 B_LCD2+ B_LCD2- LVDSB_DATA2 15 LVDSB_DATA2_L 15 B TXOUT_L2+ 42 TXOUT_L2- 42 LCDCLK1+ LCDCLK1- R497 R498 0 0 UMA UMA LVDSA_CLK 15 LVDSA_CLK_L 15 LCD0+ LCD0- R499 R500 0 0 UMA UMA LVDSA_DATA0 15 LVDSA_DATA0_L 15 LCD1+ LCD1- R501 R502 0 0 UMA UMA LVDSA_DATA1 15 LVDSA_DATA1_L 15 LCD2+ LCD2- R503 R504 0 0 UMA UMA LVDSA_DATA2 15 LVDSA_DATA2_L 15 A A I2C_DATA 15 LVDS_DDC_DATA 15 LVDS_DDC_CLK R506 0 UMA R507 0 DGPU R505 0 UMA R508 0 DGPU SDA_LVDS 42 SCL_LVDS 42 CZC Technology I2C_CLK zw Title Panel &VGA connect Size Custom Date: 5 4 3 2 Project Name Rev C R48 Thursday, April 22, 2010 1 Sheet 19 of 56 5 4 3 2 1 VSYNC# 15 CRT_VSYNC RGB_SEL# OUT L GPU H IGP 15 CRT_HSYNC R510 0 UMA R511 0 DGPU R509 0 UMA R512 0 DGPU VSYNC_DAC1 42,48 HSYNC_DAC1 42,48 42 R_DAC1 15 CRT_RED HSYNC# 42 G_DAC1 15 CRT_GREEN D 42 B_DAC1 15 CRT_BLUE R519 R518 0 0 DGPU UMA R R521 R520 0 0 DGPU UMA G R523 R522 0 0 DGPU UMA B D DAC_SDAT 15 CRT_DDC_DATA 15 CRT_DDC_CLK R514 0 UMA R515 0 DGPU R513 0 UMA R516 0 DGPU DDC6DATA 42 DDC6CLK 42 DAC_SCL +V3.3S R264 10K +5VCRT C D10 BAT54SPT 2 RED_1 D11 BAT54SPT 2 GREEN_1 3 3 1 GND_CRT 1 BAT54C 2 1.1A 3 1 GND_CRT FB15 220ohm/100MHz,2A R267 100K C260 0.1uF/16V,X7R GND_CRT L8 82nH/100Mhz RED_1 G L9 82nH/100Mhz GREEN_1 B L10 82nH/100Mhz BLUE_1 C261 R270 150,1% R271 150,1% C262 C263 10pF/50V,NPO10pF/50V,NPO10pF/50V,NPO C264 C265 C266 10pF/50V,NPO 10pF/50V,NPO 10pF/50V,NPO R265 4.7K 6 1 7 2 8 3 9 4 10 5 D66 1N4148WS 1N4148WS D65 3 GND_CRT GND R GND NC SDA G GND HSYNC B NC NC VSYNC GND GND 16 CLK 11 R268 12 +V3.3S 2 D12 3 BAT54SPT 1 GND_CRT 1 0 GND_CRT SPDAT1_5V R0402_0 D14 BAT54SPT D15 BAT54SPT 2 B U11 1 OE# VSYNC# 2 A 3 GND C267 VCC 5 Y 4 HSYNC# 2 3 3 R272 15 0 R0402_0 shell dsub15C-F VGA2F15H12IN_REV_NB SPCLK1_5V CRT_VS Y DAC_SCL 2 2 GND_CRT B R273 1 GND_CRT R274 27 CRT_VS_1 R275 27 CRT_HS_1 0 ns GND_CRT +5VCRT C268 0.1uF/16V,X7R GND_CRT H24 BOSS MH24X40X80 ns A GND 3 Q22 2N7002K GND_CRT 3 1 DAC_SDAT 2 Q21 2N7002K 14 GND_CRT 74AHCT1G125 U12 1 OE# VCC 5 GND_CRT 0.1uF/16V,X7R 3 13 +5VCRT +5VCRT R266 4.7K D13 BAT54SPT 2 VGA1 shell GND_CRT C +5VCRT 1 R R269 150,1% CRT_DET# 27 3 FS1206 GND_CRT 0 2 F2 1 2 BLUE_1 R406 17 D9 BAT54SPT +5VCRT D8 1 +V5S 1 +5VCRT CRT_HS 4 C269 C270 10pF/50V,NPO 10pF/50V,NPO 1 GND_CRT 1 74AHCT1G125 GND_CRT GND_CRT A A +V3.3S +V5S 14,15,16,17,18,19,21,23,25,26,28,29,35,36,37,38 +V3.3S 5,9,10,11,12,13,14,15,16,17,18,19,21,22,24,25,27,28,29,34,35,36,37,38,48 CZC Technology zw Title Panel &VGA connect Size Custom Date: 5 4 3 2 Project Name Rev C R48 Thursday, April 22, 2010 1 Sheet 20 of 56 5 4 3 2 1 +V3.3Aux +VDC +VDC 19,22,28,30,32,33,34,35,37,38,39 +V3.3S +V3.3S 5,9,10,11,12,13,14,15,16,17,18,19,20,22,24,25,27,28,29,34,35,36,37,38,48 +V5S +V3.3AUX C PCIE1_H1 Cu Boss for MiniPCIE H5.6 PETN0 PETP0 PERN0 PERP0 TP28 17 19 37 39 41 43 45 47 49 51 RESERVED0 RESERVED1 RESERVED_PCIE0 RESERVED_PCIE1 RESERVED_PCIE2 RESERVED_PCIE3 RESERVED_PCIE4 RESERVED_PCIE5 RESERVED_PCIE6 RESERVED_PCIE7 TP29 TP30 TP31 TP32 TP33 8 10 12 14 16 RESERVED_SIM4 RESERVED_SIM3 RESERVED_SIM2 RESERVED_SIM1 RESERVED_SIM0 CHANNEL_CLK CHANNEL_DATA RESERVED_DISABLE 14 SMB_DATA_A 14,22,24 SMB_CLK_A 14,22,24 5 3 HW_RATIO_OFF_WLAN# R278 20 14 CLK_PCIE_MINICARD2_L 14 CLK_PCIE_MINICARD2 14 PCIE_TXN2 14 PCIE_TXP2 14 PCIE_RXN2 14 PCIE_RXP2 HW_RATIO_OFF# 27,29 1K +V3.3S R454 SIM_VCC SIM_DAT0 SIM_CLK SIM_RESET 10K CLK_MINICARD1_OE_L 48 28 6 24 +1.5V0 +1.5V1 1.5V USB_DUSB_D+ +3.3VAUX1 36 38 90ohm@100MHz,0.5A CHK9 11 13 REFCLKREFCLK+ 31 33 PETN0 PETP0 23 25 PERN0 PERP0 17 19 37 39 41 43 45 47 49 51 RESERVED0/UIM_C8 RESERVED1/UIM_C4 GND15 +3.3VAux2 +3.3VAux3 GND16 RESERVED0 RESERVED1 RESERVED2 RESERVED3 8 10 12 14 16 UIM_PWR UIM_DATA UIM_CLK UIM_RESET UIM_VPP SMB_DATA SMB_CLK 32 30 COEX2 COEX1 W_DISABLE# R290 0 ns WIRELESS_LED# R287 R288 0 3G 0 ns TP63 PLT_RST_L PCIE_WAKE# CLK_MINICARD2_OE_L R457 R458 0 ns 0 ns 14 SMB_DATA_A 14,22,24 SMB_CLK_A 14,22,24 5 3 20 HW_RATIO_OFF_3G#R291 0 HW_RATIO_OFF#2 27 +V3.3S 3GPCIE1_H1 Cu Boss for MiniPCIE 2*3mm C R455 10K 9 15 21 27 29 35 4 18 26 34 40 50 53 54 C277 0.1uF/16V,X7R PERST# WAKE# CLKREQ# 22 1 7 CLK_MINICARD2_OE_L 55 C276 0.1uF/16V,X7R 9 15 21 27 29 35 4 18 26 34 40 50 53 54 C275 4.7uF/10V,X5R PLT_RST_L 15,22,24 PCIE_WAKE# 14,22,24 CLK_MINICARD1_OE_L ns 4 1 VCC_pcie GND0 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 +V1.5S 32 30 0 ns TP25 3 2 3G GND14 TP26 TP27 3V3_PCIE SMB_DATA SMB_CLK REFCLKREFCLK+ R300 15 USB_PN1 15 USB_PP1 WIRELESS_LED# 29 55 23 25 14 PCIE_RXN1 14 PCIE_RXP1 PERST# WAKE# CLKREQ# 22 1 7 TP24 3GPCIE1 PCIE MINI CARD minipcieh56 3G LED_WPAN# 46 LED_WLAN# 44 LED_WWAN# 42 PCIE mini Card V1.2 31 33 14 PCIE_TXN1 14 PCIE_TXP1 46 44 42 GND14 11 13 14 CLK_PCIE_MINICARD1_L 14 CLK_PCIE_MINICARD1 L4S2012 LED_WPAN# LED_WLAN# LED_WWAN# GND0 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 90ohm@100MHz,0.5A CHK6 0 3G 0 3G 2 52 48 28 6 USB_DUSB_D+ D VCC_pcie R716 R717 +1.5V0 +1.5V1 +1.5V2 36 38 +V1.5S Debug Card ns 4 1 100ohm/100MHz,3A+V3.3S FB0603 ns 100ohm/100MHz,3A FB0603 3G +V1.5S 7,16,22,28,35,36 3.3VAux0 +3.3VAUX +V1.5S +3.3V0 +3.3V1 L4S2012 3 2 15 USB_PN0 15 USB_PP0 100ohm/100MHz,3A FB0603 3V3_PCIE PCIE1 PCIE MINI CARD MINIPCIEH56_S 2 52 0 0 24 FB17 R276 R277 FB21 +V3.3AUX 5,13,14,15,16,17,19,22,24,25,27,28,29,30,31,32,34,35 +V1.5S 100ohm/100MHz,3A FB0603 ns +3.3VAUX D FB16 +V5S 14,15,16,17,18,19,20,23,25,26,28,29,35,36,37,38 +V3.3AUX PCIE mini Card +V3.3S FB20 3V3_PCIE C271 4.7uF/10V,X5R 13,27 LPC_AD0 13,27 LPC_AD1 13,27 LPC_AD2 13,27 LPC_AD3 13,27 LPC_FRAME# +V5S 15 CLK_PCIF_PORT80 13,27 INT_SERIRQ SERIRQ C272 4.7uF/10V,X5R C290 0.1uF/16V,X7R 3G 10K 3G SIM_DAT0 C291 0.1uF/16V,X7R 3G C292 100pF/50V,NPO 3G B SIMREADER1 SIMreader SIM9H19 3G Q31 SOT23 2N7002K SIM_VCC 1 R476 1K VCC_pcie +V3.3AUX C293 C294 C295 C296 C297 10UF/6.3V,X5R 10UF/6.3V,X5R 0.1uF/16V,X7R0.1uF/16V,X7R0.1uF/16V,X7R 3G 3G 3G 3G 3G SIM_RESET SIM_CLK SIM_DAT0 R478 4.7K 3 15 CLK_PCIF_PORT80 R289 Q32 SOT23 2N7002K 3 1K 3G_SWITCH 2 C621 0.1uF/16V,X7R 1 R477 27,29 BT_ON R479 100K GSLECT1 DIP LSSM12 SWS3D35X95 2 1 +V1.5S C401 4.7uF/10V,X5R 3G C278 0.1uF/16V,X7R 3G 1 SIM_VCC 4 SIM_VPP 3 5 6 7 8 9 SIM_RST SIM_CLK SIM_IO SIM_DAT0 SIM_MCMD SIM_CDDETECT 2 10 11 12 13 C279 0.1uF/16V,X7R 3G SIM_GND0 SIM_GND1 SIM_GND2 SIM_GND3 SIM_GND4 A 3 13,27 LPC_AD0 13,27 LPC_AD1 13,27 LPC_AD2 13,27 LPC_AD3 13,27 LPC_FRAME# 15,27 LPC_RST# 10 9 8 7 6 5 4 3 2 1 SIM_VCC SIM_RESET HW_RATIO_OFF_WLAN# LPC_DEBUG1 FPC10 1.0mm FPC10_1p0rt LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# ns 6 5 4 11 12 11 12 Q33 SOT23 2N7002K 1 R481 1K CZC Technology 2 A IN1 IN4 GND1GND2 IN2 IN3 SC89_6 HW_RATIO_OFF_3G# 10 9 8 7 6 5 4 3 2 1 SIM_DAT0 U15 uclamp0504a 1 2 3 Aces 88511-12XX Pitch 0.5mm Easy on FPC ns +V3.3S SIM_CLK C273 0.1uF/16V,X7R 3 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_RST# LPCDBG1 88511-12XX FPCE12_P5R 1 1 2 2 3 3 13 13 4 4 5 5 6 6 7 7 8 8 9 9 10 1014 14 11 11 12 12 2 +V3.3S B C274 0.1uF/16V,X7R zw Title Panel &VGA connect Size Custom MB pin10----DB pin1 Date: 5 4 3 2 Project Name Rev C R48 Thursday, April 22, 2010 1 Sheet 21 of 56 5 4 C280 0.1uF/16V,X7R C281 0.1uF/16V,X7R newcard C282 0.1uF/16V,X7R newcard newcard newcard 14,27,28,36 SLP_S3# D16 EXP_OC# D17 1N4148WS newcard 1N4148WS EXPRESS_RST# newcard R284 0 ns 15,21,24 PLT_RST_L RCLKEN EXP_OC# EXP_3.3V 3.3Vauxout 15 EXP_AUX_3.3V EXP_OC# 1.5Vout1 1.5Vout2 11 13 EXP_1.5V NEW_CARD_CLKREQ# 8 EXP_RST# 10 EXP_CPPE# 9 CP_USB# 1.5Vin1 1.5Vin2 3.3Vout1 3.3Vout2 3.3Vin1 3.3Vin2 3.3Vauxin 1 STBY# PERST# 20 SHDN# CPPE# 6 16 18 19 SYSRST# NC RCLKEN OC# R280 100K R0402 R281 100K R0402 +VDC 19,28,30,32,33,34,35,37,38,39 BT_CN1 88511-12XX FPCE12_P5R 1 1 2 2 13 13 3 3 4 4 5 5 6 6 7 7 8 8 9 9 14 1410 10 11 11 12 12 R282 10K R0402 newcard newcard CP_USB# 3 5 2 4 17 14,27,28,29 SLP_S4# U13 OZ27C10LN QFN20_P5 12 14 D +V3.3S +V5S 14,15,16,17,18,19,20,21,23,25,26,28,29,35,36,37,38 +V3.3S 5,9,10,11,12,13,14,15,16,17,18,19,20,21,24,25,27,28,29,34,35,36,37,38,48 +V1.5S 7,16,21,28,35,36 +V3.3AUX 5,13,14,15,16,17,19,21,24,25,27,28,29,30,31,32,34,35 R279 +V5AUX 17,19,24,27,28,29,32,33,34,35,36 100K R0402 ns +V1.5S 1 CPUSB# EXP_CPPE# +V3.3S C283 0.1uF/16V,X7R newcard 1 7 21 GND1 PAD PLT_RST_L VCC 4 2 USB_CN1 88502-26xx fpce26_1p0r 26 26 25 25 24 24 23 23 22 22 21 21 20 20 19 19 28 28 18 18 17 17 16 16 15 15 14 14 13 13 27 27 12 12 11 11 10 10 9 9 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 MYLAR1 MYLAR newcard J3 PCI-EXP NEWCARD_STD 14 PCIE_TXN2_EXPRESS 24 PETn0 14 PCIE_RXP2_EXPRESS 22 PERp0 14 PCIE_RXN2_EXPRESS 21 PERn0 14 GPP_CLK2_P 19 REFCLK+ 14 GPP_CLK2_N 18 REFCLK- 17 CPPE# 13 PERST# 27 EXP_CPPE# EXP_CPPE# EXP_RST# 11 14,21,24 PCIE_WAKE# 14,21,24 SMB_DATA_A CP_USB# 4 2 D18 EGA1-0603-V05 ESDPAD_R0603 newcard SMB_DATA 7 SMB_CLK 4 CPUSB# 3 USB_D+ USB- 2 USB_D- D19 EGA1-0603-V05 ESDPAD_R0603 newcard 8 USB+ CHK7 L4S2012 90ohm@100MHz,0.5A 1 B 2 3 0 ns 0 newcard newcard 1 1 15 USB_PP2 15 USB_PN2 R285 R286 2 14,21,24 SMB_CLK_A WAKE# PVC NEW_CARD_CLKREQ# 16 CLKREQ# Q23 32N7002K 2 EXPRESS CARD1 Shield 6 RESV1 EXP_3.3V 5 RESV2 +3.3VS_2 15 +3.3VS_1 14 GND0 26 +3.3VAUX 12 GND1 23 C284 ns EXPRESS_CLKREQ# 14 newcard 1 14 PCIE_TXP2_EXPRESS newcard PETp0 newcard RCLKEN C285 10UF/6.3V,X5R ns 0.1uF/16V,X7R newcard EXP_AUX_3.3V C286 0.1uF/16V,X7R C287 10UF/6.3V,X5R ns newcard EXPRESSCARD_SCREW1 EXPRESSCARD_SCREW2 screw 2*3mm screw 2*3mm 10 9 GND2 GND3 20 1 G1 G2 G3 G4 27 28 29 30 D VUSB1 VUSB2 SATA_RXN2 13 SATA_RXP2 13 C SATA_TXN2 13 SATA_TXP2 13 USB_PP7 15 USB_PN7 15 USB_PP6 15 USB_PN6 15 MB_MIC1_L 25 MB_MIC1_R 25 MIC1_JD 25 GND_AUD MB_LINEOUT_L 25 MB_LINEOUT_R 25 HP_JD 25 88502 ACES EXP_1.5V +1.5V_1 +1.5V_2 LIDSW# 19,27 QKEY1 27 GPU_LED 27 SLIDE_INTR# 27 EC_SMB1_DAT 9,14,27 EC_SMB1_CLK 9,14,27 EXPRESS_RST# newcard 25 PWRSWVCC_MBXP 30,32 +V3.3AUX PWR_LED 27 SLP_LED 27 GND U14 SOT23_5 SN74AHC1G08DBV C Iac_P_R 88511 ACES 5 +V3.3S 2 +V3.3AUX 3 +V3.3AUX 3 +V5AUX C288 0.1uF/16V,X7R C289 newcard10UF/6.3V,X5R ns newcard C421 0.1uF/16V,X7R U36 6 IN newcard R480 470K B OUT ILIM USB_OC# 3 FAULT# GND EN 4 EN PAD C1269 1000pF/50V,X7R TPS2553 1CH4110C-SY+1CX42201-SY Foxconn 1 VUSB1 2 R475 5 7 20K C451 0.1uF/16V,X7R +V5AUX C424 0.1uF/16V,X7R R483 470K A Iac_P_R R283 +V3.3AUX PWRSWVCC_MBXP 30,32 PWR_LEDSLP_LED- 0 ns 0 USB_OC# EN BT_R16 1K R0402 BT_Q5 2N7002K 1 BT_Q4 2N7002K SOT23 1 2 2 Wafer6P10 PWRBTN_CN hws6_1p0r BT_R17 1uF/10V,X5R R0402 4 3 3 4 ILIM FAULT# GND EN PAD OUT VUSB2 1 2 R482 5 7 20K C422 0.1uF/16V,X7R C423 0.1uF/16V,X7R ns BT_R18 1K R0402 A SLP_LED 27 ns SOT23 ns CZC Technology BT_R19 1uF/10V,X5R R0402 ns zw Title Roll wheel board Size A3 Date: 5 IN TPS2553 PWR_LED- 27 PWR_LED 8 R1138 R1139 SLP_LED- 20K 3 6 5 4 3 2 1 15 USB_OC_L3 14,27,28,29 SLP_S4# +VDC 3 7 87213-xxx0x-x Aces U37 6 2 Project Name Rev C R48 Thursday, April 22, 2010 Sheet 1 22 of 56 5 +V5S +V3.3S 4 3 2 1 +V5S 14,15,16,17,18,19,20,21,25,26,28,29,35,36,37,38 +V3.3S 5,9,10,11,12,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48 C16619 SATA1 D S2 S3 TX TX# C298 0.01uF/25V,X7R C299 0.01uF/25V,X7R S5 S6 RX# RX ns V3.3_SATA P1 P2 P3 VCC3_0 VCC3_1 VCC3_2 P7 P8 P9 P11 VCC5_0 VCC5_1 VCC5_2 RESVE P13 P14 P15 VCC12_0 VCC12_1 VCC12_2 13 SATA_TXP0 13 SATA_TXN0 13 SATA_RXN0 13 SATA_RXP0 T1 +V5S V_HDD0 FB24 Average 1A,Peak 1.5A V_HDD0 100ohm/100MHz,3A C300 C301 C302 FB0603 4.7uF/10V,X5R 4.7uF/10V,X5R0.1uF/16V,X7R C0603 C0603 C0402 C C303 0.1uF/16V,X7R C0402 D S1 S4 S7 GND3 GND4 GND5 P4 P5 P6 GND6 GND7 P10 P12 1 2 NC0 NC1 SATACN SATA22R_REV 10 9 8 7 6 SATA_RXN1 C420 0.01uF/25V,X7R ns 5 SATA_RXP1 C425 0.01uF/25V,X7R ns 4 V_HDD1 3 2 1 SATA_TXP1R721 SATA_TXN1R722 +V5S 0 ns 0 ns ACES 88502 Average 1A,Peak 1.8A C FFC 1x10 SATA2 VerB: ADD HDD2 Option FB25 GND0 GND1 GND2 10 9 8 12 7 6 5 4 3 11 2 1 ns 12 11 fpce10_1p0r V_HDD1 B 100ohm/100MHz,3A C304 C305 C306 FB0603 4.7uF/10V,X5R 4.7uF/10V,X5R 0.1uF/16V,X7R C0603 C0603 C0402 B C307 0.1uF/16V,X7R C0402 R723 R724 13 SATA_TXP1 13 SATA_TXN1 13 SATA_RXN1 13 SATA_RXP1 T2 ns 0 0 ODDCN1 S2 S3 TX TX# C308 0.01uF/25V,X7R C309 0.01uF/25V,X7R S5 S6 RX# RX Device_present P1 P2 P3 DP VCC5_1 VCC5_2 V_HDD1 1 NC0 GND0 GND1 GND2 S1 S4 S7 MD GND4 GND5 P4 P5 P6 NC1 2 ODD_SATA CONN LN21133-D407-9F SATAS13RIN_REV A A CZC Technology zw Title SATA HDD ODD Size A4 Date: 5 4 3 2 Project Name Rev C R48 Thursday, April 22, 2010 Sheet 1 23 of 56 5 4 3 2 1 +V3.3AUX AR8131/M, 8121 GigaBit Lan AR8132/M, 8114 10M/100M Lan +V3.3S +V3.3S Close to U26 49 48 47 DVDDL 46 DVDDL 45 PCIE_TXN1_LAN 44 PCIE_TXP1_LAN 43 AVDDVCO2 42 0.1uF/16V,X7R CLK_PCIE_LAN 41 C1236 0.1uF/16V,X7R CLK_PCIE_LAN# 40 C1235 AVDDL 39 PCIE_RXP1_LANR 38 PCIE_RXN1_LANR 37 Pin Name: D 1) name_AR8131M&8132M/AR8121&8114 2) One name denotes the two names are the same. 0 R0603 ns LX/VDD18O L31 4.7uH/260mA C1229 10UF/6.3V,X5R Pin1 C1230 C1280 0.1uF/16V,X7R 10UF/6.3V,X5R ns R1103 AVDD_CEN/AVDDH R1165 0 R0603 Pin6 ns 220ohm/100MHz,2A FB0603 U65 Layout: Place near to 8102E 0.1uF/16V,X7R PCIE_RXP1_LANR C1227 0.1uF/16V,X7R PCIE_RXN1_LANR C1228 0.1uF/16V,X7R 14 PCIE_RXP6_LAN C681, C670 close to Pin2 14 PCIE_RXN6_LAN PCIE_TXN1_LAN PCIE_TXP1_LAN 14 PCIE_TXN6_LAN 14 PCIE_TXP6_LAN D CLK_PCIE_LAN# CLK_PCIE_LAN 14 CLK_PCIE_LAN_L 14 CLK_PCIE_LAN PCIE_WAKE# 14,21,22 PCIE_WAKE# 15,21,22 PLT_RST_L 14 CLK_PCIE_LAN_REQ_L GND LED_LINK10_100n LED_ACTn DVDD_REG/DVDDL1 DVDD_REG/DVDDL2 RX_N RX_P AVDDL2 REFCLKP REFCLKN AVDDL1 TX_P TX_N C1234 C1232 10UF/6.3V,X5R0.1uF/16V,X7R 1uF/10V,X5R 5.1K Interface with motherboard C1231 FB98 +V5AUX 17,19,22,27,28,29,32,33,34,35,36 VCC_3.3V 220ohm/100MHz,2A FB0603 C1233 ns AVDD_CEN +V3.3AUX +V3.3S 5,9,10,11,12,13,14,15,16,17,18,19,20,21,22,25,27,28,29,34,35,36,37,38,48 +V5AUX VCC_3.3V FB97 For AR8131/M, 8132/M: C675=1uF For AR8121/8114: C675=0.1uF For AR8131/M, 8132/M: remove R348, C325. C337=0.1uF For AR8121/8114: remove L9, C306, R322. C337=1uF. C325 close to Pin1 R1101 +V3.3AUX 5,13,14,15,16,17,19,21,22,25,27,28,29,30,31,32,34,35 R1102 0 R1104 0 SMBCLK SMBDATA R1105 R1133 RSTn LAN_CLKREQ# 0 ns 0 ns EXT_25/48 SMB_CLK_A 14,21,22 SMB_DATA_A 14,21,22 EXT_25/48 12 C683 close to Pin30 For AR8131/8132: Remove C683 VCC_3.3V 0 AVDDH Pin15 8131M/8132M/8121/8114 qfn48_p4 C1245 0.1uF/16V,X7R For AR8121/8114 : Remove R336 For AR8131/M, 8132/M Input 25M: Remove R336, C339 For AR8131/M, 8132/M Input 48M: Stuff R336. Remove C339 C1246 0.1uF/16V,X7R 49.9,1% 49.9,1% 49.9,1% 49.9,1% 49.9,1% 49.9,1% 49.9,1% 49.9,1% C1247 0.1uF/16V,X7R For AR8132/M and AR8114: R549,R550,R551,R554,C731 and C732 can be removed. 25MHz Crystal 4.7K ns CLKREQn/PNP_PWR_SEL RSTn R1118 4.7K ns VCC_3.3V AVDDL PCIE_WAKE# R1119 4.7K ns VCC_3.3V C1242 0.1uF/16V,X7R ns U66 1 2 3 4 R6,R8,R13 and R14 are pull-up resistors, which might not be necessary due to existence on motherboard. C1249 18pF/50V,NPO C1253 DVDDL C1255 C1256 C1257 C1258 C1259 C1260 AVDDL 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 1uF/10V,X5R 0.1uF/16V,X7R C1261 C1262 C1263 C1264 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R BLM15AG100SN1 FB99 300ohm/100MHz,1A ns 0 R0603 ns C1252 C1251 1000pF/50V,X7R V_DAC MDI2MDI3+ V_DAC MDI3- 0.1uF/16V,X7R C416 C415 3 5 TD11CT:1CT TD2+ MC1MX2+ 22 20 4 TCT2 MCT2 21 6 8 TD21CT:1CT TD3+ MX2MX3+ 19 17 7 TCT3 MCT3 18 9 11 TD31CT:1CT TD4+ MX3MX4+ 16 14 10 TCT4 MCT4 15 12 TD4- MX4- 13 C418 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R U17 RJ45_MDI0+ RJ45_MDI0RJ45_MDI1+ MDI0- RJ45_MDI1RJ45_MDI2+ RJ45_MDI2RJ45_MDI3+ RJ45_MDI3- R294 75 N4 N3 N2 N1 5 4 RJ45_MDI0- 9 TD- TX- 8 TDC CMT 6 MDI0+ 10 TD+ TX+ 7 RJ45_MDI0+ MDI1- 15 RD- RX- 2 RJ45_MDI1- 14 RDC RXC 3 RD+ RX+ 1 MDI1+ 16 C414 0.1uF/16V,X7R R295 75 13 12 11 V_DAC R296 75 H16101ME TFS16_1p27 ns R228 75 87213-xxx0x-x ACES If overclocking, R332, FB75 stuffed and R330 removed. If not overclocking, R330, FB75 stuffed and R332 removed. For AR8131/M, AR8132/M: FB75 can be 0 ohm +V5AUX RJ45_MDI1+ R298 75 ns 15 14 13 12 11 10 RJ45_MDI39 RJ45_MDI3+ 8 RJ45_MDI27 RJ45_MDI2+ 6 RJ45_MDI15 RJ45_MDI1+ 4 RJ45_MDI03 RJ45_MDI0+ 2 SMH_SPLANE 1 15 USB_PN11 15 USB_PP11 R297 75 ns SMH_SPLANE TRAN24_1P27 A RJCN1 Wafer15P1 hws15_1p0r CZC Technology LAN Date: 4 zw Title SMH_SPLANE Size C 5 AVDDVCO2 17 24 MCT1 300ohm/100MHz,1A 16 MDI1MDI2+ 23 TCT1 1uF/10V,X5R C1265 1CT:1CT V_DAC LAN 1500VRMS 1CT:1CT TD1+ MX1+ 1 FB100 1CT:1CT MDI0MDI1+ 2 AVDDVCO1 0 R0603 2 4 n i P AVDD_CEN R1130 1 1 n i P C684, C685 close to Pin8 C1250 B DVDDL ns 10pF/50V,NPO MDI0+ C417 TWSI_SCL TWSI_SDA For AR8131M/8132M: R340=0 ohm. Remove U12, C301, R344. For AR8131/8132 eeprom application, reserve TWSI circuit. For AR8121/8114 : Remove C322 For AR8131/M, 8132/M intertnal clock: Remove C322 For AR8131/M, 8132/M external clock: Remove Y4, C687, C688 If the external clock is swing from 0 to 0.8V, EXT_25/48 can be connected to XTLI directly. U16 A 8 7 6 5 AT24C02N-10SU-2.7 ns R1129 V_DAC VCC WP SCL SDA R1116 0 AVDDH Pin6 AVDD_CEN/AVDDH R1120 0 R0603 ns For AR8131/M, AR8132/M: Remove R342 AVDDH C1254 1uF/10V,X5R 0.1uF/16V,X7R X2S50X32 EXT_25/48 A0 A1 A2 VSS R1114 4.7K ns For AR8131/M, 8132/M: remove FB74 25MHz,20pF ns LAN_CLKREQ# 0 TWSI 1 External clock R1109 For AR8121/8114: Pin27 power-on strapping (internal pull- up for input) If R341 and R343 are removed, Q1 collector connects 3.3V and remove R327. If R341 is removed ,and R343 is stuffed, Q1 collector connects 1.8V and remove R328. C XTLO XTLI Y11 ns R1121 R1122 R1123 R1124 R1125 R1126 R1127 R1128 C1244 0.1uF/16V,X7R Clock Resource C1248 18pF/50V,NPO R1115 For AR8121/8114: Remove R335 VCC_3.3V Close to LAN IC B AVDDH TRXP0 TRXN0 VDDHO AVDDL5 TRXP1 TRXN1 AVDDH1 TRXP2 TRXN2 AVDDL4 TRXP3 TRXN3 For AR8121/8114: remove C320, R339 Q7 close to Pin8 2 TESTMODE SMBDATA R1111 4.7K ns VCC_3.3V DVDDL SMBCLK TWSI_SDA C1241 0.1uF/16V,X7R TWSI_SCL C1267 0.1uF/16V,X7R DVDDL CLKREQn/PNP_PWR_SEL R1113 4.7K VCC_3.3V R1117 2.37K,1% For AR8131/M, 8132/M: option1: remove R328, R327, R349, R334, C302, C342, C311, Q7. option2: remove R328, R327, R349, R339, C302, C342, C311, Q7. AVDDL R1110 R0603 AVDDH 10UF/6.3V,X5R C AVDDL 36 35 34 33 32 31 30 29 28 27 26 25 MDI3+ MDI3- C1240 ns 0.1uF/16V,X7R 0.1uF/16V,X7R MDI2+ MDI2- C1239 ns Pin5 C1238 LX/VDD18O AVDDL3 VDD3V NC PERSTn TESTMODE AR8131M/AR8132M/AR8121/AR8114 SMDATA WAKEn VDD3V/CTR12 DVDDL2 VDD17/VDDHO SMCLK SEL_25M/VBG1P18 TWSI_DATA;TEST_PAD VDD11_REG/AVDDL TWSI_CLK;3.3V XTLO DVDDL1 XTLI CLKREQn/PNP_PWR_SEL AVDD_REG/AVDDL LED_LINK1000n RBIAS AVDDH2 MDI1+ MDI1- AVDDL SOT23 ns MMBT3904-F Q170HM772 PNP LX/VDD18O 1 VCC_3.3V 2 RSTn 3 PCIE_WAKE# 4 VCC_3.3V/CTR12 5 AVDD_CEN/AVDDH 6 SEL_25M/VREF R1112 4.7K 7 AVDDL 8 XTLO C1243 1000pF/50V,X7R 9 XTLI 10 AVDDVCO1 11 ns RBIAS 12 13 14 15 16 17 18 19 20 21 22 23 24 3 AVDDL VCC_3.3V/CTR12 AVDDH AVDDL 1 MDI0+ MDI0- R1107 0 R0603 ns R1108 10K ns 2 0.1uF/16V,X7R 0 ns s o r e h t A R1106 R0603 C1237 ns 3 2 Project Name Rev C R48 Thursday, April 22, 2010 1 Sheet 24 of 56 3 2 +V3.3S +V5S FB0603 VCC5CODEC C340 0.1uF/16V,X7R C0402 C341 10UF/6.3V,X5R C0805 TPC30 TP TP48 TPC30 TP TP47 D A_GPIO0 2 GPIO0 A_GPIO1 3 GPIO1 C342 C343 0.1uF/16V,X7R C0402 0.1uF/16V,X7R C0402 C344 220ohm/100MHz,2A 10UF/6.3V,X5R FB0603 C0805 Cross moat place C345 +V3.3S 0.1uF/16V,X7R C0402 35 AMP_OUT_L FRONT-OUT-R 36 AMP_OUT_R NC1 NC2 37 29 FRONT-OUT-L ns +V3.3AUX FB42 220ohm/100MHz,2A FB0603 ns GND_AUD AVDD1 AVDD2 ns VDD1 VDD2 1 9 C339 0.1uF/16V,X7R C0402 FB35 220ohm/100MHz,2A FB0603 10 FB26 220ohm/100MHz,2A 25 38 +V3.3S 1 +V3.3S 5,9,10,11,12,13,14,15,16,17,18,19,20,21,22,24,27,28,29,34,35,36,37,38,48 +V5S 14,15,16,17,18,19,20,21,23,26,28,29,35,36,37,38 +V3.3AUX 5,13,14,15,16,17,19,21,22,24,27,28,29,30,31,32,34,35 +V5S FB27 8 MDC_3V3 8 7 6 5 4 3 2 1 13 HDA_SDOUT 13 HDA_SYNC 13 HDA_SDIN1 13 HDA_RST_L C584 0.1uF/16V,X7R 13 HDA_BIT_CLK 8 7 6 5 4 3 2 1 1 C350 100pF/50V,NPO C0402 C349 1uF/10V,X5R C0402 R325 4.7K R0402 R327 R328 20K,1% R0402 All of JD resistors should be placed as close as possible to the sense pin of codec. 10K ns PC_Beep LINEOUT_L LINEOUT_R INT_MIC MIC1_R R380 33 R0402 JACK_DET_A MIC1_L MIC2_VREFO 28 MIC1_VREFO_L MIC2-VREFO 30 MIC2_VREFO LINE2-VREFO 31 4.7K R0402 C351 10UF/6.3V,X5R C0805 C352 10UF/6.3V,X5R C0805 C449 1uF/10V,X5R C0402 C450 1uF/10V,X5R C0402 C353 1uF/10V,X5R C0402 C354 1uF/10V,X5R C0402 8 INT_MIC FB22 220ohm/100MHz,2A FB0603 1 2 U20 ALC662 LQFP48_P5 SDIN MIC1-VREFO-R 32 NC5 33 PC-BEEP 13 Sense A Sense B 34 14 LINE2-L CEN-OUT 43 15 LINE2-R LFE-OUT 44 16 MIC2-L NC3 45 17 MIC2-R NC4 46 18 CD-L SPDIFI/EAPD 47 20 CD-R SPDIFO 48 21 MIC1-L 22 SURR-OUT-L 39 MIC1-R 23 JDREF 40 LINE1-L SURR-OUT-R 41 LINE1-R 4 7 + SDOUT 12 24 C SYNC MIC1 Microphone BZ_D6027 MDCCN1 88460-08XX HWS8_P8R D GND_AUD 9 27 MIC1-VREFO-L 5 R326 13 HDA_SDIN0 MIC1_JD VREF BITCLK 10 13 HDA_SYNC 13 HDA_SDOUT R324 4.7K R0402 REST# 6 AGND1 AGND2 R0402 C348 10UF/6.3V,X5R C0805 11 MIC1_VREFO_R JACK_DET_B R329 39.2K,1% R0402 HP_JD AMP_SHDW R334 20K,1% R0402 GND_AUD 26 42 75K 13 HDA_RST_L 13 HDA_BIT_CLK CD-GND R323 13 HDA_SPKR C347 1uF/10V,X5R C0402 PC_Beep R0402 GND1 GND2 51K 19 R321 27 BTL_BEEP P2 4 P1 ACES 87213-08xx 5 MIC1_VREFO_L R340 MIC1_VREFO_R R341 C317 C INPUT:STEREO MIC-IN OUTPUT:CENT/LFE onboard stereo microphone 2.2K R0402 2.2K R0402 100pF/50V,NPO GND_AUD +V3.3S MIC1_L R342 1K MIC1_R R343 1K FB29 FB30 MIC1_JD AMP_OUT_L AMP_L R335 51.1K,1% C455 1uF/10V,X5R GND_AUD GND_AUD ns HP_JD R348 22K ns LINEOUT_R MB_LINEOUT_R 22 AGCIN_L 26 27 25 AGCOUT_L Pre-charge_L 30 29 28 SP_INL 31 NC3 VREFSP 34 32 19 VSS_CP C362 2.2uF/6.3V,X7R 43 VDD_HP VCC_SPR 18 44 HP_INL SP_OUTR+2 17 45 HP_OUTL SP_OUTR+1 16 46 GND2 SP_OUTR_2 47 HP_OUTR SP_OUTR_1 20K GND_AUD 100pF/50V,NPO 10K 48 HP_INR HP_JD 22 R349 22K ns 33 VCC_SPL 42 R702 C1284 R701 20 +V3.3S GND_SPR GND_PAD FB32 GND_AUD -INTSPL C1037 100pF/50V,NPO +V5S +INTSPL VCC5CDC +INTSPR -INTSPR 15 C1038 100pF/50V,NPO C364 1uF/10V,X5R C0402 C365 1uF/10V,X5R C0402 FB33 220ohm/100MHz,2A FB0603 C372 4.7uF/10V,X5R C0603 14 13 GND_AUD GND_AUD 49 20,1% SP_OUTL+1 AGCIN_R R347 MB_LINEOUT_L 22 C2 AGCOUT_R HP_R 220ohm/100MHz,2A FB0603 220ohm/100MHz,2A FB0603 41 12 FB31 SP_OUTL+2 AGC_Lv1 20,1% 22 GND_CP 4.7uF/10V,X5R C1283 100pF/50V,NPO R704 20K GND_AUD 23 21 1 R346 SP_OUTL_1 C803 10K HP_L HP_R HP_L 24 40 Pre-charge_R R703 SP_OUTL_2 C1 GND_SPL 11 GND_AUD LINEOUT_L VCC_CP 39 10 GND_AUD 38 PREOUT_R 3 VDD_AMP C373 1uF/10V,X5R C0402 INPUT:STEREO MIC-IN OUTPUT:CENT/LFE B NC5 9 AGC_LV2 2 ns MIC1_JD 22 U46 AN12947A HQFP48_P5G 37 SP_INR 19 AGC_LV1 GND_AUD VCC5CDC NC4 16 6 15 1 11 13 20 21 VDD PVDD1 PVDD2 SHDWN# GND1 GND2 GAIN0 GND3 GND4 GAIN1 GND5 VCC 8 LINNC LIN+ GND1 BYPASS LOUT- 5 12 NC1 -INTSPL LOUT+ 10 NC0 +INTSPL 5 -INTSPR 4 0 ns R0402 C363 0.1uF/16V,X7R C0402 ns C374 1uF/10V,X5R C0402 1uF/10V,X5R 36 14 R350 C457 35 ROUT- Mute# C375 0.1uF/16V,X7R C0402 SP_STBY RIN+ C361 0.1uF/16V,X7R C0402 HP_STBY 7 C360 0.1uF/16V,X7R C802 C0402 4.7uF/10V,X5R C0603 4 GAIN1 +INTSPR AGC_Det GAIN0 18 AGC_Lv2 Mute# ROUT+ 3 B VDD_AMP FB0603 RIN- 9 ns MB_MIC1_R 22 Stereo Microphone Jack 10K,1% 680pF/25V,X7R GND_AUD 2 ns C459 C0603 R263 27K ns 0.47UF/25V,Y5V R0402 C460 0.47UF/25V,Y5V ns C0603 AMP_L GND_AUD U21 TPA6017A2 Tssop20_P65_4P4G 17 R356 C1035 FB28 220ohm/100MHz,2A PREOUT_L 1N4148WS ns SOD323 +V5S AMP_R R345 22K GND_AUD NC2 AMP_SHDW D26 R344 22K MB_MIC1_L 22 Mute# ns GND0 1N4148WS SOD323 8 D25 7 A_GPIO0 1N4148WS SOD323 6 D20 27 EC_AMP_Mute# R316 10K R0402 220ohm/100MHz,2A FB0603 220ohm/100MHz,2A FB0603 GND_AUD AGC_LV1 AGC_LV2 R330 10K R0402 GND_AUD C456 R396 R331 10K R0402 1uF/10V,X5R GND_AUD 100KC453 87213-xxx0x-x Aces C1036 6 R358 AMP_OUT_R 4 3 2 1 1uF/10V,X5R A 680pF/25V,X7R 2.2uF/6.3V,X7R +INTSPL -INTSPL +INTSPR -INTSPR Wafer4P125 SPEAKER1 hws4_1p0r AGC_LV1 AGC_LV2 GND_AUD C454 1uF/10V,X5R AGC_LV1 AGC_LV2 R332 10K R0402 ns R333 10K R0402 ns 5 A C452 0 0 1 0 1 0 1 1 AGC ON Level 9.8dBV 9.0dBV 8.1dBV 6.0dBV 10K,1% GND_AUD AMP_R R357 51.1K,1% Po Rl=4 2.0w 1.8w 1.5w 1.0w CZC Technology HD Audio-ALC883 Size A2 GND_AUD Date: 5 4 3 zw Title 2 Project Name Rev C R48 Thursday, April 22, 2010 1 Sheet 25 of 56 5 4 3 2 +V5S R718 R719 D 0 R0402_0 0 R0402_0 15 USB_PN3 15 USB_PP3 L4S2012 +V5S 14,15,16,17,18,19,20,21,23,25,28,29,35,36,37,38 +V3.3S CHK10 90ohm@100MHz,0.5A 2 1 3 4 1 +V3.3S 5,9,10,11,12,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48 U_DNA U_DPA D ns VCC5_USB VCC33 VCC_CARD XO U_DNA U_DPA 21 22 DD+ REXT 20 Rref C370 20pF/50V,NPO C0402 19 24 7 14 R354 12.1K,1% C371 20pF/50V,NPO C0402 2 4 5 3 SDWPD/MSBS MsInsZ 15 MSINSZ SdClk SdCmd 32 13 SDCLK SDCMD/D7 SdCdZ 8 GndA VssA Gnd1 Gnd2 UB6239_QFN32_AP Gpio NC2 NC1 SdData0 SdData1 SdData2 SdData3 MsData4 MsData5 MsData6 12MHz,20pF X2S R355 270K ns 10 VCC18 C368 4.7uF/10V,X5R VCC_CARD C367 1uF/10V,X5R C366 4.7uF/10V,X5R C458 0.1uF/16V,X7R SDCDZ 31 6 1 +V5S 30 29 27 25 28 26 12 2 33 1 SdWpd VCCPHY C GND_PAD Y9 CrdVcc XI 17 XO VCC33 Vcc18O 16 XI C Vcc5V LedZ ResetZ Vcc33O U22 11 9 VCC18 VccA VddA 18 23 VCCPHY QFN32_P5 CARD_D6 CARD_D5 CARD_D4 CARD_D3 CARD_D2 CARD_D1 CARD_D0 TP37 TP40 TP41 VCC5_USB FB39 300ohm/100MHz,1A C408 4.7uF/10V,X5R C0603 C369 4.7uF/10V,X5R C407 0.1uF/16V,X7R B B VCC_CARD CARDREADER MXP019-A0-603X cr19in3_rev 11 SD_VDD MS_VCC 4 9 21 17 SD_VSS1 SD_VSS3 SD_VSS2 MS_VSS1 MS_VSS2 16 2 SDCDZ SDWPD/MSBS SDCMD/D7 20 22 6 SD_CD SD_WP SD_CMD MS_INS MS_BS 8 15 MS_CLK_R 14 SD_CLK 18 19 1 3 SD_DAT0 SD_DAT1 SD_DAT2 SD_CD/DAT3 C411 0.1uF/16V,X7R C0402 VCC_CARD CARD_D0 CARD_D1 CARD_D2 CARD_D3 A MS_SCLK 5 MS_SDIO MS_DATA1 MS_DATA2 MS_DATA3 12 13 10 7 CD/WP/GND_SD2 CD/WP/GND_SD1 24 23 C410 0.1uF/16V,X7R C0402 ns C413 4.7uF/10V,X5R C0603 MSINSZ SDWPD/MSBS MS_CLK_R CARD_D0 CARD_D1 CARD_D2 CARD_D3 MS_CLK_R R472 33 R0402 A SDCLK C412 10pF/50V,NPO C0402 ns CZC Technology Title Cardreader SD/MMC/MS Resistors put near IC CAP put near Socket Size A3 Date: 5 4 3 2 Project Name Rev C R48 Sheet Thursday, April 22, 2010 1 26 of 56 5 4 3 2 1 +V3.3S R361 R362 R363 R364 R365 R366 R368 4.7K ns 4.7K ns 4.7K ns 4.7K ns 4.7K ns 10K 10K +V5S +V3.3AUX +V3.3S +V5AUX LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 LPC_FRAME# INT_SERIRQ PM_CLKRUN# ECVCC +V3.3AUX FB34 220ohm/100MHz,2A R367 0 R0603 AVCC C376 C377 C378 C379 C380 VDD C381 R369R370 ECVCC 0 1 C389 0.1uF/16V,X7R ns T8 81 20 CRT_DET# R392 R393 14 PWR_BTN# 30 PWRSW#_XP 19,22 LIDSW# 14,28,32,36 PM_RSMRST# 21,29 BT_ON 22 PWR_LED 29 CHG_LED ECVCC HOLD# SPI_CLK FWR# 1K 1K LIDSW# PM_RSMRST# R436 R398 1K 0 ns T10 18 HDMI_HPD_EC 21 HW_RATIO_OFF#2 BADDR0 TRIS# +V3.3S 1 Q25 2N7002K ns 2 EC Output Signal! EC_RCIN- 3 R402 +V3.3S 8 7 6 5 ECVCC HOLD# SPI_CLK FWR# HW_OFF_BKLT# 22 QKEY1 32KXCLKIN 32KXCLKO ns T11 25 EC_AMP_Mute# R400 R407 22 PWR_LED 28 FAN_V 0 21,29 HW_RATIO_OFF# 19 HW_OFF_BKLT# BIOS_CN1 H2X4KZ 2X4 2mm ns pwm out 25 BTL_BEEP 19 TTL_ADJ 0 ns 0 28 FAN_TACH 14 PM_BATLOW# 10K 2 16 A20M# 8 7 6 5 Q26 2N7002K ns 1 R720 1 2 3 4 3 R404 EC Output Signal! EC_A20GATE- R399 0 R401 R403 R451 0 0 0 1 2 16 SCI# 3 R408 GPIO84/HGPIO01/BADDR0 GPIO82/HGPIO00/TRIS# GPIO70 GPIO24/HGPIO01 114 GPIO16/HGPIO04 77 79 30 32KX1/32KCLKIN 32KX2 CLKOUT/GPIO55 62 118 32 63 31 117 B_PWM0/GPIO13 A_PWM1/GPIO21 A_PWM0 TB1/GPIO14/HGPIO04 TA1/GPIO56 TA2/GPIO20 31,48 BAT_DATA 31,48 BAT_CLK 9,14,22 EC_SMB1_DAT 9,14,22 EC_SMB1_CLK 68 67 69 70 GPIO62/SDA2 GPIO61/SCL2 SDA1 SCL1 FRD# FWR# 86 87 F_SDI F_SDO SPI_CS# 90 91 92 F_CS0# GPIO81 F_SCK 11 10 71 72 PSDAT2/GPIO27 PSCLK2/GPIO26 PSDAT1 PSCLK1 44 VCORF SPI_CLK R405 R473 R474 22 SLP_LED 22 GPU_LED 29 TPSDAT 29 TPSCLK 33 0 0 TPSDAT TPSCLK KBSDATA KBSCLK ECSCI# 0 ns C390 +V3.3S 1uF/10V,X5R 1 3 R410 PSCLK3/GPIO25 PSDAT3/GPIO12 12 13 MSCLK MSDATA AC_OFF ALWAYS_ON GPIO45 GPIO40 22 16 GPIO42/TCK GPIO43/TMS GPIO44/TDI GPIO46/TRST# GPIO50/TDO GPIO52/RDY# VCC_POR# 17 20 21 23 25 27 85 KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7 KBSOUT0/JENK# KBSOUT1/TCK KBSOUT2/TMS KBSOUT3/TDI KBSOUT4 KBSOUT5/TDO KBSOUT6/RDY# KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12/GPIO64 KBSOUT13/GPIO63 KBSOUT14/GPIO62 KBSOUT15/GPIO61/XOR_OUT KBSOUT16/GPIO60 KBSOUT17/GPIO57/HGPIO03 54 55 56 57 58 59 60 61 53 52 51 50 49 48 47 43 42 41 40 39 38 37 36 35 34 33 0 ns ECVCC PM_EXTTS#0_EC 5,9 BTL_LED 29 T5 EC_SMB1_CLK EC_SMB1_DAT BAT_DATA BAT_CLK QKEY1 ns LPC_RST# 15,21 CLK_LPC_KBC 15 LPC_FRAME# 13,21 LPC_AD0 13,21 LPC_AD1 13,21 LPC_AD2 13,21 LPC_AD3 13,21 T6 PM_CLKRUN# EC_RCINEC_A20GATEECSCI# EC_SMI# T7 ns INT_SERIRQ 13,21 PM_CLKRUN# 14 ns MAIN_PWROK 14,36 V11S_ON 34 VR_ON 28,38 BADDR1 MAIN_ON ns R397 GPIO47/JEN0# 0 R374 R375 R376 R377 R378 4.7K 4.7K 4.7K 4.7K 10K +V5AUX KBSCLK KBSDATA MSCLK MSDATA TPSCLK TPSDAT R387 R388 R389 R390 R391 R395 10K 10K 10K 10K 10K 10K CHA_OFF 39 AC_OFF 30 ALWAYS_ON 32 0 0 ns Panel_ID0 Panel_ID1 R422 R381 C BT_LED# 29 IMVP_OK 14,19,28,38 T12 ns 0 R453 ECR_EN 19 SUS_PWR_ACK_EC VCC_POR# 14 SCANIN0 SCANIN1 SCANIN2 SCANIN3 SCANIN4 SCANIN5 SCANIN6 SCANIN7 SCANOUT0 SCANOUT1 SCANOUT2 SCANOUT3 SCANOUT4 SCANOUT5 SCANOUT6 SCANOUT7 SCANOUT8 SCANOUT9 SCANOUT10 SCANOUT11 SCANOUT12 SCANOUT13 SCANOUT14 SCANOUT15 KBCON1 26 25 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 26 25 T33 ns T35 ns SCANIN0 SCANIN1 SCANIN2 SCANOUT0 SCANOUT1 SCANOUT2 SCANIN3 SCANOUT3 SCANOUT4 SCANOUT5 SCANOUT6 SCANOUT7 SCANOUT8 SCANIN4 SCANOUT9 SCANIN5 SCANIN6 SCANOUT10 SCANOUT11 SCANIN7 SCANOUT12 SCANOUT13 SCANOUT14 SCANOUT15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 B fpce24_1p0r 88502 Aces 0 R0402 0 20M 100K 100K 100K 100K R0402 R0402 R0402 R0402 ns IMVP_OK MAIN_ON V11S_ON V1_5_ON +V3.3AUX R416 4.7K PM_RSMRST# ECVCC R418 10K R0402 ns 5.6pF/50V,NPO 5.6pF/50V,NPO R419 10K R0402 ns Panel_ID0 Panel_ID1 R425 10K ns R420 10K R0402 ns R421 10K R0402 ns * R426 R427 R428 R429 R430 R431 R432 10K R0402 10K ns 10K 10K ns 10K 10K ns 10K ns R433 10K R0402 C1285 100pF/50V,NPO R434 10K R0402 R435 10K R0402 R423 Fuction P.M2 P.M1 P.M0 PCB_Mark0 PCB_Mark1 C392 3 Q29 1 2 GPIO47/JEN0# SCANOUT0 BADDR0 BADDR1 SHBM SCANOUT15 TRIS# 32KXCLKO R424 Y5 33K 32.768kHz,20ppm,12.5pF X4S67x15 1 4 2 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 88502-24xx EC OD output ECVCC C391 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO AC_PRESENT_EC 14,42 32KXCLKIN A C393 C400 C426 C427 C430 C431 C428 C429 C438 C439 C432 C433 C437 C436 C435 C434 C447 C448 C440 C441 C446 C445 C444 C443 AGND EC Output Signal! EC_SMI# R411 R412 R413 R415 R417 ns ns ns ns MAIN_ON 28,33,34,35,36 DRAMRST_CNTRL 5,8 V1_5_ON 33 R452 0 PM_EXTTS_DIMM 9 input Q28 2N7002K ns 2 EC_PWROFF# WPC8763L LQFP128_P4 AGND R409 16 LPC_SMI# AVCC VDD Reserved 19 46 76 88 115 112 110 73 6 GPIO32 GPIO33 19 AUO_E-Color_EN B GPIO77 GPIO76/SHBM GPIO75 65 66 0 EC Output Signal! ns GPIO01 GPIO03 GPIO06/HGPIO06 GPIO07/HGPIO07 GPIO23 GPIO30 GPIO31 R414 14 124 7 2 3 126 127 128 1 125 8 122 121 29 9 123 74 75 111 28 15 26 24 113 GPIO34 GPIO10/HGPIO00/LPCPD# LRESET# LCLK LFRAME# LAD0 LAD1 LAD2 LAD3 SERIRQ CLKRUN#/GPIO11/HGPIO02 KBRST# GA20 ECSCI# GPIO64/SMI# GPIO63/PWUREQ# GPIO71 GPIO72 SOUT_CR/GPIO83/BADDR1 GPIO53 GPIO36 GPIO51 GPIO47/JEN0# SIN_CR/GPIO87 SWD/GPIO66 29 CAPLOCK# 29 NUMLOCK# +V3.3S Q27 2N7002K ns output AGND 3 16 KB_RST# 1 2 3 4 64 95 93 94 119 109 120 84 83 82 SHBM C SPI_CS# FRD# WP# AD0/GPI90 AD1/GPI91 AD2/GPI92 AD3/GPI93 GPIO05 GPIO04 DA0/GPI94 DA1/GPI95 GPI96 GPI97 D 0.1uF/16V,X7R 5 18 45 78 89 116 2 1 2 3 4 HOLD# SPI_CLK FWR# 0 ns 0 0 0 ns 103 SPI_CS# FRD# WP# ns U25 W25X40BVSSIG SOP8_1P27_5P3 CE# VDD 8 SO HOLD# 7 WP# SCK 6 VSS SI 5 R386 10K R379 R382 R383 R384 VREF 97 98 99 100 108 96 101 105 106 107 0.1uF/16V,X7R C385 VDD 31 BATTEP_BATIN# 22 EXP_CPPE# 14,22,28,36 SLP_S3# 14,22,28,29 SLP_S4# 28 FAN_V 39 CC_SET 30 AC_IN 22 SLIDE_INTR# 104 C384 GND1 GND2 GND3 GND4 GND5 GND6 PCB_Mark0 PCB_Mark1 R394 R385 1 2 3 4 U24 C388 0.1uF/16V,X7R ECVCC 10K SPI_CS# FRD# WP# 0 VCC1 VCC2 VCC3 VCC4 VCC5 C386 0.01uF/25V,X7R SLP_S3# C387 0.01uF/25V,X7R SLP_S4# U23 W25X40BVSSIG SOIC8_1P27_3P9 CE# VDD 8 SO HOLD# 7 WP# SCK 6 VSS SI 5 R373 C383 10UF/6.3V,X5R 0.1uF/16V,X7R C0805 0 102 4 80 VCC_POR# AGND 4.7K AVCC 10K C382 10UF/6.3V,X5R0.1uF/16V,X7R0.1uF/16V,X7R0.1uF/16V,X7R0.1uF/16V,X7R C0805 0.1uF/16V,X7R D R372 +V5S 14,15,16,17,18,19,20,21,23,25,26,28,29,35,36,37,38 +V3.3AUX 5,13,14,15,16,17,19,21,22,24,25,28,29,30,31,32,34,35 +V3.3S 5,9,10,11,12,13,14,15,16,17,18,19,20,21,22,24,25,28,29,34,35,36,37,38,48 +V5AUX 17,19,22,24,28,29,32,33,34,35,36 +V3.3S VerA 0 0 0 VerB 0 0 1 VerC 0 1 0 VerD 0 1 1 10K ns 2N2222 SOT23 EC_PWROFF# A C1286 100pF/50V,NPO strap config CZC Technology zw Title WPC8763L Size Custom Date: 5 4 3 2 Project Name Rev C R48 Thursday, April 22, 2010 1 Sheet 27 of 56 5 4 3 2 1 +V3.3S +V5S +V5AUX +V3.3S 5,9,10,11,12,13,14,15,16,17,18,19,20,21,22,24,25,27,29,34,35,36,37,38,48 +V5S 14,15,16,17,18,19,20,21,23,25,26,29,35,36,37,38 +V5AUX 17,19,22,24,27,29,32,33,34,35,36 +V3.3AUX 5,13,14,15,16,17,19,21,22,24,25,27,29,30,31,32,34,35 +V3.3AUX +V5AUX FB37 FB36 D 100ohm/100MHz,3A ns 100ohm/100MHz,3A ns C397 0.1uF/16V,X7R Reserved D 6 R446 0 R0402_0 R447 0 R0402_0 CHK12 90ohm@100MHz,0.5A L4S2012 Vfan Wafer4P 1.25 CPUFAN_CN2 R484 R485 0 ns 0 ns 1 2 3 4 Pin2 Pin3 3 2 6 5 4 3 2 1 6 5 4 8 8 3 7 7 2 1 fpce6_1p0r FFC6 1.0 FingerPrint ns HWS4_1P25 5 fan_tech_cn FAN_V 4 1 15 USB_PN9 15 USB_PP9 1 1 2 2 D27 EGA10603V05A1-B ns D28 EGA10603V05A1-B ns +V3.3S ns 87213-xxx0x-x Aces ns +V3.3AUX +V5AUX FB41 R439 10K +V5S FB40 FB38 FAN_TACH 27 B R487 fan_tech_cn R488 U26 4 0.1uF/16V,X7R 10UF/6.3V,X5R C0805 R444 5.11K,1% 1 1 - 3 D30 EGA10603V05A1-B ns ns 2 87213-xxx0x-x Aces ns +V3.3S R445 10K,1% LMV321DBV FAN_V=3.30V,Vfan=5V FAN_V2.65V,Vfan=4V FAN_V=1.98V,Vfan=3V R524 4.7K R449 200K R450 100K ns TestP TPC60 ns V33AL1 TestP TPC60 ns V5AL1 TestP TPC60 ns V75 TestP TPC60 ns V5S1 TestP TPC60 ns V33S1 TestP TPC60 ns V18S1 TestP TPC60 ns CPUCORE1 TestP TPC60 ns V15S1 TestP TPC60 ns RSMRST#1 TestP TPC30 ns 1V1_PWROK1TestP TPC30 ns GFX_PWROK1TestP TPC30 ns IMVP_ON1 TestP TPC30 ns MAIN_ON1 TestP TPC30 ns 14,19,27,38 IMVP_OK IMVP_OK1 TestP TPC30 ns 14,22,27,36 SLP_S3# SLP_S3#1 TestP TPC30 ns 14,22,27,29 SLP_S4# SLP_S4#1 TestP TPC30 ns 5,13,14,15,16,17,19,21,22,24,25,27,29,30,31,32,34,35 C399 100K VDC1 19,22,30,32,33,34,35,37,38,39 FAN_V 27 17,19,22,24,27,29,32,33,34,35,36 4.7uF/10V,X5R C0603 +VDC +V3.3AUX +V5Aux 10,11,33 +V0.75S 14,15,16,17,18,19,20,21,23,25,26,29,35,36,37,38 5,9,10,11,12,13,14,15,16,17,18,19,20,21,22,24,25,27,29,34,35,36,37,38,48 +V5S +V3.3S 7,15,16,34,36 +V1.8S H26 BOSS MH24X40X65 ns H22 BOSS MH24X40X80 ns H23 BOSS MH24X40X80 ns H25 BOSS MH24X40X80 ns H21 BOSS MH40X70T ns H17 BOSS MH40X70T ns H19 BOSS MH40X70T ns H16 BOSS MH39X60 H18 BOSS MH39X60 H20 BOSS MH40X70T ns 7,38 +VCORE 7,16,21,22,35,36 +V1.5S 1 36 V1_1S_VTT_PWROK 37 GFX_PWROK 1 1 1 DGPU 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 14,27,32,36 PM_RSMRST# DGPU 27,38 VR_ON 27,33,34,35,36 MAIN_ON H27 BOSS MH24_32X40X55 ns H10 H11 H12 H13 H14 BOSS BOSS BOSS BOSS BOSS MH24X40X80 MH24X40X80 MH24X40X80 MH24X40X80 MH24X40X80 ns ns ns ns ns H15 BOSS MH24X40X80 ns CN_USB Wafer6P1 hws6_1p0r 1 D29 EGA10603V05A1-B R448 B 6 5 4 3 2 1 ns 2 + 2 C398 0.1uF/16V,X7R 3 2 5 C396 0.1uF/16V,X7R 4 1 15 USB_PN10 15 USB_PP10 D24 1N4148WS SOD323 C395 R470 0 R0402_0 R471 0 R0402_0 CHK13 90ohm@100MHz,0.5A L4S2012 HWS3_1P25 7 R443 1K C394 1 2 3 5 R442 10 0 Pin2 0 Pin3 C C409 0.1uF/16V,X7R ns Wafer3P 1.25 CPUFAN_CN1 4 2 C1 E C 1 3 1K 4 Q30 BCP69T1 R441 1K R440 100ohm/100MHz,3A ns Vfan 8 C 100ohm/100MHz,3A ns 100ohm/100MHz,3A B BOT FD7 FD8 1 1 1 1 1 1 A 1 FD6 1 FD5 1 FD4 1 FD3 1 FD2 1 FD1 1 1 A CZC Technology FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS ns ns ns ns ns ns ns ns zw Title USB Conn&USB camera Size Custom Date: 5 4 3 2 Project Name Rev C R48 Sheet Thursday, April 22, 2010 1 28 of 56 R461 470K D USB_OC R1096 14,22,27,28 SLP_S4# 3 4 0 FB103 TPSCLK 27 TPSDAT 27 20K C402 0.1uF/16V,X7R 3 TP_D1 BAT54SPT SOT23 ns 1 TP_C2 0.1uF/16V,X7R C0402 TPSCLK TPSDAT USB_VCC 120ohm/100MHz,2.5A 2 R456 5 7 ILIM FAULT# GND EN PAD TPSCLK 3 Touch_CN FFC4 1.0 fpce4_1p0r 1 1 6 6 2 2 5 5 3 3 4 4 1 OUT 1 TPSDAT +V5S +V5AUX C404 0.1uF/16V,X7R U35 6 IN 2 2 3 2 4 +V5AUX 17,19,22,24,27,28,32,33,34,35,36 +V3.3AUX 5,13,14,15,16,17,19,21,22,24,25,27,28,30,31,32,34,35 +V3.3S 5,9,10,11,12,13,14,15,16,17,18,19,20,21,22,24,25,27,28,34,35,36,37,38,48 +V5S 14,15,16,17,18,19,20,21,23,25,26,28,35,36,37,38 1 5 +V5AUX +V5S TP_D2 BAT54SPT SOT23 ns D +V5S Synaptics : TM-00268-008 TPS2553 USB_OC_L4 15 ns L4S2012 90ohm@100MHz,0.5A CHK11 C + 1 ns 1 D72 EGA10603V05A1-B 4 GND C1224 0.1uF/16V,X7R TMG-533-V SWS6D50 2 HOLE0 HOLE1 HOLE2 HOLE3 TP_C4 100pF/50V,NPO C0402 1 -DATA1 +DATA1 D32 ESDPAD_R0603 ns 2 2 2 3 1 5 6 7 8 5 6 2 3 C1225 100uF/10V,TAN CT7343_28 1 4 15 USB_PN8 15 USB_PP8 USB4H36IN VCC1 330 RIGHT_Button R0402 1 TP_RSW1 3 4 USBC003 1 3 TP_R2 USB_VCC Touch_BTN1 FFC4 1.0 fpce4_1p0r 1 1 2 2 6 6 3 3 5 5 4 4 TP_D3 BAT54SPT SOT23 ns +V5S USB1 0 0 D33 ESDPAD_R0603 ns C1222 1000pF/50V,X7R ns R1092 560K R0402 ns R1093 R1094 2 TMG-533-V SWS6D50 2 0 5 6 R1097 TP_C5 100pF/50V,NPO C0402 1 1 USB_OC 330 LEFT_button R0402 1 TP_LSW1 3 4 2 QFN6_P65 3 TP_R1 C403 0.1uF/16V,X7R TP_D4 BAT54SPT SOT23 ns C +V5S +V3.3S D73 EGA10603V05A1-B 2 C442 0.1uF/16V,X7R 2 R1095 USB_GND2 0 R0603 ns USB_GND2 BL-HB334E-TRB LED_NUM LED_CAP BL-HB334E-TRB NUMLOCK# 27 NUMLOCK# CAPLOCK# 27 CAPLOCK# LED3_0802R NUM+ LED_R7 330 CAP+ LED_R8 330 LED3_0802R USB_GND2 HDD_LED# 13 SATA_LED# WIRELESS_LED 21,27 HW_RATIO_OFF# B BT_LED# 27 BT_LED# 3 BT_R21 1K R0402 BT_Q6 2N7002K SOT23 1 WIRELESS_LED# 21 WIRELESS_LED# WIRELESS_LED# IDE+ LED_R10 LED3_0802R 330 R0402 LED_WIRELS1 BL-HB334E-TRB WIRE+ LED3_0802R 330 R0402 LED_BT LED3_0802R LED_R11 BT+ LED_R12 BL-HJC34E-TRB 499,1% R0402 +V3.3AUX +V3.3AUX B AMBER 2 C1287 1000pF/50V,X7R BT_R2 499,1% R0402 CHG+ BTL_LED+ BT_R1 330 R0402 LED_BTL LED_CHG BL-HB334E-TRB BL-HJC34E-TRB 21,27 BT_ON R437 0 R0402_0 R438 0 R0402_0 CHK8 90ohm@100MHz,0.5A 15 USB_PN4 15 USB_PP4 4 1 3 2 ns 3 BT_Q1 2N7002K SOT23 1 2 BTL_LED 1 2 3 4 Blue_LED 5 6 hws6_1p0r Wafer6P1 Bluetooth BT_R4 1uF/10V,X5R BT_Q2 R0402 2N7002K ns SOT23 Q2 MMBT3904-F L4S2012 ns R5 R4 10K ns BT_R5 1K R0402 1 BT_LED# 1 AMBER LED3_0802R BT+ BT_C1 IDE+ BT_C2 CAP+ BT_C3 NUM+ BT_C4 WIRE+ BT_C5 BTL_LED+ BT_C6 CHG+ BT_C7 CHG_LED 27 1000pF/50V,X7R C0402 1000pF/50V,X7R C0402 1000pF/50V,X7R C0402 1000pF/50V,X7R C0402 1000pF/50V,X7R C0402 1000pF/50V,X7R C0402 1000pF/50V,X7R C0402 A 2 C311 0.01uF/25V,X7R 27 BTL_LED 3 BlueTooth Interface 2 C310 10UF/6.3V,X5R BT_R3 1K R0402 FB4 300ohm/100MHz,1A 7 FB18 300ohm/100MHz,1A ns LED3_0802R 3 +V3.3AUX 8 +V3.3S A LED_HDD BL-HB334E-TRB 1K Blue_LED ns BT_R6 1uF/10V,X5R R0402 ns CZC Technology zw Title <Title> Size A3 Date: Project Name Rev R48 Thursday, April 22, 2010 C Sheet 29 of 56 5 4 3 2 1 +VDC +VDC 19,22,28,32,33,34,35,37,38,39 +V3.3AUX +V3.3AUX 5,13,14,15,16,17,19,21,22,24,25,27,28,29,31,32,34 BATT+ BATT+ 31,39 Iac_P Iac_P 39 D D 30mohm 1 F3 4.74A 1 4.74A 7A 2 FB86 120ohm/100MHz,2.5A 2 2pWafer HW2_2P5 R883 R884 FB87 120ohm/100MHz,2.5A 0 R0805 0 R0805 R880 51K C1045 0.1uF/25V,X7R C0603 C1046 0.1uF/25V,X7R C0603 C1044 0.01uF/25V,X7R VIN+ 1 2 3 0.015,1% SOT23 Q96 DTB114EK 2 3 D 8 7 6 5 1 2 3 S D G R882 10 BATT+ Q95 SI4812BDY 8 7 6 5 S R1206 R879 10 C1292 4700pF/50V,X7R 30V/20V 7.7A/21mohm 8.5nC SCHOTTKY 30V/1.4A Q94 SI4812BDY R878 R881 51K +VDC G 4 PWRCN1 30V/20V 7.7A/21mohm 8.5nC SCHOTTKY 30V/1.4A 4 AD+ 87343-02xx ACES 30V/20V 9.1A/20mohm 33nC Q93 SI4435BDY SOIC8_1P27_3P9 1 8 2 7 3 6 S 5 D G 4 AD:90W 4.74A 2.2uF/6.3V,X7R C1047 CHR_PB 39 C0603 CHR_PA 39 GND_AD Layout:Use bridge connect GND_AD and GND GND_AD C R885 51K 1 C 3 Iac_M 39 Q97 2N7002K SOT23 1 Iac_P 39 2 27 AC_OFF From EC R886 51K +V3.3AUX B B 3 D46 BAT54SPT SOT23 Q98 2N7002K SOT23 3 R887 20K,1% 3 27 AC_IN 1 C1049 1000pF/50V,X7R R889 C1050 1000pF/50V,X7R R890 10K 1K C1048 1000pF/50V,X7R R891 20K,1% C1293 4700pF/50V,X7R 2 22,32 PWRSWVCC_MBXP Q99 2N7002K SOT23 1 R888 15K 2 PWRSW#_XP 27 3--6.5V AD+ 1 2 +V3.3AUX R892 20K R0402 A A CZC Technology Boot to XP OS Title Size A3 Date: 5 4 3 2 Project Name Rev C R48 Thursday, April 22, 2010 Sheet 1 30 of 56 5 4 3 2 1 BATT+ +V3.3AUX BATT+ 30,39 +V3.3AUX 5,13,14,15,16,17,19,21,22,24,25,27,28,29,30,32,34 D D GND_MBAT GND_MBAT C1294 4700pF/50V,X7R GND_MBAT C1126 0.1uF/25V,X7R C0603 C1295 4700pF/50V,X7R C1125 0.1uF/25V,X7R C0603 BATT+ FB94 8 F4 7A FS1206 P C14468 ALLTOP VBAT_F FB88 FB89 BATT+ 7 BATT+ 6 SDAT 5 BAT_DATA_R R893 100,1% SCLK 4 BAT_CLK_R R894 100,1% TEMP BAT_IN# 3 BAT_IN# R895 100,1% GND 2 GND 1 C BATCON1 BATTCN bat7r_in C 120ohm/100MHz,2.5A BAT_DATA 27,48 BATTEP_BATIN# 27 C1051 1000pF/50V,X7R 9 R897 ns R898 ns BATTEP_BATIN# BAT_CLK 27,48 0 R0603 0 R0603 R896 10K 0.5-2.5V Battery OK <0.5V or >2.5V Battery Fail +V3.3AUX GND_MBAT Use bridge connect GND_MBAT and GND B B D47 D48 2 BAT_CLK 2 +V3.3AUX BAT_DATA 3 1 BAT54SPT SOT23 C1052 0.1uF/16V,X7R C0402 +V3.3AUX 3 1 BAT54SPT C1053 0.1uF/16V,X7R C0402 SOT23 A A CZC Technology Title Size A3 Date: Project Name Rev C R48 Thursday, April 22, 2010 Sheet 31 of 56 5 4 3 2 1 +VDC +VDC 19,22,28,30,33,34,35,37,38,39 +V3.3AUX +V3.3AUX 5,13,14,15,16,17,19,21,22,24,25,27,28,29,30,31,34,35 +V5AUX +V5AUX 17,19,22,24,27,28,29,33,34,35,36 +VDC 30V/25V 7A/30mohm 8.7nC C1061 22pF/50V,NPO 5 6 7 8 D 3V_HDR 4 C1055 0.1uF/25V,X7R C0603 D C1056 1000pF/50V,X7R Q156 SI4800BDY G 3 2 1 S C1062 1000pF/50V,X7R C1054 10uF/25V,X5R C1206 D GND_AL GND_AL 3V_LX L22 3V_LX GND_AL 3V_OUT 3.3uH/6A CKS2D66 5 6 7 8 17.6mohm R899 100K D 3V_LDR 4 Q157 SI4812BDY G C1058 1000pF/50V,X7R 3 2 1 AUX_POK CS_V3P CS_V3N 36.5K,1% <50mV 14 BST1 13 15 LX1 HDR1 16 GNDP C 5V_LDO C1065 1uF/10V,X5R +VDC C1067 0.22uF/16V,X5R 2 12 5V_VSET C1070 1000pF/50V,X7R R906 169K,1% CS_V5P CS_V5N 1.68V D1 5V_HDR C1068 10uF/25V,X5R C1206 D1 G1 S1 5V_LX 5 7 6 5V_LDR GND_AL C1078 1000pF/50V,X7R L23 5V_LX G2 4 C1077 22pF/50V,NPO 27 ALWAYS_ON 2 39 ACAV 1 Q101 FDS6900AS S2 R908 20K,1% D52 22,30 PWRSWVCC_MBXP CS_V5P R909 1K C1073 0.01uF/25V,X7R D51 BZT52C3V6S-F/3.6V SOD323 R910 2.2K V5A_ON R912 4.7K V3A_ON D50 1N4148WS SOD323 C1074 0.01uF/25V,X7R CC:5A OC:10A C1072 150uF/6.3V/15mohm/Panasonic CT7343_19 ns For USB R911 47 <50mV D49 BAT54C SOT23 3 +V5AUX C1274 220uF/6.3V,FPCAP + CESD66 + R907 100K 30V/20V 6.9A/34mohm 6.1nC 8.2A/28mohm 5.8nC 2.3A GND_AL 5V_OUT 4.7UH/5.5A CKS2D66 32mohm 3 GND_AL B C1069 1000pF/50V,X7R 8 D2 GND_AL C1071 0.1uF/25V,X7R C0603 B CO-LAYOUT CS_V5N 10 11 POK1 CS1P CS1N 17 CS_V3N LDR1 ON/SKIP1 LDR2 VDDP C1060 0.01uF/25V,X7R CS_V3P VDDA 6 18 1 20 5 7 2.5V 19 TSET U55 OZ815LN QFN24_P5 BST2 AUX_POK 3V_VSET LX2 4 V5A_ON GND_AL HDR2 VREF C1066 1uF/10V,X5R R905 82.5K,1% 21 VIN 3 10 GND_AL POK2 2 9 R903 22 5V_VIN 5V_VREF <400KHz R904 24.9K,1% 23 ON/SKIP2 8 5V_LDO C1064 0.1uF/16V,X7R GND_AL CS2N 1 VSET1 C1063 0.01uF/25V,X7R CS2P 24 25 2.75V C1059 0.22uF/16V,X5R V3A_ON 2010-1-7 C VSET2 GNDA0 R902 0 CO-LAYOUT R901 47 GND_AL +VDC CC:7A OC:12A C1057 150uF/6.3V/15mohm/Panasonic CT7343_19 ns R900 S 30V/20V 7.7A/21mohm 8.5nC SCHOTTKY 30V/1.4A +V3.3AUX C1273 220uF/6.3V,FPCAP + CESD66 + L RL 0.22ms C*R1*R2 = R1+R2 0.5ms C1075 0.1uF/16V,X7R C1076 0.1uF/16V,X7R +V3.3AUX 1N4148WS SOD323 +V5AUX R913 10K R916 +V3.3AUX R914 34K,1% PM_RSMRST# 14,27,28,36 3 0 R0603 A R915 20K,1% 2 A Q103 2N7002K SOT23 1 C1079 1uF/10V,X5R C0402 GND_AL 2 AUX_POK 1 3 2010-1-7 Q102 2N7002K SOT23 CZC Technology Quaf Title Power +V3.3Aux +V5Aux +10V Size C Date: Project Name R48 Thursday, April 22, 2010 Rev C Sheet 32 of 56 5 4 3 2 1 +V5AUX +VDC +V5AUX 17,19,22,24,27,28,29,32,34,35 +VDC 19,22,28,30,32,34,35,37,38,39 +V0.75S 10,11,28 +V1.5 5,7,8,10,11,35 GND_DDR GND_DDR D M_CSP M_CSN LX BST 18 2 VIN LDR 17 3 VREF VDDP 16 +V5AUX C1085 0.22uF/16V,X5R C0402 D53 1N4148WS SOD323 4 1 CC:7A OC:14A R921 100K R0402 C1275 220uF/6.3V,FPCAP + CESD66 + C1086 220uF/2.5V,POSCAP CT7343_19 ns R922 R0402 Q159 SI4812BDY GNDP 15 13 VTT1 C1089 5600pF/50V,X7R CO-LAYOUT 10,11 M_VREF +V0.75S +V1.5 C1093 1uF/10V,X5R C0402 C1097 1000pF/50V,X7R C0402 C1099 10uF/6.3V,X5R C0805 C1094 10uF/6.3V,X5R C0805 C1095 10uF/6.3V,X5R C0805 C1096 10uF/6.3V,X5R C0805 CC:2A OC:2.5A L GND_DDR B C R923 47 R0402 12 11 10 GND_DDR C1088 1uF/10V,X5R C0402 51.1K,1% <50mV VTT2 VSS1 VDDQ2 ON_VTT VDDQ1 6 7 C1090 1uF/10V,X5R C0402 VSS2 9 M_VTT_ON VDDA 14 VTTS 10 R924 5 8 +V5AUX 30V/20V 7.7A/21mohm 8.5nC SCHOTTKY 30V/1.4A M_CSN QFN24_P5 TSET R0402 +V5AUX M_CSP 4 U56 OZ812LN 3 2 1 <400KHz GND_DDR 3 2 1 19 HDR 21 22 20 PGD PAD ON/SKIP VTTREF C1087 0.1uF/16V,X7R C0402 +V1.5 S 2.75V L24 DDR_LX 2.2uH/8A CKS2D66 11.5mohm G C TPC60 ns D 1 0.6ms C1084 0.01uF/25V,X7R C0402 GND_DDR V2 5 6 7 8 M_DDR_ON CSP 25 DDR_LX GND_DDR GND_DDR R920 1K R0402 C1082 C0402 1000pF/50V,X7R S C1083 1000pF/50V,X7R C0402 C1081 0.1uF/25V,X7R C0603 Q158 SI4800BDY G +VDC 4 R919 105K,1% R0402 23 53.6K/64.9K 24 1.5V V1_5_PWROK 36 1.5V VSET 34K/64.9K C1080 10uF/25V,X5R C1206 30V/25V 7A/30mohm 8.7nC D 1.8V R917 82.5K,1% R0402 2010-3-16 CSN Vout=2.75*R2/(Rh+Rl) D +VDC C1091 22pF/50V,NPO C0402 5 6 7 8 C1092 1000pF/50V,X7R C0402 GND_DDR C1098 C0805 10uF/6.3V,X5R RL 47 R925 R0402 = C*R1*R2 B R1+R2 R926 0 R0603 GND_DDR 27 V1_5_ON 0 R928 R0402M_DDR_ON ns 27,28,34,35,36 MAIN_ON A 5,36 V1_1S1_5S_PWROK 0 R930 R0402 M_VTT_ON A R1159 100K R0402 CZC Technology Title Size A3 Date: Project Name Rev C R48 Thursday, April 22, 2010 Sheet 33 of 56 5 4 3 2 1 +V5AUX +V5AUX 17,19,22,24,27,28,29,32,33,35,36 +V1.5S +V1.5S 7,16,21,22,28,35,36 +VDC +VDC +VDC 19,22,28,30,32,33,35,37,38,39 +V1.05S C1214 10uF/25V,X5R C1206 30V/20V 30A/10mohm 8.8nC C1101 0.1uF/25V,X7R C0603 +V1.05S C1102 1000pF/50V,X7R +V1.8S 7,15,16,28,36 +V3.3AUX 5,13,14,15,16,17,19,21,22,24,25,27,28 D +V1.1S 7,13,14,16,17,35,36 5 D C1100 10uF/25V,X5R C1206 D +V3.3S 5,9,10,11,12,13,14,15,16,17,18,19,20,21, GND_IC Q107 SiR462DP PWRPAK_SO8 G 4 17 GNDA 8111PR C1105 2010-1-7 3300pF/50V,X7R 5 +V5AUX C 2010-1-14 CS1_1P 4 VIN 3 2 1 R934 47 30V/20V 40A/5.1mohm 21.5nC CS1_1N 5 CC:25A OC:30A 100K,1% PGD 6 VDDP ON/SKIP GNDP VDDA GNDA1 TSET ns 2010-1-7 + C1103 C1215 220uF/2V/15mohm 220uF/2V/15mohm CT7343_19 CT7343_19 3 2 1 9 10 CSP LX 11 12 CSN HDR 8 7 16 C1109 1uF/10V,X5R 3 2 1 CS1_1N CS1_1P BST LDR 4 + R936 100K,1%R1098 S R939 73.2K,1% U57 OZ8111LN D54 1N4148WS D68 SS3P4 G C1107 1000pF/50V,X7R VSET VRFE 4 LDR2B 0.68uH CKS2D100 D C C1104 0.1uF/16V,X7R +V1.1S Q109 SiR466DP PWRPAK_SO8 S R938 10 8111PR VREF11 14 2.75V TSET11 15 Q108 SiR466DP PWRPAK_SO8 V1_1_LX G 13 R937 105K,1% V1_1_LX D 1.1V L25 3 2 1 S C1108 1000pF/50V,X7R 5 HDR2B C1106 22pF/50V,NPO C1110 1uF/10V,X5R +V3.3S GND_IC GND_IC GND_IC R1073 10K R940 100K 2010-3-16 C1276 3300pF/50V,X7R VREF11 R1187 0 V1_1S_ON +VDC R1186 100K,1% ns B V1_1S_PWROK 35,36 TSET11 C1296 0.1uF/16V,X7R ns +V3.3AUX 1A GND_IC R941 VREF11 B C1111 10uF/6.3V,X5R C0805 +V1.8S GND_IC C1116 1uF/10V,X5R GND_IC 5 VIN 6 VDDA 7 POK 8 EN PAD U58 +V5AUX 9 0 C1112 0.1uF/16V,X7R C0402 VOUT2 4 VOUT1 3 FB 2 GND 1 1A C1113 47pF/50V,NPO ns R942 32.4K,1% CC:1A C1114 C0805 10uF/6.3V,X5R C1115 C0805 10uF/6.3V,X5R OZ8033GN SOIC8_1P27_3P9G 27,28,33,35,36 MAIN_ON R1160 0 R0402_0 R944 1K 36 V1_8S_PWROK V1_8S_ON R945 24.9K,1% 0.1ms Vout=0.8 * (1+Rh/RL) 27 V11S_ON A 0 R946 R0402_0 R947 4.7K V1_1S_ON V1_8S_ON 0.5ms R948 0 R0402_0 A D55 1N4148WS SOD323 C1117 0.1uF/16V,X7R C1118 0.1uF/16V,X7R CZC Technology Title Size A3 Date: Project Name Rev C R48 Thursday, April 22, 2010 Sheet 34 of 56 5 4 3 2 1 +V3.3S +V3.3S 5,9,10,11,12,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,36,37,38,4 +V5S +V5S 14,15,16,17,18,19,20,21,23,25,26,28,29,36,37,38 +V3.3AUX +V3.3AUX 5,13,14,15,16,17,19,21,22,24,25,27,28,29,30,31,32,34 +V5AUX +VDCS +V5AUX 17,19,22,24,27,28,29,32,33,34,36 VDDC 10V VDDC 36,43 +VDC +VDC 19,22,28,30,32,33,34,37,38,39 +V1.1S 7,13,14,16,17,34,36 +V1.5 5,7,8,10,11,33 +V5AUX D +V3.3AUX +V1.5S 7,16,21,22,28,36 +V1.5 1.8V_REG 0.1ms 3 2 1 5 6 7 8 1 3 C1290 0.1uF/25V,X7R 0.01uF/25V,X7R 2A Q114 2N7002K SOT23 1 2A C1122 1uF/10V,X5R 2010-1-7 2 C1120 0.01uF/25V,X7R +V5S 1.0V_REG 36,41,42,43,44 S MAIN_ON C1121 1.0V_REG 30V/25V 7A/30mohm 8.7nC G C1119 R953 10K 4 20K,1% R952 S 20K,1% R949 S 27,28,33,34,36 0 R955 0.2ms G 0.2ms 4 G 4 10K D MVDDQ 36,43,45,46,47 3 2 1 1K SI4800BDY 1N4148WS 30V/25V 7A/30mohm 8.7nC 3 2 1 R951 1N4148WS 30V/25V 7A/30mohm 8.7nC MVDDQ Q111 D R950 D D +VDC 5 6 7 8 Q113 SI4800BDY DTB114EK SOT23 Q110 2 3 Q112 SI4800BDY 1.8V_REG 36,42,43,44 +V1.1S_VTT 5,7,12,16,17,36 D57 SOD323 5 6 7 8 D56 SOD323 0.01uF/25V,X7R +V3.3S 2A C1123 C1124 1uF/10V,X5R 1uF/10V,X5R +V1.5S C C +V1.5 +V1.1S +V1.1S D67 SOD323 1K 0.1ms 10K DGPU DGPU R1065 10K DGPU 0 R1067 DGPU Q166 2N7002K SOT23 DGPU 1 C1289 0.1uF/25V,X7R DGPU 0.01uF/25V,X7R DGPU 5 30V/20V 40A/5.1mohm 21.5nC DGPU C1217 0.01uF/25V,X7R VDDC 2A MVDDQ DGPU C1220 1uF/10V,X5R 2010-1-7 2 16,36 VDDC_VR_EN C1218 4 20K,1% R1059 1 +V1.1S_VTT C1219 1uF/10V,X5R 2010-1-7 2 C1291 0.1uF/16V,X7R ns 2010-1-8 C1288 0.1uF/25V,X7R 0.01uF/25V,X7R Q165 2N7002K SOT23 1 C1216 3 R1064 10K 3 0 R1066 5 5 1 3 2 1 DGPU 0.2ms DGPU S 34,36 V1_1S_PWROK 4 S S 34K,1% R1062 G +VDC G 4 3 2 1 0.1ms 3 2 1 1K Q162 SiR466DP PWRPAK_SO8 1N4148WS DGPU 30V/20V 40A/5.1mohm 21.5nC R1063 D R1060 DTB114EK SOT23 Q164 2 3 D 30V/20V 40A/5.1mohm 21.5nC R1061 G +VDC Q161 SiR466DP PWRPAK_SO8 DGPU D DTB114EK SOT23 Q160 2 3 Q163 SiR466DP PWRPAK_SO8 C1221 1uF/10V,X5R DGPU DGPU B B +V1.5 +V3.3AUX 2A C1162 10uF/6.3V,X5R C0805 DGPU 1A C1163 10uF/6.3V,X5R C0805 DGPU C1167 1uF/10V,X5R DGPU 6 VDDA 7 POK 8 EN VOUT2 4 VOUT1 3 FB 2 GND 1 1.8V_REG CC:1A U62 +V5AUX C1164 47pF/50V,NPO ns R1008 6.98K,1% DGPU C1165 C0805 10uF/6.3V,X5R DGPU C1166 C0805 10uF/6.3V,X5R DGPU C1171 1uF/10V,X5R DGPU 5 VIN 6 VDDA 7 POK 8 OZ8033GN 9 VIN EN PAD 5 PAD U61 +V5AUX 9 1.0V_REG VOUT2 4 VOUT1 3 FB 2 GND 1 1A C1168 47pF/50V,NPO ns SOIC8_1P27_3P9G Vout=0.8 * (1+Rh/RL) R1012 36 VDDC_PWROK R1010 24.9K,1% DGPU 36 1_8V_REG_PWROK Vout=0.8 * (1+Rh/RL) 0.22ms 36 VDDC_PWROK 2010-1-7 R1013 R1011 24.9K,1% DGPU 4.7K 0.47ms DGPU C1271 0.1uF/16V,X7R DGPU A C1170 C0805 10uF/6.3V,X5R DGPU SOIC8_1P27_3P9G DGPU 2.2K DGPU CC:1A C1169 C0805 10uF/6.3V,X5R DGPU OZ8033GN DGPU 36 1_0V_REG_PWROK R1009 32.4K,1% DGPU 2010-1-7 C1272 0.1uF/16V,X7R DGPU A CZC Technology Title Size A2 5 4 3 2 Date: Project Name Rev C R48 Thursday, April 22, 2010 1 Sheet 35 of 56 4 3 2 +V3.3S +V5S +V5AUX VDDC +V1.5S +V3.3S 5,9,10,11,12,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,37,38,48 +V5S 14,15,16,17,18,19,20,21,23,25,26,28,29,35,37,38 +V5AUX 17,19,22,24,27,28,29,32,33,34,35 VDDC 35,43 +V1.5S 7,16,21,22,28,35 +V1.1S 7,13,14,16,17,34,35 1.8V_REG 35,42,43,44 +V1.8S 7,15,16,28,34 1.0V_REG 35,41,42,43,44 +V1.1S_VTT 5,7,12,16,17,35 MVDDQ 35,43,45,46,47 VDDR3 16,41,42,43,45,48 MVDDQ VDDR3 +V3.3S +V1.8S +V1.1S MVDDQ R998 47 R0603 DGPU R999 47 R0603 DGPU +V5AUX Q136 2N7002K SOT23 Q137 2N7002K SOT23 1 DGPU 2 1 R966 100K 3 3 Q121 2N7002K SOT23 1 2 2 2 Q120 2N7002K SOT23 1 D 1.0V_REG 3 3 Q119 2N7002K SOT23 1 R997 47 R0603 DGPU 2 Q118 2N7002K SOT23 1 R964 47 R0603 2 +V5AUX R963 47 R0603 3 R962 47 R0603 3 R961 47 R0603 1.8V_REG 3 +V5S D 1 Q138 2N7002K SOT23 1 DGPU 2 5 DGPU R1004 100K DGPU DISCHARGE R0402_0 Q123 2N7002K SOT23 1 +V1.1S_VTT 0 R1007 DGPU 16,35 VDDC_VR_EN 3 R970 47 R0603 Q124 2N7002K SOT23 C Q125 2N7002K SOT23 2 1 2 1 1 3 R969 47 R0603 C Q144 2N7002K SOT23 DGPU +V1.5S 2 0 R968 2 27,28,33,34,35 MAIN_ON 3 3 GFX_DISCHARGE D79 1N4148WS 34,35 V1_1S_PWROK V1_1S1_5S_PWROK 5,33 5,33 V1_5S_PWROK +V5AUX +V5AUX +V3.3S VDDR3 R0402 R929 34K,1% R0402 R1069 34K,1% DGPU R1170 10K R1173 10K DGPU V1_1S_VTT_PWROK 28 +V3.3S VDDC_PWROK 3.83K,1% R0402 DGPU Q167 MMBT3904-F SOT23 DGPU R974 0 R0402_0 R976 0 R0402_0 D58 1N4148WS D59 1N4148WS 28 V1_1S_VTT_PWROK D80 1N4148WS 5,33 V1_1S1_5S_PWROK D78 1N4148WS 2010-1-7 33 V1_5_PWROK 34 V1_8S_PWROK 2 2 Q168 2N7002K SOT23 DGPU 1 R1071 10K R0402 DGPU R973 10K 3 1 VDDC Q106 2N7002K SOT23 1 R933 10K R0402 3 R1070 Q105 MMBT3904-F SOT23 2 2 3.83K,1% R0402 3 1 +V1.1S_VTT B 35 3 R932 14,22,27,28 SLP_S3# 14,27,28,32 PM_RSMRST# B MAIN_PWROK 14,27 MAIN_PWROK -- VR_ON 99--300ms Delay D81 1N4148WS +V5AUX +V5AUX DGPU +V3.3S R0402 R1161 34K,1% R0402 R1171 34K,1% DGPU R1162 10K VDDR3 2010-1-7 V1_5S_PWROK 5,33 R1172 10K DGPU MVDDQ_PWROK A R1174 8.2K 1 DGPU Q177 MMBT3904-F SOT23 DGPU 3 MVDDQ 2 Q173 2N7002K SOT23 1 Q178 2N7002K SOT23 DGPU 1 R1176 10K R0402 DGPU MVDDQ_PWROK R1175 0 R0402_0 35 1_0V_REG_PWROK R1177 0 R0402_0 35 1_8V_REG_PWROK R1178 0 R0402_0 MADISON_POWOK 16,42 A 2 R1164 10K R0402 Q172 MMBT3904-F SOT23 3 1 2 8.2K 3 3 R1163 2 +V1.5S CZC Technology Title Size A2 5 4 3 2 Date: Project Name Rev C R48 Thursday, April 22, 2010 1 Sheet 36 of 56 5 4 3 2 1 +V3.3S +V3.3S 5,9,10,11,12,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,38,48 +V5S +V5S 14,15,16,17,18,19,20,21,23,25,26,28,29,35,36,38 +VDC UMA +VDC 19,22,28,30,32,33,34,35,38,39 Soft star GND_GFX +VCC_GFXCORE 7 22pF/50V,NPO C1127 D GND_GFX CSP_GFX GND_GFX CSN_GFX C1130 1000pF/50V,X7R UMA Set Loadline -7mV/A RG R978 UMA1K,1% UMA 1K,1% D C1131 10uF/25V,X5R C1206 UMA R977 2.2K UMA C1132 0.1uF/25V,X7R C0603 UMA C1133 1000pF/50V,X7R C1134 10uF/25V,X5R C1206 UMA UMA OVP 1.7V 5 GFX_VBT 32 VBT VID4 9 33 PAD 8 7 6 5 4 VIN 3 2 3 2 1 5 UMA C1142 1uF/10V,X5R UMA 30V/20V 40A/5.1mohm 21.5nC 18A +VCC_GFXCORE R981 100K UMA R982 47 UMA CC:18A OC:26A + ESR=15mohm + ESR=15mohm C1139 C1140 220uF/2V/15mohm 220uF/2V/15mohm CT7343_19 CT7343_19 UMA R1099 ns 100K,1% UMA C C1143 3300pF/50V,X7R R1075 0 GFXVR_EN 7 UMA CSN_GFX 10 VID3 VID5 VID2 VREF VID1 31 VID0 11 DSLP VID6 TSET CLK_ENb OVP 30 GFX_VREF +V5S 3 2 1 12 3 2 1 13 UMA CSP_GFX UMA VDDP VR_ON GFX_LDR Q115 SiR466DP PWRPAK_SO8 ns 4 GFX_EN U59 OZ8291 QFN32_P5 14 5 17 18 LX HDR 20 21 19 PG6 COMP 22 CSP SLEW 24 23 RSP VR_TTb C1144 0.01uF/25V,X7R UMA R1153 R983 51.1K,1% 24.9K,1% UMA UMA C1145 1uF/10V,X5R UMA 29 GFX_VREF 1 1.5V VDDA LDR VGFX 0.56uH/25A CKS2D100 1.8mΩ S GND_GFX 28 GNDP 1uF/10V,X5R Q129 SiR466DP PWRPAK_SO8 4 L26 GFX_LX G HW Pull Up C1141 1uF/10V,X5R UMA IMON 15 GFX_BST S GFX_VDD 120℃ RSN 27 GFX_LX 16 G R980 10 UMA 26 C1138 UMA BST Q128 SiR462DP PWRPAK_SO8 UMA D GFX_IMON_R RSP_LL 4 D 7 VSS_AXG_SENSE CSN 25 GFX_HDR S 2200pF/25V,X7R UMA C1137 330pF/50V,X7R ns 30V/20V 30A/10mohm 8.8nC G GFX_RSP C1136 GND_GFX GFX_PWROK 28 D R979 3.83K UMA GFX_COMP GFX_SLEW C1135 330pF/50V,X7R ns C 1000pF/50V,X7R C1129 UMA C1128 0.01uF/25V,X7R UMA +VDC TO GPU 7 VCC_AXG_SENSE +V5S 1A +V3.3S UMA GFXVR_VID_6 7 GND_GFX 1.2V GFXVR_VID_5 7 GND_GFX 300KHz GFXVR_VID_4 7 R984 100K,1% UMA R1154 100K,1% B GND_GFX GFXVR_VID_3 7 C1277 0.1uF/16V,X7R GFX_IN R987 2.2K UMA GFXVR_VID_2 7 C1146 0.01uF/25V,X7R UMA R985 10K UMA B R986 GFXVR_VID_1 7 GND_GFX 0 R0603 UMA GFXVR_VID_0 7 GND_GFX GND_GFX 0 R1180 GFX_IMON_R GND_GFX +VDC 2010-3-16 GFX_IMON 7 UMA R1181 34K,1% UMA GFX CORE Debug C1281 1000pF/50V,X7R VID6 VID5 VID4 VID3 VID2 VID1 VID0 Vout 0 0 1 1 0 0 0 1.2000V 0 1 1 0 0 0 0 0.9000V UMA GND_GFXGND_GFX A A CZC Technology Title Size A3 Date: Project Name Rev C R48 Thursday, April 22, 2010 Sheet 37 of 56 5 4 3 2 +V5S 14,15,16,17,18,19,20,21,23,25,26,28,29,35,36,37 +V3.3S 5,9,10,11,12,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,48 +VDC 19,22,28,30,32,33,34,35,37,39 +VCORE 7,28 +V1.1S 7,13,14,16,17,34,35,36 GND_CPU Set Loadline -1.9mV/A TO CPU D CORE_RSP GND_CPU 2010-3-17 C1175 330pF/50V,X7R ns C1173 22pF/50V,NPO C1172 1000pF/50V,X7R R1014 1.5K,1% +VDC C1176 2200pF/25V,X7R CSP_CPU C1174 330pF/50V,X7R ns CSN_CPU 7 VCC_SENSE GND_CPU D +V3.3S Soft star 1000pF/50V,X7R C1182 C1181 0.01uF/25V,X7R RG R1016 1K,1% C1177 C1178 C1179 C1180 C1206 C1206 C0603 C0402 10uF/25V,X5R 10uF/25V,X5R 0.1uF/25V,X7R1000pF/50V,X7R 30V/20V 30A/10mohm 8.8nC R1015 2.2K 5 7 VSS_SENSE 1 3 2 1 17 35 CLK_ENb 36 VREF U63 OZ8292LN GNDP 16 VDDP 15 12 HDR2 11 +V5S C1191 30V/20V 40A/5.1mohm 21.5nC RT1 100K,1% 2010-1-7 C1186 C1188 220uF/2.5V,POSCAP + 220uF/2.5V,POSCAP + + C1185 C1187 CT7343_19 220uF/2.5V,POSCAP 220uF/2.5V,POSCAP + C R1134 100K,1% 1uF/10V,X5R R1020 C1190 NC1 BST2 1uF/10V,X5R C1189 1.8mohm R1018 51.1K,1% 47 +VDC 10 9 8 7 6 5 1 2010-3-16 4 GNDA 3 DSLP 41 VR_ON TSET 40 VID6 39 VID5 13 VID4 14 LX2 VID3 LDR2 OVP VID2 VBT 38 VID1 37 Q147 SiR466DP PWRPAK_SO8 ns 4 t LDR1 Q146 SiR466DP PWRPAK_SO8 CORE_LDR1 4 CORE_LX1 5 VR_TTb +VCORE CC:36A OC:50A 3 2 1 34 1uF/10V,X5R 5 18 3 2 1 22 23 21 NC2 PG65 SLEW COMP 24 26 25 CSP CSN 28 29 27 RSP RSP_LL 30 R1039 2.2K R1021 100K,1% NC3 NC4 +V5S LX1 VID0 1.1V VDDA VIN 300KHz CORE_TSET 33 2 0.012uF/50V,X7R C1197 0.01uF/25V,X7R 30V/20V 30A/10mohm 8.8nC R1022 10K,1% 2010-3-16 CSN_CPU GND_CPU +VDC C1193 C1194 C1195 C1196 C1206 C1206 C0603 C0402 10uF/25V,X5R 10uF/25V,X5R 0.1uF/25V,X7R1000pF/50V,X7R CORE_IN GND_CPU GND_CPU CSP_CPU C1192 1uF/10V,X5R 19 S CORE_VBT R1019 36.5K,1% BST1 G C IMON VCORE 0.56uH/25A CKS2D100 S 12 CLKEN# CORE_VREF 32 L28 CORE_LX1 C1184 D 5 H_PROCHOT# 20 G GND_CPU HDR1 D CORE_VDD RSN Q145 SiR462DP PWRPAK_SO8 S C1183 1uF/10V,X5R 2010-1-7 31 CORE_HDR1 4 G R1017 10 +V5S D IMVP_OK 14,19,27,28 CORE_IMON_R R1023 51.1K,1% 5 7 H_VID0 D 7 H_VID1 CORE_HDR2 4 Q148 SiR462DP PWRPAK_SO8 G S B 3 2 1 7 H_VID2 CORE_LX2 0.56uH/25A CKS2D100 27,28 VR_ON R1083 0 CORE_EN 30V/20V 40A/5.1mohm 21.5nC 5 3 2 1 7 H_VID6 3 2 1 C1278 0.1uF/16V,X7R ns S S R1156 100K,1% ns 1.8mohm G G 7 H_VID5 Q150 SiR466DP PWRPAK_SO8 ns 4 D 7 H_VID4 D CORE_TSET R1155 0 Q149 SiR466DP PWRPAK_SO8 CORE_LDR2 4 5 7 H_VID3 CORE_VREF B L29 CORE_LX2 GND_CPU CORE_IMON_R A 0 R1183 CORE_IMON 7 R1024 R1184 34K,1% C1282 1000pF/50V,X7R A 0 R0603 CZC Technology 2010-3-16 GND_CPU GND_CPU GND_CPU Title Size A3 Date: Project Name Rev C R48 Thursday, April 22, 2010 Sheet 38 of 56 5 4 3 2 1 BATT+ BATT+ 30,31 +VDC D +VDC 19,22,28,30,32,33,34,35,37,38 D +VDC 1000pF/50V,X7R C1147 32 ACAV PB 5 Q175 R1185 SiR466DP 10,1% 2010-1-8 PWRPAK_SO8 3 2 1 GND_CHR R1026 10 C1202 10uF/25V,X5R C1206 1000pF/50V,X7R C1148 C1206 1uF/10V,X5R C0402 C1207 10uF/25V,X5R C1206 CC:4A CV:12.6V 0.015,1% R1025 R1206 R1027 10 C1203 0.1uF/25V,X7R C0603 2.2uF/6.3V,X7R C1204 C C0603 CHR_ICHP CHR_ICHM 4 R1028 100,1% C1205 2.2uF/6.3V,X7R C0603 12 PA 11 VSET C1210 0.01uF/25V,X7R C0402 5 19 13 25 7 GND_CHR LX VDDA R1031 3 2 1 WK_TH ISET C1208 2.2uF/6.3V,X7R C0603 GND_CHR CHR_PB 30 0 R0402 GND_CHR 20 CHR_REF CHR_REF Q152 2N7002K SOT23 BST 22 14 3 1K R0402 2 27 CHA_OFF 21 ACAV REF CHR_VSET C1209 0.01uF/25V,X7R C0402 1 WK_TH +VDC IACP COMP 16 15 10K R0402 R1030 17 CHR_LDR VAC 9 6 CHR_ISET 27 CC_SET LDR VDDP 10 5 23 24 30 Iac_P U64 OZ8618LN QFN24_P5 IBATT IACM BASE CELLS IAC 4 8 3 30 Iac_M IWK ICHP IAD_MAX 10uH CKS2D100 S 2 18 CHR_HDR 30V/20V 40A/5.1mohm 21.5nC G IAD_MAX HDR BATT+ L30 CHR_LX D R1029 ICHM S C 1 CHR_LX D64 1N4148WS SOD323 R1056 0.005,1% R1206 ns Q174 SiR462DP PWRPAK_SO8 G C1201 0.01uF/25V,X7R C0402 CHR_ICHM 4 C1200 0.1uF/16V,X7R C1199 10uF/25V,X5R C1206 D GND_CHR 30V/20V 30A/10mohm 8.8nC GND_CHR CHR_ICHP GND_CHR C1198 0.1uF/25V,X7R C0603 R1032 0 R1037 R0402 10K R0402 ns GND_CHR B CHR_PA 30 R1033 100K,1% R0402 C1211 2.2uF/6.3V,X7R C0603 CHR_VSET R1034 10K,1% CHR_REF IAD_MAX CHR_REF R1035 GND_CHR 0 R0603 GND_CHR R1038 49.9K,1% R0402 C1213 0.01uF/25V,X7R C0402 B R1036 100K,1% R0402 C1212 0.01uF/25V,X7R C0402 GND_CHR GND_CHR 2010-1-7 A CC_SET Charge Current SystemState Cells 3.0V 4.17A S3,S4,S5 6Cells 2.0V 2.78A S0 6Cells 1.5V 2.08A S0,S3,S4,S5 0.375V 521mA PreCharge <0.15V =CHA_OFF 3Cells State 3Cells/6Cells Hi_Z CELLS 2 3Cells/6Cells LOW 3 A CZC Technology Title Size A3 Date: Project Name Rev C R48 Thursday, April 22, 2010 Sheet 39 of 56 5 4 3 2 1 OZ8618LN CC_SET CHA_OFF D Adapter SI4812BDY SI4812BDY CHR_PA CHR_PB Battery POWER RAILS SI4800BDY +V5S CURRENT +V5S 4A +V5AUX +V5AUX 1A +V3.3AUX +V3.3AUX 1A MAIN_ON ALWAYS_ON ACAV PWRSWVCC_MBXP D TOTAL CURRENT 5A OZ815LN SI4800BDY +V3.3S +V3.3S 4A OZ8033GN +V1.8S +V1.8S 0.5A OZ8033GN 1.8V_REG 1.8V_REG 1.5A +V0.75S 2A MAIN_ON 7A MAIN_ON C VDDC_VR_EN +V0.75S V1_5_ON MAIN_ON V1_1S1_5S_PWROK C 2A OZ812LN +V1.5 VDDC_VR_EN +V1.5 OZ8033GN 1.0V_REG 1.0V_REG SI4800BDY MVDDQ MVDDQ SI4800BDY +V1.5S +V1.5S 4A 1.6A 7A 1A VDDC_VR_EN MAIN_ON B B +V1.1S V11S_ON 0.4A +V1.1S 2A +V1.1S_VTT 8A VDDC 20A OZ8111LN V1_1S_PWROK SIR466DP SIR466DP +V1.1S_VTT VDDC 30A VDDC_VR_EN +VCC_GFXCORE +VCC_GFXCORE OZ8291LN 18A 18A 36A 36A GFXVR_EN OZ8292LN A +VCORE +VCORE A VR_ON CZC Technology Title Size A3 Date: Project Name Rev C R48 Thursday, April 22, 2010 Sheet 40 of 56 5 4 3 2 1 GU1A D PEG_TXP0 PEG_TXN0 AA38 Y37 PCIE_TX0P PCIE_TX0N Y33 Y32 PEG_RXP0_C PEG_RXN0_C 0.1uF/16V,X7R 0.1uF/16V,X7R GC1 GC2 PEG_RXP0 PEG_RXN0 PEG_TXP1 PEG_TXN1 Y35 W36 PCIE_RX1P PCIE_RX1N PCIE_TX1P PCIE_TX1N W33 W32 PEG_RXP1_C PEG_RXN1_C 0.1uF/16V,X7R 0.1uF/16V,X7R GC3 GC4 PEG_RXP1 PEG_RXN1 PEG_TXP2 PEG_TXN2 W38 V37 PCIE_RX2P PCIE_RX2N PCIE_TX2P PCIE_TX2N U33 U32 PEG_RXP2_C PEG_RXN2_C 0.1uF/16V,X7R 0.1uF/16V,X7R GC5 GC6 PEG_RXP2 PEG_RXN2 PEG_TXP3 PEG_TXN3 V35 U36 PCIE_RX3P PCIE_RX3N PCIE_TX3P PCIE_TX3N U30 U29 PEG_RXP3_C PEG_RXN3_C 0.1uF/16V,X7R 0.1uF/16V,X7R GC7 GC8 PEG_RXP3 PEG_RXN3 PCIE_RX0P PCIE_RX0N D PEG_RXN[15:0] PCIE_TX4P PCIE_TX4N T33 T32 PEG_RXP4_C PEG_RXN4_C 0.1uF/16V,X7R 0.1uF/16V,X7R GC9 GC10 PEG_RXP4 PEG_RXN4 PEG_TXP5 PEG_TXN5 T35 R36 PCIE_RX5P PCIE_RX5N PCIE_TX5P PCIE_TX5N T30 T29 PEG_RXP5_C PEG_RXN5_C 0.1uF/16V,X7R 0.1uF/16V,X7R GC11 GC12 PEG_RXP5 PEG_RXN5 PEG_TXP6 PEG_TXN6 R38 P37 PCIE_RX6P PCIE_RX6N PCIE_TX6P PCIE_TX6N P33 P32 PEG_RXP6_C PEG_RXN6_C 0.1uF/16V,X7R 0.1uF/16V,X7R GC13 GC14 PEG_RXP6 PEG_RXN6 PEG_TXP7 PEG_TXN7 P35 N36 PCIE_RX7P PCIE_RX7N PCIE_TX7P PCIE_TX7N P30 P29 PEG_RXP7_C PEG_RXN7_C 0.1uF/16V,X7R 0.1uF/16V,X7R GC15 GC16 PEG_RXP7 PEG_RXN7 PEG_TXP8 PEG_TXN8 N38 M37 PCIE_RX8P PCIE_RX8N PCIE_TX8P PCIE_TX8N N33 N32 PEG_RXP8_C PEG_RXN8_C 0.1uF/16V,X7R 0.1uF/16V,X7R GC17 GC18 PEG_RXP8 PEG_RXN8 PEG_TXP9 PEG_TXN9 M35 L36 PCIE_RX9P PCIE_RX9N PCIE_TX9P PCIE_TX9N N30 N29 PEG_RXP9_C PEG_RXN9_C 0.1uF/16V,X7R 0.1uF/16V,X7R GC19 GC20 PEG_RXP9 PEG_RXN9 PEG_TXP10 PEG_TXN10 L38 K37 PCIE_RX10P PCIE_RX10N PCIE_TX10P PCIE_TX10N L33 L32 PEG_RXP10_C PEG_RXN10_C 0.1uF/16V,X7R 0.1uF/16V,X7R GC21 GC22 PEG_RXP10 PEG_RXN10 PEG_TXP11 PEG_TXN11 K35 J36 PCIE_RX11P PCIE_RX11N PCIE_TX11P PCIE_TX11N L30 L29 PEG_RXP11_C PEG_RXN11_C 0.1uF/16V,X7R 0.1uF/16V,X7R GC23 GC24 PEG_RXP11 PEG_RXN11 PEG_TXP12 PEG_TXN12 J38 H37 PCIE_RX12P PCIE_RX12N PCIE_TX12P PCIE_TX12N K33 K32 PEG_RXP12_C PEG_RXN12_C 0.1uF/16V,X7R 0.1uF/16V,X7R GC25 GC26 PEG_RXP12 PEG_RXN12 PEG_TXP13 PEG_TXN13 H35 G36 PCIE_RX13P PCIE_RX13N PCIE_TX13P PCIE_TX13N J33 J32 PEG_RXP13_C PEG_RXN13_C 0.1uF/16V,X7R 0.1uF/16V,X7R GC27 GC28 PEG_RXP13 PEG_RXN13 PEG_TXP14 PEG_TXN14 G38 F37 PCIE_RX14P PCIE_RX14N PCIE_TX14P PCIE_TX14N K30 K29 PEG_RXP14_C PEG_RXN14_C 0.1uF/16V,X7R 0.1uF/16V,X7R GC29 GC30 PEG_RXP14 PEG_RXN14 PEG_TXP15 PEG_TXN15 F35 E37 PCIE_RX15P PCIE_RX15N PCIE_TX15P PCIE_TX15N H33 H32 PEG_RXP15_C PEG_RXN15_C 0.1uF/16V,X7R 0.1uF/16V,X7R GC31 GC32 PEG_RXP15 PEG_RXN15 AB35 AA36 12,14 PCIE_REFCLKP 12,14 PCIE_REFCLKN 1.8V_REG For Broadway, Madison and Park the PWRGOOD ball must be conneccted to ground PWRGOOD_BUF GR154 10K NC#1 NC#2 PWRGOOD AA30 PERSTB B VDDR3 1 PCIE_CALRP Y30 PCIE_CALRP GR153 1.27K,1% Y29 PCIE_CALRN GR1 2K,1% 1.0V_REG 0 CZC Technology Size B PEG_RST# Date: 5 4 SOT23_5 SN74AHC1G08DBV ns A Title R1152 PEG_RST# 4 GND U19 PCIE_CALRN C313 0.1uF/16V,X7R ns VCC 2 R306 100K ns Broadway 5,15 BUF_PLT_RST_L 1.0V_REG 35,36,42,43,44 VDDR3 16,36,42,43,45,48 PCIE_REFCLKP PCIE_REFCLKN AJ21 AK21 AH16 1.8V_REG 35,36,42,43,44 1.0V_REG 16 DGPU_HOLD_RST# CALIBRATION A PEG_TXP[15:0] 5 C 5,15 BUF_PLT_RST_L CLOCK PEG_TXN[15:0] 5 PEG_TXP[15:0] 5 PCIE_RX4P PCIE_RX4N PEG_RXP[15:0] 5 PEG_TXN[15:0] 3 B U38 T37 PCI EXPRESS INTERFACE C PEG_TXP4 PEG_TXN4 PEG_RXN[15:0] 5 PEG_RXP[15:0] 3 2 zw Madison PCI-E Project Name Rev R48 Thursday, April 22, 2010 Sheet 1 41 of C 56 5 4 3 2 1 GU1B ns DPD GR118 GR119 19 SCL_LVDS 19 SDA_LVDS 0 Madison 0 Madison I2C SCL SDA 48 SCL 48 SDA AK26 AJ26 SCL SDA AH20 AH18 AN16 AH23 AJ23 AH17 AJ17 AK17 AJ13 AH15 AJ16 AK16 AL16 AM16 AM14 AM13 AK14 AG30 AN14 AM17 AL13 AJ14 AK13 AN13 AM23 AN23 AK23 AL24 AM24 AJ19 AK19 AJ20 AK20 AJ24 AH26 AH24 GPIO_0 GPIO_1 GPIO_2 GPIO_3_SMBDATA GPIO_4_SMBCLK GPIO_5_AC_BATT GPIO_6 GPIO_7_BLON GPIO_8_ROMSO GPIO_9_ROMSI GPIO_10_ROMSCK GPIO_11 GPIO_12 GPIO_13 GPIO_14_HPD2 GPIO_15_PWRCNTL_0 GPIO_16_SSIN GPIO_17_THERMAL_INT GPIO_18_HPD3 GPIO_19_CTF GPIO_20_PWRCNTL_1 GPIO_21_BB_EN GPIO_22_ROMCSB GPIO_23_CLKREQB JTAG_TRSTB JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO GENERICA GENERICB GENERICC GENERICD GENERICE_HPD4 GENERICF GENERICG AK24 HPD1 GENERAL PURPOSE I/O C GPIO0 GPIO1 GPIO2 48 GPIO0 48 GPIO1 48 GPIO2 ns T43 ns T44 GPIO5_AC_BATT 48 GPIO5_AC_BATT 0 ns GR123 14,27 AC_PRESENT_EC GPU_BLON GPIO8_ROMSO GPIO9_ROMSI 48 GPIO8_ROMSO 48 GPIO9_ROMSI ns T54 GPIO11 GPIO12 GPIO13 48 GPIO11 48 GPIO12 48 GPIO13 ns T52 GPIO17_THERMAL_INIT 48 GPIO17_THERMAL_INIT GPIO19_CTF ns T42 GR120 10K ns 48 GPIO22_ROMCS# GR108 12,14 PEG_CLKREQ#_CLK JTAG DEBUG PORT BB_EN GPIO22_ROMCS# MAD_CLKREQ# 0 ns GR125 10K ns XTALOUT_R GR126 GR127 VDDR3 ns T53 GPIO24_TRSTB GPIO25_TDI GPIO26_TCK GPIO27_TMS GPIO28_TDO ns T40 33 ns 10K ns ns T9 GENERICC 48 GENERICC GenericF/G is NC on PARK DAC1 HPD1 (1.8V@150mA DPLL_PVDD) DPLL_PVDD 2 GR17 249,1% VREFG DPLL_VDDC XTALIN XTALOUT GR18 DPLL_PVSS 0 XTALOUT_R R0402_0 GR19 DPLL_VDDC GR20 A GY1 2 GC45 0.1uF/16V,X7R GC44 1uF/10V,X5R 300ohm/100MHz,1A 1M GR21 (1.1V@300mA DPLL_VDDC) GC43 4.7uF/10V,X5R DPLL_PVSS DPLL_PVDD DPLL_PVSS AN31 PLL/CLOCK DPLL_VDDC 0 XO_IN AW34 R0402_0 0 SS_IN AW35 R0402_0 GC47 48 GPU_DPLUS 18pF/50V,NPO 48 GPU_DMINUS 1.8V_REG TSVDD NS4 1 2 (1.8V@15mA TSVDD) AJ38 AK37 TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N AH35 AJ36 TXCCP_DPC3P TXCCM_DPC3N AU14 AV13 TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N AG38 AH37 TX0P_DPC2P TX0M_DPC2N AT15 AR14 TXOUT_U3P TXOUT_U3N AF35 AG36 TX1P_DPC1P TX1M_DPC1N AU16 AV15 TX2P_DPC0P TX2M_DPC0N AT17 AR16 TXCLK_LP_DPE3P TXCLK_LN_DPE3N AP34 AR34 TXCLK_L+ 19 TXCLK_L- 19 TXCDP_DPD3P TXCDM_DPD3N AU20 AT19 TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N AW37 AU35 TXOUT_L0+ 19 TXOUT_L0- 19 TX3P_DPD2P TX3M_DPD2N AT21 AR20 TXOUT_L1P_DPE1P TXOUT_L1N_DPE1N AR37 AU39 TXOUT_L1+ 19 TXOUT_L1- 19 TX4P_DPD1P TX4M_DPD1N AU22 AV21 TXOUT_L2P_DPE0P TXOUT_L2N_DPE0N AP35 AR35 TXOUT_L2+ 19 TXOUT_L2- 19 TX5P_DPD0P TX5M_DPD0N AT23 AR22 TXOUT_L3P TXOUT_L3N AN36 AP37 SS_IN DPLUS DMINUS AK32 TS_FDO AL31 TS_A TSVDD TSVSS THERMAL LVTMDP DP Channel D is NC on PARK R RB AD39 AD37 R313 0 G GB AE36 AD35 R314 0 B BB AF37 AE38 R315 HSYNC VSYNC AC36 AC38 RSET AB34 AVDD AVSSQ AD34 AE34 VDD1DI VSS1DI AC33 AC34 R2 R2B AC30 AC31 G2 G2B AD30 AD31 B2 B2B AF30 AF31 C Y COMP AC32 AD32 AF32 H2SYNC V2SYNC AD29 AC29 VDD2DI VSS2DI AG31 AG32 A2VDD AG33 A2VDDQ AD33 A2VSSQ AF33 R2SET AA29 DDC1CLK DDC1DATA AM26 AN26 AUX1P AUX1N AM27 AL27 DDC2CLK DDC2DATA AM19 AL19 AUX2P AUX2N AN20 AM20 DDCCLK_AUX3P DDCDATA_AUX3N AL30 AM30 DDCCLK_AUX4P DDCDATA_AUX4N AL29 AM29 DDCCLK_AUX5P DDCDATA_AUX5N AN21 AM21 XO_IN AF29 AG29 AJ32 AJ33 GC50 0.1uF/16V,X7R 120ohm/100MHz,1A GC49 1uF/10V,X5R GFB5 XTALIN XTALOUT 1 27MHz x2s60x35 GC46 18pF/50V,NPO GC48 4.7uF/10V,X5R GFB4 AM32 AN32 AV33 AU34 TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N AT33 AU32 VREFG DDC/AUX NS_VIA 1.0V_REG AH13 0.1uF/16V,X7R GC39 GC42 0.1uF/16V,X7R NS3 1 GC41 1uF/10V,X5R 300ohm/100MHz,1A GC40 4.7uF/10V,X5R GFB3 AR32 AT31 TX5P_DPB0P TX5M_DPB0N R_DAC1 20 0 GFB1 AVDD 20,48 20,48 R636 150,1% R639 150,1% R637 150,1% NS1 1 2 NS_VIA GR15 499,1% AVDD GFB2 VDD1DI AVSSQ NS2 1 DDC6CLK DDC6DATA DDCCLK_AUX7P DDCDATA_AUX7N AJ30 AJ31 AK30 AK29 2 VSS1DI NS_VIA H2SYNC V2SYNC H2SYNC 48 V2SYNC 48 120ohm/100MHz,1A A2VDD NS14 1 VDDR3 GFB16 A2VDDQ (1.8V@100mA VDD2DI) VDD1DI B 2 NS_VIA A2VSSQ 120ohm/100MHz,1A A2VDDQ GR124 715,1% A2VSSQ DDC1CLK DDC1DATA DDC1CLK 18 DDC1DATA 18 VDDR3 DDC1CLK DDC1DATA DDC6CLK DDC6DATA SCL_LVDS SDA_LVDS DDC1 AND AUX1 CAN BE JOINTED TOGETHER FOR DUAL DCC/AUX FUNCTION REFER THE DATABOOK FOR DETAIL DDC2 AND AUX2 CAN BE JOINTED TOGETHER FOR DUAL DCC/AUX FUNCTION REFER THE DATABOOK FOR DETAIL GR110 GR111 GR112 GR113 GR117 GR116 VDDR3 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K C315 0.1uF/16V,X7R 1 16,36 MADISON_POWOK GR114 GR115 DDC6CLK DDC6DATA 0 Park 0 Park SCL_LVDS SDA_LVDS 2 U27 SCL_LVDS 19 SDA_LVDS 19 GPU_BLON 1 DDCxx_AUX7x is NC on M9x and PARK 2 R308 10K FPVCC 19,44 GND R307 10K C316 0.1uF/16V,X7R DDC6CLK 20 DDC6DATA 20 VCC 4 GPU_FPVCC VDDR3 DDCxx_AUX4x is NC on PARK U29 Broadway VDD1DI (1.8V@100mA VDD2DI) 120ohm/100MHz,1A AVSSQ C (1.8V@65mA A2VDD) 120ohm/100MHz,1A B_DAC1 20 HSYNC_DAC1 VSYNC_DAC1 RSET 1.8V_REG Broadway G_DAC1 20 DAC2 PLACE VREFG DIVIDER AND CAP TO ASIC 1.8V_REG TX4P_DPB1P TX4M_DPB1N D GFB12 1.8V_REG GR16 CLOSE 499,1% AK35 AL36 VSS1DI B 18 HPD1 TXCLK_UP_DPF3P TXCLK_UN_DPF3N GC35 0.1uF/16V,X7R 10K AV31 AU30 BLON_PWM 19 GPU_FPVCC GC38 0.1uF/16V,X7R GR109 TX3P_DPB2P TX3M_DPB2N AK27 AJ27 GC60 0.1uF/16V,X7R MAD_CLKREQ# AR30 AT29 10K 10K VARY_BL DIGON GC34 1uF/10V,X5R NC on PARK DPC TXCBP_DPB3P TXCBM_DPB3N GR5 GR2 LVDS CONTROL TX2P_DPA0P 18 TX2M_DPA0N 18 GC37 1uF/10V,X5R VDDR3 TX2P_DPA0P TX2M_DPA0N VDDR3 16,36,41,43,45,48 GC58 1uF/10V,X5R 10K ns AT27 AR26 1.0V_REG 35,36,41,43,44 GU1G TX1P_DPA1P 18 TX1M_DPA1N 18 5 10K 10K 10K TX2P_DPA0P TX2M_DPA0N TX0P_DPA2P 18 TX0M_DPA2N 18 3 GR8 GR9 GR10 GR11 DPB TX1P_DPA1P TX1M_DPA1N SOT23_5 SN74AHC1G08DBV A 5 MEM_ID0 MEM_ID1 MEM_ID2 MEM_ID3 10K 10K ns 10K ns 10K ns TX1P_DPA1P TX1M_DPA1N AU26 AV25 +V5S 14,15,16,17,18,19,20,21,23,25,26,28,29,35,36,37,38 1.8V_REG 35,36,43,44 1.0V_REG GR121 0 ns VCC 4 GPIO7_BLON 19 GND 3 GR3 GR6 GR7 GR4 TX0P_DPA2P TX0M_DPA2N GC99 0.1uF/16V,X7R D DVPCNTL_MVP_0 DVPCNTL_MVP_1 DVPCNTL_0 DVPCNTL_1 DVPCNTL_2 DVPCLK DVPDATA_0 DVPDATA_1 DVPDATA_2 DVPDATA_3 DVPDATA_4 DVPDATA_5 DVPDATA_6 DVPDATA_7 DVPDATA_8 DVPDATA_9 DVPDATA_10 DVPDATA_11 DVPDATA_12 DVPDATA_13 DVPDATA_14 DVPDATA_15 DVPDATA_16 DVPDATA_17 DVPDATA_18 DVPDATA_19 DVPDATA_20 DVPDATA_21 DVPDATA_22 DVPDATA_23 TX0P_DPA2P TX0M_DPA2N AT25 AR24 +V5S 1.8V_REG TXCAP_DPA3P 18 TXCAM_DPA3N 18 GC85 0.1uF/16V,X7R NC on PARK 1.8V_REG AR8 AU8 AP8 AW8 AR3 AR1 AU1 AU3 AW3 AP6 AW5 AU5 AR6 AW6 AU6 AT7 AV7 AN7 AV9 AT9 AR10 AW10 AU10 AP10 AV11 AT11 AR12 AW12 AU12 AP12 TXCAP_DPA3P TXCAM_DPA3N GC33 4.7uF/10V,X5R DPA AU24 AV23 GC36 4.7uF/10V,X5R MUTI GFX TXCAP_DPA3P TXCAM_DPA3N SOT23_5 SN74AHC1G08DBV CZC Technology zw Title GR122 0 Madison IO ns NS_VIA Size C TSVSS Date: 5 4 3 2 Project Name Rev R48 Thursday, April 22, 2010 1 C Sheet 42 of 56 5 4 3 2 1 GU1E 120ohm/100MHz,1A GC135 1uF/10V,X5R 120ohm/100MHz,1A GC138 1uF/10V,X5R 1 GC141 4.7uF/10V,X5R GC140 1uF/10V,X5R GC139 1uF/10V,X5R 1.0V_REG PCIE_PVDD H7 H8 SPV18 AM10 SPV18 AN9 SPV10 AN10 SPVSS 1 2 NS_VIA GC144 4.7uF/10V,X5R NS5 M97, Broadway, Madison and Park only GC154 0.1uF/16V,X7R SPV18 GC156 4.7uF/10V,X5R GC159 4.7uF/10V,X5R 120ohm/100MHz,1A (1.8V@500mA MPV18) GC158 1uF/10V,X5R GFB15 GC155 1uF/10V,X5R (1.8V@75mA SPV18) GC157 0.1uF/16V,X7R 120ohm/100MHz,1A MPV18#1 MPV18#2 AF28 FB_VDDC AG28 FB_VDDCI AH29 FB_GND MPV18 VDDCI#1 VDDCI#2 VDDCI#3 VDDCI#4 VDDCI#5 VDDCI#6 VDDCI#7 VDDCI#8 VDDCI#9 VDDCI#10 VDDCI#11 VDDCI#12 VDDCI#13 VDDCI#14 ISOLATED VDDCI#15 CORE I/O VDDCI#16 VDDCI#17 VDDCI#18 VDDCI#19 VDDCI#20 VDDCI#21 VDDCI#22 Broadway AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13 GC77 4.7uF/10V,X5R GC76 2.2uF/6.3V,X5R GC75 1uF/10V,X5R GC64 4.7uF/10V,X5R GC81 2.2uF/6.3V,X5R GC63 1uF/10V,X5R GC89 1uF/10V,X5R GC90 1uF/10V,X5R GC91 1uF/10V,X5R GC92 1uF/10V,X5R GC93 1uF/10V,X5R GC100 1uF/10V,X5R GC101 1uF/10V,X5R GC102 1uF/10V,X5R GC103 1uF/10V,X5R GC121 GC109 2.2uF/6.3V,X5R 2.2uF/6.3V,X5R GC122 GC110 2.2uF/6.3V,X5R 2.2uF/6.3V,X5R GC88 1uF/10V,X5R GC98 1uF/10V,X5R CT6 22uF/6.3V,TAN ns GC134 22uF/6.3V,X5R GC120 GC108 2.2uF/6.3V,X5R 2.2uF/6.3V,X5R GC87 1uF/10V,X5R GC97 1uF/10V,X5R GC107 2.2uF/6.3V,X5R GC133 22uF/6.3V,X5R GC86 1uF/10V,X5R GC96 1uF/10V,X5R GC118 2.2uF/6.3V,X5R GC132 22uF/6.3V,X5R CT5 22uF/6.3V,TAN ns C VDDCI and VDDC should have seperate regulators with a merge option on PCB For Madison and Park, VDDCI and VDDC can share one common regulator VDDC (GDDR3/DDR3 1.12V@4A VDDCI) 120ohm/3A (GDDR5 1.12V@16A VDDCI) VOLTAGE SENESE SPVSS GFB14 PCIE_PVDD MPV18 GFB13 120ohm/100MHz,1A PLL AB37 SPV10 GC143 1uF/10V,X5R (For M96 SPV10 = VDDC) B GC142 0.1uF/16V,X7R (For M97, Broadway, Madison and Park SPV10 = 1.0V) NC_VDDRHB NC_VSSRHB GND_VSSRHB (1.8V@40mA PCIE_PVDD) 120ohm/100MHz,1A NC_VDDRHA NC_VSSRHA V12 U12 2 NS_VIA GFB11 M20 M21 MVDDQ 35,36,45,46,47 D VDDCI GC153 2.2uF/6.3V,X5R GFB10 GND_VSSRHA VDDRHB MVDDQ GC152 2.2uF/6.3V,X5R NS_VIA 1.0V_REG 35,36,41,42,44 VDDR3 16,36,41,42,45,48 GC151 2.2uF/6.3V,X5R 2 1.8V_REG 35,36,42,44 VDDC 35,36 For M96/M92 PCIE_VDDC = 1.1V For M97/RV8xx PCIE_VDDC = 1.0V GC150 2.2uF/6.3V,X5R 1 GC149 2.2uF/6.3V,X5R GFB9 VDDRHA GC148 2.2uF/6.3V,X5R M96/92 ONLY GC147 2.2uF/6.3V,X5R MVDDQ VDDC GC137 1uF/10V,X5R VDDR4 GC55 0.1uF/16V,X7R VDDR4#1 VDDR4#2 VDDR4#3 VDDR4#6 VDDR5 for M96 GC129 4.7uF/10V,X5R GC128 1uF/10V,X5R GC127 1uF/10V,X5R GC126 1uF/10V,X5R GC125 4.7uF/10V,X5R GC123 1uF/10V,X5R 120ohm/100MHz,1A GC124 1uF/10V,X5R GFB8 C GC62 1uF/10V,X5R AD12 AF11 AF12 AG11 I/O GC146 1uF/10V,X5R GC115 4.7uF/10V,X5R GC114 1uF/10V,X5R GC112 1uF/10V,X5R GC111 1uF/10V,X5R VDDR4 VDDR3 POWER 120ohm/100MHz,1A GC95 1uF/10V,X5R VDDR4#4 VDDR4#5 VDDR4#7 VDDR4#8 LEVEL TRANSLATION 1.0V_REG VDDC GC117 GC105 2.2uF/6.3V,X5R 2.2uF/6.3V,X5R AF13 AF15 AG13 AG15 VDDC_CT (1.8V@110mA VDD_CT) GFB7 AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18 AG21 AH22 AH27 AH28 M26 N24 N27 R18 R21 R23 R26 T17 T20 T22 T24 T27 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28 GC136 1uF/10V,X5R VDDR3#1 VDDR3#2 VDDR3#3 VDDR3#4 1.8V_REG VDDC#1 VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8 VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15 VDDC#16 VDDC#17 VDDC#18 VDDC#19 VDDC#20 VDDC#21 VDDC#22 VDDC#23 VDDC#24 VDDC#25 VDDC#26 VDDC#27 VDDC#28 VDDC#29 VDDC#30 VDDC#31 VDDC#32 VDDC#33 VDDC#34 VDDC#35 VDDC#36 VDDC#37 VDDC#38 VDDC#39 VDDC#40 VDDC#41 VDDC#42 VDDC#43 VDDC#44 VDDC#45 VDDC#46 VDDC#47 VDDC#48 VDDC#49 VDDC#50 VDDC#51 VDDC#52 VDDC#53 VDDC#54 VDDC#55 VDDC#56 VDDC#57 VDDC#58 +V1.5S 7,16,21,22,28,35,36 1.8V_REG 100ohm/100MHz,3A 1.0V_REG GC80 0.1uF/16V,X7R AF23 AF24 AG23 AG24 CORE G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28 +V1.5S GFB6 (1.1V@1920mA PCIE_VDDC) GC84 1uF/10V,X5R VDD_CT#1 VDD_CT#2 VDD_CT#3 VDD_CT#4 PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8 PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12 (1.8V@504mA PCIE_VDDR) AA31 AA32 AA33 AA34 V28 W29 W30 Y31 GC94 1uF/10V,X5R AF26 AF27 AG26 AG27 PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8 GC116 GC104 2.2uF/6.3V,X5R 2.2uF/6.3V,X5R VDDR1#1 VDDR1#2 VDDR1#3 VDDR1#4 VDDR1#5 VDDR1#6 VDDR1#7 VDDR1#8 VDDR1#9 VDDR1#10 VDDR1#11 VDDR1#12 VDDR1#13 VDDR1#14 VDDR1#15 VDDR1#16 VDDR1#17 VDDR1#18 VDDR1#19 VDDR1#20 VDDR1#21 VDDR1#22 VDDR1#23 VDDR1#24 VDDR1#25 VDDR1#26 VDDR1#27 VDDR1#28 VDDR1#29 VDDR1#30 VDDR1#31 VDDR1#32 VDDR1#33 VDDR1#34 GC130 22uF/6.3V,X5R AC7 AD11 AF7 AG10 AJ7 AK8 AL9 G11 G14 G17 G20 G23 G26 G29 H10 J7 J9 K11 K13 K8 L12 L16 L21 L23 L26 L7 M11 N11 P7 R11 U11 U7 Y11 Y7 1.8V_REG 120ohm/3A PCIE GC83 GC61 GC54 2.2uF/6.3V,X5R 2.2uF/6.3V,X5R 2.2uF/6.3V,X5R GC74 2.2uF/6.3V,X5R GC70 2.2uF/6.3V,X5R GC69 GC79 GC73 2.2uF/6.3V,X5R 2.2uF/6.3V,X5R 2.2uF/6.3V,X5R GC82 GC78 GC72 2.2uF/6.3V,X5R 2.2uF/6.3V,X5R 2.2uF/6.3V,X5R GC59 GC71 2.2uF/6.3V,X5R 2.2uF/6.3V,X5R GC53 2.2uF/6.3V,X5R GC67 2.2uF/6.3V,X5R GC66 GC57 2.2uF/6.3V,X5R 2.2uF/6.3V,X5R GC65 GC56 GC51 2.2uF/6.3V,X5R 2.2uF/6.3V,X5R 2.2uF/6.3V,X5R D PCIE_VDDR MEM I/O For DDR3/GDDR5, MVDDQ = 1.5V GC145 1uF/10V,X5R MVDDQ FB95 120ohm/100MHz,2.5A FB96 120ohm/100MHz,2.5A B NOTE1: Back Bias is not supported on M97, Broadway, Madison and Park For the M96 Back Bias circuitry, refer to REF134 NOTE2: FB_VDDC, FB_VDDCI and FB_GND are not support on M96 NOTE3: M97 VDDC and VDDCI ball assignments are different from M96. If M96 is populated on this design, VDDC and VDDCI will be shorted on the substrate. M97, Broadway, Madison and Park only M96 do not support core vsense feature NOTE4: For M2 design compatibility, refer to the document AN_M96_Ax and AN_M97_Ax A A VCORE_SEN/RTN and VDDCI_SEN/RTN route as differetial pair CZC Technology zw Title Madison Power Size C Date: 5 4 3 2 Project Name Rev R48 Thursday, April 22, 2010 1 C Sheet 43 of 56 5 4 3 2 1 GU1F 1.8V_REG 35,36,42,43 GU1H DPC_VDD18 DP C/D POWER VDDC 35,36,43 DPA_VDD18 DP A/B POWER AP20 AP21 DPC_VDD18#1 DPC_VDD18#2 DPA_VDD18#1 DPA_VDD18#2 AN24 AP24 AP13 AT13 DPC_VDD10#1 DPC_VDD10#2 DPA_VDD10#1 DPA_VDD10#2 AP31 AP32 AN17 AP16 AP17 AW14 AW16 DPC_VSSR#1 DPC_VSSR#2 DPC_VSSR#3 DPC_VSSR#4 DPC_VSSR#5 DPA_VSSR#1 DPA_VSSR#2 DPA_VSSR#3 DPA_VSSR#4 DPA_VSSR#5 AN27 AP27 AP28 AW24 AW26 AP22 AP23 DPD_VDD18#1 DPD_VDD18#2 DPB_VDD18#1 DPB_VDD18#2 AP25 AP26 AP14 AP15 DPD_VDD10#1 DPD_VDD10#2 DPB_VDD10#1 DPB_VDD10#2 AN33 AP33 AN19 AP18 AP19 AW20 AW22 DPD_VSSR#1 DPD_VSSR#2 DPD_VSSR#3 DPD_VSSR#4 DPD_VSSR#5 DPB_VSSR#1 DPB_VSSR#2 DPB_VSSR#3 DPB_VSSR#4 DPB_VSSR#5 AN29 AP29 AP30 AW30 AW32 1.0V_REG DPA_VDD10 (1.0V@200mA DPC_VDD10) GC160 0.1uF/16V,X7R D DPD_VDD18 DNI for M96/M92 GC174 4.7uF/10V,X5R 1.0V_REG (1.1V@200mA DPB_VDD10) 1.8V_REG DPCD_CALR AW18 DPCD_CALR AH34 AJ34 DP E/F POWER DPE_VDD18#1 DPE_VDD18#2 DPAB_CALR AW28 DPAB_CALR GR23 DP PLL POWER DPA_PVDD DPA_PVSS AU28 AV27 (1.8V@20mA DPA_PVDD) 150,1% LVDS mode (1.0V@120mA DPE_VDD10) DPE_VDD10 GC183 4.7uF/10V,X5R DP mode DPE_VSSR#1 DPE_VSSR#2 DPE_VSSR#3 DPE_VSSR#4 DPC_PVDD DPC_PVSS AU18 AV17 (1.8V@20mA DPC_PVDD) DPD_PVDD DPD_PVSS AV19 AR18 DPE_PVDD DPE_PVSS AM37 AN38 DPF_PVDD DPF_PVSS AL38 AM35 DPF_PVDD DPF_VDD10#1 DPF_VDD10#2 DPF_VSSR#1 DPF_VSSR#2 DPF_VSSR#3 DPF_VSSR#4 DPF_VSSR#5 DPE_VDD18 GC205 4.7uF/10V,X5R 150,1% DPEF_CALR AM39 1 NS_VIA GFB31 (1.8V@20mA DPE_PVDD) 120ohm/100MHz,1A NS_VIA 3 Q35 2N7002K GFB33 (1.8V@20mA DPF_PVDD) GC214 1uF/10V,X5R For dual link DVI using DPA AND DPB, DPA_VDDxx and DPB_VDDxx can be shared respectively NS10 1 2 DPEPVSS SOT23 ns For dual link DVI using DPC AND DPD, DPC_VDDxx and DPD_VDDxx can be shared respectively 1 NS9 2 Broadway For dual link LVDS, DPE_VDDxx and DPF_VDDxx can be shared respectively 120ohm/100MHz,1A DNI for M97/M96 2 NS11 1 NS_VIA DPFPVSS ns 2 19,42 FPVCC NS_VIA 1 DPCPVSS GC213 0.1uF/16V,X7R 1 ns NS8 2 DPDPVDD DPDPVSS For M97/M96, DPF_VDD18 can be shared with DPE_VDD18 GC301 1000pF/50V,X7R 1 NS_VIA DPEF_CALR For M97/M96, DPF_VDD10 can be shared with DPE_VDD10 GR164 10K ns DPBPVSS GC208 4.7uF/10V,X5R GC204 1uF/10V,X5R GR24 DPCPVDD DPE_PVDD DPF_VDD18#1 DPF_VDD18#2 DPF_VDD10 (1.8V@20mA DPD_PVDD) NS7 2 GC215 4.7uF/10V,X5R 3 AN34 AP39 AR39 AU37 GC206 0.1uF/16V,X7R 2 GC203 1uF/10V,X5R GC202 0.1uF/16V,X7R Q34 AO3415 (1.8V@20mA DPB_PVDD) AF39 AH39 AK39 AL34 AM34 (1.8V@130mA DPE_VDD18) (1.8V@200mA DPE_VDD18) DGPU AV29 AR28 AK33 AK34 GC198 4.7uF/10V,X5R GC197 1uF/10V,X5R GC196 0.1uF/16V,X7R GC193 0.1uF/16V,X7R DP mode B DPB_PVDD DPB_PVSS AF34 AG34 (1.0V@120mA DPF_VDD10) (1.0V@110mA DPF_VDD10) 300ohm/100MHz,1A DPE_VDD10#1 DPE_VDD10#2 LVDS mode DPD_VDD18 GFB30 AL33 AM33 DPE_VDD18 (1.8V@130mA DPD_VDD18) 1 NS_VIA GC207 1uF/10V,X5R GC187 0.1uF/16V,X7R GC182 1uF/10V,X5R 120ohm/100MHz,1A GC181 0.1uF/16V,X7R DPC_VDD18 (1.8V@130mA DPC_VDD18) 2 DPBPVDD DPAPVSS (1.0V@110mA DPE_VDD10) GFB23 NS6 GC190 0.1uF/16V,X7R DP mode 120ohm/100MHz,1A GC199 0.1uF/16V,X7R GC178 0.1uF/16V,X7R DPE_VDD18 GC177 4.7uF/10V,X5R 150,1% GC176 1uF/10V,X5R GR22 GC175 0.1uF/16V,X7R DPB_VDD18 LVDS mode GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8 GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#56 GND#57 GND#58 GND#59 GND#60 GND#61 GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#84 GND#85 GND#86 GND#87 GND#88 GND#89 GND#90 GND#91 GND#92 GND#93 GND#94 GND#95 GND#96 GND#97 GND#98 A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 AL21 AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13 VSS_MECH#1 VSS_MECH#2 VSS_MECH#3 A39 AW1 AW39 PCIE_VSS#1 PCIE_VSS#2 PCIE_VSS#3 PCIE_VSS#4 PCIE_VSS#5 PCIE_VSS#6 PCIE_VSS#7 PCIE_VSS#8 PCIE_VSS#9 PCIE_VSS#10 PCIE_VSS#11 PCIE_VSS#12 PCIE_VSS#13 PCIE_VSS#14 PCIE_VSS#15 PCIE_VSS#16 PCIE_VSS#17 PCIE_VSS#18 PCIE_VSS#19 PCIE_VSS#20 PCIE_VSS#21 PCIE_VSS#22 PCIE_VSS#23 PCIE_VSS#24 PCIE_VSS#25 PCIE_VSS#26 PCIE_VSS#27 PCIE_VSS#28 PCIE_VSS#29 PCIE_VSS#30 PCIE_VSS#31 PCIE_VSS#32 PCIE_VSS#33 PCIE_VSS#34 PCIE_VSS#35 GFB21 (1.8V@130mA DPB_VDD18) C AB39 E39 F34 F39 G33 G34 H31 H34 H39 J31 J34 K31 K34 K39 L31 L34 M34 M39 N31 N34 P31 P34 P39 R34 T31 T34 T39 U31 U34 V34 V39 W31 W34 Y34 Y39 DPAPVDD GC184 0.1uF/16V,X7R GC173 1uF/10V,X5R GC172 0.1uF/16V,X7R GC166 0.1uF/16V,X7R (1.8V@130mA DPA_VDD18) 120ohm/100MHz,1A 120ohm/100MHz,1A DPB_VDD10 (1.0V@200mA DPD_VDD10) DPA_VDD18 GFB20 1.0V_REG GFB17 DPB_VDD18 DPD_VDD10 1.8V_REG (1.0V@200mA DPA_VDD10) GC165 4.7uF/10V,X5R DPC_VDD10 GC164 1uF/10V,X5R 1.0V_REG 35,36,41,42,43 VDDC GC163 0.1uF/16V,X7R 1.0V_REG GC169 0.1uF/16V,X7R 1.8V_REG F15 F17 F19 F21 F23 F25 F27 F29 F31 F33 F7 F9 G2 G6 H9 J2 J27 J6 J8 K14 K7 L11 L17 L2 L22 L24 L6 M17 M22 M24 N16 N18 N2 N21 N23 N26 N6 R15 R17 R2 R20 R22 R24 R27 R6 T11 T13 T16 T18 T21 T23 T26 U15 U17 U2 U20 U22 U24 U27 U6 V11 V16 V18 V21 V23 V26 W2 W6 Y15 Y17 Y20 Y22 Y24 Y27 U13 V13 GND GND#100 GND#101 GND#102 GND#103 GND#104 GND#105 GND#106 GND#107 GND#108 GND#109 GND#110 GND#111 GND#112 GND#113 GND#114 GND#115 GND#116 GND#117 GND#118 GND#119 GND#120 GND#121 GND#122 GND#123 GND#124 GND#125 GND#126 GND#127 GND#128 GND#129 GND#130 GND#131 GND#132 GND#133 GND#134 GND#135 GND#136 GND#137 GND#138 GND#139 GND#140 GND#141 GND#142 GND#143 GND#144 GND#145 GND#146 GND#147 GND#148 GND#149 GND#150 GND#151 GND#153 GND#154 GND#155 GND#156 GND#157 GND#158 GND#159 GND#160 GND#161 GND#163 GND#164 GND#165 GND#166 GND#167 GND#168 GND#169 GND#170 GND#171 GND#172 GND#173 GND#174 GND#175 GND#152 GND#162 D C B Broadway A A CZC Technology zw Title Madison DP Power Size C Date: 5 4 3 2 Project Name Rev R48 Thursday, April 22, 2010 1 C Sheet 44 of 56 5 4 3 2 1 MVDDQ Madison MVREFDA MVREFSA MVDDQ Madison B MVREFDA MVREFSA WCKA0_0/DQMA_0 WCKA0B_0/DQMA_1 WCKA0_1/DQMA_2 WCKA0B_1/DQMA_3 WCKA1_0/DQMA_4 WCKA1B_0/DQMA_5 WCKA1_1/DQMA_6 WCKA1B_1/DQMA_7 GDDR5/DDR2/GDDR3 EDCA0_0/QSA_0/RDQSA_0 EDCA0_1/QSA_1/RDQSA_1 EDCA0_2/QSA_2/RDQSA_2 EDCA0_3/QSA_3/RDQSA_3 EDCA1_0/QSA_4/RDQSA_4 EDCA1_1/QSA_5/RDQSA_5 EDCA1_2/QSA_6/RDQSA_6 EDCA1_3/QSA_7/RDQSA_7 A32 C32 D23 E22 C14 A14 E10 D9 DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7 C34 D29 D25 E20 E16 E12 J10 D7 QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7 DDBIA0_0/QSA_0B/WDQSA_0 DDBIA0_1/QSA_1B/WDQSA_1 DDBIA0_2/QSA_2B/WDQSA_2 DDBIA0_3/QSA_3B/WDQSA_3 DDBIA1_0/QSA_4B/WDQSA_4 DDBIA1_1/QSA_5B/WDQSA_5 DDBIA1_2/QSA_6B/WDQSA_6 DDBIA1_3/QSA_7B/WDQSA_7 A34 E30 E26 C20 C16 C12 J11 F8 QSA#0 QSA#1 QSA#2 QSA#3 QSA#4 QSA#5 QSA#6 QSA#7 ADBIA0/ODTA0 ADBIA1/ODTA1 J21 G19 ODTA0 ODTA1 CLKA0 CLKA0B H27 G27 CLKA0 CLKA0# CLKA1 CLKA1B J14 H14 CLKA1 CLKA1# RASA0B RASA1B K23 K19 RASA0# RASA1# CASA0B CASA1B K20 K17 CASA0# CASA1# CSA0B_0 CSA0B_1 K24 K27 CSA0#_0 CSA1B_0 CSA1B_1 M13 K16 CSA1#_0 CKEA0 CKEA1 K21 J20 CKEA0 CKEA1 GR32 GR33 GR34 243,1% 243,1% 243,1% MEM_CALRN0 L27 MEM_CALRN1 N12 MEM_CALRN2AG12 MEM_CALRN0 MEM_CALRN1 MEM_CALRN2 WEA0B WEA1B K26 L15 WEA0# WEA1# GR36 243,1% 243,1% 243,1% MEM_CALRP0 M12 MEM_CALRP1 M27 MEM_CALRP2AH12 MEM_CALRP1 MEM_CALRP0 MEM_CALRP2 MAA0_8 MAA1_8 H23 J19 MAA13 GR37 GR38 MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63 A_BA2 46 A_BA0 46 A_BA1 46 DQMA#[7:0] 46 QSA[7:0] 46 QSA#[7:0] 46 ODTA0 46 ODTA1 46 CLKA0 46 CLKA0# 46 CLKA1 46 CLKA1# 46 MVDDQ RASA0# 46 RASA1# 46 GR26 40.2,1% CASA0# 46 CASA1# 46 CSA0#_0 46 MVDDQ GR29 100,1% CSA1#_0 46 GR30 40.2,1% CKEA0 46 CKEA1 46 WEA0# 46 WEA1# 46 Ra GR35 Rb 100,1% MVREFDB Y12 MVREFSB AA12 VDDR3 GR165 C5 C3 E3 E1 F1 F3 F5 G4 H5 H6 J4 K6 K5 L4 M6 M1 M3 M5 N4 P6 P5 R4 T6 T1 U4 V6 V1 V3 Y6 Y1 Y3 Y5 AA4 AB6 AB1 AB3 AD6 AD1 AD3 AD5 AF1 AF3 AF6 AG4 AH5 AH6 AJ4 AK3 AF8 AF9 AG8 AG7 AK9 AL7 AM8 AM7 AK1 AL4 AM6 AM1 AN4 AP3 AP1 AP5 AD28 TEST_MCLK AK10 TEST_YCLK AL10 ns Broadway MAB[13:0] 47 MAB0_0/MAB_0 MAB0_1/MAB_1 MAB0_2/MAB_2 MAB0_3/MAB_3 MAB0_4/MAB_4 MAB0_5/MAB_5 MAB0_6/MAB_6 MAB0_7/MAB_7 MAB1_0/MAB_8 MAB1_1/MAB_9 MAB1_2/MAB_10 MAB1_3/MAB_11 MAB1_4/MAB_12 MAB1_5/BA2 MAB1_6/BA0 MAB1_7/BA1 P8 T9 P9 N7 N8 N9 U9 U8 Y9 W9 AC8 AC9 AA7 AA8 Y8 AA9 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 B_BA2 B_BA0 B_BA1 WCKB0_0/DQMB_0 WCKB0B_0/DQMB_1 WCKB0_1/DQMB_2 WCKB0B_1/DQMB_3 WCKB1_0/DQMB_4 WCKB1B_0/DQMB_5 WCKB1_1/DQMB_6 WCKB1B_1/DQMB_7 GDDR5/DDR2/GDDR3 EDCB0_0/QSB_0/RDQSB_0 EDCB0_1/QSB_1/RDQSB_1 EDCB0_2/QSB_2/RDQSB_2 EDCB0_3/QSB_3/RDQSB_3 EDCB1_0/QSB_4/RDQSB_4 EDCB1_1/QSB_5/RDQSB_5 EDCB1_2/QSB_6/RDQSB_6 EDCB1_3/QSB_7/RDQSB_7 H3 H1 T3 T5 AE4 AF5 AK6 AK5 DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7 F6 K3 P3 V5 AB5 AH1 AJ9 AM5 QSB0 QSB1 QSB2 QSB3 QSB4 QSB5 QSB6 QSB7 DDBIB0_0/QSB_0B/WDQSB_0 DDBIB0_1/QSB_1B/WDQSB_1 DDBIB0_2/QSB_2B/WDQSB_2 DDBIB0_3/QSB_3B/WDQSB_3 DDBIB1_0/QSB_4B/WDQSB_4 DDBIB1_1/QSB_5B/WDQSB_5 DDBIB1_2/QSB_6B/WDQSB_6 DDBIB1_3/QSB_7B/WDQSB_7 G7 K1 P1 W4 AC4 AH3 AJ8 AM3 QSB#0 QSB#1 QSB#2 QSB#3 QSB#4 QSB#5 QSB#6 QSB#7 MVREFDB MVREFSB TESTEN CLKTESTA CLKTESTB ODTB0 ODTB1 CLKB0 CLKB0B L9 L8 CLKB0 CLKB0# CLKB1 CLKB1B AD8 AD7 CLKB1 CLKB1# RASB0B RASB1B T10 Y10 RASB0# RASB1# CASB0B CASB1B W10 AA10 CASB0# CASB1# CSB0B_0 CSB0B_1 P10 L10 CSB0#_0 CSB1B_0 CSB1B_1 AD10 AC10 CSB1#_0 CKEB0 CKEB1 U10 AA11 CKEB0 CKEB1 WEB0B WEB1B N10 AB11 WEB0# WEB1# MAB0_8 MAB1_8 T8 W8 MAB13 AH11 DRAM_RST_R DRAM_RST B_BA2 47 B_BA0 47 B_BA1 47 DQMB#[7:0] 47 QSB[7:0] 47 T7 W7 ADBIB0/ODTB0 ADBIB1/ODTB1 10K ns TESTEN GR40 1K,1% DQB0_0/DQB_0 DQB0_1/DQB_1 DQB0_2/DQB_2 DQB0_3/DQB_3 DQB0_4/DQB_4 DQB0_5/DQB_5 DQB0_6/DQB_6 DQB0_7/DQB_7 DQB0_8/DQB_8 DQB0_9/DQB_9 DQB0_10/DQB_10 DQB0_11/DQB_11 DQB0_12/DQB_12 DQB0_13/DQB_13 DQB0_14/DQB_14 DQB0_15/DQB_15 DQB0_16/DQB_16 DQB0_17/DQB_17 DQB0_18/DQB_18 DQB0_19/DQB_19 DQB0_20/DQB_20 DQB0_21/DQB_21 DQB0_22/DQB_22 DQB0_23/DQB_23 DQB0_24/DQB_24 DQB0_25/DQB_25 DQB0_26/DQB_26 DQB0_27/DQB_27 DQB0_28/DQB_28 DQB0_29/DQB_29 DQB0_30/DQB_30 DQB0_31/DQB_31 DQB1_0/DQB_32 DQB1_1/DQB_33 DQB1_2/DQB_34 DQB1_3/DQB_35 DQB1_4/DQB_36 DQB1_5/DQB_37 DQB1_6/DQB_38 DQB1_7/DQB_39 DQB1_8/DQB_40 DQB1_9/DQB_41 DQB1_10/DQB_42 DQB1_11/DQB_43 DQB1_12/DQB_44 DQB1_13/DQB_45 DQB1_14/DQB_46 DQB1_15/DQB_47 DQB1_16/DQB_48 DQB1_17/DQB_49 DQB1_18/DQB_50 DQB1_19/DQB_51 DQB1_20/DQB_52 DQB1_21/DQB_53 DQB1_22/DQB_54 DQB1_23/DQB_55 DQB1_24/DQB_56 DQB1_25/DQB_57 DQB1_26/DQB_58 DQB1_27/DQB_59 DQB1_28/DQB_60 DQB1_29/DQB_61 DQB1_30/DQB_62 DQB1_31/DQB_63 MEMORY INTERFACE B L18 L20 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 A_BA2 A_BA0 A_BA1 D DDR2 GDDR5/GDDR3 DDR3 GDDR5 GC218 1uF/10V,X5R GR31 100,1% Madison 100,1% Madison G24 J23 H24 J24 H26 J26 H21 G21 H19 H20 L13 G16 J16 H16 J17 H17 GC217 1uF/10V,X5R GR27 GR28 40.2,1% Madison MAA0_0/MAA_0 MAA0_1/MAA_1 MAA0_2/MAA_2 MAA0_3/MAA_3 MAA0_4/MAA_4 MAA0_5/MAA_5 MAA0_6/MAA_6 MAA0_7/MAA_7 MAA1_0/MAA_8 MAA1_1/MAA_9 MAA1_2/MAA_10 MAA1_3/MAA_11 MAA1_4/MAA_12 MAA1_5/MAA_13_BA2 MAA1_6/MAA_14_BA0 MAA1_7/MAA_A15_BA1 GDDR5 MVDDQ GC216 1uF/10V,X5R GR25 40.2,1% Madison DQA0_0/DQA_0 DQA0_1/DQA_1 DQA0_2/DQA_2 DQA0_3/DQA_3 DQA0_4/DQA_4 DQA0_5/DQA_5 DQA0_6/DQA_6 DQA0_7/DQA_7 DQA0_8/DQA_8 DQA0_9/DQA_9 DQA0_10/DQA_10 DQA0_11/DQA_11 DQA0_12/DQA_12 DQA0_13/DQA_13 DQA0_14/DQA_14 DQA0_15/DQA_15 DQA0_16/DQA_16 DQA0_17/DQA_17 DQA0_18/DQA_18 DQA0_19/DQA_19 DQA0_20/DQA_20 DQA0_21/DQA_21 DQA0_22/DQA_22 DQA0_23/DQA_23 DQA0_24/DQA_24 DQA0_25/DQA_25 DQA0_26/DQA_26 DQA0_27/DQA_27 DQA0_28/DQA_28 DQA0_29/DQA_29 DQA0_30/DQA_30 DQA0_31/DQA_31 DQA1_0/DQA_32 DQA1_1/DQA_33 DQA1_2/DQA_34 DQA1_3/DQA_35 DQA1_4/DQA_36 DQA1_5/DQA_37 DQA1_6/DQA_38 DQA1_7/DQA_39 DQA1_8/DQA_40 DQA1_9/DQA_41 DQA1_10/DQA_42 DQA1_11/DQA_43 DQA1_12/DQA_44 DQA1_13/DQA_45 DQA1_14/DQA_46 DQA1_15/DQA_47 DQA1_16/DQA_48 DQA1_17/DQA_49 DQA1_18/DQA_50 DQA1_19/DQA_51 DQA1_20/DQA_52 DQA1_21/DQA_53 DQA1_22/DQA_54 DQA1_23/DQA_55 DQA1_24/DQA_56 DQA1_25/DQA_57 DQA1_26/DQA_58 DQA1_27/DQA_59 DQA1_28/DQA_60 DQA1_29/DQA_61 DQA1_30/DQA_62 DQA1_31/DQA_63 GU1D DDR2 GDDR3/GDDR5 DDR3 47 MDB[63:0] GC221 0.1uF/16V,X7R MVDDQ C37 C35 A35 E34 G32 D33 F32 E32 D31 F30 C30 A30 F28 C28 A28 E28 D27 F26 C26 A26 F24 C24 A24 E24 C22 A22 F22 D21 A20 F20 D19 E18 C18 A18 F18 D17 A16 F16 D15 E14 F14 D13 F12 A12 D11 F10 A10 C10 G13 H13 J13 H11 G10 G8 K9 K10 G9 A8 C8 E8 A6 C6 E6 A5 MAA[13:0] 46 GC220 0.1uF/16V,X7R C MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63 DDR2 GDDR5/GDDR3 DDR3 MEMORY INTERFACE A 46 MDA[63:0] GC219 1uF/10V,X5R GU1C DDR2 GDDR3/GDDR5 DDR3 D MVDDQ 35,36,43,46,47 VDDR3 16,36,41,42,43,48 ODTB0 47 ODTB1 47 CLKB0 47 CLKB0# 47 CLKB1 47 CLKB1# 47 RASB0# 47 RASB1# 47 CASB0# 47 CASB1# 47 CSB0#_0 47 CSB1#_0 47 CKEB0 47 CKEB1 47 WEB0# 47 WEB1# 47 B GR39 680 GR42 4.7K Broadway MVDDQ GR43 GR44 49.9,1% 49.9,1% ns ns FOR M97, Broadway, Madiso and Park ONLY DRAM_RST# 46,47 GR41 4.7K GC222 68pF/50V,NPO ns C QSB#[7:0] 47 This basic topology should be used for DRAM_RST for DDR3/GDDR3/GDDR5.These Capacitors and Resistor values are an example only. The Series R and || Cap values will depend on the DRAM load and will have to be calculated for different Memory ,DRAM Load and board to pass Reset Signal Spec. route 50ohms single-ended/100ohms diff and keep short Debug only, for clock observation, if not needed, DNI Designator DDR3/GDDR3 Memory Stuff Option For M97-M2 For Mannhatton R_MEM_1 10K GDDR5 GDDR3 DDR3 R_MEM_2 0R/Short 680R 1.5V 1.8V/1.5V 1.5V R_MEM_3 DNI DNI Ra 40.2R 40.2R 40.2R C_MEM 2.2nF 68pF Rb 100R 100R 100R A MVDDQ 10K A CZC Technology zw Title Madison Memory Size C Date: 5 4 3 2 Project Name Rev R48 Thursday, April 22, 2010 1 C Sheet 45 of 56 5 4 3 2 1 K4W1G1646E-HC1A Samsung E-die Qimonda A1-die IDGH1G-04A1F1C-18 K4W1G1646E-HC11 900MHz Samsung E-die Hynix Orion-die H5TQ1G63BFR-12C 800MHz DDR3 Qimonda A1-die IDGH1G-04A1F1C-16 64M X 16bit Samsung E-die K4W1G1646E-HC12 Tiva-die H5TQ1G63AFR-14C 700MHz Hynix Hynix Orion-die H5TS1G63BFR-1 Samsung D-die K4W1G1646D-EC15 667MHz Samsung E-die K4W1G1646E-HC15 Qimonda A1-die IDGH1G-04A1F1C-13 Parts in red print are assigned the highest priority for Manhattan qualification. 1GHz CHANNEL A: 256MB/512MB DDR3 Size per Part 1024 Mbit MDA[63:0] 45 MDA[63:0] QSA[7:0] 45 QSA[7:0] QSA#[7:0] 45 QSA#[7:0] DQMA#[7:0] 45 DQMA#[7:0] CLKA0 CLKA0# CKEA0 J7 K7 K9 CK CK CKE 56.2,1% GR62 ODTA0 CSA0#_0 RASA0# CASA0# WEA0# K1 L2 J3 K3 L3 ODT CS RAS CAS WE QSA2 QSA0 F3 C7 DQSL DQSU DQMA#2 E7 DQMA#0 D3 QSA#2 QSA#0 DRAM_RST# 45,47 DRAM_RST# Should be 240 Ohms +-1% G3 B7 DML DMU DQSL DQSU T2 RESET L8 ZQ J1 L1 J9 L9 VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 A1 A8 C1 C9 D2 E9 F1 H2 H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 NC#J1 NC#L1 NC#J9 NC#L9 GR58 4.99K,1% A_BA0 A_BA1 A_BA2 45 A_BA0 45 A_BA1 45 A_BA2 45 CLKA0 45 CLKA0# 45 CKEA0 MVDDQ 45 45 45 45 45 ODTA0 CSA0#_0 RASA0# CASA0# WEA0# M2 N8 M3 BA0 BA1 BA2 CLKA0 J7 CLKA0# K7 CKEA0 K9 CK CK CKE ODTA0 CSA0#_0 RASA0# CASA0# WEA0# K1 L2 J3 K3 L3 ODT CS RAS CAS WE QSA3 QSA1 F3 C7 DQSL DQSU DQMA#3 E7 DQMA#1 D3 QSA#3 QSA#1 DRAM_RST# 45,47 DRAM_RST# Should be 240 Ohms +-1% B1 B9 D1 D8 E2 E8 F9 G1 G9 G3 B7 DML DMU DQSL DQSU T2 RESET L8 ZQ GR66 243,1% J1 L1 J9 L9 100-BALL SDRAM DDR3 23E22387MNG8 D7 C3 C8 C2 A7 A2 B8 A3 MDA15 MDA10 MDA14 MDA11 MDA12 MDA8 MDA13 MDA9 VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 B2 D9 G7 K2 K8 N1 N9 R1 R9 NC#J1 NC#L1 NC#J9 NC#L9 GR55 4.99K,1% A1 A8 C1 C9 D2 E9 F1 H2 H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 MAA0 N3 MAA1 P7 MAA2 P3 MAA3 N2 MAA4 P8 MAA5 P2 MAA6 R8 MAA7 R2 MAA8 T8 MAA9 R3 MAA10 L7 MAA11 R7 MAA12 N7 MAA13 T3 T7 M7 MVDDQ GR53 4.99K,1% MVDDQ VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 45 MAA[13:0] GR59 4.99K,1% 45 CLKA1 45 CLKA1# 45 CKEA1 MVDDQ 45 45 45 45 45 M2 N8 M3 BA0 BA1 BA2 CLKA1 CLKA1# CKEA1 J7 K7 K9 CK CK CKE ODTA1 CSA1#_0 RASA1# CASA1# WEA1# K1 L2 J3 K3 L3 ODT CS RAS CAS WE QSA4 QSA5 F3 C7 DQSL DQSU ODTA1 CSA1#_0 RASA1# CASA1# WEA1# GC232 0.01uF/25V,X7R DQMA#4 E7 DQMA#5 D3 QSA#4 QSA#5 DRAM_RST# 45,47 DRAM_RST# Should be 240 Ohms +-1% B1 B9 D1 D8 E2 E8 F9 G1 G9 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 MDA43 MDA45 MDA40 MDA44 MDA42 MDA47 MDA41 MDA46 VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 B2 D9 G7 K2 K8 N1 N9 R1 R9 VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 A1 A8 C1 C9 D2 E9 F1 H2 H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 DQSL DQSU T2 RESET L8 ZQ GR51 4.99K,1% 45 MAA[13:0] GR60 4.99K,1% A_BA0 A_BA1 A_BA2 45 A_BA0 45 A_BA1 45 A_BA2 45 CLKA1 45 CLKA1# 45 CKEA1 MVDDQ 45 45 45 45 45 M8 H1 MAA0 N3 MAA1 P7 MAA2 P3 MAA3 N2 MAA4 P8 MAA5 P2 MAA6 R8 MAA7 R2 MAA8 T8 MAA9 R3 MAA10 L7 MAA11 R7 MAA12 N7 MAA13 T3 T7 M7 GR56 4.99K,1% ODTA1 CSA1#_0 RASA1# CASA1# WEA1# CLKA1 J7 CLKA1# K7 CKEA1 K9 CK CK CKE ODTA1 CSA1#_0 RASA1# CASA1# WEA1# K1 L2 J3 K3 L3 ODT CS RAS CAS WE QSA6 QSA7 F3 C7 DQSL DQSU DRAM_RST# 45,47 DRAM_RST# Should be 240 Ohms +-1% 100-BALL SDRAM DDR3 23E22387MNG8 MDA51 MDA52 MDA49 MDA53 MDA48 MDA54 MDA50 MDA55 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 MDA63 MDA59 MDA62 MDA56 MDA60 MDA57 MDA61 MDA58 VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 B2 D9 G7 K2 K8 N1 N9 R1 R9 VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 A1 A8 C1 C9 D2 E9 F1 H2 H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 B1 B9 D1 D8 E2 E8 F9 G1 G9 MVDDQ DML DMU G3 B7 DQSL DQSU T2 RESET L8 ZQ GR68 243,1% J1 L1 J9 L9 E3 F7 F2 F8 H3 H8 G2 H7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 BA0 BA1 BA2 QSA#6 QSA#7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VREFCA VREFDQ M2 N8 M3 DQMA#6 E7 DQMA#7 D3 B1 B9 D1 D8 E2 E8 F9 G1 G9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 NC#J1 NC#L1 NC#J9 NC#L9 GU4 VREFC_U23 VREFD_U23 MVDDQ MVDDQ GR67 243,1% 100-BALL SDRAM DDR3 23E22387MNG8 MDA35 MDA36 MDA32 MDA39 MDA34 MDA38 MDA33 MDA37 DML DMU G3 B7 J1 L1 J9 L9 E3 F7 F2 F8 H3 H8 G2 H7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 A_BA0 A_BA1 A_BA2 45 A_BA0 45 A_BA1 45 A_BA2 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VREFCA VREFDQ GC226 0.1uF/16V,X7R DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 GC225 0.1uF/16V,X7R B2 D9 G7 K2 K8 N1 N9 R1 R9 GR49 4.99K,1% MVDDQ GR65 243,1% B VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 MVDDQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 M8 H1 +V1.5_REG GR47 4.99K,1% GU3 VREFC_U22 VREFD_U22 MVDDQ 35,36,43,45,47 +V1.5_REG GC230 0.1uF/16V,X7R BA0 BA1 BA2 GC231 0.01uF/25V,X7R MDA0 MDA4 MDA1 MDA6 MDA3 MDA7 MDA2 MDA5 MAA0 N3 MAA1 P7 MAA2 P3 MAA3 N2 MAA4 P8 MAA5 P2 MAA6 R8 MAA7 R2 MAA8 T8 MAA9 R3 MAA10 L7 MAA11 R7 MAA12 N7 MAA13 T3 T7 M7 E3 F7 F2 F8 H3 H8 G2 H7 GC229 0.1uF/16V,X7R M2 N8 M3 ODTA0 CSA0#_0 RASA0# CASA0# WEA0# D7 C3 C8 C2 A7 A2 B8 A3 45 MAA[13:0] DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VREFCA VREFDQ 56.2,1% 56.2,1% GR61 45 CKEA0 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 GR50 4.99K,1% M8 H1 MDA31 MDA24 MDA29 MDA26 MDA28 MDA27 MDA30 MDA25 56.2,1% GC227 0.1uF/16V,X7R 45 CLKA0 45 CLKA0# E3 F7 F2 F8 H3 H8 G2 H7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 A_BA0 A_BA1 A_BA2 45 A_BA0 45 A_BA1 45 A_BA2 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VREFCA VREFDQ GR48 4.99K,1% GU5 VREFC_U21 VREFD_U21 GR64 MAA0 N3 MAA1 P7 MAA2 P3 MAA3 N2 MAA4 P8 MAA5 P2 MAA6 R8 MAA7 R2 MAA8 T8 MAA9 R3 MAA10 L7 MAA11 R7 MAA12 N7 MAA13 T3 T7 M7 GR52 4.99K,1% 45 45 45 45 45 M8 H1 MDA20 MDA17 MDA21 MDA18 MDA23 MDA16 MDA22 MDA19 GR63 GC223 0.1uF/16V,X7R 45 MAA[13:0] C MVDDQ MVDDQ GR46 4.99K,1% GU2 VREFC_U20 VREFD_U20 MVDDQ GR57 4.99K,1% D MVDDQ GR45 4.99K,1% GR54 4.99K,1% MVDDQ GC224 0.1uF/16V,X7R MVDDQ Row x Col x Bank bits 13 x 10 x 3 GC228 0.1uF/16V,X7R D Configuration 8 M x 16 x 8 NC#J1 NC#L1 NC#J9 NC#L9 C MVDDQ B 100-BALL SDRAM DDR3 23E22387MNG8 MVDDQ MVDDQ MVDDQ GC248 1uF/10V,X5R GC233 1uF/10V,X5R GC247 1uF/10V,X5R GC260 10UF/6.3V,X5R CT3 22uF/6.3V,TAN ns GC259 10UF/6.3V,X5R CT4 22uF/6.3V,TAN ns GC258 10UF/6.3V,X5R All component should no stuff for PARK. GC257 10UF/6.3V,X5R GC256 10UF/6.3V,X5R GC255 10UF/6.3V,X5R A MVDDQ GC254 10UF/6.3V,X5R GC253 10UF/6.3V,X5R MVDDQ GC246 1uF/10V,X5R GC245 1uF/10V,X5R GC252 1uF/10V,X5R GC244 1uF/10V,X5R GC243 1uF/10V,X5R GC242 1uF/10V,X5R GC241 1uF/10V,X5R GC251 1uF/10V,X5R GC240 1uF/10V,X5R GC250 1uF/10V,X5R GC239 1uF/10V,X5R GC238 1uF/10V,X5R GC237 1uF/10V,X5R GC249 1uF/10V,X5R GC236 1uF/10V,X5R GC235 1uF/10V,X5R GC234 1uF/10V,X5R MVDDQ A CZC Technology zw Title Madison Memory DDR3 Channel A Size C Date: 5 4 3 2 Project Name Rev R48 Thursday, April 22, 2010 1 C Sheet 46 of 56 5 4 3 2 1 CHANNEL B: 256MB/512MB DDR3 MDB[63:0] 45 MDB[63:0] MVDDQ QSB[7:0] 45 QSB[7:0] MVDDQ 35,36,43,45,46 QSB#[7:0] 45 QSB#[7:0] DQMB#[7:0] 45 DQMB#[7:0] D D MVDDQ MVDDQ 45 B_BA0 45 B_BA1 45 B_BA2 C B_BA0 B_BA1 B_BA2 M2 N8 M3 BA0 BA1 BA2 CKEB0 J7 K7 K9 CK CK CKE ODTB0 CSB0#_0 RASB0# CASB0# WEB0# K1 L2 J3 K3 L3 ODT CS RAS CAS WE QSB3 QSB1 F3 C7 DQSL DQSU CLKB0 CLKB0# 45 CLKB0 45 CLKB0# 56.2,1% 56.2,1% GR85 GR86 45 CKEB0 45 45 45 45 45 ODTB0 CSB0#_0 RASB0# CASB0# WEB0# GC269 0.01uF/25V,X7R DQMB#3 E7 DQMB#1 D3 QSB#3 QSB#1 DRAM_RST# 45,46 DRAM_RST# Should be 240 Ohms +-1% G3 B7 DML DMU DQSL DQSU T2 RESET L8 ZQ GR89 243,1% J1 L1 J9 L9 B MDB15 MDB10 MDB14 MDB11 MDB12 MDB8 MDB13 MDB9 VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 B2 D9 G7 K2 K8 N1 N9 R1 R9 VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 A1 A8 C1 C9 D2 E9 F1 H2 H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 NC#J1 NC#L1 NC#J9 NC#L9 MAB0 N3 MAB1 P7 MAB2 P3 MAB3 N2 MAB4 P8 MAB5 P2 MAB6 R8 MAB7 R2 MAB8 T8 MAB9 R3 MAB10 L7 MAB11 R7 MAB12 N7 MAB13 T3 T7 M7 MVDDQ GR78 4.99K,1% MVDDQ VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 45 MAB[13:0] GR82 4.99K,1% MVDDQ B_BA0 B_BA1 B_BA2 BA0 BA1 BA2 45 CLKB0 45 CLKB0# 45 CKEB0 CLKB0 J7 CLKB0# K7 CKEB0 K9 CK CK CKE 45 45 45 45 45 ODTB0 K1 CSB0#_0 L2 RASB0# J3 CASB0# K3 WEB0# L3 ODT CS RAS CAS WE ODTB0 CSB0#_0 RASB0# CASB0# WEB0# 45,46 DRAM_RST# QSB2 QSB0 F3 C7 DQMB#2 DQMB#0 E7 D3 DML DMU QSB#2 QSB#0 G3 B7 DQSL DQSU DRAM_RST# T2 RESET L8 ZQ Should be 240 Ohms +-1% B1 B9 D1 D8 E2 E8 F9 G1 G9 100-BALL SDRAM DDR3 23E22387MNG8 MDB20 MDB18 MDB22 MDB16 MDB21 MDB17 MDB23 MDB19 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 MDB1 MDB7 MDB0 MDB4 MDB3 MDB6 MDB2 MDB5 VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 B2 D9 G7 K2 K8 N1 N9 R1 R9 VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 A1 A8 C1 C9 D2 E9 F1 H2 H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 GR73 4.99K,1% DQSL DQSU VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 NC#J1 NC#L1 NC#J9 NC#L9 MVDDQ 45 MAB[13:0] 45 CLKB1 45 CLKB1# B_BA0 B_BA1 B_BA2 45 B_BA0 45 B_BA1 45 B_BA2 45 CKEB1 45 45 45 45 45 BA0 BA1 BA2 CLKB1 J7 CLKB1# K7 CKEB1 K9 CK CK CKE ODT CS RAS CAS WE QSB4 QSB5 F3 C7 DQSL DQSU DQMB#4 DQMB#5 E7 D3 DML DMU QSB#4 QSB#5 G3 B7 DQSL DQSU DRAM_RST# T2 RESET L8 ZQ Should be 240 Ohms +-1% B1 B9 D1 D8 E2 E8 F9 G1 G9 GR91 243,1% J1 L1 J9 L9 100-BALL SDRAM DDR3 23E22387MNG8 E3 F7 F2 F8 H3 H8 G2 H7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 MDB43 MDB45 MDB42 MDB44 MDB40 MDB47 MDB41 MDB46 VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 B2 D9 G7 K2 K8 N1 N9 R1 R9 VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 A1 A8 C1 C9 D2 E9 F1 H2 H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 B1 B9 D1 D8 E2 E8 F9 G1 G9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 K1 L2 J3 K3 L3 GC270 0.01uF/25V,X7R DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 MDB34 MDB37 MDB32 MDB39 MDB36 MDB38 MDB33 MDB35 VREFCA VREFDQ M2 N8 M3 ODTB1 CSB1#_0 RASB1# CASB1# WEB1# ODTB1 CSB1#_0 RASB1# CASB1# WEB1# 45,46 DRAM_RST# M8 H1 MAB0 N3 MAB1 P7 MAB2 P3 MAB3 N2 MAB4 P8 MAB5 P2 MAB6 R8 MAB7 R2 MAB8 T8 MAB9 R3 MAB10 L7 MAB11 R7 MAB12 N7 MAB13 T3 T7 M7 GR79 4.99K,1% GR83 4.99K,1% GR72 4.99K,1% GU9 VREFC_U26 VREFD_U26 MVDDQ MVDDQ GR90 243,1% J1 L1 J9 L9 E3 F7 F2 F8 H3 H8 G2 H7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 M2 N8 M3 45 B_BA0 45 B_BA1 45 B_BA2 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VREFCA VREFDQ NC#J1 NC#L1 NC#J9 NC#L9 GR76 4.99K,1% GU8 GC264 0.1uF/16V,X7R D7 C3 C8 C2 A7 A2 B8 A3 GR75 4.99K,1% M8 H1 GC263 0.1uF/16V,X7R DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 VREFC_U25 VREFD_U25 GC267 0.1uF/16V,X7R GR81 4.99K,1% GC265 0.1uF/16V,X7R GR77 4.99K,1% MDB31 MDB24 MDB30 MDB26 MDB28 MDB27 MDB29 MDB25 56.2,1% MVDDQ E3 F7 F2 F8 H3 H8 G2 H7 56.2,1% MAB0 N3 MAB1 P7 MAB2 P3 MAB3 N2 MAB4 P8 MAB5 P2 MAB6 R8 MAB7 R2 MAB8 T8 MAB9 R3 MAB10 L7 MAB11 R7 MAB12 N7 MAB13 T3 T7 M7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VREFCA VREFDQ GR88 45 MAB[13:0] M8 H1 MVDDQ GR71 4.99K,1% GR87 VREFC_U24 VREFD_U24 GU7 GC262 0.1uF/16V,X7R GC261 0.1uF/16V,X7R GR74 4.99K,1% GR70 4.99K,1% GU6 GC266 0.1uF/16V,X7R GR69 4.99K,1% VREFC_U27 VREFD_U27 45 MAB[13:0] GR80 4.99K,1% MVDDQ GR84 4.99K,1% B_BA0 B_BA1 B_BA2 45 B_BA0 45 B_BA1 45 B_BA2 45 CLKB1 45 CLKB1# 45 CKEB1 MVDDQ 45 45 45 45 45 CLKB1 J7 CLKB1# K7 CKEB1 K9 CK CK CKE K1 L2 J3 K3 L3 ODT CS RAS CAS WE QSB6 QSB7 F3 C7 DQSL DQSU DQMB#6 DQMB#7 E7 D3 DML DMU QSB#6 QSB#7 G3 B7 DQSL DQSU DRAM_RST# T2 RESET L8 ZQ 100-BALL SDRAM DDR3 23E22387MNG8 MDB51 MDB52 MDB49 MDB55 MDB48 MDB54 MDB50 MDB53 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 MDB63 MDB59 MDB62 MDB56 MDB60 MDB57 MDB61 MDB58 VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 B2 D9 G7 K2 K8 N1 N9 R1 R9 VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 A1 A8 C1 C9 D2 E9 F1 H2 H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 B1 B9 D1 D8 E2 E8 F9 G1 G9 MVDDQ GR92 243,1% J1 L1 J9 L9 E3 F7 F2 F8 H3 H8 G2 H7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 BA0 BA1 BA2 Should be 240 Ohms +-1% DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VREFCA VREFDQ M2 N8 M3 ODTB1 CSB1#_0 RASB1# CASB1# WEB1# ODTB1 CSB1#_0 RASB1# CASB1# WEB1# 45,46 DRAM_RST# M8 H1 MAB0 N3 MAB1 P7 MAB2 P3 MAB3 N2 MAB4 P8 MAB5 P2 MAB6 R8 MAB7 R2 MAB8 T8 MAB9 R3 MAB10 L7 MAB11 R7 MAB12 N7 MAB13 T3 T7 M7 MVDDQ GC268 0.1uF/16V,X7R MVDDQ NC#J1 NC#L1 NC#J9 NC#L9 C MVDDQ B 100-BALL SDRAM DDR3 23E22387MNG8 MVDDQ MVDDQ MVDDQ GC289 1uF/10V,X5R GC279 1uF/10V,X5R GC271 1uF/10V,X5R A GC298 10UF/6.3V,X5R GC297 10UF/6.3V,X5R GC296 10UF/6.3V,X5R GC295 10UF/6.3V,X5R GC294 10UF/6.3V,X5R GC293 10UF/6.3V,X5R GC291 10UF/6.3V,X5R A MVDDQ GC292 10UF/6.3V,X5R MVDDQ GC285 1uF/10V,X5R GC284 1uF/10V,X5R GC283 1uF/10V,X5R GC278 1uF/10V,X5R GC277 1uF/10V,X5R GC276 1uF/10V,X5R GC288 1uF/10V,X5R GC275 1uF/10V,X5R GC282 1uF/10V,X5R GC274 1uF/10V,X5R GC273 1uF/10V,X5R GC287 1uF/10V,X5R GC281 1uF/10V,X5R GC290 1uF/10V,X5R GC280 1uF/10V,X5R GC286 1uF/10V,X5R GC272 1uF/10V,X5R MVDDQ CZC Technology zw Title Madison Memory DDR3 Channel A Size C Date: 5 4 3 2 Project Name Rev R48 Thursday, April 22, 2010 1 C Sheet 47 of 56 5 4 3 2 1 +V3.3S 5,9,10,11,12,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38 VDDR3 16,36,41,42,43,45 VDDR3 PIN STRAPS D D GPIO0 GR93 10K ns GPIO1 GR94 10K ns GPIO2 GR95 10K ns GPIO8_ROMSO GR96 10K ns GPIO9_ROMSI GR97 10K ns GPIO11 GR98 10K ns GPIO12 GR99 10K ns GPIO13 GR100 10K ns VSYNC_DAC1 GR101 10K HSYNC_DAC1 GR102 10K GR103 10K ns V2SYNC GR104 10K ns H2SYNC GR105 10K ns GR106 10K ns GR107 10K 42 GPIO0 Supports Half Swing “low-power/low-voltage” mode. 42 GPIO1 42 GPIO2 42 GPIO8_ROMSO 42 GPIO9_ROMSI 42 GPIO11 42 GPIO12 42 GPIO13 20,42 VSYNC_DAC1 20,42 HSYNC_DAC1 42 GENERICC 42 V2SYNC 42 H2SYNC 42 GPIO22_ROMCS# GPIO22_ROMCS# 42 GPIO5_AC_BATT CONFIGURATION STRAPS Arrandale Gen1 Clarksfield Gen2 ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET STRAPS PIN GPIO0 PCIE FULL TX OUTPUT SWING 1 TX_DEEMPH_EN GPIO1 PCIE TRANSMITTER DE-EMPHASIS ENABLED 1 BIF_GEN2_EN_A GPIO2 PCIE GNE2 ENABLED 1 BIF_CLK_PM_EN BIF_VGA DIS BIF_RX_PLL_CALIB_BP GPIO8 GPIO9_ROMSI GPIO21 BIF_CLK_PM_EN VGA ENABLED BIF_RX_PLL_CALIB_BP 0 0 0 GPIO22_ROMCS# ROMIDCFG(2:0) VDDR3 VDDR3 VDDR3_TS 8 SMBCLK dat 7 SMBDATA 6 ALERT# 4 THERM# TSSOP8_P65_3P0 DXP 2 GPU_DPLUS DXN 3 GPU_DMINUS G781 ADM1032AR LM86CIM MAX6657MSA SOIC-8 IGNORE VIP DEVICE STRAPS 0 built-in HDMI connector Audio functiuon present 0 0 1 1 C 42 AMD RESERVED CONFIGURATION STRAPS 42 VDDR3_TS 1 G781_PULLHIGH clk W83L771 TSSOP8 clk dat 8 7 GPIO17_THERMAL_INIT 6 G781_PULLHIGH 4 VCC TP17 H2SYNC GENERICC HSYNC_DAC1 VSYNC_DAC1 X X X ALERT# THERM# SOIC8_1P27_3P9 U18 H2SYNC DXP 2 DXN G781 ADM1032AR LM86CIM MAX6657MSA SOIC-8 3 SMBCLK SMBDATA ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET GENERICC GPU_DPLUS PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET GPU_DMINUS GPIO_28_TDO GPIO21_BB_EN GND 42 GPIO17_THERMAL_INIT VCC GR161 0 GR162 0 27,31 BAT_CLK 27,31 BAT_DATA V2SYNC SMS_EN_HARD CCBYPASS AUD[1] AUD[0] 1 SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT GC299 2200pF/25V,X7R GU30 ns 1 ns 5 ns GND 42 SDA R517 100 VIP_DEVICE_STRAP_ENA ENABLE EXTERNAL BIOS ROM C142 GR163 2.2K 0.1uF/16V,X7R 5 GR157 0 GR158 0 42 SCL GR156 2.2K GPIO[13:11] 2 2.2K 1 GR155 DESCRIPTION OF DEFAULT SETTINGS TX_PWRS_ENB BIOS_ROM_EN C RECOMMENDED SETTINGS 0= DO NOT INSTALL RESISTOR 1 = INSTALL 10K RESISTOR X = DESIGN DEPENDANT NA = NOT APPLICABLE W83L771ASG B B +V3.3S GR160 0 VDDR3 Q24 AO3415 GR159 10K ns GC300 0.1uF/16V,X7R ns 3 1 2 SOT23 ns 16 DGPU_PWR_EN#_VDDR3 A A CZC Technology zw Title Madison Thermal Straps Size C Date: 5 4 3 2 Project Name Rev R48 Thursday, April 22, 2010 1 C Sheet 48 of 56 5 4 MIC1_L USB_FB1 220ohm/100MHz,2A FB0603 220ohm/100MHz,2A FB0603 MIC1_R USB_FB3 3 8 1 2 6 3 4 5 7 G_AUD MIC1_JD D USB_C4 0.1uF/16V,X7R USB_C1 USB_C2 100pF/50V,NPO C0402 100pF/50V,NPO C0402 2 L LINEOUT_L R USB_FB2 1 220ohm/100MHz,2A FB0603 220ohm/100MHz,2A FB0603 LINEOUT_R USB_FB4 8 1 2 6 3 4 5 7 G_AUD HP_JD USB_MIC_IN1 phoneJack Audio8P2 USB_C3 0.1uF/16V,X7R USB_R1 PJ3043T USB_C5 USB_C6 100pF/50V,NPO C0402 100pF/50V,NPO C0402 R USB_HP_OUT1 phoneJack Audio8P2 G_AUD G_AUD GND_JACK R1135 R1136 0 0 4 1 3 2 90ohm@100MHz,0.5A Vbus USB_eSATA_CN Vbus C1270 100uF/10V,TAN CT7343_28 D PJ3043T 0 R0603 ns G_AUD C419 0.1uF/16V,X7R + L USB_PN7 USB_PP7 CHK15 L4S2012 P1 P2 P3 P4 VBUS DD+ GND1 P5 P6 P7 P8 P9 P10 P11 GND2 A+ AGND3 BB+ GND4 USB GND5 GND6 GND7 GND8 ns 1 1 D76 EGA10603V05A1-B GND_JACK C 2 eSATA_TXP2 eSATA_TXN2 D77 EGA10603V05A1-B eSATA_RXN2 eSATA_RXP2 2 P12 P13 P14 P15 eSATA C USB_eSATA CONN ESATA_USBD11 GND_JACK GND_JACK GND_JACK B B C10756-10403-L Vbus FB101 85201-26xx 120ohm/100MHz,2.5A GND_JACK 1 4 USB_VCC 2 3 L4S2012 90ohm@100MHz,0.5A CHK14 eSATA_RXN2 eSATA_RXP2 1 ns GND_JACK eSATA_TXN2 eSATA_TXP2 + 1 D74 EGA10603V05A1-B C1266 100uF/10V,TAN CT7343_28 USB_PN6 USB_PP6 1 VCC1 2 3 -DATA1 +DATA1 4 GND C1268 0.1uF/16V,X7R HOLE0 HOLE1 HOLE2 HOLE3 D75 EGA10603V05A1-B GND_JACK USB_PP7 USB_PN7 GND_JACK USB_PP6 USB_PN6 2 H1 BOSS MH28X40X65 ns GND_JACK MIC1_L MIC1_R MIC1_JD G_AUD LINEOUT_L LINEOUT_R HP_JD USB_R2 85201-26XX FPC26_1P0RT USB_CN3 USB_R3 0 R0603 ns 0 R0603 ns 2 GND_JACK GND_JACK H2 BOSS MH28X40X65 ns A CZC Technology G_H USB AUDIO board GND_JACK Size A3 Date: 4 zw Title G_AUD 5 5 6 7 8 1 GND_JACK 0 0 USB_VCC FB102 1 A 28 R1131 R1132 120ohm/100MHz,2.5A 1 28 27 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 1 27 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 USB2 SINGLE USB PORT USB4H49IN 3 2 Project Name Rev C R48 Sheet Thursday, April 22, 2010 1 49 of 56 5 4 3 2 1 D D VUSB 1 2 USB_PN11 3 USB_PP11 4 5 GND_DC 6 B_MDI37 B_MDI3+ 8 B_MDI29 B_MDI2+ 10 B_MDI111 B_MDI1+ 12 B_MDI013 B_MDI0+ 14 15SMH_SPLANE Wafer15P1 DC_DCINCN1 C TestP TPC60 1 4 ns ns 90ohm@100MHz,0.5A DC_CHK1 TP35 TP36 R1145 R1146 B_MDI1+ B_MDI1- RJ45_MDI0+ RJ45_MDI0RJ45_MDI1+ RJ45_MDI2+ RJ45_MDI2RJ45_MDI1RJ45_MDI3+ RJ45_MDI3- 0 R0402_0 0 R0402_0 L4S2012 RJ45_MDI1+ 2 RJ45_MDI13 ns 90ohm@100MHz,0.5A 1 4 DC_CHK2 R1147 R1148 B_MDI2+ B_MDI2- 17 87213-xxx0x-x ACES RJ45_MDI0+ RJ45_MDI0- 2 3 1 4 DC_CHK3 GND_DC CASE_GND 10 B_MDI0+ B_MDI0- 0 R0402_0 0 R0402_0 L4S2012 DC_CHK4 TX+ TXRX+ NC NC RXNC NC 0 R0402_0 0 R0402_0 L4S2012 2 3 ns C100G6 alltop RJ45 RJ45_MDI2+ RJ45_MDI2- TX+ TXRX+ NC NC RXNC NC DC_LAN1 RJ45 RJS45P8H68 C 90ohm@100MHz,0.5A R1149 R1150 B_MDI3+ B_MDI3- 1 2 3 4 5 6 7 8 9 16 R1143 R1144 1 4 0 R0402_0 0 R0402_0 L4S2012 2 3 ns CASE_GND RJ45_MDI3+ RJ45_MDI3- 90ohm@100MHz,0.5A DC_C1 1000pF/50V,X7R DC_C2 1000pF/50V,X7R DC_C3 4.7uF/10V,X5R C0603 4.7uF/10V,X5R C0603 DC_C4 SMH_SPLANE CASE_GND DC_C5 2200pF/2KV,X7R C1808 GND_DC H3 BOSS MH28X40X65 ns B 1 1 B CASE_GND A A CZC Technology Title RJ45 Size A3 Date: Project Name Rev C R48 Thursday, April 22, 2010 Sheet 50 of 56 5 4 1 +V3.3AUX_Q T46 ns T45 ns T47 ns T48 ns +V3.3AUX_Q BT_R7 10K BT_R8 LIDSW#_IO QKEY1_B GPU_LED SLIDE_INTR# T49 ns EC_SMB1_DAT T50 ns EC_SMB1_CLK T51 ns 1K R0402 QKEY1_B D 3 PWR_LED SLP_LED BT_QKEY1 4 Button_4P 1 2 3 SWS6D50 2 Iac_P_R 1 D 2 5 6 BT_CN2 88511-12XX FPCE12_P5R 1 1 2 2 13 13 3 3 4 4 5 5 6 6 7 7 8 8 9 9 14 1410 10 11 11 12 12 3 BT_C8 100pF/50V,NPO C0402 BT_D1 BAT54SPT SOT23 ns GND_Q +V3.3AUX_Q GND_Q 88511 ACES GND_Q GND_Q GND_Q +V3.3AUX_Q GPU+ BT_R9 330 R0402 C C LED_GPU BL-HB336G-7-TRB 3 LED2_0603 BT_R10 1K R0402 GPU_LED BT_Q3 2N7002K SOT23 2 1 BT_R11 1uF/10V,X5R R0402 GND_Q GND_Q H8 BOSS MH24X40X70 ns H6 BOSS MH24X40X70 ns B 1 1 1 1 B GND_Q GND_Q +V3.3AUX_Q GPU+ BT_C9 1000pF/50V,X7R C0402 DC_R1 51K DC_U1 OCH168TWAD SOT23 VS+ 1 GND_Q A Output 2 GND 3 DC__C1 0.1uF/16V,X7R C0402 A GND_Q LIDSW#_IO DC_C6 1000pF/50V,X7R C0402 CZC Technology zw Title QKey LID Board Size A3 GND_Q Date: 5 4 3 2 Project Name Rev C R48 Sheet Thursday, April 22, 2010 1 51 of 56 5 4 3 2 1 GND_PWR IacP_PWR PWRKEY1 5 6 D 3 1 D 4 BT_R12 0 R0402 2 BT_R13 20K R0402 PWRSWVCC_S5 Button_4P SWS6D50 BT_C10 BT_C11 1000pF/50V,X7R C0402 C0402 1000pF/50V,X7R GND_PWR +V3.3AUX_PWR +V3.3AUX_PWR PWR_LED+ BT_R14 330 R0402 BT_R15 330 R0402 LED_PWR BL-HB336G-7-TRB LED_SLP BL-HB336G-7-TRB LED2_0603 PWR_LED_B LED2_0603 PWR_LED_B C slp+ C B B slp+ BT_C12 PWR_LED+ BT_C13 7 87213-xxx0x-x Aces 1000pF/50V,X7R C0402 1000pF/50V,X7R C0402 8 GND_PWR A 6 5 4 3 2 1 IacP_PWR +V3.3AUX_PWR PWRSWVCC_S5 PWR_LED_B SLP_LED_B T13 ns Wafer6P10 PWRBTN_CN1 hws6_1p0r A GND_PWR CZC Technology zw Title PWR_BTN Board Size A3 Date: 5 4 3 2 Project Name Rev C R48 Thursday, April 22, 2010 Sheet 1 52 of 56 5 4 3 2 1 BATT+ Q? +VDC Q? AD+ AC_IN# 1 AUX Power OZ815LN 4B 3A AC_ON 4A 5B +VDC +VDC +V3.3AL +V5AL PWRSWVCC2 PWRSW# 3B 5A 6 PM_RSMRST# BATT+ Charge OZ8618LN AC_IN# D CHARGE ON D 2 AD+ PM_RSMRST# 4A 5B ALWAYS_ON 7 PWRSW# +V1.8S 13 12 OZ8033 C PWR_BTN# 8 SLP_S3# 9 SLP_S4# 9 MAIN ON PCH WPC8763L 11 V11S_ON C +VCC_CORE CPU Power OZ8292 Delay 100ms +V3.3S +V5S +V1.5S 17 IMVP_OK MAIN_PWROK SYS_PWROK PCH_PWROK ME_PWROK AND 12 17 +V1.1S/V1.1S_VTT 18 19 PLT_RST# 16 OZ8111 CPU_PWROK IMVP_ON 13 DRAM_PWROK SYS Power +V_S CLK_EN V1_8_ON 10 1.1S_PWR_OK 10 0.75_ON 14 1.5S_PWROK +V1.5 +V1.5 +0.75S MCP B 15 MAIN_PWROK +V1.1S_PWROK AND +V1.1S_15S_PWROK CPU_RST# RST_OBS# 21 +V1.5_PWROK +V1.8S_PWROK RSTIN# +V0.75S VCCP_PWRGD_0 14 20 VCCP_PWRGD_1 DRAM_PWROK B AND OZ812LN VTT_PWROK 13 +V1.5S_PWROK SLP_S3# A Note: *A:For adapter in *B:For battery only * :For all CZC Technology Title A zw <Title> Size Project Name A4 Date: Rev R48 Thursday, April 22, 2010 C Sheet 53 of 56 5 4 3 2 1 4. Schematic modify Item and history; 2009-12-03: 1. first Release and generate netfile. 2010-01-08: 1. P13 stuff R97。 2. P14 Add R359 R360 D 3. P16 Change R1005 pull high to VDDR3. No stuff R204 4. P19 Change D62 to R299 Correct channel A/B connection 5. P21 ns R457 R458 D of GPU LVDS. 6. P22 Change NEW_CARD_CLKREQ# pull high to +V3.3S(R282) 7. P25 Add MDCCN1 ns D26 7. P27 Add R436 1K, Add BT_LED# to EC 8. P29 change wifi LED connection,Touchpad CONN connection. 9. P42 Add GR125 GR126 GR127 for the Ver A11 of PARK. U27.1 change to Madison_pwrok. 10. P43 Add CT5 CT6 reserved. 11. P44 Add Q34 Q35 GR164 GC301 12. P45 Add GR165 for the Ver A11 of PARK. 13. P46 Add CT3 CT4 reserved. 14. P30-P40 change refer to SCH. C VerC change list: hw: 1,修改部分0ohm电阻封装为R0402_0 2,ns thermal sensor for DIMM(P09) 3,ADD BIOS_LOCK SWITCH。(P13) 4,ns MiniPCIE slot for 3G.(P21) 5,ns C1280 C1230 C1234(P24) 6,Reserved TPA6017A2,adjust amp out(p25) 7,add R524,change R449 to 200K,for fan(p28) 8,ns U19,stuff R1152(p41) 9,add R517 (P48) 10,del BT_Z1 (P52) C pwr: 1、更改R917 R919阻值,设定DDR3电源1.54V 2、1.1S电源增加R1187 R1186 C1296频率调整电路 3、更改R939 R937阻值,调整1.1S电源为1.129V 4、去掉电阻R1179 0ohm电阻,去掉D69续流二极管,更改R978 1K 5%为1K 1%, 5、R1153,R1154,C1277更改value设定GFX电源频率在350KHz 6、OZ8291 DSLP pin改成2.2Kohm下拉到地 7、R1181阻值更改以满足IMONITOR 8、去掉OZ8291 VID 测试电路 9、更改R1014阻值以满足cpucore的loadline,更改R1016 1K 5%为1K 1%,去掉R1182 0ohm电阻 10、OZ8292 DSLP pin接2.2K电阻上拉到5VS以满足imvp6.5 11、更改R1184阻值以满足IMONITOR,去掉D70 D71续流二极管,去掉OZ8292 VID 测试电路 B B A CZC Technology Title A zw <Title> Size Project Name A4 Date: Rev R48 Thursday, April 22, 2010 C Sheet 56 of 56