Orta Block Diagram - InformaticaNapoli

Transcription

Orta Block Diagram - InformaticaNapoli
5
4
3
2
1
Orta Block Diagram
AMD
8,9
DDR2 SODIMM
DIMM2
8,9
Power Switch
P2231NFC1 28
HyperTransport
New card 28
RJ45
C
24
24
INPUT
OUTPUT
DCBATOUT
CRT13
VCC_CORE_S0
SYSTEM DC/DC
LCD14
INPUT
OUTPUT
DCBATOUT
PCI-E x 1
1D2V_S0
1D8V_S3
SYSTEM DC/DC
INT. MIC Array
INPUT
PCI-E x 4
OUTPUT
DCBATOUT
5V_S5
3D3V_S5
Line In
30
Codec
30
ALC268
24.576MHz
ATI
MIC In
AMP
30
AMP
G1410Q
30
25
INPUT
OUTPUT
1D8V_S3
0D9V_S3
SYSTEM LDO
1394
CONN
27
MS/MS Pro/xD/
MMC/SD/SDIO
6 in 1
27
INPUT
OUTPUT
3D3V_S5
3D3V_S0
3D3V_S0
1D2V_S5
2D5V_S0
1D5V_S0
B
SYSTEM LDO
INPUT
OUTPUT
5V_AUX_S5
MODEM
MDC Card
16,17,18,19,20
USB
SATA
USB
32.768KHz
22
HDD 21
CCD .3M/1.3M
14
A
hexainf@hotmail.com
GRATIS - FOR FREE
1394
Cardbus
Cardreader
Support
TypeII
27
LPC BUS
USB
22
32.768KHz
PWR SW
CP2211F
SYSTEM LDO
PCMCIA
SLOT
25,26
USB x 4
RJ11
25MHz
O2
OZ711
AZALIA
INT.SPKR
Line Out
(No-SPDIF)
PCI BUS
SB600
G1432Q
30
PCMCIA I/F
AZALIA
29
30
C
10,11,12,13
25MHz
B
D
CPU V_CORE
ATI
RS690M
23
BCM5787M
14.318MHz
S-Vedio 13
28 PCI-E x 1
LAN
10/100/1000
TXFM
16x16
CLK GEN.
ICS 9LPRS502
(RTM875T-605) 3
PCI-E x 1
Mini Card
802.11a/b/g/n
36
K8 Rev.G
S1g1 Socket 4,5,
6,7
DDR II 533/667/800
L1: Signal 1
L2: VCC
L3: Inner Signal 2
L4: Inner Signal 3
L5: GND
L6: Signal 4
Project code: 91.4U101.001
PCB P/N
: 48.4U101.0SA
REVISION
: 06245-SA
G792
IN
DIMM1
D
DDR II 533/667/800
OUT
DDR2 SODIMM
PCB Layer Stackup
USB
4 Port22
WPC8768L
Touch
Pad 32
BIOS
SPI I/F
KBC
Winbond
LPC
W25X80-VSS
FIR 31
MINI USB
BlueTooth
22
3D3V_AUX_S5
DEBUG
CONN. 33
33
31
INT.
KB 32
DCBATOUT
Battery Charger
INPUTS
OUTPUTS
AD+
BAT+
DCBATOUT
A
<Variant Name>
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
CDROM
PATA
21
5
BLOCK DIAGRAM
Finger print
22
4
3
2
Size
A3
Document Number
Date:
Tuesday, December 12, 2006
Rev
Orta
SA
Sheet
1
1
of
46
5
4
3
2
1
SA: 07/31/06 Start
D
D
SB change
power team
1.change L7, L9 to 68.1R510.10D
2.changge U12 to 84.04706.037
3.change R66 to 10K ohm
C
C
B
B
<Core Design>
A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CHANGE HISTORY
Size
A3
Document Number
5
4
3
2
Rev
SA
Orta
Date: Tuesday, December 12, 2006
Sheet
1
2
of
46
5
4
3D3V_S0
3
2
1
3D3V_CLK_VDD
1
1
C280
3D3V_CLK_VDDA
C282
C273
3D3V_S0
C306
R159
2
C302
2
2
2
C301
2
C279
1
0R3-0-U-GP
1
1
R162
2
1
2
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC2D2U10V3ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC2D2U10V3ZY-1GP
1
2
0R3-0-U-GP
C303
SC2D2U10V3ZY-1GP
Parallel Resonance Crystal
2 SC18P50V2JN-1-GP
1
C294 1
1
C
GNDCPU
GNDSRC
GNDSRC
GNDSRC
GNDSRC
GND48
GNDATIG
GNDREF
GNDHTT
3
X1
4
X2
2
2
X3
DY R172
1MR2J-L2-GP
X-14D31818M-44GP
C283
SC18P50V2JN-1-GP
1
2
53
15
22
29
45
8
38
1
58
R180
3D3V_S0
3D3V_S0
1
2
11
61
RESET_IN#
NC#61
9
10
SMBCLK
SMBDAT
48
IREF
1
10KR2J-3-GP
2
10KR2J-3-GPDY
R184
2 R186
9,19
9,19
CLK_REQB#
SMBC0_SB
SMBD0_SB
Ioh = 5 * Iref
(2.32mA)
Voh = 0.71V @ 60 ohm
50
49
CPUCLK8T0
CPUCLK8C0
CPUCLK8T1
CPUCLK8C1
56
55
52
51
SRCCLKT6
SRCCLKC6
ATIGCLKT0
ATIGCLKC0
ATIGCLKT1
ATIGCLKC1
ATIGCLKT2
ATIGCLKC2
ATIGCLKT3
ATIGCLKC3
SRCCLKT5
SRCCLKC5
SRCCLKT4
SRCCLKC4
SRCCLKT3
SRCCLKC3
SRCCLKT2
SRCCLKC2
SRCCLKT0
SRCCLKC0
SRCCLKT1
SRCCLKC1
SRCCLKT7
SRCCLKC7
16
17
41
40
37
36
35
34
30
31
18
19
20
21
24
25
26
27
47
46
43
42
12
13
CLKREQA#
CLKREQB#
CLKREQC#
57
32
33
R171
475R2F-L1-GP
1%
B
Check SLGO EXT CLK XSL84606 (56 Pin) or XSL84605 (64 Pin) pin to pin compatable with ICS951464
CLK_PCIE_NEW#
CLK_PCIE_NEW
EXT CLK FREQUENCY SELECT TABLE(MHZ)
PCI
USB
Hi-Z
Hi-Z
48.00
Reserved
100.00
X/3
X/6
48.00
Reserved
100.00
60.00
30.00
48.00
Reserved
220.00
100.00
36.56
73.12
48.00
Reserved
100.00
100.00
66.66
33.33
48.00
Reserved
1
133.33
100.00
66.66
33.33
48.00
Reserved
1
200.00
100.00
66.66
33.33
48.00
Normal ATHLON64 operation
CPU
SRCCLK HTT
[2:1]
0
0
0
Hi-Z
100.00
0
0
1
X
0
1
0
180.00
0
1
1
1
0
0
1
0
1
1
7
6
FS1/REF1
FS0/REF0
FS2/REF2
HTTCLK0
63
64
62
59
2
261R2F-GP
2 47D5R2F-1-GP
2 47D5R2F-1-GP
CPUCLK
CPUCLK#
6
6
1
2
RN38
4SRN33J-5-GP-U
3
NBSRC_CLK 12
NBSRC_CLK# 12
SBLINK_CLK_R
SBLINK_CLK#_R
SBSRC_CLK_R
SBSRC_CLK#_R
1
2
RN39
4SRN33J-5-GP-U
3
SBLINK_CLK 12
SBLINK_CLK# 12
2
1
RN43
3 SRN33J-5-GP-U
4
SBSRC_CLK 16
SBSRC_CLK# 16
CLK_PCIE_MINI_R
CLK_PCIE_MINI#_R
2
1
RN41
3 SRN33J-5-GP-U
4
CLK_PCIE_MINI1 28
CLK_PCIE_MINI1# 28
RN42
3 SRN33J-5-GP-U
4
CLK_PCIE_NEW 28
CLK_PCIE_NEW# 28
RN37
4 SRN33J-5-GP-U
3
CLK_PCIE_LAN 23
CLK_PCIE_LAN# 23
NBSRC_CLK_R
NBSRC_CLK#_R
2
1
CLK_PCIE_NEW_R
CLK_PCIE_NEW#_R
CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R
DY
DY
48MHZ_1
48MHZ_0
R169 1
R170 1
1
2
R168 2
10KR2J-3-GP
TP33
CLK_REQA#
1
TPAD28
1 DY
2 R178 CLK_REQB#
0R2J-2-GP
R183 2
1
10KR2J-3-GP
CLK48_USB_R 1
2
33R2J-2-GP
R179
C
1
3D3V_CLK_VDD
TP40 TPAD30
CLK48_USB 19
RN33
SRN10KJ-6-GP
06/05/2006
B
06/09/2006
ICS951462YGLFT-GP
RN45
4
3SRN49D9F-GP
SBLINK_CLK#
SBLINK_CLK
2
1 RN36
3
4SRN49D9F-GP
SBSRC_CLK#
SBSRC_CLK
1
2 RN46
4
3SRN49D9F-GP
NBSRC_CLK#
NBSRC_CLK
2
1 RN35
3
4SRN49D9F-GP
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
1
2 RN44
4
3SRN49D9F-GP
CLK_PCIE_LAN
CLK_PCIE_LAN#
1
2 RN34
4
3SRN49D9F-GP
COMMENT
FS1
FS0
FS2
HTREF_CLK_R
R165 2
1 33R2F-3-GP
R166 1
2 33R2J-2-GP
R1672
1
33R2F-3-GP
SB_OSC_CLK 19
TP32TPAD30
NB_OSC 12
HTREF_CLK 12
CLK48_USB
R161
49D9R2F-GP
EC61
DY
2
FS2 FS1 FS0
1
2
R163
CPUCLK_R
CPUCLK#_R
8
7
6
5
3D3V_S0
VDDA
GNDA
1
2
3
4
R182
VDDCPU
VDDSRC
VDDSRC
VDDSRC
VDDSRC
VDD48
VDDATIG
VDDREF
VDDHTT
1
3000mA.80ohm
U32
54
14
23
28
44
5
39
2
60
2
2- PUT DECOUPLING CAPS CLOSE TO U800
POWER PIN
3D3V_CLK_VDD
SC1U16V3ZY-GP
EMI REQUEST
SCD1U16V2ZY-2GP
2
DY
SCD1U16V2ZY-2GP
SCD01U16V2KX-3GP
C305
1
1
3D3V_48MPWR_S0
C304
SC4D7U6D3V3KX-GP
2
1
2 2D2R2J-GP
1- PLACE ALL SERIAL TERMINATION
RESISTORS CLOSE TO U800
DY
D
C281
R181
1
0R2J-2-GP 1
1
0R3-0-U-GP
C274
2
3D3V_S0
28 NEWCARD_CLKREQ#
1
1
D
<Core Design>
A
hexainf@hotmail.com
GRATIS - FOR FREE
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CLKGEN_ICS951412
Size
A3
Document Number
Rev
Date: Tuesday, December 12, 2006
5
4
3
2
SA
Orta
Sheet
1
3
of
46
5
4
3
2
1
D
D
U52A
1D2V_LDO_S0
R144
51R2J-2-GP
1
1
NB0HTTCLKOUT1
NB0HTTCLKOUTJ1
NB0HTTCLKOUT0
NB0HTTCLKOUTJ0
2
2
51R2J-2-GP
R141
10 NB0CADOUT[15..0]
10 NB0CADOUTJ[15..0]
C
10
10
10
10
10 NB0HTTCTLOUT
10 NB0HTTCTLOUTJ
B
NB0HTTCLKOUT1
NB0HTTCLKOUTJ1
NB0HTTCLKOUT0
NB0HTTCLKOUTJ0
J5
K5
J3
J2
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
Y4
Y3
Y1
W1
CPUHTTCLKOUT1
CPUHTTCLKOUTJ1
CPUHTTCLKOUT0
CPUHTTCLKOUTJ0
CPUHTTCLKOUT1
CPUHTTCLKOUTJ1
CPUHTTCLKOUT0
CPUHTTCLKOUTJ0
CPUHTTCTLIN1
CPUHTTCTLINJ1
NB0HTTCTLOUT
NB0HTTCTLOUTJ
P3
P4
N1
P1
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
T5
R5
R2
R3
CPUHTTCTLOUT0
CPUHTTCTLOUTJ0
CPUHTTCTLOUT0 10
CPUHTTCTLOUTJ0 10
NB0CADOUT15
NB0CADOUTJ15
NB0CADOUT14
NB0CADOUTJ14
NB0CADOUT13
NB0CADOUTJ13
NB0CADOUT12
NB0CADOUTJ12
NB0CADOUT11
NB0CADOUTJ11
NB0CADOUT10
NB0CADOUTJ10
NB0CADOUT9
NB0CADOUTJ9
NB0CADOUT8
NB0CADOUTJ8
N5
P5
M3
M4
L5
M5
K3
K4
H3
H4
G5
H5
F3
F4
E5
F5
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
T4
T3
V5
U5
V4
V3
Y5
W5
AB5
AA5
AB4
AB3
AD5
AC5
AD4
AD3
CPUCADOUT15
CPUCADOUTJ15
CPUCADOUT14
CPUCADOUTJ14
CPUCADOUT13
CPUCADOUTJ13
CPUCADOUT12
CPUCADOUTJ12
CPUCADOUT11
CPUCADOUTJ11
CPUCADOUT10
CPUCADOUTJ10
CPUCADOUT9
CPUCADOUTJ9
CPUCADOUT8
CPUCADOUTJ8
NB0CADOUT7
NB0CADOUTJ7
NB0CADOUT6
NB0CADOUTJ6
NB0CADOUT5
NB0CADOUTJ5
NB0CADOUT4
NB0CADOUTJ4
NB0CADOUT3
NB0CADOUTJ3
NB0CADOUT2
NB0CADOUTJ2
NB0CADOUT1
NB0CADOUTJ1
NB0CADOUT0
NB0CADOUTJ0
N3
N2
L1
M1
L3
L2
J1
K1
G1
H1
G3
G2
E1
F1
E3
E2
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
T1
R1
U2
U3
V1
U1
W2
W3
AA2
AA3
AB1
AA1
AC2
AC3
AD1
AC1
CPUCADOUT7
CPUCADOUTJ7
CPUCADOUT6
CPUCADOUTJ6
CPUCADOUT5
CPUCADOUTJ5
CPUCADOUT4
CPUCADOUTJ4
CPUCADOUT3
CPUCADOUTJ3
CPUCADOUT2
CPUCADOUTJ2
CPUCADOUT1
CPUCADOUTJ1
CPUCADOUT0
CPUCADOUTJ0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
HYPERTRANSPORT
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
10
10
10
10
C
CPUCADOUT[15..0] 10
CPUCADOUTJ[15..0] 10
B
62.10055.111
<Core Design>
A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU(1/4)_HyperTransport I/F
Size
A3
Document Number
Rev
Date: Tuesday, December 12, 2006
5
4
3
2
SA
Orta
Sheet
1
4
of
46
5
4
3
2
1
U52C
D
D
9 M_B_DQ[63..0]
M_B_DQ63 AD11
M_B_DQ62 AF11
M_B_DQ61 AF14
M_B_DQ60 AE14
M_B_DQ59 Y11
M_B_DQ58 AB11
M_B_DQ57 AC12
M_B_DQ56 AF13
M_B_DQ55 AF15
M_B_DQ54 AF16
M_B_DQ53 AC18
M_B_DQ52 AF19
M_B_DQ51 AD14
M_B_DQ50 AC14
M_B_DQ49 AE18
M_B_DQ48 AD18
M_B_DQ47 AD20
M_B_DQ46 AC20
M_B_DQ45 AF23
M_B_DQ44 AF24
M_B_DQ43 AF20
M_B_DQ42 AE20
M_B_DQ41 AD22
M_B_DQ40 AC22
M_B_DQ39 AE25
M_B_DQ38 AD26
M_B_DQ37 AA25
M_B_DQ36 AA26
M_B_DQ35 AE24
M_B_DQ34 AD24
M_B_DQ33 AA23
M_B_DQ32 AA24
M_B_DQ31 G24
M_B_DQ30 G23
M_B_DQ29 D26
M_B_DQ28 C26
M_B_DQ27 G26
M_B_DQ26 G25
M_B_DQ25 E24
M_B_DQ24 E23
M_B_DQ23 C24
M_B_DQ22 B24
M_B_DQ21 C20
M_B_DQ20 B20
M_B_DQ19 C25
M_B_DQ18 D24
M_B_DQ17 A21
M_B_DQ16 D20
M_B_DQ15 D18
M_B_DQ14 C18
M_B_DQ13 D14
M_B_DQ12 C14
M_B_DQ11 A20
M_B_DQ10 A19
M_B_DQ9 A16
M_B_DQ8 A15
M_B_DQ7 A13
M_B_DQ6 D12
M_B_DQ5 E11
M_B_DQ4 G11
M_B_DQ3 B14
M_B_DQ2 A14
M_B_DQ1 A11
M_B_DQ0 C11
U52B
9 M_A_DQ[63..0]
M_A_DQ63 AA12
M_A_DQ62 AB12
M_A_DQ61 AA14
M_A_DQ60 AB14
M_A_DQ59 W11
M_A_DQ58 Y12
M_A_DQ57 AD13
M_A_DQ56 AB13
M_A_DQ55 AD15
M_A_DQ54 AB15
M_A_DQ53 AB17
M_A_DQ52 Y17
M_A_DQ51 Y14
M_A_DQ50 W14
M_A_DQ49 W16
M_A_DQ48 AD17
M_A_DQ47 Y18
M_A_DQ46 AD19
M_A_DQ45 AD21
M_A_DQ44 AB21
M_A_DQ43 AB18
M_A_DQ42 AA18
M_A_DQ41 AA20
M_A_DQ40 Y20
M_A_DQ39 AA22
M_A_DQ38 Y22
M_A_DQ37 W21
M_A_DQ36 W22
M_A_DQ35 AA21
M_A_DQ34 AB22
M_A_DQ33 AB24
M_A_DQ32 Y24
M_A_DQ31 H22
M_A_DQ30 H20
M_A_DQ29 E22
M_A_DQ28 E21
M_A_DQ27 J19
M_A_DQ26 H24
M_A_DQ25 F22
M_A_DQ24 F20
M_A_DQ23 C23
M_A_DQ22 B22
M_A_DQ21 F18
M_A_DQ20 E18
M_A_DQ19 E20
M_A_DQ18 D22
M_A_DQ17 C19
M_A_DQ16 G18
M_A_DQ15 G17
M_A_DQ14 C17
M_A_DQ13 F14
M_A_DQ12 E14
M_A_DQ11 H17
M_A_DQ10 E17
M_A_DQ9 E15
M_A_DQ8 H15
M_A_DQ7 E13
M_A_DQ6 C13
M_A_DQ5 H12
M_A_DQ4 H11
M_A_DQ3 G14
M_A_DQ2 H14
M_A_DQ1
F12
M_A_DQ0 G12
C
B
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
Y16
AA16
E16
F16
MA0_CLK_H2
MA0_CLK_L2
MA0_CLK_H1
MA0_CLK_L1
MEMORY
M_A_CLK_DDR2
M_A_CLK_DDR2#
M_A_CLK_DDR1
M_A_CLK_DDR1#
MA0_CS_L3
MA0_CS_L2
MA0_CS_L1
MA0_CS_L0
V19
J22
V22
T19
M_A_CS3#
M_A_CS2#
M_A_CS1#
M_A_CS0#
MA0_ODT1
MA0_ODT0
V20
U19
M_A_ODT1 8,9
M_A_ODT0 8,9
MA_CAS_L
MA_WE_L
MA_RAS_L
U20
U21
T20
M_A_CAS# 8,9
M_A_WE# 8,9
M_A_RAS# 8,9
MA_BANK2
MA_BANK1
MA_BANK0
K22
R20
T22
M_A_BS#2 8,9
M_A_BS#1 8,9
M_A_BS#0 8,9
MA_CKE1
MA_CKE0
J20
J21
M_A_CKE1 8,9
M_A_CKE0 8,9
MA_ADD15
MA_ADD14
K19
K20
V24
K24
L20
R19
L19
L22
L21
M19
M20
M24
M22
N22
N21
R21
M_A_A15
M_A_A14
M_A_A13
M_A_A12
M_A_A11
M_A_A10
M_A_A9
M_A_A8
M_A_A7
M_A_A6
M_A_A5
M_A_A4
M_A_A3
M_A_A2
M_A_A1
M_A_A0
MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0
W12
W13
Y15
W15
AB19
AB20
AD23
AC23
G22
G21
C22
C21
G16
G15
G13
H13
M_A_DQS7
M_A_DQS#7
M_A_DQS6
M_A_DQS#6
M_A_DQS5
M_A_DQS#5
M_A_DQS4
M_A_DQS#4
M_A_DQS3
M_A_DQS#3
M_A_DQS2
M_A_DQS#2
M_A_DQS1
M_A_DQS#1
M_A_DQS0
M_A_DQS#0
MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0
Y13
AB16
Y19
AC24
F24
E19
C15
E12
M_A_DM7
M_A_DM6
M_A_DM5
M_A_DM4
M_A_DM3
M_A_DM2
M_A_DM1
M_A_DM0
INTERFACE MA_ADD13
MA_ADD12
MA_ADD11
MA_ADD10
MA_ADD9
MA_ADD8
MA_ADD7
MA_ADD6
MA_ADD5
MA_ADD4
MA_ADD3
MA_ADD2
MA_ADD1
MA_ADD0
9
9
9
9
8,9
8,9
8,9
8,9
M_A_A[15..0] 8,9
M_A_DQS[7..0] 9
M_A_DQS#[7..0] 9
MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0
AF18
AF17
A17
A18
M_B_CLK_DDR2
M_B_CLK_DDR2#
M_B_CLK_DDR1
M_B_CLK_DDR1#
MB0_CS_L3
MB0_CS_L2
MB0_CS_L1
MB0_CS_L0
Y26
J24
W24
U23
M_B_CS3#
M_B_CS2#
M_B_CS1#
M_B_CS0#
MB0_ODT1
MB0_ODT0
W23
W26
M_B_ODT1 8,9
M_B_ODT0 8,9
MB_CAS_L
MB_WE_L
MB_RAS_L
V26
U22
U24
M_B_CAS# 8,9
M_B_WE# 8,9
M_B_RAS# 8,9
MB_BANK2
MB_BANK1
MB_BANK0
K26
T26
U26
M_B_BS#2 8,9
M_B_BS#1 8,9
M_B_BS#0 8,9
MB_CKE1
MB_CKE0
H26
J23
MB_ADD15
MB_ADD14
J25
J26
W25
L23
L25
U25
L24
M26
L26
N23
N24
N25
N26
P24
P26
T24
M_B_A15
M_B_A14
M_B_A13
M_B_A12
M_B_A11
M_B_A10
M_B_A9
M_B_A8
M_B_A7
M_B_A6
M_B_A5
M_B_A4
M_B_A3
M_B_A2
M_B_A1
M_B_A0
MB_DQS_H7
MB_DQS_L7
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_H4
MB_DQS_L4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0
AF12
AE12
AE16
AD16
AF21
AF22
AC25
AC26
F26
E26
A24
A23
D16
C16
C12
B12
M_B_DQS7
M_B_DQS#7
M_B_DQS6
M_B_DQS#6
M_B_DQS5
M_B_DQS#5
M_B_DQS4
M_B_DQS#4
M_B_DQS3
M_B_DQS#3
M_B_DQS2
M_B_DQS#2
M_B_DQS1
M_B_DQS#1
M_B_DQS0
M_B_DQS#0
MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0
AD12
AC16
AE22
AB26
E25
A22
B16
A12
M_B_DM7
M_B_DM6
M_B_DM5
M_B_DM4
M_B_DM3
M_B_DM2
M_B_DM1
M_B_DM0
MB0_CLK_H2
MB0_CLK_L2
MB0_CLK_H1
MB0_CLK_L1
MEMORY
INTERFACE MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
9
9
9
8,9
8,9
8,9
8,9
M_B_CKE1 8,9
M_B_CKE0 8,9
M_B_A[15..0] 8,9
C
M_B_DQS[7..0] 9
M_B_DQS#[7..0] 9
B
M_B_DM[7..0] 9
M_A_DM[7..0] 9
<Core Design>
A
hexainf@hotmail.com
GRATIS - FOR FREE
9
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU(2/4)_DDR
Size
A3
Document Number
Rev
5
4
3
2
SA
Orta
Date: Tuesday, December 12, 2006
Sheet
1
5
of
46
5
4
3
2
1
U52E
H16
B18
MISC
2D5V_S0
INTERNAL
LYAOUT:ROUTE VDDA TRACE APPROX.
50mils WIDE(USE 2X25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
D
2D5V_VDDA_S0
R26
R25
P22
R22
IF 0 ohm IS NOT GOOD ENOUGH, TRY 68.00082.491
RSVD_MB0_CLK_H3
RSVD_MB0_CLK_L3
RSVD_MB0_CLK_H0
RSVD_MB0_CLK_L0
1
H6
G6
D5
1D8V_S3
R367
300R2J-4-GP
R24
W18
R23
AA8
H18
H19
FREE5
FREE6
FREE4
FREE1
FREE2
FREE3
R371
2K2R2J-2-GP
2
RSVD_VDDNB_FB_H
RSVD_VDDNB_FB_L
RSVD_CORE_TYPE
LDT_PWROK
C550
1
2
D
1
B3
C1
1
RSVD_MA0_CLK_H3
RSVD_MA_RESET_L
RSVD_MA0_CLK_L3
RSVD_MB_RESET_L
RSVD_MA0_CLK_H0
RSVD_MA0_CLK_L0
RSVD_VIDSTRB1
RSVD_VIDSTRB0
2
P20
P19
N20
N19
SCD1U16V2ZY-2GP
THERMTRIP#
2
3
MMBT3904-U1
CPU_THERMTRIP# 35
Q16
U52D
CPU_PRESENT_L
AF4
AF5
SIC
SID
TDI
TRST_L
TCK
TMS
AF9
AD9
AC9
AA9
TDI
TRST_L
TCK
TMS
1 R317
300R2J-4-GP
37
37
DBREQJ
E10
DBREQ_L
F6
E6
VDD_FB_H
VDD_FB_L
20061031
for Power Test
COREFB
COREFB
COREFB#
COREFB#
CPU_TEST25_H
R316
1D8V_S3
R114
100R3J-4-GP
2
510R2F-L-GP
?
?
?
CPU_TEST26
2
CPU_TEST18
1 R363
300R2J-4-GP
1 R319
300R2J-4-GP
2
CPU_TEST19
2
1R122
300R2J-4-GP
CPU_TEST21
1
2 R155
300R2J-4-GP
CPU_TEST25_L
1
2 R120
510R2F-L-GP
CPU_SIC
1
VTT_SENSE
Y10
W17
AE10
AF10
MEMZN
MEMZP
2
2 39D2R2F-L-GP
39D2R2F-L-GP
CPU_TEST25_H E9
CPU_TEST25_L
E8
CPU_TEST19
G9
CPU_TEST18
H10
AA7
C2
Remove
these
resistor
when using
EVT CPU
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TP13
TP14
TP15
TP12
TP24
1
1
1
1
1
CPU_TEST17
CPU_TEST16
CPU_TEST15
CPU_TEST14
CPU_TEST12
D7
E7
F7
C7
AC8
Change;Add
B
35
35
C3
AA6
W7
W8
Y6
AB6
H_THERMDC
H_THERMDA
H_THERMDA
1
1
2
2
3
ALERT#
17,35
Q15
MMBT3904-U1
DY
C
MISC
DBRDY
VDDIO_FB_H
VDDIO_FB_L
VTT_SENSE
PSI_L
M_VREF
M_ZN
M_ZP
HTREF1
HTREF0
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST29_H
TEST29_L
G10
DBRDY
W9
Y9
VDDIO_FB 1
VDDIO_FB# 1
A3
PSI#
TP20
TP22
1D2V_LDO_S0
PSI#
P6 CPU_HTREF1
R6 CPU_HTREF0
R147
R146
CPU_TEST29H
CPU_TEST29L
C9
C8
TPAD30
TPAD30
37
1
1
2 44D2R2F-GP
2
44D2R2F-GP
1
R112
2
80D6R2F-L-GP
VREF_DDR_CLAW
1D8V_S3
LAYOUT: Route FBCLKOUT_H/L
differentially impedance 80
TEST24
TEST23
TEST22
TEST21
TEST20
TEST17
TEST16
TEST15
TEST14
TEST12
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
TEST7
TEST6
THERMDC
THERMDA
TEST3
TEST2
AE7
AD7
AE8
AB8
AF7
CPU_TEST24
CPU_TEST23
CPU_TEST22
CPU_TEST21
CPU_TEST20
1
1
1
1
TP72
TP27
TP73
TP70
C544
SCD1U16V2ZY-2GP
VREF_DDR_CLAW
RN58
TPAD30
TPAD30
TPAD30
1
2
4
3
SRN1KJ-7-GP
TPAD30
J7
H8
AF8
AE6 CPU_TEST26
K8
C4
C542
C543
LAYOUT: Locate close to CPU.
B
1
2 R362
300R2J-4-GP
C232
SC2200P50V2KX-2GP
2
?
1
VREF_DDR_CLAW
1
R3661
R365
2
1
TPAD30 TP21
PROCHOT#
AE9 TDO
1
DY
THERMTRIP#
PROCHOT#
R369
4K7R2J-2-GP
2
2
R131
100R3J-4-GP
1 R102
300R2J-4-GP
TDO
AF6
AC7
R364
300R2J-4-GP
SC1KP50V2KX-1GP
LDT_RST#_CPU
DY
THERMTRIP_L
PROCHOT_L
3D3V_S0
DY
1
2
1
LDT_STP#_CPU
1 R314
300R2J-4-GP
CPU_SIC
CPU_SID
2
?
?
?
2
1
C
LDT_PWROK
1
1
R370
2K2R2J-2-GP
2
TPAD30 TP77
TPAD30 TP78
VCC_CORE_S0
DY
1D8V_S3
37
2
AC6
Near To CPU
1D8V_S3
VID[5..0]
VID5
VID4
VID3
VID2
VID1
VID0
A5
C6
A6
A4
C5
B5
1
CPU_PRESENT#
VID5
VID4
VID3
VID2
VID1
VID0
SCD1U16V2ZY-2GP
37 CPU_PRESENT#
PWROK
LDTSTOP_L
RESET_L
1
CLKIN_H
CLKIN_L
LDT_PWROK
R315
300R2J-4-GP
2
A9
A8
LDT_PWROK
A7
LDT_STP#_CPU F10
LDT_RST#_CPU B7
CLKCPU#_IN
2
2 C450
SC3900P50V2KX-2GP
1
CPUCLK#
VDDA1
VDDA2
1
R321
169R2F-GP
3
F8
F9
2
2
1
C153
SC3300P50V2KX-1GP
SC10U10V5ZY-1GP
SCD22U16V3ZY-GP
2
CLKCPU_IN
1
1
1
2
2
C146
C456
2
2 C451
SC3900P50V2KX-2GP
1
CPUCLK
C165
SC4D7U10V5ZY-3GP
1
3
2
C453
SC10U10V5ZY-1GP
1
1D8V_S3
1
0R3-0-U-GP
1
2
R325
H_THERMDC
1D8V_S3
2 LDT_RST#_CPU
0R2J-2-GP
2
R150
0R2J-2-GP
220R2F-GP
DY
2
DY
12,16
LDT_STP#
1
2
2
DY
R151
1
R308
R307
10KR2F-2-GP
1
1
1
R153
220R2F-GP
1
1
LDT_RST#
1
2
220R2F-GP
R152
DY
1
R318
2 LDT_STP#_CPU
0R2J-2-GP
R309
10KR2F-2-GP
<Core Design>
A
2
1D8V_S3
Wistron Corporation
1
DYDY
3
Q5
1
R313
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2 LDT_PWROK
0R2J-2-GP
Title
R312
10KR2F-2-GP
CPU(3/4)_Control & Debug
MMBT3904-U1
2
Size
A3
2
1HDT_RST#
16 SB_CPUPWRGD
DY
1 2
R103
10KR2J-3-GP
TPAD30 TP11
R99
4K7R2J-2-GP
1
3D3V_S0
1
HDT Connectors
2
A
2
2
DY
DBREQJ
DBRDY
TMS
TRST_L
TCK
TDI
TDO
R154
DY
2
R100
DY
220R2F-GP
1
1
C267
SCD1U16V2ZY-2GP
R101
0R2J-2-GP
220R2F-GP
2
1
16
DY
LDT_RST#
Document Number
Rev
5
4
3
2
SA
Orta
Date: Tuesday, December 12, 2006
Sheet
1
6
of
46
5
4
3
2
1
VCC_CORE_S0
1D2V_LDO_S0
0.22u X 6
C
0.01u X 2
1
C230
2
C145
SCD01U50V2ZY-1GP
1
2
SC180P50V2JN-1GP
SC4D7U10V5ZY-3GP
2
C209
2
C204
SC180P50V2JN-1GP
C253
B
Place near to CPU
180P x 6
1
1
C118
2
SC180P50V2JN-1GP
2
SC180P50V2JN-1GP
C251
SC180P50V2JN-1GP
1
2
SC180P50V2JN-1GP
C131
1
SCD22U16V3ZY-GP
C123
2
C465
SCD22U16V3ZY-GP
SC180P50V2JN-1GP
C259
2
SC180P50V2JN-1GP
2
SC1U10V3ZY-6GP
1
1
1
1
C257
C471
2
SCD1U16V2ZY-2GP
C127
2
SCD1U16V2ZY-2GP
C128
2
SCD1U16V2ZY-2GP
2
1
1
1
1
SC4D7U10V5ZY-3GP
C126
0.22u X 2
180p x 2
2
0.1u x 3
<Core Design>
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU(4/4)_Power
Size
A3
Document Number
Rev
3
2
SA
Orta
Date: Tuesday, December 12, 2006
4
C454
2
SC180P50V2JN-1GP
C255
2
SC180P50V2JN-1GP
C245
1
1
1
SC4D7U10V5ZY-3GP
2
C268
2
SC4D7U10V5ZY-3GP
C558
2
SC4D7U10V5ZY-3GP
C125
2
SC4D7U10V5ZY-3GP
2
SCD22U16V3ZY-GP
C452
1
1
1
C546
2
SCD22U16V3ZY-GP
2
1
1
1
0D9V_S3
4.7u x 4
1D2V_LDO_S0
C460
2
1
C260
2
C262
SC4D7U10V5ZY-3GP
2
SC4D7U10V5ZY-3GP
2
C261
SC4D7U10V5ZY-3GP
1
1
A
5
D
SCD01U50V2ZY-1GP
1
1
1
1
C104
2
C269
SC4D7U10V5ZY-3GP
2
SC4D7U10V5ZY-3GP
2
C137
SC4D7U10V5ZY-3GP
1
1
1
C239
2
1
SC180P50V2JN-1GP
C181
2
SC180P50V2JN-1GP
C196
2
SC180P50V2JN-1GP
1
1
1
C214
SC180P50V2JN-1GP
2
C228
2
C163
C541
4.7u x 4
hexainf@hotmail.com
GRATIS - FOR FREE
C113
SC4D7U10V5ZY-3GP
C139
SC4D7U6D3V3KX-GP
1
C138
2
C241
SC10U10V5ZY-1GP
2
1
C240
180p x 4
1
1
C218
SCD01U50V2ZY-1GP
2
SCD22U16V3ZY-GP
2
C199
SCD01U50V2KX-1GP
1
0.01u x 2
1
C166
SCD22U16V3ZY-GP
2
C244
1
C170
2
C215
SC10U10V5ZY-1GP
2
1
C182
SC10U10V5ZY-1GP
2
1
C195
SC10U10V5ZY-1GP
2
1
C213
SC10U10V5ZY-1GP
2
1
C169
1D8V_S3
180P x 2
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS130
VSS131
VSS132
VSS133
VDD
0.22u X 40D9V_S3
0.22u x 2
SC10U10V5ZY-1GP
2
1
SC10U10V5ZY-1GP
2
1
C173
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
0D9V_S3
10u x 9
SC10U10V5ZY-1GP
2
1
SC10U10V5ZY-1GP
2
1
SC10U10V5ZY-1GP
2
1
C216
VDD
U52G
J15
K16
L15
M16
P16
T16
U15
V16
4.7u x 6
LAYOUT: Place on backside of processor.
VCC_CORE_S0
VCC_CORE_S0
AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
1
C238
SC10U10V5ZY-1GP
2
1
C559
SC4D7U10V5ZY-3GP
B
C140
SC10U10V5ZY-1GP
2
1
1D8V_S3
C164
SCD22U16V3ZY-GP
2
C177
SCD22U16V3ZY-GP
2
2
1
0D9V_S3
C191
SCD22U16V3ZY-GP
2
C219
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
10u x 4
1D8V_S3
SC10U10V5ZY-1GP
2
1
1D8V_S3
SCD22U16V3ZY-GP
2
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
M11
1
C
VDDIO23
VSS47
VDDIO1
VSS48
VDDIO2
VSS49
VDDIO3
VSS50
VDDIO4
VSS51
VDDIO5
VSS52
VDDIO6
VSS53
VDDIO7
VSS54
VDDIO8
VSS55
VDDIO9
VSS56
VDDIO10 I O
VSS57
VDDIO11 POWER VSS58
VDDIO12
VSS59
VDDIO13
VSS60
VDDIO14
VSS61
VDDIO15
VSS62
VDDIO16
VSS63
VDDIO17
VSS64
VDDIO18
VSS66
VDDIO19
VSS67
VDDIO20
VSS68
VDDIO21
VSS69
VDDIO22
VSS70
VDDIO24
VSS71
VDDIO25
VSS72
VDDIO26
VSS73
VDDIO27
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
0D9V_S3
AC10
AB10
AA10
A10
1
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
P18
P21
P23
P25
R17
T18
T21
T23
T25
U17
V18
V21
V23
V25
Y25
VTT4
VTT3
VTT2
VTT1
2 C254
SC4D7U6D3V3KX-GP
1
SCD22U16V3ZY-GP
2
1D8V_S3
VTT8
VTT7
VTT6
VTT5
VTT9
AE5
AE4
AE3
AE2
1
D10
C10
B10
AD10
W10
VLDT_B4
VLDT_B3
VLDT_B2
VLDT_B1
AC4
AD2
G4
H2
J9
J11
J13
K6
K10
K12
K14
L4
L7
L9
L11
L13
M2
M6
M8
M10
N7
N9
N11
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
V6
V8
V10
V12
V14
W4
Y2
SCD22U16V3ZY-GP
2
0D9V_S3
VLDT_A4
VLDT_A3
VLDT_A2
VLDT_A1
1
D4
D3
D2
D1
D
U52F
U52H
2
1D2V_LDO_S0
Sheet
1
7
of
46
5
4
3
2
PARALLEL TERMINATION
1
Decoupling Capacitor
Put decap near power(0.9V) and pull-up resistor
0D9V_S3
1
2
SCD1U16V2ZY-2GP
2
C508
SCD1U16V2ZY-2GP
1
1
2
SCD1U16V2ZY-2GP
D
C194
1
2
SC10P50V2JN-4GP
C243
DY
SC10P50V2JN-4GP
2
C208
2
2
DY
SC10P50V2JN-4GP
2
C523
SCD1U16V2ZY-2GP
C502
1
2
1 SCD1U16V2ZY-2GP
1
2
SCD1U16V2ZY-2GP
C158
C234
SC10P50V2JN-4GP
2
2
1
1
1
1
2
SCD1U16V2ZY-2GP
2
1
2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
1
1
2
1
C510
SC2D2U6D3V3KX-GP
1
C236
SC2D2U6D3V3KX-GP
C161
SC2D2U6D3V3KX-GP
2
C499
SC2D2U6D3V3KX-GP
2
C518
SC2D2U6D3V3KX-GP
1
1
2
C184
C500
2
8
7
6
5
C152
Place these Caps near DM1
1
SRN47J-7-GP
M_B_CS1# 5,9
M_B_WE# 5,9
M_B_CAS# 5,9
M_B_BS#0 5,9
C171
SC1000P50V3JN-GP
1D8V_S3
M_B_BS#2 5,9
M_B_CKE0 5,9
C207
1
SRN47J-7-GP
RN16
4
3
2
RN27
M_A_CS1# 5,9
M_A_CAS# 5,9
C226
2
1
2
M_A_CS1#
M_A_CAS#
C134
SC1000P50V3JN-GP
RN28
4
3
C235
SCD1U16V2ZY-2GP
C141
2
C511
SC1000P50V3JN-GP
M_A_WE# 5,9
M_A_ODT1 5,9
C498
1
M_A_BS#0 5,9
M_A_WE#
1
2
C
1
1
M_A_A10
M_A_BS#0
M_A_A1
SRN47J-4-GP
1
2
3
4
C526
2
SRN47J-4-GP
RN30
8
7
6
5
M_B_A[15..0] 5,9
SCD1U16V2ZY-2GP
1
2
3
4
M_A_A[15..0] 5,9
1
1
2
3
4
SRN47J-4-GP
RN24
8
7
6
5
M_A_A2
M_A_A4
M_A_A6
M_A_A7
2
8
7
6
5
SC1000P50V3JN-GP
D
Put decap near power(0.9V)
and pull-up resistor
0D9V_S3
RN55
1
2
3
4
C
SRN47J-4-GP
2
C211
SC680P50V2KX-2GP
1
C521
SC680P50V2KX-2GP
2
2
Place these Caps near DM2
1
1
1D8V_S3
2
1D8V_S3
SRN47J-4-GP
C188
SCD1U16V2ZY-2GP
M_B_A10
M_B_A1
M_B_A3
M_B_A5
2
SCD1U16V2ZY-2GP
RN23
8
7
6
5
C512
SCD1U16V2ZY-2GP
C505
M_B_CS2# 5,9
SRN47J-4-GP
1
2
3
4
1
1
M_B_A12
M_B_A9
M_B_A8
2
8
7
6
5
1
RN18
1
2
3
4
C515
SC680P50V2KX-2GP
1
C520
SC2D2U6D3V3KX-GP
2
C178
SC2D2U6D3V3KX-GP
2
C168
SC2D2U6D3V3KX-GP
1
1
C135
SC2D2U6D3V3KX-GP
2
2
1
M_A_CS3# 5,9
M_A_A13 5,9
M_A_ODT0 5,9
2
8
7
6
5
1
RN57
1
2
3
4
Cross Moat Cap
C192
SC2D2U6D3V3KX-GP
SRN47J-4-GP
RN56
B
1
SC180P50V2JN-1GP
2
1
C162
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
C167
SCD1U16V2ZY-2GP
1
1
C210
2
1
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
1
2
2
2
1
1
1
<Core Design>
C519
1
1
1
C197
C190
C203
Wistron Corporation
C217
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SCD1U16V2ZY-2GP
C223
2
C187
2
C516
SCD1U16V2ZY-2GP
SRN47J-4-GP
C142
SCD1U16V2ZY-2GP
M_B_CKE1 5,9
C202
A
2
M_B_A15
M_B_A14
M_B_A11
2
8
7
6
5
1
1
RN17
1
2
3
4
SCD1U16V2ZY-2GP
SRN47J-4-GP
SRN47J-4-GP
C136
SCD1U16V2ZY-2GP
M_B_ODT0 5,9
M_B_CS3# 5,9
M_B_ODT1 5,9
C522
1
M_B_A13
SCD1U16V2ZY-2GP
8
7
6
5
SCD1U16V2ZY-2GP
M_B_RAS# 5,9
M_B_BS#1 5,9
M_B_CS0# 5,9
1
2
3
4
1
M_B_A0
SCD1U16V2ZY-2GP
A
8
7
6
5
C189
2
RN29
RN25
1
2
3
4
C176
2
2
C524
SCD1U16V2ZY-2GP
M_A_CKE1 5,9
SRN47J-4-GP
SRN47J-4-GP
1
M_A_A11
M_A_A14
M_A_A15
M_A_CKE1
2
8
7
6
5
SCD1U16V2ZY-2GP
1
2
3
4
M_B_A7
M_B_A6
M_B_A4
M_B_A2
SCD1U16V2ZY-2GP
8
7
6
5
1
RN21
1
2
3
4
1D8V_S3
Place these Caps near PARALLEL TERMINATION
RN54
1
0D9V_S3
SRN47J-4-GP
SRN47J-4-GP
2
M_A_CS2# 5,9
M_A_CKE0 5,9
SCD1U16V2ZY-2GP
M_A_BS#2 5,9
SCD1U16V2ZY-2GP
8
7
6
5
C201
SCD01U50V2KX-1GP
1
2
3
4
M_A_A5
M_A_A3
M_A_A9
M_A_A8
C222
2
8
7
6
5
C147
2
1
2
3
4
M_A_BS#2
M_A_A12
M_A_CS2#
M_A_CKE0
2
2
RN15
RN19
SC180P50V2JN-1GP
C175
SRN47J-4-GP
1
0D9V_S3
1
M_A_CS0# 5,9
M_A_RAS# 5,9
M_A_BS#1 5,9
M_A_A0 5,9
2
8
7
6
5
SCD01U50V2KX-1GP
1
2
3
4
1
B
Title
DDR DAMPING & TERMINATION
Size
A3
Document Number
Date: Tuesday, December 12, 2006
5
4
3
2
Rev
SA
Orta
Sheet
1
8
of
46
5
4
3
2
1
DM2
1
1
2
2
C97
SC2D2U6D3V3KX-GP
C96
SCD1U16V2ZY-2GP
202
GND
GND
201
2
1
10KR2J-3-GP
M_B_CS2# 5,8
M_B_CS3# 5,8
hexainf@hotmail.com
GRATIS - FOR FREE
50
69
83
120
163
NC#50
NC#69
NC#83
NC#120
NC#163/TEST
110
115
79
80
108
113
109
CS0#
CS1#
CKE0
CKE1
RAS#
CAS#
WE#
197
195
SCL
SDA
114
119
ODT0
ODT1
1
3D3V_S0
C562
SC2D2U6D3V3KX-GP
1D8V_S3
Place near CPU
M_B_CLK_DDR1
C119
SC1D5P50V2CN-1GP
M_B_CLK_DDR1#
M_B_CLK_DDR2
C263
SC1D5P50V2CN-1GP
M_B_CLK_DDR2#
?
5,8
5,8
M_A_CS2#
M_A_CS3#
5,8
5,8
5,8
5,8
5,8
5,8
5,8
DDR_VREF
M_A_CS0#
M_A_CS1#
M_A_CKE0
M_A_CKE1
M_A_RAS#
M_A_CAS#
M_A_WE#
SMBC0_SB
SMBD0_SB
1D8V_S3
5,8
5,8
DDR2-200P-22-GP-U1
A
C561
C110
SCD1U16V2ZY-2GP
VREF_DDR_MEM
VREF_DDR_MEM
C99
SC2D2U6D3V3KX-GP
RN13
1
2
62.10017.A61
4
3
SRN1KJ-7-GP
SA0
SA1
198
200
VDD_SPD
199
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
81
82
87
88
95
96
103
104
111
112
117
118
VREF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196
C101
SCD1U16V2ZY-2GP
201
GND
GND
202
4
M_A_CLK_DDR1 5
M_A_CLK_DDR1# 5
M_A_CLK_DDR2 5
M_A_CLK_DDR2# 5
3D3V_S0
C271
SCD1U16V2ZY-2GP
C270
SC2D2U6D3V3KX-GP
C
1D8V_S3
Place near CPU
M_A_CLK_DDR1
C132
SC1D5P50V2CN-1GP
M_A_CLK_DDR1#
M_A_CLK_DDR2
C237
SC1D5P50V2CN-1GP
M_A_CLK_DDR2#
B
<Core Design>
C100
C108
SC1KP50V2KX-1GP
A
62.10017.661
Hi 9.2 mmHigh 5.2mm
Main Source: 62.10017.A61
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DDR SO-DIMM SKT
Size
Document Number
Custom
Date:
LAYOUT: Locate close to DIMM
5
30
32
164
166
M_A_DM[7..0] 5
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
SKT-SODIMM20020U3GP
SCD1U16V2ZY-2GP
High 9.2mm
M_A_ODT0
M_A_ODT1
CK0
CK0#
CK1
CK1#
D
1
R156
5
1
DIMM2_SA0
M_A_DQS#[7..0]
2
VREF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
10
26
52
67
130
147
170
185
5
2
81
82
87
88
95
96
103
104
111
112
117
118
NORMAL TYPE
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
5 M_A_DQ[63..0]
SMBD0_SB 3,19
SMBC0_SB 3,19
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
M_A_DQS[7..0]
1
50
69
83
120
163
BA0
BA1
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
2
NC#50
NC#69
NC#83
NC#120
NC#163/TEST
107
106
13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186
NORMAL TYPE
198
200
5,8 M_A_BS#0
5,8 M_A_BS#1
MH2
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
1
1
2
VREF_DDR_MEM
199
SA0
SA1
5,8 M_A_BS#2
1
ODT0
ODT1
M_B_ODT0
M_B_ODT1
VDDSPD
MH2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16_BA2
2
114
119
5,8
5,8
195
197
MH1
102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85
2
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
SDA
SCL
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
1
13
31
51
70
131
148
169
188
5 M_B_DQS[7..0]
10
26
52
67
130
147
170
185
2
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
5 M_B_DQS#[7..0]
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
1
/DQS0
/DQS1
/DQS2
/DQS3
/DQS4
/DQS5
/DQS6
/DQS7
B
CK1
/CK1
M_B_CLK_DDR2 5
M_B_CLK_DDR2# 5
M_B_DM[7..0] 5
2
11
29
49
68
129
146
167
186
C
M_B_CLK_DDR1 5
M_B_CLK_DDR1# 5
164
166
SCD1U16V2ZY-2GP
2
1
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
5 M_B_DQ[63..0]
M_B_CKE0 5,8
M_B_CKE1 5,8
30
32
1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
79
80
CK0
/CK0
2
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
CKE0
CKE1
1
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_CS0# 5,8
M_B_CS1# 5,8
5,8 M_A_A[15..0]
2
BA0
BA1
/CS0
/CS1
110
115
M_B_RAS# 5,8
M_B_WE# 5,8
M_B_CAS# 5,8
1
107
106
108
109
113
2
5,8 M_B_BS#0
5,8 M_B_BS#1
D
/RAS
/WE
/CAS
1
5,8 M_B_BS#2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2
1
MH1
102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85
2
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
2
DM1
5,8 M_B_A[15..0]
3
2
Rev
SA
Orta
Tuesday, December 12, 2006
Sheet
1
9
of
46
5
4
3
2
1
D
D
CLAW HAMMER TO NB
NB TO CLAW HAMMER
C
4 CPUHTTCLKOUT1
4 CPUHTTCLKOUTJ1
4 CPUHTTCLKOUT0
4 CPUHTTCLKOUTJ0
4 CPUHTTCTLOUT0
4 CPUHTTCTLOUTJ0
B
VDDHT_PKG
1 of 5
U53A
1
2
RN20
CPUCADOUT15
CPUCADOUTJ15
CPUCADOUT14
CPUCADOUTJ14
CPUCADOUT13
CPUCADOUTJ13
CPUCADOUT12
CPUCADOUTJ12
CPUCADOUT11
CPUCADOUTJ11
CPUCADOUT10
CPUCADOUTJ10
CPUCADOUT9
CPUCADOUTJ9
CPUCADOUT8
CPUCADOUTJ8
R19
R18
R21
R22
U22
U21
U18
U19
W19
W20
AC21
AB22
AB20
AA20
AA19
Y19
HT_RXCAD15P
HT_RXCAD15N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD8P
HT_RXCAD8N
CPUCADOUT7
CPUCADOUTJ7
CPUCADOUT6
CPUCADOUTJ6
CPUCADOUT5
CPUCADOUTJ5
CPUCADOUT4
CPUCADOUTJ4
CPUCADOUT3
CPUCADOUTJ3
CPUCADOUT2
CPUCADOUTJ2
CPUCADOUT1
CPUCADOUTJ1
CPUCADOUT0
CPUCADOUTJ0
T24
R25
U25
U24
V23
U23
V24
V25
AA25
AA24
AB23
AA23
AB24
AB25
AC24
AC25
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD0P
HT_RXCAD0N
CPUHTTCLKOUT1
CPUHTTCLKOUTJ1
W21
W22
HT_RXCLK1P
HT_RXCLK1N
CPUHTTCLKOUT0
CPUHTTCLKOUTJ0
Y24
W25
CPUHTTCTLOUT0
CPUHTTCTLOUTJ0
P24
P25
A24
C24
4
3
SRN49D9F-GP
HT_RXCALP
HT_RXCALN
NB0CADOUT[15..0] 4
NB0CADOUTJ[15..0] 4
HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N
P21
P22
P18
P19
M22
M21
M18
M19
L18
L19
G22
G21
J20
J21
F21
F22
NB0CADOUT15
NB0CADOUTJ15
NB0CADOUT14
NB0CADOUTJ14
NB0CADOUT13
NB0CADOUTJ13
NB0CADOUT12
NB0CADOUTJ12
NB0CADOUT11
NB0CADOUTJ11
NB0CADOUT10
NB0CADOUTJ10
NB0CADOUT9
NB0CADOUTJ9
NB0CADOUT8
NB0CADOUTJ8
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N
N24
N25
L25
M24
K25
K24
J23
K23
G25
H24
F25
F24
E23
F23
E24
E25
NB0CADOUT7
NB0CADOUTJ7
NB0CADOUT6
NB0CADOUTJ6
NB0CADOUT5
NB0CADOUTJ5
NB0CADOUT4
NB0CADOUTJ4
NB0CADOUT3
NB0CADOUTJ3
NB0CADOUT2
NB0CADOUTJ2
NB0CADOUT1
NB0CADOUTJ1
NB0CADOUT0
NB0CADOUTJ0
HT_TXCLK1P
HT_TXCLK1N
L21
L22
NB0HTTCLKOUT1
NB0HTTCLKOUTJ1
NB0HTTCLKOUT1 4
NB0HTTCLKOUTJ1 4
HT_TXCLK0P
HT_TXCLK0N
J24
J25
NB0HTTCLKOUT0
NB0HTTCLKOUTJ0
NB0HTTCLKOUT0 4
NB0HTTCLKOUTJ0 4
HT_RXCTLP
HT_RXCTLN
HT_TXCTLP
HT_TXCTLN
N23
P23
NB0HTTCTLOUT
NB0HTTCTLOUTJ
NB0HTTCTLOUT 4
NB0HTTCTLOUTJ 4
HT_RXCALP
HT_RXCALN
HT_TXCALP
HT_TXCALN
C25
D24
HT_TXCALP
HT_TXCALN
HT_RXCLK0P
HT_RXCLK0N
RS690M-GP
Close to NB ball
HYPER TRANSPORT CPU
I/F
4 CPUCADOUT[15..0]
4 CPUCADOUTJ[15..0]
C
1
B
2 R352
100R2F-L1-GP-U
Close to NB ball
71.RS690.M01
<Core Design>
A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
NB-RS690M_HT
Size
A3
Document Number
Rev
Date: Tuesday, December 12, 2006
5
4
3
2
SA
Orta
Sheet
1
10
of
46
5
4
3
2
1
D
D
G5
G4
J8
J7
J4
J5
L8
L7
L4
L5
M8
M7
M4
M5
P8
P7
P4
P5
R4
R5
R7
R8
U4
U5
W4
W5
Y4
Y5
V9
W9
AB7
AB6
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
16 PCIE_RX2P_SB
16 PCIE_RX2N_SB
W11
W12
SB_RX2P
SB_RX2N
16 PCIE_RX3P_SB
16 PCIE_RX3N_SB
AA11
AB11
C
A-LINK
NEWCARD
A-LINK
28 PCIE_RXP3
28 PCIE_RXN3
AD8
AE8
SB_TX2P
SB_TX2N
C533 1
C534 1
2 SCD1U10V2KX-4GP
2 SCD1U10V2KX-4GP
PCIE_TX2P_SB 16
PCIE_TX2N_SB 16
SB_TX3P
SB_TX3N
AD7
AE7
SB_TX3P
SB_TX3N
C551 1
C552 1
2 SCD1U10V2KX-4GP
2 SCD1U10V2KX-4GP
PCIE_TX3P_SB 16
PCIE_TX3N_SB 16
GPP_TX2P
GPP_TX2N
C531 1
C532 1
2 SCD1U10V2KX-4GP
2 SCD1U10V2KX-4GP
PCIE_TXP3 28
PCIE_TXN3 28
C535 1
C536 1
2 SCD1U10V2KX-4GP
2 SCD1U10V2KX-4GP
PCIE_TX0P_SB 16
PCIE_TX0N_SB 16
C548 1
C549 1
2 SCD1U10V2KX-4GP
2 SCD1U10V2KX-4GP
PCIE_TX1P_SB 16
PCIE_TX1N_SB 16
I/F GPP
AD4
AE5
AB9
AA9
GPP_RX3P
GPP_RX3N
GPP_TX3P
GPP_TX3N
AD5
AD6
16 PCIE_RX1P_SB
16 PCIE_RX1N_SB
PCE_ISET
PCE_TXISET
SB_TX2P
SB_TX2N
GPP_TX2P
GPP_TX2N
W14
W15
1
1
J1
H2
K2
K1
K3
L3
L1
L2
N2
N1
P2
P1
P3
R3
R1
R2
T2
U1
V2
V1
V3
W3
W1
W2
Y2
AA1
AA2
AB2
AB1
AC1
AE3
AE4
GPP_RX2P
GPP_RX2N
AB12
AA12
TP23
TP28
SB_RX3P
SB_RX3N PCIE
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
Y7
AA7
16 PCIE_RX0P_SB
16 PCIE_RX0N_SB
TPAD30
TPAD30
B
2 of 5
PCIE I/F
GFX
U53B
AA14
AB14
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
PCIE I/F SB
NC#AA14
NC#AB14
C
CLOSE TO NB
Change 0920
SB_TX0P
SB_TX0N
AE9
AD10
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
AC8
AD9
SB_TX1P
SB_TX1N
AD11
AE11
PCE_PCAL
PCE_NCAL
PCE_CALRP
PCE_CALRN
A-LINK
R360 1
R361 1
2 562R2F-GP
22KR2F-3-GP
VDDA12_PKG2
B
SD
RS690M-GP
71.RS690.M01
Close to NB ball
<Core Design>
A
hexainf@hotmail.com
GRATIS - FOR FREE
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
NB-RS690M_MEM/PCIE_LINK I/F
Size
A3
Document Number
Date: Tuesday, December 12, 2006
5
4
3
2
Rev
SA
Orta
Sheet
1
11
of
46
5
4
3
3D3V_S0
AVDDQ
1
1
14
7
2
2
1
2
1
2
R353 2
1
TVCLKIN
SC1U10V2ZY-N1
1D2V_LDO_S0
PLLVDD12
3
C2
NB_OSC
R337
2
C484
SC2D2U6D3V3KX-GP
DO NOT SUPPORT SIDEPORT MEMORY
DO NOT SUPPORT SERIAL STRAP ROM
DUMMY IT
B
DISABLE DEBUG MODE
DUMMY IT
GFX_CLKP
GFX_CLKN
3
3
SBLINK_CLK
SBLINK_CLK#
G1
G2
SB_CLKP
SB_CLKN
R143
R135
R136
R137
R133
R134
1
1
1
1
1
1
DY
DY
DY
DY
DY
DY
1
Change 0919
3KR2F-GP
3KR2F-GP
3KR2F-GP
3KR2F-GP
3KR2F-GP
3KR2F-GP
DFT_GPIO0
DFT_GPIO1
DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5
BMREQ#_NB
14 CLK_DDC_EDID
14 DAT_DDC_EDID
THERMAL_P_NB
THERMAL_N_NB
TPAD28 TP25
TPAD28 TP26
TPAD28 TP18
TPAD28 TP64
TESTMODE_NB
1
2
3
MMBT3904-U1
2
2
2
2
2
2
NB_LDT_STP#
D6
D7
C8
C7
B8
A8
1
2
LVDS_DIGON
LVDS_BLON
LVDS_BLEN
E12
G12
F12
1
2
BLM18BB221SN1D-GP
C157
SCD1U16V2ZY-2GP
1
2
BLM18BB221SN1D-GP
C
R338
LVDDR18D_S0
1
F14
F15
C179
SCD1U16V2ZY-2GP
SC1U10V3ZY-6GP
C485
LVDDR33_S0
2
CRT/TVOUT
BMREQ#
I2C_CLK
I2C_DATA
THERMALDIODE_P
THERMALDIODE_N
C14
B3
C3
A3
LVSSR
LVSSR
C474
SC1U10V3ZY-6GP
C151
SC1U10V3ZY-6GP
R333
C180 C144
SCD1U16V2ZY-2GP
SC4D7U10V5ZY-3GP
Change 0920
DFT_GPIO0
DFT_GPIO1
DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5
B2
A2
B4
AA15
AB15
A16
A14
D12
C19
C15
C16
1D8VLPVDD_S0
1
2
BLM18BB221SN1D-GP
TMDS_HPD
DDC_DATA
TESTMODE
STRP_DATA
GPP_TX0P
GPP_TX0N
DEBUG6
GPP_RX0P
GPP_RX0N
DEBUG9
DEBUG10
GPP_TX1N
GPP_TX1P
GPP_RX1N
GPP_RX1P
DEBUG15
AD14
AD15
AE15
AD16
AE16
AC17
AD18
AE19
AD19
AE20
AD20
AE21
DEBUG0
DEBUG2
DEBUG1
DEBUG13
DEBUG14
AD13
AC13
AE13
AE17
AD17
LVDS_DIGON
LVDS_BLEN_NB
GPP_TX0P
GPP_TX0N
1
1
GPP_TX1N
GPP_TX1P
1
1
GMCH_BL_ON 31
TP19 TPAD30
SCD1U10V2KX-4GP
2C537
SCD1U10V2KX-4GP
2C538
TP80 TPAD30
?
TP29 TPAD30
TP76 TPAD30
SCD1U10V2KX-4GP
2C539
SCD1U10V2KX-4GP
2C540
TP31 TPAD30
TP74
TP30
TP79
TP75
TP81
PCIE_TXP1 23
PCIE_TXN1 23
B
LAN
PCIE_RXP1 23
PCIE_RXN1 23
PCIE_TXN2 28
PCIE_TXP2 28
PCIE_RXN2 28
PCIE_RXP2 28
MINICARD
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
1
2
LDT_STP#
F2
E1
TPAD28 TP67
R340
1KR2J-1-GP
12
R327
10KR2J-3-GP
6,16
NBSRC_CLK
NBSRC_CLK#
3D3V_S0
1
1D8V_S0
OSCIN
PLLVDD12
3
3
1
1
2
BLM18BB221SN1D-GP
B11
A11
LVSSR
LVSSR
LVSSR
LVSSR
LVSSR
LVSSR
14
14
14
14
1
HTTSTCLK
HTREFCLK
10KR2J-3-GP
A12
B12
C12
C13
3D3V_S0
R332
GMCH_TXACLK+
GMCH_TXACLKGMCH_TXBCLK+
GMCH_TXBCLK-
2
1HTTST_CLK C23
B23
LVDDR18D
LVDDR18D
LVDDR33
LVDDR33
SB Modify
1D8V_S0
1
R342 2
DVO
1
10KR2J-3-GP
HTREF_CLK
2
1
2
1
2
3
SYSRESET#
POWERGOOD
LDTSTOP#
ALLOW_LDTSTOP
D14
E14
TXBOUT3+
TXBOUT3-
14
14
14
14
14
14
2
NB_LDT_STP#
16 ALLOW_LDTSTOP
HTPVDD
HTPVSS
C10
C11
C5
B5
LPVDD
LPVSS
GMCH_TXBOUT0+
GMCH_TXBOUT0GMCH_TXBOUT1+
GMCH_TXBOUT1GMCH_TXBOUT2+
TP65 GMCH_TXBOUT2TPAD30
TP66 TPAD30
1
NB_PWRGD
B24
B25
E15
D15
H15
G15
TP16 TPAD30
TP17 TPAD30
2
34
NB_RST#
PLLVDD18
PLLVSS
TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN
TXAOUT3+
TXAOUT3-
1
1
2
BLM18BB221SN1D-GP
D
14
14
14
14
14
14
2
16
C488
SC1U10V2ZY-N1
DACSCL
DACSDA
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
A15
B16
C17
C18
B17
A17
A18
B18
GMCH_TXAOUT0+
GMCH_TXAOUT0GMCH_TXAOUT1+
GMCH_TXAOUT1GMCH_TXAOUT2+
GMCH_TXAOUT2-
1
HTPVDD
C487
RSET
A10
B10
R331
C473
SC4D7U6D3V3KX-GP
B21
B14
B15
B13
A13
H14
G14
D17
E17
2
SC1U10V2ZY-N1
SC1U10V2ZY-N1
1D8V_S0
RED
GREEN
BLUE
DACVSYNC
DACHSYNC
B6
A6
15 GMCH_DDCCLK
15 GMCH_DDCDATA
C493
E19
F19
G19
C6
A5
LVDS
IRSET_NB
2
C
Y
COMP
MIS.
1
1
C492
2
C476
SC10U10V5ZY-1GP
2
1
1
2
BLM18BB221SN1D-GP
AVDDQ
AVSSQ
PLL
PWR
2
R341 715R2F-GP
1
Change 0919
2
C
A21
A22
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
PM
2
2
150R2F-1-GP
2
150R2F-1-GP
2
150R2F-1-GP
C150
SC1U10V3ZY-6GP
AVDD
AVDD
AVSSN
AVSSN
AVDDDI
AVSSDI
C21
C20
D19
R334
14
TSLCX08MTCX-GP
3 of 5
B22
C22
G17
H17
A20
B20
CLOCKs
1
1
U53C
15 GMCH_VSYNC
15 GMCH_HSYNC
PLVDD
1D8V_S0
GMCH_LCDVDD_ON
13
NB_PWRGD
1D8VAVDDD1_S0
15 GMCH_RED
15 GMCH_GREEN
15 GMCH_BLUE
Change 0919
U61D
12
11
34
AVDDQ
R139 R138 R140
2
150R2F-1-GP
2
150R2F-1-GP
LVDS_DIGON
C489
1
1
1
1
2
150R2F-1-GP
C156
SC1U10V2ZY-N1
15 TV_DACC
15 TV_DACB
15 TV_DACA
SCD1U16V2ZY-2GP
SC1U10V3ZY-6GP
R148 R145 R142
R198--R200 And R219-R220
Close to NB
C486
1
1
0R3-0-U-GP
1
2
C148
C491
1
R339
C154
1
1D8V_S0
C149
3D3V_S5
2
1
2
1
2
1
2
C490
SC1U10V2ZY-N1
SC1U10V3ZY-6GP
SC1U10V2ZY-N1
C477
SCD1U16V2ZY-2GP
1
2
BLM18BB221SN1D-GP
SCD1U16V2ZY-2GP
SC4D7U6D3V3KX-GP
D
AVDD
SC1U10V3ZY-6GP
R330
1
2
BLM18BB221SN1D-GP
C472
1
R132
2
1D8V_S0
2
4K7R2J-2-GP
R343
R344 RS690M-GP
2KR2-GP
71.RS690.M01
2
Q13
2
3D3V_S0
43
STRP_DATA
3D3V_S0
<Core Design>
A
1
A
R335
10KR2F-2-GP
1
BMREQ#
2
BMREQ#_NB
Title
RB751V-40-1-GP
R346
C480
2
DY
SC15P50V2JN-2-GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
D26
1
16
Wistron Corporation
DY
2
DY
2
NB-RS690M_VIDEO/ CLOCK
Size
A3
1
Document Number
0R2J-2-GP
Date: Tuesday, December 12, 2006
5
4
3
2
Rev
SA
Orta
Sheet
1
12
of
46
4
3
2
1
A25
F11
D23
E9
G11
Y23
P11
R24
AE18
M15
J22
G23
J12
L12
L14
L20
L23
M11
M20
M23
M25
N12
N14
B7
L24
P13
P20
P15
R12
R14
R20
W23
Y25
AD25
U20
H25
W24
Y22
AC23
D25
G24
AC14
H12
AC22
R23
C4
AE22
T23
T25
AE14
R17
H23
M17
A23
AC15
F17
D4
AC16
M13
5
D
GROUND
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
71.RS690.M01
RS690M-GP
U53E
M3
V12
V11
V14
F3
V15
A1
H1
G3
J2
H3
AE10
J6
AE6
F1
L6
M2
M6
J3
P6
T1
N3
P9
R6
U2
T3
U3
U6
AC4
Y1
Y15
W6
AC2
Y3
Y9
Y11
R9
AD1
AC5
AC6
AC7
AD3
AC9
AC10
G6
Y12
Y14
AA3
5 of 5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D
1
C242
2
C
C258
D22
M1
AC11
VDDHT_PKG
VDDA12_PKG1
VDDA12_PKG2
DY
VDD_HT_PKG
VDDA_12_PKG
VDDA_12_PKG
SC10U10V5ZY-1GP
2
1
SC10U10V5ZY-1GP
2
1
1
2
1
2
1
2
1
C231
2
1
C220
2
1
C246
2
1
C247
2
1
2
1
2
1
2
C193
C250
C530
SC10U10V5ZY-1GP
2
1
SCD1U16V2ZY-2GP
C172
SC10U10V5ZY-1GP
2
1
C174
SC10U10V5ZY-1GP
2
1
1
SCD1U16V2ZY-2GP
2
C553
1
SCD1U16V2ZY-2GP
2
1
2
2
2
1
VDD_PLL
VDD_PLL
VSS_PLL
VSS_PLL
C155
B
1
1
2
1
2
1
2
1
2
1
2
1
1
1
2
1
2
1
2
1
2
1
2
E7
F7
F9
G9
2
1
2
C545
VDDA12_PKG1
RS690M-GP
1
SC10U10V5ZY-1GP
2
1
C143
VDDR
VDDR
VDDR
C212
SC1U10V2ZY-N1
VDD_DVO
C183
1D2V_S0
SC1U10V2ZY-N1
3D3VDDR_S0
C198
SC1U10V2ZY-N1
VDDR3
VDDR3
C206
SC1U10V2ZY-N1
E11
D11
AC12
AD12
AE12
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
C266
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
C503
SC1U10V2ZY-N1
C265
AE2
AB3
U7
W7
AB4
AC3
AD2
AE1
C225
SC1U10V2ZY-N1
C249
SC1U10V2ZY-N1
C497
SC1U10V2ZY-N1
C248
C478
SC1U10V2ZY-N1
SC1U10V2ZY-N1
SC1U10V2ZY-N1
C264
C527
SC1U10V2ZY-N1
0R3-0-U-GP C482
SC1U10V3ZY-6GP
R368
0R3-0-U-GP
C555
2
SC1U10V2ZY-N1
1
SC1U10V2ZY-N1
R345
3D3V_S0
C509
C528
SC4D7U10V5ZY-3GP
1D8V_S0
C529
SC10U10V5ZY-1GP
1
2
BLM18BB221SN1D-GP
B
SC10U10V5ZY-1GP
L19
VDD_18
VDD_18
L11
L13
L15
M12
R15
M14
N11
N13
N15
J11
H11
P12
P14
R11
R13
A19
B19
U11
U14
P17
L17
J19
D20
G20
A9
B9
C9
D9
A7
A4
U12
U15
C507
SC1U10V2ZY-N1
VDDA_1D2V
1D2V_LDO_S0
J14
J15
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
D1
G7
E2
C1
E3
D2
M9
F4
B1
D3
L9
E6
2
1
1D8VDD_S0
C224
2
1
2
C514
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
SC1U10V2ZY-N1
SC1U10V2ZY-N1
SC1U10V2ZY-N1
2
0R3-0-U-GP
VDD_HT
VDD_HT
VDD_HT
VDD_HT
VDD_HT
VDD_HT
VDD_HT
VDD_HT
VDD_HT
VDD_HT
VDD_HT
VDD_HT
VDD_HT
VDD_HT
VDD_HT
SC1U10V2ZY-N1
L17
1
AE24
AD24
AD22
AB17
AE23
Y17
W17
AC18
AD21
AC19
AC20
AB19
AD23
AA17
AE25
VDDA_1D2V
SC1U10V2ZY-N1
1D8V_S0
4 of 5
SC1U10V3KX-3GP
2
1
U53D
POWER
1
C256
2
1
2
1
2
1
2
1
2
1
2
C554
SC1U10V2ZY-N1
C560
SC1U10V2ZY-N1
C556
SC1U10V2ZY-N1
C121
SC1U10V2ZY-N1
C557
SC1U10V2ZY-N1
SC10U10V5ZY-1GP
C
C547
SC1U10V2ZY-N1
SC10U10V5ZY-1GP
2
1
1D2V_LDO_S0
2
C517
71.RS690.M01
SCD1U16V2ZY-2GP
<Core Design>
A
hexainf@hotmail.com
GRATIS - FOR FREE
A
VDDPLL
1
2
BLM18BB221SN1D-GP
C513
SC1U10V3KX-3GP
2
1
L18
SC4D7U10V5ZY-3GP
2
1
1D2V_LDO_S0
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
C186
NB-RS690M_POWER
Size
A3
Document Number
Date: Tuesday, December 12, 2006
5
4
3
2
Rev
SA
Orta
Sheet
1
13
of
46
3D3V_S0
LCDVDD
3D3V_S0
R5
U41
C394
9
8
7
6
5
GND
IN#8
IN#7
IN#6
IN#5
G5281RC1U-GP
R513
1
IN#1
OUT
EN
GND
STDBY_LED#
1
C392
5V_S0
IN
WLAN_LED# 3
LCDVDD_ON_1
1
1
2
3
DY IN
OUT
GND
GND
ON/OFF#
IN
IN
31 WLAN_TEST_LED
AAT4280IGU-3-T1GP
31
IN
BT_LED
1
R1
84.00143.B1K
CHDTC143ZUPT-GP
2
2
SCD1U50V3ZY-GP
1
1
SCD1U25V3ZY-1GP
2
SC10U10V5ZY-1GP
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
1
C404
C401
DY
1
3D3V_S5
R510
3 OUT
31 DC_BATFULL
GMCH_TXBOUT2GMCH_TXBOUT2+
GMCH_TXBOUT1GMCH_TXBOUT1+
12
12
12
12
1
GMCH_TXBOUT0- 12
GMCH_TXBOUT0+ 12
GMCH_TXBCLK- 12
GMCH_TXBCLK+ 12
LED5
2
CHARGE_LED#_R
3 OUT
R1
LED-Y-29-GP
1
83.00190.S70
on Front Panel
1
LED6
DC_BATFULL#_R
2
56R2J-4-GP
1 LED-G-138-GP
2
84.00143.B1K
CHDTC143ZUPT-GP
83.00190.L70
Q25
3D3V_S0
GND 2
R512
3 OUT STDBY_LED#1
R2
31
RN50
SRN2K2J-2-GP
EVEN CHANNEL
2
56R2J-4-GP
R509
ODD CHANNEL
4
3
2
1
GMCH_TXAOUT2- 12
GMCH_TXAOUT2+ 12
GMCH_TXAOUT1- 12
GMCH_TXAOUT1+ 12
GMCH_TXAOUT0- 12
GMCH_TXAOUT0+ 12
GMCH_TXACLK- 12
GMCH_TXACLK+ 12
1
84.00143.B1K
CHDTC143ZUPT-GP
Q20
R2
IN
5V_S0
1LED-B-27-U-GP
on Front Panel
GND 2
SCD1U25V3ZY-1GP
LED7
2
83.00190.P70
R1
IN
STDBY_LED
R1
1
2
56R2J-4-GP
LED3
STDBY_LED#_R 2
LED-Y-29-GP
1
83.00190.S70
84.00143.B1K
CHDTC143ZUPT-GP
12 CLK_DDC_EDID
ACES-CONN40A-2GP
20.F0993.040
1
1
1
EC78DY
SCD1U16V2ZY-2GP
2
12 DAT_DDC_EDID
3D3V_S0
2
SC10U35V0ZY-GP
DY
R508
1
2 BLT_LED#_1_R
100R2J-2-GP
5
6
7
8
EC77
C395
on Front Panel
3 OUT
R2
IN
31 CHARGE_LED
1
1
1
DCBATOUT
84.00143.B1K
CHDTC143ZUPT-GP
Q21
DY
Panel
3 OUT
GND 2
2
BRIGHTNESS
BLON_OUT
WLAN_LED#_R
2
56R2J-4-GP
1 LED-G-138-GP
83.00190.L70
on Front
LED8
LED-Y-29-GP
2
1
83.00190.S70
R1
R2
LCD1
CCD_PWR
1
GND 2
3
LCDVDD
3D3V_S0
1
Q22
DY
LCD/INVERTER CONN
CLK_DDC_EDID
DAT_DDC_EDID
LED4
2FRONT_PWRLED#_R 2
56R2J-4-GP
Q23
1
C400
3D3V_S5
GND 2
BAV99-5-GP
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
WLAN_LED#
WLAN_LED#
6
5
4
2
USB_6USB_6+
LED-Y-29-GP
1
83.00190.S70
R507
28
R2
BAV99-5-GP
D31
1
R1 CHDTC143ZUPT-GP
84.00143.B1K
1
3D3V_S0
U42
LCDVDD
2
LED1
2
R511
3 OUT
R2
DY
LED-G-138-GP
1
83.00190.L70
3D3V_S0
GND 2
D32
41
2
2
56R2J-4-GP
LED2
2
Q24
31 FRONT_PWRLED
BT_LED
2 PWR_LED#_1
56R2J-4-GP
2
1
C393
2
0R2J-2-GP
SCD1U16V2ZY-2GP
2
1
1
LCDVDD_ON_1
SC1U16V3ZY-GP
12 GMCH_LCDVDD_ON
2
SC1U16V3ZY-GP
FUSE-1A6V-2-GP
F1
1
LCDVDD_12
2
3
4
R255
1
1
EC79 DY
SCD1U16V2ZY-2GP
2
R259
0R2J-2-GP
CCD_ON
2
DY
2nd source: 20.K0185.008
Slide SWITCH
1
G5240B1T1U-GP
3D3V_S0
31
LEDB1
9
C403
SCD1U10V2KX-4GP
RN3
1
2
3
4
31
BT_BTN#
31 WIRELESS_BTN#
1
8 3D3V_S0
7
6
5
2
3
4
5
6
7
8
1
SRN10KJ-6-GP
BlueTooth ON/OFF
Wireless ON/OFF
BTBTN1
USB_6USB_6+
0R2J-2-GP
0R2J-2-GP
1
1
2 R258
2 R257
USBPN6
USBPP6
4
19
19
1
2
3
2
3
SW-SS3-CMSC-V-T-GP
62.40066.001
Edge
DY
DY
EC24
10
3
ACES-CON8-5-GP
20.K0228.008
EC23
SCD1U10V2KX-4GP
CAP_LED# 31
NUM_LED# 31
MEDIA_LED# 32
DY
EC25
EC26
<Variant Name>
Trigger
Wistron Corporation
2nd source: 62.40068.001
1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
R256
Title
2
SC100P50V2JN-3GP
2
1
SC100P50V2JN-3GP
2
1
C397
10KR2J-3-GP
C398
4
5
SW-SS3-CMSC-V-T-GP
62.40066.001
BRIGHTNESS 31
BLON_OUT 31
8
WLBTN1
1
5
BLON_OUT
1
4
2
OUT DY IN
GND
NC#3
EN
C402
SC4D7U10V5ZY-3GP
1DY 2
5
SC1KP50V2KX-1GP
2
1
1
C399
SCD1U16V2ZY-2GP
1
2
3
2
C396
SC4D7U10V5ZY-3GP
2
1
CCD_PWR
LED BD
FUSE-1A6V-2-GP
3D3V_CCD
2
SC1KP50V2KX-1GP
2
1
1
U43
SC1KP50V2KX-1GP
2
1
F2
LCD CONN & LED
Size
Document Number
Rev
SA
Orta
Date:
Tuesday, December 12, 2006
Sheet
14
of
46
A
B
C
D
E
CRT1
17
L1
CRT_R
2
FCB1608CF-GP
L2
4
DAT_DDC1_5
CRT_G
2
FCB1608CF-GP
SC100P50V2JN-3GP
13
CRT_VSYNC1
1
14
CLK_DDC1_5
1
C7
15
C39
CRT_G
CRT_B
5V_CRT_S0
4
C24
SCD01U16V2KX-3GP
16
2
20.20424.015
VIDEO-15-57-GP-U1
SC18P50V2JN-1-GP
SC100P50V2JN-3GP
3D3V_S0
D10
R24
2
CRT_DEC#
2
1CRT_DEC_R
470R2J-2-GP
2
3
1
31
CRT_R
7
2
8
3
9
4
10
5
12
CRT_HSYNC1
2
C19
SC6D8P50V2DN-GP
1
2
SC6D8P50V2DN-GP
1
C15
2
1
CRT_B
C11
SC6D8P50V2DN-GP
DY
2
FCB1608CF-GP
2
2
C18
SC3P50V2CN-1-GP
DY
1
SC3P50V2CN-1-GP
DY
2
2
2
2
R14
R16
R20
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
C14
2
SC3P50V2CN-1-GP
1
1
1
C10
1
1
GMCH_BLUE
1
12
C49
2
L3
1
1
12 GMCH_GREEN
6
1
11
5V_S0
DY
3
5V_S0
1
C30
3
SC100P50V2JN-3GP
BAV99-5-GP
2
1
GMCH_RED
5V_CRT_S0
CH751H-40PT
D11
3D3V_S0
8
7
6
5
4
3
2
1
C23
SCD1U16V2ZY-2GP
3D3V_S0
RN6
SRN2K2J-2-GP
1
14
2
1
3D3V_S0
1
12
SRN10KJ-6-GP
RN7
7
4
14
12 GMCH_VSYNC
DY
SC18P50V2JN-1-GP
7
1
1
DY
C8
2
C9
2
2
SC18P50V2JN-1-GP
5
6
CRT_HSYNC1_R 1
2CRT_HSYNC1
0R2J-2-GP
U3A
TSAHCT125PW-GP
3
CRT_VSYNC1_R
Q3
12 GMCH_DDCDATA
R10
1
2CRT_VSYNC1
0R2J-2-GP
U3B
TSAHCT125PW-GP
5
2
6
1
DAT_DDC1_5
2N7002DW-1-GP
L13 TVOUT
1
2
IND-1D2UH-5-GP
1
1
2
TVOUT1
2 SC33P50V2JN-3GP
C455
LUMA_1
2
LUMA
CRMA
COMP
SC270P50V2JN-2GP
5
NC#5
NC#2
2
GND
GND
GND
GND
1
3
8
9
3D3V_S0
D4
2
LUMA_1
MINDIN7-19-GP-U2
3D3V_S0
D23
3
2
CRT_R 3
DY
DY
2
SC150P50V2JN-3GP
4
6
7
C462
TVOUT
2
1
TV_DACB
TVOUT
3
CLK_DDC1_5
C457
R323
150R2F-1-GP
CRT_DEC#
4
12 GMCH_DDCCLK
1
12
5
6
7
8
2
12 GMCH_HSYNC
1
2
3
4
R11
22.10021.H61
C483
2 SC33P50V2JN-3GP
1
TV_DACC
C481
CRMA_1
3
TVOUT
SC150P50V2JN-3GP
hexainf@hotmail.com
GRATIS - FOR FREE
1
1
BAV99-5-GP
D9
2
2
C479
TVOUT
2
SC150P50V2JN-3GP
SC270P50V2JN-2GP
3
CRT_B 3
DY
1
Wistron Corporation
DY
1
1
BAV99-5-GP
BAV99-5-GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
2
TVOUT
COMP_1
COMP_1
C468
2
R326
150R2F-1-GP
L15 TVOUT
1
2
IND-1D2UH-5-GP
1
1
TV_DACA
1
12
DY
BAV99-5-GP
D25
2 SC33P50V2JN-3GP
1
2
CRT_G 3
DY
SC270P50V2JN-2GP
C469
1
1
BAV99-5-GP
D7
2
C501
2
TVOUT
1
BAV99-5-GP
D27
CRMA_1
2
R336
150R2F-1-GP
L16 TVOUT
1
2
IND-1D2UH-5-GP
2
1
12
1
1
CRT/TV Connector
Document Number
Orta
Date: Tuesday, December 12, 2006
A
B
C
D
Rev
SA
Sheet
E
15
of
46
4
3
2
1
1
5
R405
8K2R2J-3-GP
PCIE_VDDR
0R2J-2-GP
1
1D2V_LDO_S0
2 R173
1
2
2
C575
2
C564
SC10U10V5ZY-1GP
1
1
1
2
MLB-201209-9-GP
C
PCIE_CALI
PCIE_PVDD
L20
C289
SC1U10V2ZY-N1
SC1U10V3KX-3GP
PCIE_VDDR
1D2V_LDO_S0
L21
1
1
C291
C287
2
C292
2
DY
2
C290
2
C286
1
1
1
DY
2
C285
2
C298
2
2
C299
1
1
1
2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U16V2ZY-2GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U16V2ZY-2GP
E27
PCIE_CALI
U29
PCIE_PVDD
U28
PCIE_PVSS
F27
F28
F29
G26
G27
G28
G29
J27
J29
L25
L26
L29
N29
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
2
CPU_1D8V
R175
1KR2J-1-GP
TP34
TP38
TPAD30 TP36
TPAD30 TP42
R412
11
PLT_RST#_R1
13
2
SB_A28
H_NMI
SB_D29
LPC_RST# 23,28,31,33,43
6,12
LDT_STP#
33R2F-3-GP
TPAD30 TP37
7
TSLCX08MTCX-GP
12 ALLOW_LDTSTOP TPAD30 TP94
TPAD30 TP89
TPAD30 TP43
A
H_FERR#
CPU_STOP#
DPSLP_OD#
H_DPRSLP#
6 LDT_RST#
C1
X2
AC26
W26
W24
W25
AA24
AA23
AA22
AA26
Y27
AA25
AH9
B24
W23
AC25
71.SB600.00U
CPU_PG/LDT_PG
INTR/LINT0
NMI/LINT1
INIT#
SMI#
SLP#/LDT_STP#
IGNNE#/SIC
A20M#/SID
FERR#
STPCLK#/ALLOW_LDTSTP
CPU_STP#/DPSLP_3V#
DPSLP_OD#/GPIO37
DPRSLPVR
LDT_RST#/DPRSTP#/PROCHOT#
LPC
14
U59D
12
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
SERIRQ
RTCCLK
RTC_IRQ#/GPIO69
D3
F5
VBAT
RTC_GND
E1
D1
1
2
MH1
MH2
DY
TP53
3
1
1
C619
DUMMY-C2
DY
DY
3D3V_S0
PCIRST
PCIRST1#
R199
DY
C
R205
8K2R2F-1-GP
PCI_GNT#0 25
TP51
B
TPAD30
PM_CLKRUN# 25,31
INT_PIRQA# 25
TP52
TPAD30
TP48
TPAD30
TP105
TPAD30
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
LPC_LAD0 31,33
LPC_LAD1 31,33
LPC_LAD2 31,33
LPC_LAD3 31,33
LPC_LFRAME# 31,33
LDRQ0# 31
TP88
TPAD30
LPC_LDRQ1#
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
3D3V_S5
3D3V_S5
R514 1
R208 1
DY
DY
R215
R202
R192
R212
1
1
1
1
DY
DY
DY
DY
210KR2J-3-GP
210KR2J-3-GP
210KR2J-3-GP
210KR2J-3-GP
210KR2J-3-GP INT_PIRQA#
210KR2J-3-GP AUTO_ON#
Change 0921
BMREQ# 12
INT_SERIRQ 25,31
RTC_CLK 35
AUTO_ON#
RTC_AUX_S5
2 R209
1KR2J-1-GP
1
<Core Design>
A
C335
SC1U10V2KX-1GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SB600 PCI/CPU/LPC/RTC (1 of 5)
C339
SC1000P50V3JN-GP
Size
A3
2nd source: 20.D0198.103
4
C618
DUMMY-C2
DY
PCI_LOCK#
2
DY
C337
SCD1U16V2ZY-2GP
BAT-CON2-U2-GP
5
C621
DUMMY-C2
DY
TPAD30
1
22.70031.001
PWR
GND
MH1
MH2
C620
DUMMY-C2
DY
RTC_BAT
2
SB600-GP
C357
DUMMY-C2
DY
R210
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
AD3
AF1
AF4
AF3
AG24
AG25
AH24
AH25
AF24
AJ24
AH26
W22
AF23
C359
DUMMY-C2
PCI_C/BE#0 25
PCI_C/BE#1 25
PCI_C/BE#2 25
PCI_C/BE#3 25
PCI_FRAME# 25
PCI_DEVSEL# 25
PCI_IRDY# 25
PCI_TRDY# 25
PCI_PAR 25
PCI_STOP# 25
PCI_PERR# 25
PCI_SERR# 25
PCI_REQ#0 25
RTC1
1
A_RST#
32K_X2
6 SB_CPUPWRGD
SB600 asserts PLTRST# to reset
TPAD30
devices on the platform.
TPAD30
X1
RTC
3D3V_S5
D2
CPU
32K_X1
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
XTAL
ALLOW_LDTSTOP
1
B
3D3V_S0
PCLK_KBC 20,31
PCLK_FWH 33
CLK33_LPCROM 20
PCLK_FWH
CLK33_LPCROM
20,25
1
PCIE_CALRP
PCIE_CALRN
2
SC10U10V5ZY-1GP
2
1
E29
E28
PCIRST1# 21,25
33R2F-3-GP
PCI_AD[31..0]
2
PCIE_CALRP
2 562R2F-GP
2 2K05R2F-GP PCIE_CALRN
2
2
R379 1
R378 1
W7
Y1
W8
W5
AA5
Y3
AA6
AC5
AA7
AC3
AC7
AJ7
AD4
AB11
AE6
AC9
AA3
AJ4
AB1
AH4
AB2
AJ3
AB3
AH3
AC1
AH2
AC2
AH1
AD2
AG2
AD1
AG1
AB9
AF9
AJ5
AG3
AA2
AH6
AG5
AA1
AF7
Y2
AG8
AC11
AJ8
AE2
AG9
AH8
AH5
AD11
AF2
AH7
AB12
AG4
AG7
AF6
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
TP104 TPAD30
1
2
SC4P50V2CN-GP
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#/ROMA10
CBE1#/ROMA1
CBE2#/ROMWE#
CBE3#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
PAR/ROMA19
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#
PCIRST#
2
32K_X2
C565
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCI INTERFACE
20MR3-GP
C610
1
2
PCIE_TX0P_SB
PCIE_TX0N_SB
PCIE_TX1P_SB
PCIE_TX1N_SB
PCIE_TX2P_SB
PCIE_TX2N_SB
PCIE_TX3P_SB
PCIE_TX3N_SB
PCI EXPRESS INTERFACE
11
11
11
11
11
11
11
11
20MR3-GP
0R3-0-U-GP
T25
T26
T22
T23
M25
M26
M22
M23
AJ9
D
PCLK_PCM 20,25
CLK33_LAN
CLK33_MINI
1
2
PCIRST#
PCI_CLK0 20
PCLK_PCM
CLK33_LAN
CLK33_MINI
PCLK_KBC
PCLK_FWH
CLK33_LPCROM
1
1
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
22R2F-1-GP
22R2F-1-GP
22R2F-1-GP
22R2F-1-GP
22R2F-1-GP
22R2F-1-GP
22R2F-1-GP
2
2
P29
P28
M29
M28
K29
K28
H29
H28
2
2
2
2
2
2
2
1
1
TX0P
TX0N
TX1P
TX1N
TX2P
TX2N
TX3P
TX3N
2
1
2
1
1
1
1
1
1
1
R406
2
1
2
1
R418
R415
R417
R421
R422
R416
R419
1
1
1
PCI_CLK0_R
PCI_CLK1_R
PCI_CLK2_R
PCI_CLK3_R
PCI_CLK4_R
PCI_CLK5_R
PCI_CLK6_R
PCI_CLK7_R
2
C574
2C573
C572
2C571
C570
2C569
C568
2C567
1
U2
T2
U1
V2
W3
U3
V1
T1
1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
PCIE_RX0P_SB
PCIE_RX0N_SB
PCIE_RX1P_SB
PCIE_RX1N_SB
PCIE_RX2P_SB
PCIE_RX2N_SB
PCIE_RX3P_SB
PCIE_RX3N_SB
PCIE_RCLKP
PCIE_RCLKN
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
SPDIF_OUT/PCICLK7/GPIO41
2
1
1
1
2
2
R423
11
11
11
11
11
R424
32K_X1 11
11
11
A_RST#
8K2R2F-1-GP
J24
J25
1
4
3
X6
X-32D768KHZ-41GP
1
AG10
3 SBSRC_CLK
3 SBSRC_CLK#
SC4P50V2CN-GP
D
2 A_RST#
33R2F-3-GP
1
R404
NB_RST#
2
12
8K2R2F-1-GP
C611
1
2
1 of 4
1
2
U57A
PCI CLKS
Place these components close to U13
and use groud guard for 32K_X1 and 32K_X2.
Document Number
Rev
2
SA
Orta
Date: Tuesday, December 12, 2006
Sheet
1
16
of
46
5
4
3
2
1
PLACE SATA AC DECOUPLING
CAPS CLOSE TO SB460
SATA_TX0+
SATA_TX0-
C590 1
C593 1
2
2
SATA_RXN0_SB
SATA_RXP0_SB
AH20
AJ20
SATA_RX0SATA_RX0+
AH18
AJ18
SATA_TX1+
SATA_TX1-
AH17
AJ17
SATA_RX1SATA_RX1+
AH13
AH14
SATA_TX2+
SATA_TX2-
AH16
AJ16
SATA_RX2SATA_RX2+
AJ11
AH11
SATA_TX3+
SATA_TX3-
AH12
AJ13
SATA_RX3SATA_RX3+
B
SERIAL ATA POWER
TP41
TP47
TPAD30
TPAD30
FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49
M4
T3
V4
FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52
N3
P2
W4
TEMP_COMM
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64
P5
P7
P8
T8
T7
VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60
V5
L7
M8
V6
M6
P4
M7
V7
1
2
2
C23
G5
0 => DIS
1 => UMA
R214
?
R197
RTL
1
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
LAN_RST#/GPIO13
ROM_RST#/GPIO14
G41
3D3V_S0
R198
GAP-OPEN
AB14
AB16
AB18
AC14
AC18
AC19
AD12
AD19
AD21
AE12
AE21
AF11
AF14
AF16
AF18
AG11
AG12
AG13
AG14
AG16
AG17
AG18
AG19
AG20
AG21
AH10
AH19
SATA
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
1
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
TP54
TP45
TP50
TP101
TP46
DY
2
XTLVDD_SATA
AE14
AE16
AE18
AE19
AF19
AF21
AG22
AG23
AH22
AH23
AJ12
AJ14
AJ19
AJ22
AJ23
J3
J6
G3
G2
G6
UMA_DIS
CLK_ID
FP_ID
ALERT#
6,35
R217
DY
R206
ICS
PSW_CLR#
UMA_DIS
CLK_ID
1
AC16
AVDD_SATA
C
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS#/GPIO32
R207
DY
2
XTLVDD_ATA
PSW_CLR#
1
PLLVDD_SATA
PLLVDD_SATA
PLLVDD_ATA
SPI ROM
AD14
AJ10
2
SATA_ACT#/GPIO67
SATA_LED#
10KR2J-3-GP
AC12
32
C
FP_DETECT#
10KR2J-3-GP
SATA_X2
10KR2J-3-GP
AD18
10KR2J-3-GP
SATA_X2
10KR2J-3-GP
10KR2J-3-GP
SATA_X1
R149
2
SATA_CAL
AD16
3D3V_S0
1
SATA_CAL
AF12
SATA_X1
SATA
R191
10KR2J-3-GP
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
2
1
According to PA_IXP600AD9
Change C936 and C937 from 27P to 10P.
IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
1
3D3V_S0
C576
SC10P50V2JN-4GP
AD28
AD26
AE29
AF27
AG29
AH28
AJ28
AJ27
AH27
AG27
AG28
AF28
AF29
AE28
AD25
AD29
2
1
2
C582
SC10P50V2JN-4GP
IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30
1
1
2
1KR2F-3-GP
SATA
XTAL-25MHZ-70GP
1
2
R397
D
2
SATA_X2
2
10KR2J-3-GP
FP_ID
B
FP_ID
32
FP_DETECT# 32
AVDD_HWM
3D3V_S0
R432
AVDD
N1
AVSS
M1
1
2
0R3-0-U-GP
C613
SCD1U16V2ZY-2GP
1
1
10MR2J-L-GP
X5
1
2
IDE_PDIORDY 21
INT_IRQ14 21
IDE_PDA0 21
IDE_PDA1 21
IDE_PDA2 21
IDE_PDDACK# 21
IDE_PDDREQ 21
IDE_PDIOR# 21
IDE_PDIOW# 21
IDE_PDCS1# 21
IDE_PDCS3# 21
2
R381
AB29
AA28
AA29
AB27
Y28
AB28
AC27
AC29
AC28
W28
W27
1
SATA_X1
IDE_IORDY
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR#
IDE_IOW#
IDE_CS1#
IDE_CS3#
2
SATA
SATA_RXN0
SATA_RXP0
AH21
AJ21
ATA 66/100
21
21
C586 1
C587 1
HW MONITOR
SATA_TXP0
SATA_TXN0
U57B 2 of 4
SERIAL ATA
21
21
D
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SATA_TXP0_SB
2
SATA_TXN0_SB
2
C614
SC2D2U6D3V3KX-GP
DY
SB600-GP
71.SB600.00U
1D2V_LDO_S0
PLLVDD_ATA
1D2V_LDO_S0
AVDD_SATA
SATA
hexainf@hotmail.com
GRATIS - FOR FREE
A
EC62
DY
EC60
EC64
Wistron Corporation
SCD1U16V2ZY-2GP
EC65
DY
SCD1U16V2ZY-2GP
2
1
EC63
C307
DY
SCD1U16V2ZY-2GP
2
1
C311
DY
SCD1U16V2ZY-2GP
2
1
C320
SC2D2U6D3V3KX-GP
2
0R3-0-U-GP
SCD1U16V2ZY-2GP
2
1
1
EC114
SC10U6D3V5KX-1GP
2
1
C318
SC2D2U6D3V3KX-GP
2
0R3-0-U-GP
SCD1U16V2ZY-2GP
2
1
1
EC118
1
1
SCD1U16V2ZY-2GP
2
1
2
0R3-0-U-GP
2
SCD1U16V2ZY-2GP
2
1
1
EC117
<Core Design>
R177
SC10U6D3V5KX-1GP
2
1
R193
2
R187
1
XTLVDD_ATA
2
3D3V_S0
A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SB600 ACPI/GPIO/SATA/IDE (2 of 5)
Size
A3
Document Number
Rev
Date: Tuesday, December 12, 2006
5
4
3
2
SA
Orta
Sheet
1
17
of
46
4
3
2
1
1D2V_S5
Iomax=1A
5V_S5
U57C 3 of 4
3D3V_S0
A25
A28
C29
D24
L9
L21
M5
P3
P9
T5
V9
W2
W6
W21
W29
AA12
AA16
AA19
AC4
AC23
AD27
AE1
AE9
AE23
AH29
AJ2
AJ6
AJ26
3D3V_S5
1
C627
SC10U10V5ZY-1GP
2
C628
SC1U10V3ZY-6GP
1
3D3V_S5
2
3D3V_S5
2
1
SA_20061101
DY
C626
SC10U10V5ZY-1GP
C
R460
75KR3F-GP
C312
2
1
C325
2
1
C322
2
1
C606
2
1
C316
2
1
C326
2
1
C317
2
SC10U10V5ZY-1GP
2
1
1
SC1U10V2KX-1GP SC1U10V2KX-1GP
SC10U10V5ZY-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C656
1
SO-8-P
C657
1D2V_LDO_S0
TC22
ST100U4VBM-U
2
2
2
GND
APL5915-KAI-TRL-GP
1
1D2V_LDO_S0
GAP-CLOSE-PWR
R467
C655
38K3R2F-GP
1
2
2
FB
1D2V_S5
SC10U6D3V5MX-3GP
3
4
1
VOUT
VOUT
2
EN
2
GAP-CLOSE-PWR
G96
1
2
SC10U6D3V5MX-3GP
8
VIN
VIN
1
1D2V_S5_PWR
SC56P50V2JN-2GP
POK
OCP>=1.8A
G97
Vo(cal.)=1.2085V
5
9
1
2
7
1
U62
2
R438
10KR2J-3-GP
VCNTL
R439
10KR2J-3-GP
6
1
1
D
3D3V_S5
M13
M17
N12
N15
N18
R13
R17
U12
U15
U18
V13
V17
1D2V_S5
A2
A7
F1
J5
J7
K1
S5_3.3V
S5_3.3V
S5_3.3V
S5_3.3V
S5_3.3V
S5_3.3V
G4
H1
H2
H3
S5_1.2V
S5_1.2V
S5_1.2V
S5_1.2V
Vo=0.8*(1+(R1/R2))
3D3V_S0
C293
1
C313
1
1
C345
1
C333
1
C297
1
C295
1
1
1
Place near to SB600
C566
C310
2
2
2
2
2
2
2
2
2
TC20
SC10U10V5ZY-1GP
ST100U6D3VDM-5
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DY
1D2V_S5
CPU_1D8V
3D3V_S5
A18
A19
B19
B20
B21
1D8V_S0
C288
DY
SCD1U16V2ZY-2GP
USB_PHY_1.2V
USB_PHY_1.2V
USB_PHY_1.2V
USB_PHY_1.2V
USB_PHY_1.2V
2
2
C585
SC1U10V3KX-3GP
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC1U10V2KX-1GP SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
AVDDK_1D2V
1D2V_S5
3D3V_S5
1
1
1
C588
2
C596
2
0R3-0-U-GP
C595
SC2D2U6D3V3KX-GP
1
1D2V_LDO_S0
R185
2
AA27
CPU_PWR
AE11
V5_VREF
A24
AVDDCK_3.3V
A22
AVDDCK_1.2V
B22
AVSSCK
V29
V28
V27
V26
V25
V24
V23
V22
U27
T29
T28
T27
T24
T21
P27
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
1
1
1
2
C583
1
1
0R3-0-U-GP
C581
SC10U10V5ZY-1GP
C612
2
C308
2
C300
2
2
C309
1
1
1
1D2V_S5
AVDDCK_S0
1
2
2
B
V5_VREF
L23
2
SC1U10V3KX-3GP
SCD1U16V2ZY-2GP
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
2
3D3V_S0
SC1U10V2KX-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
C344
1
1
C336
2
1
C346
C343
2
2
2
C349
2
C607
1
1
C609
1
1
R376
2
1
0R3-0-U-GP
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
POWER
5
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
A1
A20
A21
A29
B1
B7
B25
C21
C22
C24
D6
E24
F2
F23
G1
J1
J8
L6
L8
M9
M12
M15
M18
N13
N17
P1
P6
P21
R12
R15
R18
T6
T9
U13
U17
V3
V8
V12
V15
V18
V21
W1
W9
Y29
AA11
AA14
AA18
AC6
AC24
AD9
AD23
AE3
AE27
AG6
AJ1
AJ25
AJ29
D
C
D27
D28
D29
F26
G23
G24
G25
H27
J23
J26
J28
K27
L22
L23
L24
L27
L28
M21
M24
M27
N27
N28
P22
P23
P24
P25
P26
B
SB600-GP
D14
5V_S0
1
71.SB600.00U
DY
2
RB751V-40-1-GP
A
<Core Design>
R174
1KR2J-1-GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
C327
2
2
C604
3D3V_S0
SC1U10V3KX-3GP
Title
SCD1U16V2ZY-2GP
SB600 POWER/DECOUPLING
D16
1
A
1
2
1
1
V5_VREF
2
Size
A3
RB751V-40-1-GP
Document Number
Rev
5
4
3
2
SA
Orta
Date: Tuesday, December 12, 2006
Sheet
1
18
of
46
5
4
3
2
1
3D3V_S5
R409
R201
R213
R204
3D3V_S5
1
USB_OC#3
USB_OC#3
1 R?
2
0R2J-2-GP
27
USB_OC#7
22
USB_OC#2
USB_OC#3
USB_OC#2
28
22
22 ACZ_BTCLK_MDC
CPPE#
USB_OC#3
USB_OC#3
USB_OC#0
33R2F-3-GP 1 R228
C6
C5
C4
B4
B6
A6
C8
C7
B8
A8
2
USB_OC9#/SLP_S2/GPM9#
USB_OC8#/AZ_DOCK_RST#/GPM8#
USB_OC7#/GEVENT7#
USB_OC6#/GEVENT6#
USB_OC5#/DDR3_RST#/GPM5#
USB_OC4#/GPM4#
USB_OC3#/GPM3#
USB_OC2#/GPM2#
USB_OC1#/GPM1#
USB_OC0#/GPM0#
2
2
2
2
AZ_BITCLK
AZ_SDOUT
AZ_SDIN3
AZ_SYNC
AZ_RST#
B
3D3V_S5
33R2F-3-GP 1 R216
20 AC_SDATAOUT
29 ACZ_SDATAIN0
22 ACZ_SDATAIN1
3D3V_S0
2AC_SDOUT_R
RN40
SRN2K2J-1-GP
DY
3
4
3
4
AC_BITCLK/GPIO38
AC_SDOUT/GPIO39
ACZ_SDIN0/GPIO42
ACZ_SDIN1/GPIO43
ACZ_SDIN2/GPIO44
AC_SYNC/GPIO40
AC_RST#/GPIO45
10KR2J-3-GP
2
SMB_CLK
SMB_DATA
R428
3D3V_S5
E23
AC21
AD7
AE7
AA4
T4
D4
AB19
NC#E23
NC#AC21
NC#AD7
NC#AE7
NC#AA4
NC#T4
NC#D4
NC#AB19
1
SMB_CLK
SMB_DATA
SMBC0_SB
SMBD0_SB
L1
L2
L4
J2
J4
M3
L5
ACZ_RST#
1
RN47
SRN2K2J-1-GP
23,28
23,28
3,9
3,9
AZ_BITCLK
AZ_SDOUT
AZ_SDIN3/GPIO46
AZ_SYNC
AZ_RST#
2
1
2
1
NEWCARD /GLAN
N2
M2
K2
L3
K3
USB PWR
22,29 ACZ_SYNC
22,29 ACZ_RST#
1 R229
1 R231
TP103
1 R230
1 R414
AC97
33R2F-3-GP
33R2F-3-GP
TPAD30
33R2F-3-GP
33R2F-3-GP
AZALIA
Change 0919;
29 ACZ_BITCLK
22,29 ACZ_SDATAOUT
R436
10KR2J-3-GP
DY
2
D28
BAT54-4-GP
RSMRST#_SB
1
3
31 RSMRST#_KBC
hexainf@hotmail.com
GRATIS - FOR FREE
R426
100KR2J-1-GP
2
D16
E16
USBPP5 22
USBPN5 22
USB_HSDP4+
USB_HSDM4-
D18
E18
USBPP4 22
USBPN4 22
USB_HSDP3+
USB_HSDM3-
G16
H16
USBPP3 32
USBPN3 32
USB_HSDP2+
USB_HSDM2-
G18
H18
USBPP2 22
USBPN2 22
USB_HSDP1+
USB_HSDM1-
D19
E19
USB_HSDP0+
USB_HSDM0-
G19
H19
AVDDTX
AVDDTX
AVDDTX
AVDDTX
AVDDTX
AVDDRX
AVDDRX
AVDDRX
AVDDRX
AVDDRX
B9
B11
B13
B16
B18
A9
B10
B12
B14
B17
AVDDC
A12
AVSSC
A13
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
A16
C9
C10
C11
C12
C13
C14
C16
C17
C18
C19
C20
D11
D21
E11
E21
F11
F12
F14
F16
F18
F19
F21
G11
G21
H11
H21
J11
J12
J14
J16
J18
J19
C601
USB3
6
WEBCAM
7
USB4(Card Reader BD)
8
MINICARD
9
NEW1
L24
2
BLM18BB221SN1D-GP
C362
C602
DY
DY
2
0R2J-2-GP
C319
1
1
C314
2
C330
C323
<Core Design>
A
Wistron Corporation
71.SB600.00U
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SB600 AC97/USB
Size
A3
Document Number
Rev
4
3
2
SA
Orta
Date: Tuesday, December 12, 2006
5
C329
B
2
1
C328
C625
DY
R427
C
SCD1U16V2ZY-2GP
C315
AVDD_USB
2
DY
C324
BLUETOOTH
SCD1U16V2ZY-2GP
C361
AVDD_USB
1
4
5
2
BLM18BB221SN1D-GP
USB1
3D3V_AVDDC
FT
1
USBPP0 22
USBPN0 22
USB2
3
1
1
NC
2
2
USB2
1
SCD1U16V2ZY-2GP
USB3
3D3V_S5
L26
SB600-GP
1
A
DUMMY FOR
SB600
VER.A21
USB_HSDP5+
USB_HSDM5-
USB4
SCD1U16V2ZY-2GP
2
1
USB_OC3#3
1 R?
2
0R2J-2-GP
USBPP6 14
USBPN6 14
SCD1U16V2ZY-2GP
2
1
ECSWI#KBC
USB_HSDP6+
USB_HSDM6-
SCD1U16V2ZY-2GP
2
1
SB
TP35
TP87
TP85
TP96
USBPP7 27
USBPN7 27
G14
H14
USB1
2
TPAD30
TPAD30
TPAD30
TPAD30
E14
D14
Device
0
SC1U10V3KX-3GP
Change 0919;
USB_HSDP7+
USB_HSDM7-
USB
Pair
1
SMBC0_SB
SMBD0_SB
SMB_CLK
SMB_DATA
DDC1_SCL
DDC1_SDA
USBPP8 28
USBPN8 28
2
ACZ_SPKR
E12
D12
SC1U10V3KX-3GP
29
SATA_IS0#/GPIO10
ROM_CS#/GPIO1
GHI#/SATA_IS1#/GPIO6
WD_PWRGD/GPIO7
SMARTVOLT/SATA_IS2#/GPIO4
SHUTDOWN#/GPIO5
SPKR/GPIO2
SCL0/GPOC0#
SDA0/GPOC1#
SCL1/GPOC2#
SDA1/GPOC3#
DDC1_SCL/GPIO9
DDC1_SDA/GPIO8
SSMUXSEL/SATA_IS3#/GPIO0
LLB#/GPIO66
USB_HSDP8+
USB_HSDM8-
1
C
WD_PWRGD#
GPIO4
GPIO5
C28
A26
B29
A23
B27
D23
B26
C27
B28
C3
F3
D26
C26
A27
A4
14M_OSC
USBPP9 28
USBPN9 28
2
TPAD30 TP90
TPAD30 TP84
TPAD30 TP39
GPIO1 Has Internal
Pull-Up To 3.3V_S0
B23
H12
G12
SC10U10V5ZY-1GP
TPAD30 TP83
TP86
Change 0920
TPAD30
1 R377
2
0R2J-2-GP
PWM_CTRL
GPIO10
NEWCARD_RST#
USB_HSDP9+
USB_HSDM9-
D
TP91 TPAD30
TP92 TPAD30
1
43
X1_CLK_SB14_1
OSC / RST
USB_TE1
USB_TE0
2
1 R389
2
0R2J-2-GP
3 SB_OSC_CLK
RSMRST#
A11
A10
1
Change 0921
E2
8
7
6
5
SPEC change
2
RSMRST#_SB
USB_ATEST1
USB_ATEST0
2 R395
11K8R3F-GP
1
SC10U10V5ZY-1GP
23 LAN_SMALERT
USB_PCOMP
1
23,28 PCIE_WAKE#
A14
2
0R2J-2-GP 1
2
0R2J-2-GP 1
2
0R2J-2-GP 1
2
TPAD30 TP49
A17
SC1U10V3KX-3GP
PME#_SB
PM_SLP_S3#
PM_SLP_S5#
DY
DY
KA20GATE
KBRCIN#
ECSCI#_KBC
ECSMI#_KBC
ECSWI#_KBC
1
2
3
4
SRN10KJ-6-GP
USBCLK
USB_RCOMP
1
31
31
31
31
31
1 R203
1 R200
1 R194
DY
PCI_PME#/GEVENT4#
RI#/EXTEVNT0#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
SUS_STAT#
TEST2
TEST1
TEST0
GA20IN
KBRST#
LPC_PME#/GEVENT3#
LPC_SMI#/EXTEVNT1#
S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
WAKE#/GEVENT8#
BLINK/GPM6#
SMBALERT#/THRMTRIP#/GEVENT2#
2
3D3V_S5
PCIE_WAKE#
PM_PWRBTN#
PME#_SB A3
RI#
B2
F7
A5
E3
SB_PWRGD
B5
PM_SUS_STAT# B3
22K2R2J-2-GP
F9
22K2R2J-2-GP
E9
G9
22K2R2J-2-GP
AF26
AG26
R195 ECSCI#
D7
R176 ECSMI#
C25
R196 S3_STATE
D9
SYS_RST#
F4
PCIE_WAKE#
E7
C2
G7
SCD1U16V2ZY-2GP
28,31,34,35,44,45 PM_SLP_S3#
31,43,44 PM_SLP_S5#
31,32 PM_PWRBTN#
34 SB_PWRGD
TPAD30 TP99
ACPI / WAKE UP EVENTS
TPAD30 TP98
TPAD30 TP102
PM_SUS_STAT#
11/02,
DUMMY refer to
ATI reference circuit
ver1.1
GPIO
D
USB INTERFACE
DY
DY
USB OC
DY
USB_OC#0
USB_OC#2
USB_OC#7
USB_OC#3
U57D 4 of 4
SC10U10V5ZY-1GP
R411
4K7R2F-GP
2
10KR2J-3-GP
1
10KR2J-3-GP
1
DY
RN48
CLK48_USB 3
2
2
2 4K7R2F-GP
1
2
1
2 4K7R2F-GP
1
4K7R2F-GP
R410
Sheet
1
19
of
46
3
R225
DY
DY
1
1
3D3V_S0
R227
R429
10KR2J-3-GP2
10KR2J-3-GP2
10KR2J-3-GP2
DY
D
DY
1
R235
10KR2J-3-GP
2
R430
10KR2J-3-GP
2
R234
10KR2J-3-GP
2
10KR2J-3-GP
2
R431
1
AC_SDATAOUT
PCLK_KBC
CLK33_LPCROM
PCI_CLK0
PCLK_PCM
1
PCI_CLK4
PCI_CLK6
PCI_CLK0
PCI_CLK1
R420
1
19
16,31
16
16
16,25
3D3V_S0
1
R211
10KR2J-3-GP2
D
2
3D3V_S0
1
3D3V_S0
1
3D3V_S0
1
4
10KR2J-3-GP2
5
DY
SB600
REQUIRED SYSTEM STRAPS
PULL
HIGH
C
AC_SDOUT PCI_CLK4
PCI_CLK6
PCI_CLK0
USE
DEBUG
STRAPS
CPU IF=K8
ROM TYPE:
DEFAULT
USE INT.
PLL48
PCI_CLK1
C
H, H = PCI ROM
H, L = SPI ROM
PULL
LOW
IGNORE
DEBUG
STRAPS
USE EXT.
48MHZ
DEFAULT
DEFAULT
CPU IF=P4
DEFAULT
L, H = LPC ROM
L, L = FWH ROM
SB600 HAS 15K INTERNAL PU FOR PCI_AD[23..28]
B
B
1
1
1
R221
2K2R2J-2-GP
R226
2K2R2J-2-GP
DY
R219
2K2R2J-2-GP
DY
2
DY
2
2
2
R224
2K2R2J-2-GP
DY
DY
2
R222
2K2R2J-2-GP
DY
2
R223
2K2R2J-2-GP
1
1
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
1
16,25
16,25
16,25
16,25
16,25
16,25
DEBUG STRAPS
PCI_AD31
A
STRAP
HIGH
RESERVED
PCI_AD30
RESERVED
PCI_AD29
PCI_AD28
RESERVED
PCI_AD26
USE LONG
RESET
USE PCI
PLL
USE ACPI
BCLK
DEFAULT
DEFAULT
DEFAULT
USE SHORT
RESET
STRAP
LOW
PCI_AD27
BYPASS
PCI PLL
PCI_AD25
USE
IDE
PLL
DEFAULT
BYPASS IDE PLL
BYPASS ACPI BCLK
PCI_AD24
USE
DEFAULT
PCIE
STRAPS
DEFAULT
USE
EEPROM
PCIE
STRAPS
PCI_AD23
BOOT FAIL TIMER
DISABLE
<Core Design>
A
DEFAULT
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
BOOT FAIL TIMER
ENABLE
Title
SB600 STRAPPING PIN
Size
A3
Document Number
Rev
5
4
3
2
SA
Orta
Date: Tuesday, December 12, 2006
Sheet
1
20
of
46
SATA HD Connector
ODD Connector
TC16
1
1
1
2
2
2
ST100U6D3VDM-5
2
2
SCD1U16V2ZY-2GP
5
6
7
8
ODD1
41
42
+5V(LOGIC)
+5V(LOGIC)
38
39
40
+5V(MOTOR)
+5V(MOTOR)
+5V(MOTOR)
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
21
19
17
15
13
11
9
7
6
8
10
12
14
16
18
20
VENDER_UNIQUE#50
VENDER_UNIQUE#49
50
49
AUDIO_GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
3
4
23
26
43
44
45
46
48
GND
GND
51
52
47
DEVICE_CONFIG(CSEL)
17
17
IDE_PDCS1#
IDE_PDCS3#
35
36
CSIFX#
CS3FX#
17
17
17
IDE_PDA0
IDE_PDA1
IDE_PDA2
33
31
34
DA0
DA1
DA2
4
3
2
1
PDIAG
ODD_LED#
17
32
IDE_PDIORDY
17 INT_IRQ14
17
IDE_PDDREQ
27
29
22
IORDY
INTRQ
DMARQ
17
17
IDE_PDIOR#
IDE_PDIOW#
24
25
DIOR#
DIOW#
37
32
28
5
30
DASP#
PDIAG#
DMACK#
RESET#
IOCS16#
ODD_LED#
17 IDE_PDDACK#
SPD-CON22-9-GP-U
20.F0845.022
3D3V_S0
2
R291 1
10KR2J-3-GP
PDIAG
IDE_PDDACK#
HDDDRV#_5
DY
1
2
AUDIO_L_CH
AUDIO_R_CH
IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
R130 1
2
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
KBC_MATRIX0# 31
0R2J-2-GP
DY
for pomona 17" CD-ROM
connecor board use( pull low)
SPD-CONN50-4R-13GP-U
20.80640.050
12
11
2
U3D
TSAHCT125PW-GP
R268 1
HDDDRV#_5
bom1
0R2J-2-GP
Wistron Corporation
1
PCIRST1#
R264
10KR2J-3-GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
2
16,25
13
14
5V_S0
7
K
A
TC17
SC10U10V5ZY-1GP
SSM24PT-GP
hexainf@hotmail.com
GRATIS - FOR FREE
DY
C594
SCD1U16V2ZY-2GP
D15
DY
CD-ROM MASTER
SET LOW
SRN10KJ-6-GP
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
MH2
24
5V_S0
RN8
SCD1U16V2ZY-2GP
17 SATA_RXN0
17 SATA_RXP0
DY
5V_S0 3D3V_S0
2
3
4
5
6
7
17 SATA_TXP0
17 SATA_TXN0
SC10U10V5ZY-1GP
23
MH1
1
1
C68
SATA1
2
C70
1
C426
1
5V_S0
Size
HDD and CDROM
Document Number
Rev
SA
Orta
Date: Tuesday, December 12, 2006
Sheet
21
of
46
5V_USB1_S5
5V_USB2_S5
U65
5V_S5
8
7
6
5
USB_OC#0 19
1
USB_OC#2 19
1
EC128
EC124
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
GND
G546B2RD1UF-GP
74.00546.A73
OC1#
OUT1
OUT2
OC2#
9
C649
SCD1U16V2ZY-2GP
2
1
27,31 USB_PWR_EN#
GND
IN
EN1/EN1#
EN2/EN2#
2
1
2
3
4
5V_USB1_S5
5V_USB2_S5
5V_USB1_S5
1
DY
SCD1U16V2ZY-2GP
SC1000P50V3JN-GP
EC44
DY
2
EC51
2
EC125
DY
SCD1U16V2ZY-2GP
1
1
EC126 DY
SCD1U16V2ZY-2GP
2
TC13
SE150U10VM-2GP
79.15711.30L
2
1
2
1
EC129 DY
SC1000P50V3JN-GP
2
1
EC127 DY
SCD1U16V2ZY-2GP
2
1
2
TC23
SE100U10VM-4-GP
79.10111.40L
1
100 mil
100 mil
USB1
6
1
SRN0J-6-GP
19
19
4
3
USBPN0
USBPP0
USB_0USB_0+
1
2
2
3
4
5
SKT-USB-97-UGP
22.10218.H01
2
1
RN31
TR1
2nd source: 22.10218.P01
DY
BLUETOOTH MODULE
2
DY
0R3-0-U-GP
1
2
3
EC115 DY
SCD1U16V2ZY-2GP
OUT
GND
NC#3
IN
EN
1
5
C579
SC4D7U10V5ZY-3GP
2
USB2
4
BLUETOOTH_EN 31
19
19
4
3
USBPN2
USBPP2
1
SKT-USB-97-UGP
BLUE1
2nd source: 22.10218.P01
USB_4USB_4+
1
3D3V_BT_S0
R3832
R3822
1 0R2J-2-GP
1 0R2J-2-GP
DY
USBPN4 19
USBPP4 19
5V_USB2_S5
20.D0197.104
MDC 1.5 CONN
USB_2USB_2+
2
3
4
7
5
3
4
DY
bom1
1
1
ACZ_BTCLK_MDC 19
Wistron Corporation
1
R274
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
C417
DUMMY-C2
2
C412
2
TR3
3D3V_S5
TYCO-CONN12A-2-GP
20.F0917.012
SKT-USB-168-GP
2nd source: 22.10218.P01
68.03216.20B
2
4
6
8
10
12
17
18
100KR2J-1-GP
3
5
7
9
11
NP2
16
1
15
14
2
2
C31
SC22P50V2JN-4GP
2
1
L-63UH-GP
13
NP1
1
SC4D7U10V5ZY-3GP
2ACSDATAIN1_A
39R2J-L-GP ACZ_RST#
1
ACZ_SYNC
1
R23
2
19,29
ACZ_SYNC
19 ACZ_SDATAIN1
19,29 ACZ_RST#
3
4
SRN0J-6-GP
MDC1
ACZ_SDATAOUT
USBPN5
USBPP5
USB3
6
8
1
RN60
19
19
19,29 ACZ_SDATAOUT
22.10218.H01
L-63UH-GP68.03216.20B
3
4
3
2
4
6
2
3
4
5
5
ACES-CON4-1-GP
USB_1USB_1+
1
2
RN32
TR2
EC21 put near
BLUE1 / all
USB put one
choke near
connector by
EMI request
6
1
SRN0J-6-GP
G5240B1T1U-GP
2
1
3D3V_BT_S0
5V_USB1_S5
3D3V_S0
U55
2
1
R385
3D3V_BT_S0
3
4
L-63UH-GP68.03216.20B
Title
Size
USB / MDC / BLUETOOTH
Document Number
Orta
Date: Tuesday, December 12, 2006
Rev
SA
Sheet
22
of
46
5
4
3
2
1
3D3V_LAN_S5
3D3V_LAN_S5
2 R73
1
4K7R2J-2-GP
3 CLK_PCIE_LAN#
2D5V_LAN_S5
R93
1
1
10KR2J-3-GP
19 LAN_SMALERT
E8052
R82
24
34
1
1
33
VDD
36
37
38
40
39
42
41
43
45
44
46
47
35
SPI_DO
Pull up for AT24C08 another pull low
AVDDL
32
MDIN[3]
31
MDI3-
24
MDIP[3]
30
MDI3+
24
TSTPT
29
RX_N
AVDDL
28
RX_P
MDIN[2]
27
MDI2-
24
55
REFCLKP
MDIP[2]
26
MDI2+
24
56
REFCLKN
HSDACN
25
57
AVDDL
HSDACP
24
58
VDD
AVDD
23
59
LED_ACTn
AVDDL
22
60
LED_10/100n
MDIN[1]
21
MDI1-
24
61
VDDO_TTL
MDIP[1]
20
MDI1+
24
62
LED_1000n
AVDDL
19
MDIN[0]
18
MDI0-
24
MDIP[0]
17
MDI0+
24
PLACE PNP TO CHIP ACAP
CTRL12 PIN TRACE IS 25MIL
L12
3D3V_LAN_S5
1
3D3V_LAN_S5_2
2
E8071
0R3-0-U-GP
R304
4K7R2J-2-GP
C445
C449
SCD1U10V2KX-4GP
LAN_ACT_LED#
CTRL12
BCP69T1-1-GP
Q11
1D2V_LAN_S5
1
Marvell recommend:
4.87K Ohm for
E8052;4.99K Ohm
for E8071
3
1
1
C467
19,28 PCIE_WAKE#
LANLOM
8052:2.5V.
8071:1.8V.
2
SC10U10V5KX-2GP
E8071
CTRL12
CTRL25
LAN_RST
2D5V_LAN_S5
C466
SCD1U10V2KX-4GP
1
1
2
2
C
C442
SCD1U10V2KX-4GP SC10U10V5KX-2GP
RSET
16
15
XTALI
XTALO
14
VDD
13
VAUX_AVLBL
12
11
SWITCH_VCC
LOM_DISABLEn
SWITCH_VAUX
9
10
VDDO_TTL_MAIN
8
VDD
WAKEn
7
6
1
E8052
1
2
R292 4K99R2F-L-GP
BCP69T1-1-GP
Q12
1
C443
88E8052-2-GP
LANRSET
1
2
R296 4K87R2F-GP
1D2V_LAN_S5
2
CTRL25
8052:CTRL25.
8071:CTRL18.
B
R305
4K7R2J-2-GP
2
DY
PERSTn
GND
5
65
1
C440
1
2
2
C447
2
DY
SCD1U10V2KX-4GP
2
1
2
VDD_25
E8071
10R3-0-U-GP2
C444
1
C130
SC10U6D3V5KX-2GP
1
SC10U6D3V5KX-2GP
SCD1U10V2KX-4GP
2
1
C470
1
2
R297 0R2J-2-GP
19,28 SMB_CLK
3D3V_LAN_S5
L14
SC4D7U6D3V3KX-GP
3D3V_S5
LED_LINKn
64
CTRL25
E8052
4
R302
10R3-0-U-GP2
3
2D5V_LAN_S5
63
VDD
20R3-0-U-GP
VDDO_TTL
24 10M/100M/1G_LED#
DY
2
R301
1
CTRL12
2
C
0R3-0-U-GP
2
2
0R2J-2-GP
SPI_DI
3 CLK_PCIE_LAN
SPI_CS
54
VPD_CLK
53
12 PCIE_TXP1
SPI_CLLK
12 PCIE_TXN1
VDD
AVDDL
VDDO_TTL
52
VPD_DATA
AVDDL
SMCLK
TX_N
51
SMDATA
50
D
AT24C08AN-1-GP
VDD
PCIE_RXDN
VDDO_TTL
2C88
TESTMODE
48
SCD1U10V2KX-4GP
1
VDD
12 PCIE_RXN1
VPD_CLK
VPD_DATA
SC4D7U6D3V3KX-GP
2
TX_P
8
7
6
5
2
DY
R81
49
VCC
WP
SCL
SDA
3
1
PCIE_RXDP
A0
A1
A2
GND
1
3D3V_S5
12 PCIE_RXP1
2C86
VMAIN_AVAL
U27
SCD1U10V2KX-4GP
1
1
2
3
4
2D5V_LAN_S5
SB
D
R328
4K7R2J-2-GP
U49
LAN_SPI_CLK
LAN_SPI_CS
LAN_SPI_DI
LAN_SPI_DO
E8071
2D5V_LAN_S5
R329
4K7R2J-2-GP
E8052
VPD_DATA
VPD_CLK
1
3D3V_LAN_S5
LANPWR
1
CHECK
1
2
R311 0R2J-2-GP
1
2
R322 0R2J-2-GP
SMB_DATA 19,28
SMB_CLK 19,28
2
3D3V_S0
1 0R2J-2-GP
1
0R2J-2-GP
2
3D3V_LAN_S5
2 R71
2
R72
2
2
LAN_SMB_DATA
LAN_SMB_CLK
DY
2 RN12
1
3MDIS0_LAN
1
2 C98
4
SCD01U16V2KX-3GP
MDI1+
MDI1-
2 RN11
1
3MDIS1_LAN
1
2 C95
4
SCD01U16V2KX-3GP
MDI2MDI2+
1
2
MDI3MDI3+
1
2
E8052
E8052
RN10
E8052
RN9
LANX2
LANX1
E8052
MDI0+
MDI0-
E8052
E8052
SRN49D9F-GP
E8052
4MDIS2_LAN
1
2 C93
3
SCD01U16V2KX-3GP
E8052
4MDIS3_LAN
1
2 C89
3
SCD01U16V2KX-3GP
SRN49D9F-GP
SRN49D9F-GP
B
SRN49D9F-GP
3D3V_LAN_S5
A_RST
DY
hexainf@hotmail.com
GRATIS - FOR FREE
C83
1
1
C428
1
C94
1
C432
1
C92
1
C91
2
SCD1U10V2KX-4GP
2
SCD1U10V2KX-4GP
2
SC1KP50V2KX-1GP
2
SC1KP50V2KX-1GP
2
SC1U10V2KX-1GP
2
SC1U10V2KX-1GP
1
C464
1
C79
1
C463
1
C77
1
C80
1
C436
1
C434
1
C431
2
SC1U10V2KX-1GP
2
SC1U10V2KX-1GP
2
SC1KP50V2KX-1GP
2
SC1KP50V2KX-1GP
2
SC1U10V2KX-1GP
2
SC1KP50V2KX-1GP
2
SC1U10V2KX-1GP
2
SC1KP50V2KX-1GP
TP9
TPAD30
LAN_DISABLE connect to GPIO50
of KBC
ASF
3D3V_LAN_S5
2
2
SC1KP50V2KX-1GP
2
SC1KP50V2KX-1GP
2
SC1U10V2KX-1GP
2
SC1U10V2KX-GP
2
SC1U10V2KX-1GP
DY
1D2V_LAN_S5
SCD1U10V2KX-4GP
A
1
C448
1
C78
1
C446
1
C106
1
C435
2D5V_LAN_S5
1
C103
SC12P50V2JN-3GP
<Variant Name>
A
C475
U50
LAN_SPI_CS
LAN_SPI_DI
1
2
3
4
CS#
SO
WP#
GND
1
3D3V_LAN_S5
10R2J-2-GP 2 R299
1
1
2
LANLOM
2 LANX1
XTAL-25MHZ-67GP
C102
SC12P50V2JN-3GP
2
LANX2 1
DY
2
SC100P50V2JN-3GP
PLACE PNP TO CHIP ACAP
CTRL25 PIN TRACE IS 25MIL
DY
X1
1
R3001
2
0R2J-2-GP
C105
16,28,31,33,43 LPC_RST#
R95
1
2
10MR2J-L-GP
2
1 LANLOM
4K7R2J-2-GP
R298
LAN_RST
VCC
HOLD#
SCK
SI
8
7
6
5
LAN_SPI_CLK
LAN_SPI_DO
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
MARVELL 88E8052
Size
A3
AT25F2048N-10SI-GP
CHECK
Wistron Corporation
Document Number
Rev
Orta
Date: Tuesday, December 12, 2006
5
4
3
2
SA
Sheet
1
23
of
46
A
B
C
D
E
LAN Connector
RJ1
10M/100M/1G_LED#
EC12 1
DY SC1KP50V2KX-1GP
EC13 1
DY SC1KP50V2KX-1GP
RJ45_1_1
CONN_PWR_2
9
A1
A2
A3
1
CONN_PWR_1
EC16 1
DY SC1KP50V2KX-1GP
EC17 1
DY SC1KP50V2KX-1GP
RJ45_2_1
RJ45_3_1
RJ45_4_1
RJ45_5_1
RJ45_6_1
RJ45_7_1
RJ45_8_1
CONN_PWR_1
2
3
4
5
6
7
8
B1
4
LAN_ACT_LED#
23 10M/100M/1G_LED#
2
2
2
2
CONN_PWR_2
A2(+) A1(-)::GREEN
A2(+) A3(-):ORANGE
4
B1(+) B2(-):YELLOW
23
B2
10
LAN_ACT_LED#
RJ45-125-GP-U1
22.10277.021
GIGA Lan Transformer
For EMI request
XF2
2D5V_LAN_S5
XRF_TDC
1
3
R92
2
0R2J-2-GP
1
1
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
2
C109
2
C90
23
23
MDI1MDI1+
23
23
MDI0MDI0+
1
2
3
4
5
6
RD+
RDRDCT
TDCT
TD+
TD-
12
11
10
9
8
7
RX+
RXRXCT
TXCT
TX+
TX-
RJ45_6
RJ45_3
L6
MCT2
MCT1
8
RJ45_6_1
RJ45_3
2
7
RJ45_3_1
RJ45_2
3
6
RJ45_2_1
RJ45_1
4
5
RJ45_1_1
XFORM-208-GP
XF1
23
23
MDI3MDI3+
23
23
MDI2MDI2+
1
2
3
4
5
6
FILTER-106-GP
RD+
RDRDCT
TDCT
TD+
TD-
12
11
10
9
8
7
RX+
RXRXCT
TXCT
TX+
TX-
RJ45_8
RJ45_7
MCT4
MCT3
RJ45_5
RJ45_4
L5
1
1
SCD01U16V2KX-3GP
2
C84
2
C107
SCD01U16V2KX-3GP
1.route on bottom as differential pairs.
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.
1
3
RJ45_2
RJ45_1
XFORM-208-GP
2
RJ45_6
RJ45_8
1
8
RJ45_8_1
RJ45_7
2
7
RJ45_7_1
RJ45_5
3
6
RJ45_5_1
RJ45_4
4
5
RJ45_4_1
2
FILTER-106-GP
10M/100M/1G_LED#
RJ11 signal must leave the other signal
or power plane 100mil.
LAN_ACT_LED#
MCT1
MCT2
MCT4
MCT3
RJ45 PIN
RJ45-1
TD- --> TX-
RJ45-2
RD+ --> RX+
RJ45-3
RD- --> RX-
RJ45-6
3D3V_LAN_S5
CONN_PWR_2
1 R306 470R2J-2-GP
2
C439
LAN_TERMINAL 1
<Variant Name>
ERC8
SRC100P50V-2-GP
77.61012.02L
2
SC1KP2KV8KX-GP
1
DY
Wistron Corporation
1
2
3
4
TD+ --> TX+
1
8
7
6
5
10/100 LAN Transformer
5
6
7
8
1
RN52
SRN75J-1-GP
CONN_PWR_1
2
R310 470R2J-2-GP
3D3V_LAN_S5
4
3
2
1
DOC_TIP,DOC_RING,TIP,RING:
W/S : 10/100 @ Surface layers
10/20 @ Inner layers
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
LAN Connector
Size
A3
Document Number
Rev
Orta
Date: Tuesday, December 12, 2006
A
B
C
D
SA
Sheet
E
24
of
46
A
B
CBB_D[15..0]
ODR2_ACTV
3D3V_S0
3D3V_S0
27
SD_CLK
1
ODR2_3V#
27
SD_WP
5V_S0
MS/XD/SD_D0
MS/XD/SD_D1
MS/XD/SD_D2
MS/XD/SD_D3
P11
RI_OUT#/PME#
2
47KR2J-2-GP
2
U5
T7
U11
U7
U9
N12
T14
R15
C5
T12
R11
N14
K16
C7
C15
C9
C13
C11
PCI_RST#
GNT#
REQ#
SERR#
PERR#
PAR
STOP#
TRDY#
IRDY#
FRAME#
DEVSEL#
PCI_CLK
IDSEL
C/BE0#
C/BE1#
C/BE2#
C/BE3#
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
U40A
PME#, CLKRUN#, IRQSER# AND INTA#
MUST BE PULLED-UP ON THE MLB.
R248
22KR2J-GP
1
2
3D3V_S0
CAD0
CAD1
CAD2
CAD3
CAD4
CAD5
CAD6
CAD7
CAD8
CAD9
CAD10
CAD11
CAD12
CAD13
CAD14
CAD15
CAD16
CAD17
CAD18
CAD19
CAD20
CAD21
CAD22
CAD23
CAD24
CAD25
CAD26
CAD27
CAD28
CAD29
CAD30
CAD31
P16
N15
N13
M13
N16
M15
M14
L13
L15
K15
K14
K13
J14
J16
H16
J13
H15
G13
E13
D13
F12
D12
G11
D11
F10
G10
D9
F7
D6
E6
F6
E5
SKT_VCC
D10
1
R241
2
33R2J-2-GP
CBB_BVD1# 27
CBB_BVD2# 27
CBB_CD2# 27
CBB_CD1# 27
CBB_VS2# 27
CBB_VS1# 27
CBB_A18 27
CBB_D14 27
CBB_D2 27
CBB_RESET 27
CBB_WP 27
CBB_A19 27
CBB_RDY 27
CBB_WE# 27
CBB_INPACK# 27
CBB_WAIT# 27
CBB_A14 27
CBB_A13 27
CBB_A20 27
CBB_A21 27
CBB_A22 27
CBB_A15 27
CBB_A23 27
CBB_A16 27
1
1
2
3.3V
3.3V
5V
5V
12V
VPPD1
VPPD0
SHTDN#
8
OC#
VCCOUT
VCCOUT
VCCOUT
VPPOUT
TPAD28
VCCD0#
VCCD1#
1
2
GND
VCCD0#
VCCD1#
14
15
16
R2361
2
4K7R2J-2-GP
3D3V_S0
7
11
12
13
10
VCC_ASKT_S0
TP58
TPAD30
CP2211F-GP
3
VCC_ASKT_S0
C374
C373
C369
C367
CBB_D3 27
CBB_D4 27
CBB_D11 27
CBB_D5 27
CBB_D12 27
CBB_D6 27
CBB_D13 27
CBB_D7 27
CBB_D15 27
CBB_A10 27
CBB_CE2# 27
CBB_OE# 27
CBB_A11 27
CBB_IORD# 27
CBB_A9 27
CBB_IOWR# 27
CBB_A17 27
CBB_A24 27
CBB_A7 27
CBB_A25 27
CBB_A6 27
CBB_A5 27
CBB_A4 27
CBB_A3 27
CBB_A2 27
CBB_A1 27
CBB_A0 27
CBB_D0 27
CBB_D8 27
CBB_D1 27
CBB_D9 27
CBB_D10 27
2
VCC_ASKT_S0
ODR1_3V# 27
3D3V_S0
C389
C377
SCD1U16V2ZY-2GP
2
1
C368
CSTSCHG
CAUDIO
CCD2#
CCD1#
CVS2
CVS1
R2_A18
R2_D14
R2_D2
CRST#
CCLKRUN#
CBLOCK#
CINT#
CGNT#
CREQ#
CSERR#
CPERR#
CPAR
CSTOP#
CDEVSEL#
CTRDY#
CIRDY#
CFRAME#
CCLK
F8
E8
D7
P15
G12
F9
H13
M16
D5
E12
G8
G14
G9
F14
E11
D8
F16
G16
F15
E16
D16
D15
E14
E15
CBB_CE1# 27
CBB_A8 27
CBB_A12 27
CBB_REG# 27
TP59
3
4
5
6
9
VCCD0#
SCD1U16V2ZY-2GP
2
1
C376
SCD1U16V2ZY-2GP
2
1
SCD1U16V2ZY-2GP
2
1
SC4D7U10V5ZY-3GP
2
1
SCD1U16V2ZY-2GP
2
1
C370
L16
H14
D14
E10
U38
C366
SC1U6D3V2ZY-GP
VCCD1#
R247
22KR2J-GP
1
2
C390
SC4D7U10V5ZY-3GP
2
1
16 PCI_C/BE#0
16 PCI_C/BE#1
16 PCI_C/BE#2
16 PCI_C/BE#3
16,20 PCI_AD[31..0]
K7
E4
D4
R4
P6
R5
P5
N6
N4
M7
P4
L4
OZ711_IDSEL J7
1
2
100R2F-L1-GP-U
R240
T8
T4
M6
H4
PCI_AD[31..0]
PCI_AD0
T11
PCI_AD1
N10
PCI_AD2
P10
PCI_AD3
T10
PCI_AD4
R10
PCI_AD5
T9
PCI_AD6
R9
PCI_AD7
N9
PCI_AD8
R8
PCI_AD9
P8
PCI_AD10
N8
PCI_AD11
R7
PCI_AD12
N7
PCI_AD13
T6
PCI_AD14
R6
PCI_AD15
T5
PCI_AD16
M5
PCI_AD17
M4
PCI_AD18
L7
PCI_AD19
L6
PCI_AD20
K6
PCI_AD21
K5
PCI_AD22
J4
PCI_AD23
J5
PCI_AD24
H5
PCI_AD25
H6
PCI_AD26
H7
PCI_AD27
G4
PCI_AD28
G5
PCI_AD29
G7
PCI_AD30
F4
PCI_AD31
F5
VCCD0#/SDATA
VPPD0/SLATCH
VCCD1#/SCLK
PCIRST
CC/BE0#
CC/BE1#
CC/BE2#
CC/BE3#
C365
C364
SCD1U16V2ZY-2GP
T16
T15
R16
3
CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
TP112
16,21 PCIRST1#
16
PCI_GNT#0
16
PCI_REQ#0
16
PCI_SERR#
16
PCI_PERR#
16
PCI_PAR
16
PCI_STOP#
16
PCI_TRDY#
16
PCI_IRDY#
16 PCI_FRAME#
16 PCI_DEVSEL#
16,20 PCLK_PCM
16
PCI_AD22
PCI_VCC
PCI_VCC
1 R252
ODR1_ACTV
SKTA_ACTV
SPKR_OUT#
E7
F11
G15
J6
L14
N5
P12
PCI_SPKR
TPAD30
P14
H8
R12
K4
P9
29
TP113
TP110
MF0/INTA#
MF3/SIRQ#
MF4/MS_CD#/XD_CE#
MF6/CLKRUN#
GND
GND
GND
GND
GND
GND
TPAD30
TPAD30
20R2J-2-GP
N11
T13
P13
R14
E9
F13
G6
J15
K19
L5
R245 1
MS_CD#
16,31 PM_CLKRUN#
20R2J-2-GP
1 OF 2
27
R244 1
XD_CE#
XD_CD#
SD_CD#
XD_RE#/ODR1_3V#
XD_WE#
XD_WPO
XD_WPI
XD_ALE/MS_BS
XD_CLE/MS_CLK/VPPD1
XD_R/B#
XD/MS_D0
XD/MS_D1
XD/MS_D2
XD/MS_D3
XD_D4
XD_D5
XD_D6
XD_D7
XD_VCC
16 INT_PIRQA#
16,31 INT_SERIRQ
27
C12
C10
C8
C14
SD_D7
SD_D6
SD_D5
SD_D4
SD_D3
SD_D2
SD_D1
SD_D0
SD_CMD
SD_CLK
OZ711SP1-BN-GP
SD_WP
ODR2_3V#
NC#C8
ODR2_ACTV
C16
U16
U6
U4
U12
U13
U14
U15
U10
U8
TPAD30 TP117
TPAD30 TP116
TPAD30 TP115
TPAD30 TP57
2
SCD1U16V2ZY-2GP
C363
SC1U6D3V2ZY-GP
SCD1U10V2KX-4GP
2
1
TPAD30 TP106
27
4
Power switch
27
27
27
27
SC4D7U10V5ZY-3GP
2
1
SM/XD_D4
SM/XD_D5
SM/XD_D6
SM/XD_D7
27
SCD1U10V2KX-4GP
2
1
XD_WP#
XD_WE#
XD_RE#
SD_CD#
XD_CD#
27
27
CBB_A[25..0]
SCD1U10V2KX-4GP
2
1
TPAD30 TP111
CBB_D[15..0]
1
27
27
27
27
CBB_A[25..0]
MS/XD/SD_D0 27
MS/XD/SD_D1 27
MS/XD/SD_D2 27
MS/XD/SD_D3 27
2
4
E
XD_R/B#
27 MS_CLK/XD_CLE
27 MS_BS/XD_ALE/SD_CMD
D
2
27
C
C388
1
hexainf@hotmail.com
GRATIS - FOR FREE
1
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
OZ711SP1 (1 of 2)
Document Number
Rev
SA
Orta
Date:
A
B
C
D
Tuesday, December 12, 2006
E
Sheet
25
of
46
A
B
C
D
E
4
4
2
3D3V_S0
R242
0R3-0-U-GP
OZ711SP1-BN-GP
P1
P7
P19
F19
G19
C384
R13
J1
VR_CPR
VR_CPR
NC#R13
NC#J1
L19
L1
C383
SC22U6D3V6KX-1GP
2
3
1
GND
GND
GND
GND
GND
C381
SC4D7U10V5ZY-3GP
2
1
1
C380
2
2
SC1U10V2ZY
SCD1U16V2ZY-2GP
C385
SC1KP50V2KX-1GP
2
1
1
1
3D3V_PLL_S0
3
CHECK WITH FAE
DY
G1
C379 SC15P50V2JN-2-GP
2
1
2
1394_XO
1394_XI
X4
X-24D576MHZ-44GP
1
H19
J19
XO
XI
N19
RI1
M19
CPS
NC#N1
TPBIAS0
N1
W14
GND
GND
NC#W8
NC#W9
W6
W7
W8
W9
TPB0TPB0+
TPA0TPA0+
W10
W11
W12
W13
R243
1
2
CORE_VCC
CORE_VCC
5K9R2F-GP
M1
K1
2 OF 2
U40B
1394_TPBIAS1
1394_TPBIAS0
1394_TPB0N
1394_TPB0P
1394_TPA0N
1394_TPA0P
C386
SC1U10V3ZY-6GP
2
1
1394_TPBIAS0 27
1394_TPB0N
1394_TPB0P
1394_TPA0N
1394_TPA0P
27
27
27
27
F1
H1
AVCC
AVCC
C382
SC15P50V2JN-2-GP
2
1
TEST_PHY
3D3V_S0
3D3V_PLL_S0
2
C378
2
SCD1U16V2ZY-2GP
1
2
<Variant Name>
1
1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
OZ711SP1 (2 of 2)
Document Number
Orta
Date: Tuesday, December 12, 2006
A
B
C
D
Rev
SA
Sheet
E
26
of
46
A
B
PCMCIA Socket
C
CBB_WE#
CBB_A20
CBB_RDY
CBB_A21
1
C348
C351
2
2
PCMCIASCD1U25V3ZY-1GP
PCMCIA
CBB_A16
CBB_A22
CBB_A15
CBB_A23
CBB_A12
CBB_A24
CBB_A7
CBB_A25
CBB_A6
SC4D7U10V5ZY-3GP
1
3
CBB_VS2#
CBB_A16
CBB_A5
CBB_RESET
CBB_A4
CBB_WAIT#
CBB_A3
CBB_INPACK#
CBB_A2
1
CBB_REG#
CBB_A1
Place close to pin 19.
CBB_BVD2#
C340
DUMMY-C2
CBB_A0
CBB_BVD1#
CBB_D0
CBB_D8
CBB_D1
CBB_D9
CBB_D2
CBB_D10
2
2
Clock AC termination
33MHz clock for 32-bit
Cardbus card I/F
CBB_WP
CBB_CD2#
1
1
1
1
C387
C391
1394
1394
2
2
2
2
1394
1394_TPB0
1394
R249
5K1R2-GP
SC220P50V3JN-GP
SC1U10V3ZY-6GP
PC1
PCMCIA
21.H0056.011
3
2nd source: 21.H0140.001
3D3V_S0
R468
10KR2J-3-GP
D17
5V_S5
2
ODR1_3V# 25
1
ODR2_3V# 25
3
SCD1U16V2ZY-2GP
EC43
DY
BAW56-7-F-GP
3D3V_S0
CRB1
41
MH1
1
42
45
2
3
5
7
9
11
13
15
17
19
21
23
1
25
0R2J-2-GP 27
29
31
33
35
37
39
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
5V_S5
5V_S5
25 XD_RE#
22,31 USB_PWR_EN#
19 USB_OC#7
25
XD_CD#
25
XD_CE#
25
XD_R/B#
25
XD_WE#
25
SD_CLK
25
MS_CD#
25 MS_CLK/XD_CLE
25 MS_BS/XD_ALE/SD_CMD
25
SD_CD#
25
SD_WP
PCMCIA
CARDBUS68P-11-GP-U1
62.10024.601
C334 DY
SCD01U16V2KX-3GP
2
1
1394_TPBIAS0
2
CBB_IOWR#
CBB_A8
CBB_A17
CBB_A13
CBB_A18
CBB_A14
CBB_A19
26 1394_TPBIAS0
2
CBB_A9
C360
R251
56R2J-4-GP
1
C356
SCD1U25V3ZY-1GP
2
1
SC1KP50V2KX-1GP
2
1
SC4D7U10V5ZY-3GP
2
1
PCMCIAPCMCIA
PCMCIA
R250 1394
56R2J-4-GP
R254 1394
56R2J-4-GP
2
CBB_IORD#
25
25
25
25
25
25
1
CBB_A11
R253 1394
56R2J-4-GP
2
CBB_CE2#
CBB_OE#
CBB_VS1#
VCC_ASKT_S0
4
25
25
4
CBB_A10
1394_TPB0P
1394_TPB0N
1394_TPA0P
1394_TPA0N
25
25
CARDBUS-SKT42
CBB_D15
CBB_CE1# 25
CBB_CE2# 25
CBB_BVD1#
CBB_BVD2#
CBB_CD1#
CBB_CD2#
CBB_VS1#
CBB_VS2#
2
CBB_CE1#
CLOSE TO CHIP
1
CBB_IORD# 25
CBB_IOWR# 25
CBB_OE# 25
CBB_WE# 25
CBB_REG# 25
CBB_RDY
CBB_WP
CBB_RESET 25
CBB_WAIT#
CBB_INPACK#
3
CBB_CD1#
CBB_D4
CBB_D11
CBB_D5
CBB_D12
CBB_D6
CBB_D13
CBB_D7
CBB_D14
25
CBB_A[25..0] 25
1
CBB_D3
NP1
1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
31
65
32
66
33
67
34
68
NP2
CBB_D[15..0]
1
CBB_D[15..0]
CN1
C358
E
Cardbus I/F
CBB_A[25..0]
4
D
26
26
31
2
R246
1394_TPB0N
1394_TPB0P
1394_DETECT
43
MH2
2
XD_WP# 25
USBPN7
USBPP7
19
19
SM/XD_D4
SM/XD_D5
SM/XD_D6
SM/XD_D7
25
25
25
25
MS/XD/SD_D0
MS/XD/SD_D1
MS/XD/SD_D2
MS/XD/SD_D3
25
25
25
25
1394_TPA0N 26
1394_TPA0P 26
44
46
20.F0084.040
AMP-CONN40-2-UGP
2nd source: 20.F0853.040
1
hexainf@hotmail.com
GRATIS - FOR FREE
<Variant Name>
1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
XD
MS / MS PRO
SD / SD IO / MMC
PCMCIA / 1394 / CARD READER
Size
Document Number
Rev
Orta
Date: Tuesday, December 12, 2006
A
B
C
D
E
SA
Sheet
27
of
46
A
B
C
D
E
Mini Card Connector
NEWCARD Connector
SK1
3D3V_S0
MINIC1
Reserve the symbol
for bottom side
connector
NEW
CARDBUS-SKT70-GP-U
21.H0110.001
4
3D3V_S5 1D5V_S0
2
NEW1
11 PCIE_TXP3
11 PCIE_TXN3
11 PCIE_RXP3
11 PCIE_RXN3
3 CLK_PCIE_NEW
3 CLK_PCIE_NEW#
19 CPPE#
3 NEWCARD_CLKREQ#
1
DY
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3
3D3V_NEW_LAN_S5
2
DY
EC72
1DY
2
R239 0R2J-2-GP
1D5V_NEW_S0
19,23 PCIE_WAKE#
EC73
2
1
3D3V_NEW_S0
1
2
SRN33J-5-GP-U
TP108
TP109
19,23 SMB_DATA
19,23 SMB_CLK
3D3V_NEW_S0
19
19
USBPP9
USBPN9
NP2
26
25
24
23
22
21
20
19
18
CPPE#
17
16
15
14
TPS2231_PERST#
13
12
PCIE_WAKE#_R
11
10
RN49
9
8
DY 4 SMB_DATA_NEW
3 SMB_CLK_NEW
7
CONN_TP1
6
CONN_TP2
5
CPUTSB#
4
3
2
1
NP1
19,23
19,23
SMB_CLK
SMB_DATA
R407TPAD30
1
1
DY R408TPAD30
TPAD30
31
E51_RxD
31
E51_TxD
31 WIRELESS_EN
0R2J-2-GP2
2
0R2J-2-GP
DY
5V_AUX_S5
NEW
14
TP97
TP100
1
DY 2
R413 10KR2J-3-GP
TPAD30 TP55
WLAN_LED#
TP56 TPAD28
LED_WWAN#
WLAN_LED#
LED_WPAN#
1
1.5V
2
3.3V
28
48
+1.5V
+1.5V
52
+3.3V
24
+3.3VAUX
3
5
8
10
12
14
16
17
19
20
37
39
41
43
45
47
49
51
RESERVED#3
RESERVED#5
RESERVED#8
RESERVED#10
RESERVED#12
RESERVED#14
RESERVED#16
RESERVED#17
RESERVED#19
RESERVED#20
RESERVED#37
RESERVED#39
RESERVED#41
RESERVED#43
RESERVED#45
RESERVED#47
RESERVED#49
RESERVED#51
42
44
46
LED_WWAN#
LED_WLAN#
LED_WPAN#
13
11
PERN0
PERP0
23
25
PCIE_RXN2 12
PCIE_RXP2 12
PETN0
PETP0
31
33
PCIE_TXN2 12
PCIE_TXP2 12
USB_DUSB_D+
36
38
USBPN8 19
USBPP8 19
SMB_CLK
SMB_DATA
30
32
WAKE#
CLKREQ#
PERST#
1
7
22
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
4
9
15
18
21
26
27
29
34
35
40
50
53
54
CLK_PCIE_MINI1 3
CLK_PCIE_MINI1# 3
MINI_WAKE#
TP93
4
TPAD30
LPC_RST# 16,23,31,33,43
3
62.10043.331
3D3V_S0
3D3V_S5
3D3V_NEW_LAN_S5
3D3V_S0
NEW_PLT_RST1#
1D5V_S0
3D3V_S5
1
R232NEW
1
2
0R2J-2-GP
1D5V_NEW_S0
1D5V_S0
MINIPCI52P-1-GP-U
16,23,31,33,43 LPC_RST#
REFCLK+
REFCLK-
NP1
NP2
FCI-CON26-5-GP
20.F0789.026
UMI_PWR
UMI_DATA
UMI_CLK
UMI_RESET
UMI_VPP
TP95
6
NP1
NP2
1
19,31,34,35,44,45
3D3V_NEW_S0
A
2
1
1
1
2
2
1
2
2
2
2
1
1
1
2
1
1
GND
7
NEW
bom1
1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
C372
SCD1U16V2ZY-2GP
Title
NEW
MINI CARD / NEW CARD
Size
Place them Near to Connector
B
2
PM_SLP_S3#
1
1
1
NEW
C371
DY
C617
Place near MINIC1
3D3V_NEW_LAN_S5
C375
2
2
C353
3D3V_S0
3D3V_NEW_S0
1D5V_NEW_S0
1D5V_S0
CHECK WITH COLUMBIA
2
1
1
1D5V_NEW_S0
NEW
SCD1U16V2ZY-2GP
Place them Near to Chip
C350
2
2
SCD1U16V2ZY-2GP
NEW
NEW
SC1U16V3ZY-GP
SC1U16V3ZY-GP
C354
1
NEW
SCD1U16V2ZY-2GP
3D3V_S0
1
4
5
13
14
16
2
3_3VIN
3_3VOUT
1_5VIN
1_5VOUT
AUXIN
AUXOUT
P2231NFC1-GP
1
18
19
21
STBY#
RCLKEN
OC#
GND
NC#4
NC#5
NC#13
NC#14
NC#16
C615
SC10U6D3V5MX-3GP
SYSRST#
CPPE#
CPUSB#
PERST#
SHDN#
C605
SCD1U16V2ZY-2GP
31,32,35 S5_ENABLE
6
10
9
8
20
C623
SCD1U16V2ZY-2GP
DY
CPPE#
CPUTSB#
TPS2231_PERST#
DY
C630
SC1U16V3ZY-GP
2100KR2J-1-GP
2100KR2J-1-GP
C633
SC10U6D3V5MX-3GP
DY
DY
C624
SCD1U16V2ZY-2GP
1
1
C637
SC1U16V3ZY-GP
R238
R237
TC21
SC10U6D3V5MX-3GP
3D3V_S5
DY
2
U37
A_RST
WHEN DUMMY
U19,R702 MUST STUFF
2
ST220U6D3VDM-13GP
DY
2
SC100P50V2JN-3GP
2
3
12
11
17
15
C355
Document Number
Rev
Orta
Date: Tuesday, December 12, 2006
C
D
SA
Sheet
E
28
of
46
A
B
C
D
E
5VA_S0
1
1
5V_S0
R489
28K7R2F-GP
2
C678
SC22P50V2JN-4GP
1
SHDN# SET
2
GND
3
IN
5VA_SET
5
5VA_S0
4
4
C680
SC10U10V5ZY-1GP
2
C658
SC1U10V3KX-3GP
R478
10KR2F-2-GP
1
OUT
G923-330T1UF-GP
2
2
1
1
4
2
U69
25
C647
2
1
SCD47U16V3ZY-3GP
PCI_SPKR
2nd:74.09198.A7F
(RT9198-4GPBG)
5VA_S0
3D3V_S0
"VAUX" Pull high to enable standby mode
19
1
SCD47U16V3ZY-3GP
ACZ_SPKR
1
1
2
R442
10KR2J-3-GP
C638
SC100P50V2JN-3GP
SPKR_SB_1
1
C679
SC10U10V5ZY-1GP C684
C642
SCD1U10V2KX-4GP
SC10U10V5ZY-1GP
2
C645
2
1
2
SRN47KJ-1-GP
2
C632
2
2AUDIP_PC_BEEP
SC1U10V3KX-3GP
DY C643
1
C639
2
1
SCD47U16V3ZY-3GP
KBC_BEEP
C640
1
AUDIO_BEEP
1
SCD1U10V2KX-4GP
2
SC22P50V2JN-4GP
R4431
2
0R2J-2-GP
R4451
2
0R2J-2-GP
C646
2
DY 1
RESET#
2
31
5
6
7
8
1
RN59
CB_SPKR_1 4
3
KBC_BEEP_1 2
1
BCLK
SC22P50V2JN-4GP
ACZ_RST# 19,22
ACZ_SYNC 19,22
ACZ_BITCLK 19
ALC268_SENSE
1
2
R448
5K1R2F-2-GP
LINEOUT_JD#
1 R450
2
10KR2F-2-GP
LINEIN_JD#
1
MIC_JD# 30
30
30
VDD
DYOUT
30
G1214TAUF-GP-U
R472
2
0R2J-2-GP
34
13
SENSE_B
SENSE_A
HP-OUT-L_PORT-A
HP-OUT-R_PORT-A
39
41
SOUNDL 30
SOUNDR 30
LINE-OUT-L_PORT-D
LINE-OUT-R_PORT-D
35
36
FRONTL 30
FRONTR 30
CD-L
CD-R
CD-G
1
2
R446
10KR2J-3-GP
2
DY
2
1
2
0R2J-2-GP
5VA_S0
U63
1
2
3
INT_MIC1_CN
IN+
VSS
IN-
VDD
DYOUT
5
INT_MIC1
4
R462
G1214TAUF-GP-U
1
R455
DY
1
2
2
1
45
46
R452
1
DY
INT_MIC2
4
R482
DY
R458
2
5
NC#45
DMIC-CLK
TP114
TPAD30
R463
20KR2F-L-GP
1
IN+
VSS
IN-
48
47
1
2
1
2
3
10KR2J-3-GP
10KR2J-3-GP
2
<Variant Name>
0R2J-2-GP
DY
DY
C650
Wistron Corporation
2
2
0R2J-2-GP
R473
1
DY
SC680P50V2KX-2GP
1
DY
R465
1
2
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
DY
SC680P50V2KX-2GP
DY
Title
1
2
C662
0R2J-2-GP
hexainf@hotmail.com
GRATIS - FOR FREE
U67
INT_MIC2_CN
1
5VA_S0
1
30
2
0R2J-2-GP
ACZ_SDATAOUT 19,22
ACZ_SDATAIN0 19
2
1
1
R471
1
DY
2
39R2J-L-GP
5VA_S0
10KR2J-3-GP
10KR2J-3-GP
R474
AC97_DATIN 1
R444
3
ALC_GPIO0
C692
SCD47U16V3ZY-3GP
2
Near INTMIC Con.
5VA_S0
5
8
SPDIFO
EAPD
MONO-OUT
1
VREF
2
R449
20KR2F-L-GP
18
20
19
27
2
C687
SC10U10V5ZY-1GP
NC#44
NC#43
JDREF
MONO-OUT
VREF
ALC268-GR-GP
40
37
C689
JDREF
C688
MIC1-VREFO-R
MIC1-VREFO-L
MIC2-VREFO
AVSS1
AVSS2
DVSS
DVSS
1
C690
32
28
30
2
SC22P50V2JN-4GP
ALC268
MIC1-L_PORT-B
MIC1-R_PORT-B
MIC2-L_PORT-F
MIC2-R_PORT-F
DMIC-12/GPIO0
DMIC-34/GPIO3
LINE1-VREFO
GPIO1
1
SDATA-OUT
SDATA-IN
2
3
29
31
SC4D7U10V5ZY-3GP
D30
MIC1V_R
MIC1V_L
MIC2-VREFO
SC4D7U10V5ZY-3GP
BAW56-7-F-GP
SC4D7U10V5ZY-3GP
R451 1
2INT_MIC1_R 2
2K2R2J-2-GP
LINE1-L_PORT-C
LINE1-R_PORT-C
NC#14
NC#15
26
42
4
7
2 2K2R2J-2-GP
2 2K2R2J-2-GP
3
23
24
14
15
2 C661 MIC1-L_PORT-B 21
2 C666 MIC1-R_PORT-B 22
2C652 MIC2-L_PORT-F 16
2C659 MIC2-R_PORT-F 17
1
1
1
1
2
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
SC1U16V3ZY-GP
SC1U16V3ZY-GP
R501 1
R470
R503 1
1
2INT_MIC2_R 1
2K2R2J-2-GP
ALC861_LINE_IN_L
ALC861_LINE_IN_R
2C670
2C677
1
INT_MIC1
INT_MIC2
1
1
2
30 AUD_MICIN_L
30 AUD_MICIN_R
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
1
LINE_IN_L
LINE_IN_R
2
30
30
PCBEEP
RESET#
SYNC
BCLK
NC#33
DVDD
DVDD-IO
AVDD1
AVDD2
U66
3
44
43
1
9
25
38
12
11
10
6
33
DY C644
Size
Date:
A
B
C
D
AZALIA CODEC - ALC268
Document Number
Rev
Orta
SA
Sheet
Tuesday, December 12, 2006
E
29
of
46
A
B
C
D
AUDIO OP AMPLIFIER
5V_S0
KBC_MUTE_GPIO8
5VA_OP_S0
G95
2
3D3V_S0_AU
CLOSE TO U24
5V_S0
C660
SC22P50V2JN-4GP
R466
47KR2J-2-GP
2
3D3V_S0_AU
1410_VSS
1
2
SC1U16V3ZY-GP
GND
GND
GND
GND
GND
1
11
13
20
21
SPKR_R+
SPKR_RSPKR_L+
SPKR_L-
29
29
GAIN0
GAIN1
12
NC#12
SC4D7U6D3V3KX-GP
R_LINE_IN
2
15KR2J-1-GP
R441
0R2J-2-GP
1
SB
2
R492
0R2J-2-GP
1
1
2
1
HP_R
2
1
16
R464
10KR2J-3-GP
C648
INL
INR
SHDNR#
SHDNL#
G1410_SHDN#
2
DY
C1N
C1P
0R2J-2-GP
R479
10KR2J-3-GP
R485
100KR2J-1-GP
GAIN0
R483
0R2J-2-GP
1
SCD47U16V3ZY-3GP
4
8
OUTL
OUTR
12
14
C1P
C1N
5
7
OUTL
OUTR
DY
C654
SC2D2U10V3KX-1GP
C653
SC2D2U10V3KX-1GP
2
1
R477
10KR2J-3-GP
2
G1412R41U-GP
HP_L
3
1
C668
SC47P50V2JN-3GP
2
1
R469
10KR2J-3-GP
2
HP_R
1
C665
SC47P50V2JN-3GP
1
1
2
R440
2R_LINE_IN_1
DY
1
10KR2J-3-GP
R486
2 HP_L
1
2
GAIN1
R490
10KR2J-3-GP
2
DY
2
SOUND_R1
R484
31 AMP_SHUTDOWN#
2
C635
1
SOUNDR
1
FRONTR
5VA_OP_S0
C681
2 SOUND_L1
2
2
3
1
GAIN0
GAIN1
G1431F2U-GP
29
FRONTL
SC4D7U6D3V3KX-GP
1
1
18
14
4
8
2
ROUT+
ROUTLOUT+
LOUT-
U68
9
11
LINLIN+
RINRIN+
3
15
5
9
17
7
C675
G5930TBU-GP
NC#9
NC#11
L_LINE_IN
LIN+
R_LINE_IN
RIN+
G1410_SHDN#
SVDD
PVDD
2
SC1U16V3ZY-GP
AMP_SHUTDOWN# 31
1
2
C676 SC1U16V3ZY-GP
6
5
4
C1+
SHDN#
GND
1
C672
1
BYPASS
1
C673
SHUTDOWN#
BYPASS
19
10
OUT
IN
C1-
SVSS
PVSS
1
C683
2
SC4D7U10V5ZY-3GP
2
1
SC1U16V3ZY-GP
C636
VDD
PVDD
PVDD
1
2
3
3D3V_S0_AU
U64
C663
SC22P50V2JN-4GP
U71
SC10U10V5ZY-1GP
5VA_OP_S0
16
6
15
C669
SC4D7U10V5ZY-3GP
SC1U16V3ZY-GP
DY
1
C667
1
2
C671
DY
GND
SGND
PGND
G923-330T1UF-GP
0R3-0-U-GP
DY
R457
28K7R2F-GP
6
10
C674
SC1U10V3KX-3GP
4
SC2D2U10V3KX-1GP
R481
0R2J-2-GP
OUT
17
2
13
DY
3D3V_S0_AU
2
11410_VSS
DY
15KR2J-1-GP
IN
2
SB
GND
3
2
SCD47U16V3ZY-3GP
2
4
R461
2
L_LINE_IN
2
1
1
1
L_LINE_IN_1
3D3V_S0
DY
1
1
R480
2
3D3V_AU_REF
5
2
C682
1
SOUNDL
2
29
SHDN# SET
1
U70
1
1
DY
4
2
1
C641
SC4D7U10V5ZY-3GP
2
2
GAP-CLOSE-PWR
2
1
1
3
E
DY
Internal Microphone
6
LINE IN
22.10133.B11
6
SPKR_R+
1
2
SPKR1
ACES-CON4-1-GP
20.D0197.104
EC33
SRC100P50V-2-GP
ERC9
DY
8
7
6
5
DY
4
3
2
5
EC31
EC133
SC1KP50V2KX-1GP
20.D0197.104
1
DY
SPKR_LSPKR_L+
SPKR_R-
1
2
3
4
INT_MIC2_CN
INTMIC1
ACES-CON4-1-GP
5
29
4
3
2
DY
1
1
DY
INT_MIC1_CN
PHONE-JK234-GP
2
EC132
SC1KP50V2KX-1GP
29
SC1KP50V2KX-1GP
2
1
2
2
DYDY
2
LINE_IN_L
1
LINEIN_JD#
R502 2 AUD_LINE_R
1KR2J-1-GP
R497 2 AUD_LINE_L
1KR2J-1-GP
10KR2J-3-GP R498
10KR2J-3-GP R491
1
1
1
29
LINE_IN_R
NP2
NP1
5
4
3
6
2
1
SC1KP50V2KX-1GP
2
1
29
29
Internal Speaker
LIN1
2
1st source: 20.D0197.104
LINE OUT
MIC IN
LOUT1
MICIN1
2
2
22.10133.B01
DY
SRN1KJ-7-GP
RN61
DY
1
C686
PHONE-JK233-GP
EC130
SC1KP50V2KX-1GP
2
2
2 22R2J-2-GP
SPKR_L_A1
SPKR_R_A1
C685
NP2
NP1
5
4
3
6
2
1
1
<Variant Name>
Wistron Corporation
PHONE-JK235-GP
22.10133.B21
SC680P50V2KX-2GP
DY
R499 1
SC680P50V2KX-2GP
DYDY
EC131
SC1KP50V2KX-1GP
OUTR
1
AUD_MIC_L
2 22R2J-2-GP
2
2 R495 0R2J-2-GP
LINEOUT_JD#
R500 1
2
1
29 AUD_MICIN_L
1
29
OUTL
3
4
AUD_MIC_R
1
2 R493 0R2J-2-GP
10KR2J-3-GP R496
10KR2J-3-GP R494
1
1
1
29 AUD_MICIN_R
NP2
NP1
5
4
3
6
2
1
1
1
SB
MIC_JD#
2
29
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
AUDIO AMP AND JACK
Size
Document Number
Rev
SA
Orta
Date: Tuesday, December 12, 2006
A
B
C
D
Sheet
E
30
of
46
A
3D3V_S0
CHECK WITH SW
3D3V_AUX_S5
C112
C115
SCD1U16V2ZY-2GP
C116
SCD1U16V2ZY-2GP
2
1
C124
SCD1U16V2ZY-2GP
2
1
1
C160
2
DY
SCD1U16V2ZY-2GP
2
1
DY
SC10U10V5ZY-1GP
2
1
1
2
C120
2
1
2
8
7
6
5
1
2
3
4
C533,C534 colse to Pin VDD
SMBC_G792
SMBD_G792
C159
SCD1U16V2ZY-2GP
C535,C536 colse to Pin102
3D3V_S0
3D3V_S0
DY
R125 2
THERMAL----->
E51_TxD
BATTERY----->
DY
10KR2J-3-GP
R351 2
1
68
67
69
70
SDA2
SCL2
SDA1
SCL1
19,43,44 PM_SLP_S5#
81
SWD/GPIO66
SMB
E51_TxD
84
83
82
91
32
E-BUTTON#
22 BLUETOOTH_EN
28 WIRELESS_EN
30 AMP_SHUTDOWN#
3D3V_AUX_S5
SP
SPI_DI/GPIO77
SPI_DO/GPIO76/SHBM
SPI_SCK/GPIO75
GPIO81
SPI
2
FOR KBC DEBUG
R111
10KR2J-3-GP
CIR
TP1
TP7
14 DC_BATFULL
DC_BATFULL
KBC_CIR
28,32,35 S5_ENABLE
114
14
15
SOUT_CR/GPIO83/BADDR1
SIN_CR/CIRRX/GPIO87
GPIO84/HGPIO01/BADDR0
CIRTX/GPIO16/HGPIO04
GPIO34/CIRRX2
GPIO36
1
GPIO01
GPIO03
GPIO06/HGPIO06
GPIO07/HGPIO07
GPIO23
LDRQ#/GPIO24/HGPIO01
GPIO30
GPIO31
GPIO32
GPIO33
GPIO40
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45
GPIO46/TRST#
GPIO47/JEN0#
GPIO50/TDO
GPIO51
GPIO52/RDY#
GPIO53
IRRX2_IRSL0/GPIO70
IRTX/GPIO71
IRRX1/GPIO72
GPIO82/HGPIO00/TRIS#
64
95
93
94
119
6
109
120
65
66
16
17
20
21
22
23
24
25
26
27
28
73
74
75
110
GPIO
IRSL0
IRTX
IRRX1
1
2
1
SC6D8P50V2DN-GP
3
4
77
32KX1/32KCLKIN
79
30
32KX2
CLKOUT/GPIO55
USB_PWR_EN#
R126
R104
DY
63
117
31
32
118
62
PROGRAM#
40
CHG_3S_4S#
29
KBC_BEEP
40 CHG_V_PWM
40 CHG_I_PWM
14 BRIGHTNESS
41
40
BAT_IN#
CHG_ON#
27
32
32
1394_DETECT
TPDATA
TPCLK
33
33
33
33
SPIDI
SPIDO
SPICS#
SPICLK
1394_DETECT
2
R?
1
22R2J-2-GP
TB1/GPIO14/HGPIO04
TA2/GPIO20
TA1/GPIO56
A_PWM0
A_PWM1/GPIO21
B_PWM0/GPIO13
13
12
11
10
71
72
PSDAT3/GPIO12
PSCLK3/GPIO25
PSDAT2/GPIO27
PSCLK2/GPIO26
PSDAT1
PSCLK1
86
87
90
92
F_SDI
F_SDO
F_CS0#
F_SCK
KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
KBSOUT16/GPIO60
KBSOUT17/GPIO57/HGPIO03
53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL18
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
54
55
56
57
58
59
60
61
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
VCC_POR#
85
ECRST#
KBC
PS/2
FIU
C?
SC4D7P50V2CN-1GP
DY
2
GND
GND
GND
GND
GND
GND
5
18
45
78
89
116
AGND
103
TPAD28 TP10
32
PM_SLP_S3# 19,28,34,35,44,45
KBC_PWRBTN# 32
AC_IN#
40
LID_CLOSE# 32
PM_PWRBTN# 19,32
LDRQ0#
16
NUM_LED# 14
CAP_LED# 14
FRONT_PWRLED 14
STDBY_LED 14
RSMRST#_KBC 19
AD_OFF 41
ELOCK#
32
CHARGE_LED 14
BT_BTN# 14
WLAN_TEST_LED 14
2
VCORF
1
2
KBC_XI
2
KBC_XO
CRT_DEC# 15
BT_LED
14
WIRELESS_BTN# 14
BLON_OUT 14
GMCH_BL_ON 12
1 10KR2J-3-GP
DY
2 OF 2
TP8
TP6
TP2
TP4
TPAD28
TPAD28
TPAD28
TPAD28
TP5
TP3
TPAD28
TPAD28
TP60 TPAD28
TP61 TPAD28
22,27
WPC8768LDG-GP
SB
R105
RN53
3D3V_AUX_S5
DY
3D3V_S0
5
6
7
8
ECRST#
4
3BLUETOOTH_EN
2 KA20GATE
1 KBRCIN#
SRN10KJ-6-GP
WPC8768LDG-GP
35
3D3V_S0
C504
Q14
B
RSMRST#
1
2
2
R123
10KR2J-3-GP
1
1
R113
10KR2J-3-GP
DY
1
DY
AMP_SHUTDOWN#
2
1
2
10KR2J-3-GP
R349
2
1
10KR2J-3-GP
2
R348
2
R117
10KR2J-3-GP
R347
5V_S0
1394_DETECT
2
1
3D3V_S0
R127
DY
PCB_VER0
PCB_VER1
PCB_VER2
1
2
2
2
10KR2J-3-GP
SB
2
R128
DY
2
1
1
R110
10KR2J-3-GP
R129
DY
10KR2J-3-GP
R515
10KR2J-3-GP
10KR2J-3-GP
GMCH_BL_ON
1
C
MMBT3906-3-GP
S5_ENABLE
3
SC1U10V3KX-3GP
C111
SCD1U16V2ZY-2GP
2 R98
U48B
R107
1
PCB_VER0
PCB_VER1
PCB_VER2
10KR2J-3-GP
44
SC6D8P50V2DN-GP
2
101
105
106
107
10KR2J-3-GP
VCORF
33KR2J-3-GP
2
1KBC_XO_R 2
1
19
46
76
88
115
DA0/GPI94
DA1/GPI95
DA2/GPI96
DA3/GPI97
D/A
10KR2J-3-GP
SER/IR
2
RESO-32D768KHZ-GP
82.10026.021
10MR2J-L-GP
1
TPAD28
TPAD28
1
5V_AUX_S5
E51_TxD 111
E51_RxD 113
112
28 E51_TxD
28 E51_RxD
14 CCD_ON
VCC
VCC
VCC
VCC
VCC
102
AVCC
VDD
4
80
SCD1U16V2ZY-2GP
VBAT
1
SMBD_G792
SMBC_G792
BAT_SDA
BAT_SCL
35
35
41
41
1
R109
1
DY
AD_IA
40
MAIL#
32
INTERNET# 32
SYNC#
32
EPRESENTATION# 32
KBC_MATRIX0# 21
2
2PCLK_KBC_RC
104
97
98
99
100
108
96
C114
X2
E
1
E51_RxD
LPC
VREF
AD0/GPI90
AD1/GPI91
AD2/GPI92
AD3/GPI93
AD4/GPIO05
AD5/GPIO04
C117
R119
1
10KR2J-3-GP
R124 2
A/D
KCOL[1..18] 32
KROW[1..8] 32
2
1
U48A
1
10KR2J-3-GP
LPCPD#/GPIO10/HGPIO00
LRESET#
LCLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
SERIRQ
CLKRUN#/GPIO11/HGPIO02
KBRST#
GA20
ECSCI#
SMI#
PWUREQ#
1 OF 2
1
C133
1
3
1
3D3V_S0
DY
KBC_MATRIX0#
2
2
16,33 LPC_LFRAME#
16,33 LPC_LAD0
16,33 LPC_LAD1
16,33 LPC_LAD2
16,33 LPC_LAD3
16,25 INT_SERIRQ
16,25 PM_CLKRUN#
19
KBRCIN#
19
KA20GATE
19 ECSCI#_KBC
19 ECSMI#_KBC
19 ECSWI#_KBC
R121
0R2J-2-GP
DY
2
124
7
2
3
126
127
128
1
125
8
KBRCIN#
122
KA20GATE
121
ECSCI#_KBC
29
ECSMI#_KBC
9
ECSWI#_KBC 123
16,20 PCLK_KBC
SC4D7P50V2CN-1GP
2
1
2
DY
1
0R3-0-U-GP
10KR2J-3-GP
SC470P50V2KX-3GP
C129
C495
C122
R118
10KR2J-3-GP
R116 1PLT_RST1#_1
2
0R2J-2-GP
VBAT
R115 1
2
0R2J-2-GP
SC1U16V3ZY-GP
LPC_RST#
1
2
16,23,28,33,43
4
3D3V_AUX_S5
R108
2
BAT_SCL
BAT_SDA
4
SC10U10V5ZY-1GP
SRN4K7J-10-GP
RN14
C494
1
VBAT
C496
SCD1U16V2ZY-2GP
3D3V_S0
SC10U10V5ZY-1GP
2
1
3D3V_AUX_S5
10KR2J-3-GP
5V_S5
2
PlanarID
(2,1,0)
SA: 0,0,0
SB: 0,0,1
SC: 0,1,0
SD: 0,1,1
1
R350
10KR2J-3-GP
USB_PWR_EN#
2
3D3V_S0
R504
1
40mil
C695
2
1
2
ST47U6D3VCM
SC10U10V5ZY-1GP
2
1
C693
SCD1U16V2ZY-2GP
TC24
DY
SCD1U16V2ZY-2GP
C694
1
1
1
Place C581
,C583 near Pin1
and Pin6
1
10mil
10mil
10mil
U72
IRTX
IRRX1
IRSL0
KBC_CIR 2 CIR
0R2J-2-GP
1 MODE
R506
1
2
3
4
5
6
7
8
1
VCC2/IRED_ANODE
IRED_CATHODE
TXD
RXD
SD
VCC1
MODE
GND
<Variant Name>
Wistron Corporation
FIR
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
FIR-TFDU6102-2GP
56.15001.081
Title
RN85 Near TauchPad1 Con.
G98
1
2
Size
A2
IR_GND
GAP-CLOSE
IR_GND
hexainf@hotmail.com
GRATIS - FOR FREE
DY
Layout Guide:
(1) FIR_3D3V : 30 mils,
(2) C583, C581 close
to U32
0R2J-2-GP
2
R505
DY 0R2J-2-GP
IRTX
VISHAY FIR Module
2
2
3D3V_S0
1
R106
10KR2J-3-GP
3D3V_AUX_S5
Date:
A
KBC WPC8768L
Document Number
Rev
SA
Orta
Tuesday, December 12, 2006
Sheet
31
of
46
C
Mail Button
1
MAIL1
MAIL#_1
INTERNET#_1
Program_1
E-Button_1
3
5
2
5
4
2nd source:20.F00984.002
RN5
1
2
8
7
6
5
1
2
3
4
LID1
62.40009.561
Program Button
1
2
3
4
3
5
R7
10KR2J-3-GP
SRN470J-3-GP
RN4
EBUTTON1
1
1
1
4
SW-TACT-91-GP
62.40009.561
62.40009.561
1 PWRSW1 3
C5
SCD1U16V2ZY-2GP
SYNC#_1
EPRESENTATION#_1
ELOCK#_1
SYNC1
Power Button
1
3
3
2
D24
TP68 TPAD30
1
8
7
6
5
TP63 TPAD30
28,31,35 S5_ENABLE
Test Point放在Dimm Door打開可量測處
ELOCK
ELOCK1
1
1
SYNC#
31
EPRESENTATION# 31
ELOCK#
31
SRN470J-3-GP
RN1
EPRESENTATION1
3
2
SATA_LED#
TP71 TPAD30
3
EPRESENTATION
17
5V_S5
19,31 PM_PWRBTN#
1
SYNC#_1
2
EPRESENTATION#_1 3
ELOCK#_1 4
62.40009.561
MEDIA_LED# 14
1
2
3
4
4
SW-TACT-91-GP
3
8
7
6
5
SRN10KJ-6-GP
5
ODD_LED#
TP62 TPAD30
RN2
SYNC
62.40009.631
21
3D3V_S5
3D3V_S0
5
2
4
SW-TACT-103-GP-U
TP69 TPAD30
3D3V_AUX_S5
2
R6
470R2J-2-GP
KBC_PWRBTN# 31
2
SW-TACT-91-GP
2
4
6
8
2
KBC_PWRBTN#_R
2
4
4
ERC1
SRC1KP50V8MX-GP
5
DY
2
LID_CLOSE# 31
C6
SCD22U16V3KX-2-GP
Check test point
1
3
5
7
1
PROGRAM1
3
2
ACES-CON2-GP-U
MAIL#
31
INTERNET# 31
PROGRAM# 31
E-BUTTON# 31
E-Button
3D3V_AUX_S5
1
8
7
6
5
1
100R2F-L1-GP-U
4
MAIL#_1
INTERNET#_1
Program_1
E-Button_1
4
R9
COVER_SW#
1
2
SRN10KJ-6-GP
SW-TACT-91-GP
62.40009.561
R8
10KR2J-3-GP
3
4
SW-TACT-91-GP
1
Cover Up Switch
3D3V_S0
INTERNET1
3
E
3D3V_AUX_S5
2
Internet Button
D
1
B
2
A
3
5
5
BAW56PT-U
83.00056.E11
2
4
2
SW-TACT-91-GP
4
SW-TACT-91-GP
62.40009.561
62.40009.561
3D3V_S0
........
CHECK KB SPEC. AND PIN DEFINE
1
2
TPDATA
TPCLK
TP_DATA
TP_CLK
4
3
EC28
DY
1
2
TP_RIGHT
TP_SCROLL_RIGHT
TP_SCROLL_UP
TP_SCROLL_LEFT
TP_SCROLL_DOWN
TP_LEFT
DY
FP_DETECT#
2 R359
2
R358
17
5V_S0
1
1 0R2J-2-GP
1 0R2J-2-GP
FP_ID
DY
DY
KROW[1..8]
KCOL[1..18]
KROW[1..8]
31
KCOL[1..18]
31
1
C227
B
C
20.K0228.015
EC391
DY SC1KP50V2KX-1GP
TP_SCROLL_RIGHT EC381
DY SC1KP50V2KX-1GP
TP_SCROLL_UP
EC371
DY SC1KP50V2KX-1GP
Wistron Corporation
TP_SCROLL_LEFT
EC361
DY SC1KP50V2KX-1GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
TP_SCROLL_DOWN EC351
DY SC1KP50V2KX-1GP
TP_LEFT
DY SC1KP50V2KX-1GP
TP_RIGHT
DY
EC19
SC100P50V2JN-3GP
KCOL18
1
2
EC45 DY
SCD1U16V2ZY-2GP
2
EC20
SC100P50V2JN-3GP
KCOL17
1
2
2
3
4
5
6
7
8
9
10
11
12
13
14
15
17
ACES-CON15-GP
TPAD1
EC341
2
bom1
1
2
2
2
Title
2
2
Size
BUTTONs / KB / TOUCHPAD
Document Number
Orta
Date: Tuesday, December 12, 2006
A
USB_3+
USB_3-
13
20.K0228.012
DY
8
7
6
5
TP_LEFT
EC411
2
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
USBPP3
USBPN3
16
1
EC401
FP_ID
17
19
19
2
FP1
DY
FP_DETECT#
1
8
7
6
5
DY
TP_RIGHT
TP_SCROLL_RIGHT
TP_SCROLL_UP
TP_SCROLL_LEFT
TP_SCROLL_DOWN
12
11
10
9
8
7
6
5
4
3
2
2
SRC100P50V-2-GP
ERC6
KROW1
1
KROW3
2
KROW4
3
KROW5
4
DY
EC32
2
1
Morar_SB
1
SRN100J-3-GP
8
7
6
5
2
2
1
2
2
2
1
1
8
7
6
5
31
31
DY
8
7
6
5
SRC100P50V-2-GP
DY
14
RN26
8
7
6
5
SRC100P50V-2-GP
ERC7
KROW2
1
KROW6
2
KROW7
3
KROW8
4
SRC100P50V-2-GP
ERC3
KCOL11
1
KCOL12
2
KCOL13
3
KCOL9
4
EC29
DY
2
1
KROW8
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL18
25
C200
SCD1U16V2ZY-2GP
SC1U16V3ZY-GP
C233
SC1U16V3ZY-GP
1
RN22
EC30 DY
SCD1U16V2ZY-2GP
SRN10KJ-6-GP
SC47P50V2JN-3GP
Internal KeyBoard CONN
SRC100P50V-2-GP
ERC5
KCOL4
1
KCOL3
2
KCOL2
3
KCOL1
4
EC42 DY
SCD1U16V2ZY-2GP
SC47P50V2JN-3GP
1
SRC100P50V-2-GP
ERC4
1
2
3
4
KCOL10
KCOL6
KCOL7
KCOL5
8
7
6
5
ACES-CON12-4-GP
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
KB1
1
2
3
4
1
2
3
4
27
28
ETY-CON26-2-GP
KCOL14
KCOL15
KCOL16
KCOL8
SC1U16V3ZY-GP
5V_S0
DY
ERC2
20.K0127.026
2
1
5V_S0
EMI Bypass cap.
D
Rev
SA
Sheet
E
32
of
46
5
6
7
8
3D3V_AUX_S5
4
3
SPI_HOLD# 2
1
SRN10KJ-6-GP
RN51
31
SPICS#
31
SPIDI
SPICS#
SPIDI
SPI_WP#
SPI FLASH ROM
8M Bits 3D3V_AUX_S5
U46
1
2
3
4
CS#
DO
WP#
GND
VCC
HOLD#
CLK
DIO
8
7
6
5
GOLDEN FINGER FOR DEBUG BOARD
SPI_HOLD#
SPICLK
SPIDO
31
31
5V_S0
W25X80-VSSI-GP
16
16,23,28,31,43 LPC_RST#
16,31 LPC_LFRAME#
R447
1
PCLK_FWH
2
PCLK_FWH_2
0R2J-2-GP
3D3V_S0
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
EXT_FWH#
TOP VIEW
3D3V_S0
A14
(B2)
....
(B1)
....
A15
A2
(B14)
A1
(B15)
5V_S0
U39
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
LPC_RST#
LPC_LFRAME#
PCLK_FWH_2
3D3V_S0
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
EXT_FWH#
LPC_LAD3 16,31
LPC_LAD2 16,31
LPC_LAD1 16,31
LPC_LAD0 16,31
TP107
TPAD30
3D3V_S0
FOX-GF30
ZZ.GF030.XXX
(BOTTOM VIEW)
hexainf@hotmail.com
GRATIS - FOR FREE
Boot Device must have ID[3:0] = 0000
Has internal pull-down resistors
All may be left floated
FPET7 Elec. P3-46
DY
1
C631
2
2
C634
2
C664
SC10U6D3V5MX-3GP
1
1
3D3V_S0
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BIOS
Size
A3
Document Number
Rev
SA
Orta
Date: Tuesday, December 12, 2006
Sheet
33
of
46
5
4
3
2
1
R453
1
2
0R2J-2-GP
3D3V_S5
R454
3D3V_S5
14
1
2
0R2J-2-GP
43 1D8V_S3_PWRGD
D
14
42 3V/5V_POK
19,28,31,35,44,45
U61B
VRM_PWRGD
4
D
3
1D2V_S0_EN
1D2V_S0_EN 43,44
2
VCORE_EN 37
5
TSLCX08MTCX-GP
TSLCX08MTCX-GP
7
PM_SLP_S3#
6
7
44 2D5V_S0_PG
U61A
1
PM_SLP_S3#
3D3V_S5
3D3V_S5
C
14
PM_SLP_S3#
U59A
14
C
1
3
VTT_VRM_PG
U59B
4
2
6
7
7
35
37 VRM_PWRGD
NB_PWRGD 12
5
TSLCX08MTCX-GP
TSLCX08MTCX-GP
RUNPWROK
R437
1
2
0R2J-2-GP
43 1D2V_PWRGD
DY
NB_PWRGD
1
U60B
14
DY
U60A
2
NB_PWRGD_N
TSLCX14MTCX-1-GP
1
R435 2
270KR2F-GP
3
DY
4
3D3V_S5
10KR2J-3-GP
R233
2
B
1
TSLCX14MTCX-1-GP
C629
SC1U10V3ZY-6GP
?U54 CHOOSE CHEAPER
U59C
9
SB_PWRGD IS 35MS
AFTER NB_PWRGD
8
10
TSLCX08MTCX-GP
1
R425 2
330R2J-3-GP
SB_PWRGD 19
DY
C622
DUMMY-C3
2
7
NB_PWRGD
1
14
DY
2
1
7
B
3D3V_S5
DY
7
14
3D3V_S5
R434
1
2
0R2J-2-GP
<Core Design>
A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
POWERGOOD&ENABLES(1/2)
Size
A3
Document Number
Rev
Date: Tuesday, December 12, 2006
5
4
3
2
SA
Orta
Sheet
1
34
of
46
5
4
3
2
1
FAN1_VCC
*Layout* 15 mil
1
BAS16LT1G-GP
R303
10KR2J-3-GP
2
1
C407
SC2200P50V2KX-2GP
2
D18
1
3
1
C406
SC10U10V5ZY-1GP
2
2
1
5V_S0
C437
SCD1U16V2ZY-2GP
FAN1_VCC
FAN1
2
5
D
D
FAN1_FG1
3
2
1
1
*Layout* 15 mil
4
2
C438
SC1000P50V2JN-N1
ACES-CON3-1-GP
20.F0735.003
5V_S0
U5
ALERT#
THERM#
THERM_SET
RESET#
G792_DXN2
G792_DXN3
GAP-CLOSE
R261
49K9R2F-L-GP
G792SFUF-GP
G4
C17
DXP1:108 Degree
DXP2:H/W Setting
DXP3:88 Degree
C
2.System Sensor,
Put between CPU and NB.
3.T8 Sensor
H_THERMDA 6
Place near chip as close
as possible
2
RUNPWROK
C410
Q6
MMBT3904-3-GP
B
C185
SC470P50V3JN-2GP
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
G3
1
2
34
C
8
10
12
Q10
MMBT3904-3-GP
B
C441
SC470P50V3JN-2GP
C
SGND1
SGND2
SGND3
1
C
G792_DXP2
G792_DXP3
E
V_DEGREE
5
17
E
T8_HW_SHUT#
DGND
DGND
SMBD_G792 31
SMBC_G792 31
1
15
13
3
2
G792_32K
1
DXP1
DXP2
DXP3
2
ALERT#
7
9
11
1
4
14
16
18
19
2
6,17
C405
FAN1
FG1
CLK
SDA
SCL
NC#19
1
C408
VCC
DVCC
GAP-CLOSE
2
C12
6
20
1
R263
4K99R2F-L-GP
5V_G792_S0
2
C409
SC1U10V3ZY-6GP
2
2
1
200R2F-L-GP
SCD1U16V2ZY-2GP
2
1
2
1
1
SCD1U16V2ZY-2GP
2
1
*Layout* 30 mil
R260
SC4D7U10V5ZY-3GP
2
1
5V_S0
C13
SC2200P50V2KX-2GP
H_THERMDC 6
1.For CPU Sensor
Thermal Get Setting
BL3#
HW Thermal Throttling
5V_AUX_S5
DCBATOUT
T6
T7
Sencor 1
CPU DTS
98
100
Sencor 2
G792-1 CPU
98
100
Sencor 3
G792-2 System
78
83
B
DY
U6
5
VCC
HTH
GND
RESET#/RESET LTH
1
2
3
HTH
LTH
3D3V_S5
T8_HW_SHUT#
LOW3_OFF
G680LT1UF-GP
R18
6K04R2F-GP
DY
19,28,31,34,44,45
2
DY
14
1
4
R15
1MR2F-GP
2
DY
2
C506
SCD1U16V2ZY-2GP
1
1
B
3D3V_AUX_S5
G792_32K
10
RTC_CLK
7
TSLCX08MTCX-GP
1
2
1
1
R262
10R2J-2-GP
1
2
3
2
2
DY
3D3V_AUX_S5
U4
2
1
DY
1
2
3
C16
2
A
hexainf@hotmail.com
GRATIS - FOR FREE
RSMRST# 31
28,31,32 S5_ENABLE
1
2
R13
R19
174KR2F-GP
D8
BAW56PT-U
1
3
R17
0R2J-2-GP
BAT54PT-GP
DY D5
32KHZ
8
HTH
10KR2J-3-GP
U61C
9
PM_SLP_S3#
16
32K suspend clock output
SCD1U16V2ZY-2GP
A
B
GND
VCC
5
Y
4
DY
S5PWR_ENABLE 42
Wistron Corporation
D6
2
R12
1
<Core Design>
A
NC7S08M5X-NL-GP
2
T8_HW_SHUT#
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
3
Title
0R2J-2-GP
1
G792
CPU_THERMTRIP# 6
Size
A3
BAW56-7-F-GP
Document Number
Rev
Date: Tuesday, December 12, 2006
5
4
3
2
SA
Orta
Sheet
1
35
of
46
5
4
3
2
TI TPS51120
3D3V/5V
CPU_CORE
ISL6264CRZ
VID Setting
VID0
D
VID0(I / 3.3V)
VID1
Input Signal
Output Signal
VROK()
MAX8760_VRM
51120_EN2
VID1(I / 3.3V)
VID2
51120_EN1
VID2(I / 3.3V)
VID3
VID3(I / 3.3V)
VID4
VID4(I / 3.3V)
VID5
1
Output Signal
FOR
3.3V
D
PGOUT(OD / 5V)
FOR
5.0V
Pull High (3D3V)
Output Power
VCC_CORE_PWR(O)
VCC_CORE_S0(Imax=35A)
DCBATOUT_51120
VID5(I / 3.3V)
VIN
2D5V_S0
5V_AUX_S5
Input Signal
VCORE_EN
COREFB
COREFB#
3D3V_S0
INPUT
OUT
2D5V_S0
3D3V_AUX_S5
DCBATOUT_51120
Voltage Sense
C
Output Power
Input Power
EN (I / 3.3V)
APL5913
VIN
5V(O)
VSEN(I / Vcore)
5V_S5 (5.4A)
1D8V_S5
REG5V_IN(I / 5V)
C
RGND(I / Vcore)
3D3V(O)
3D3V_S5 (4A)
3D3V_S5
INPUT
OUT
1D2V_S5
Input Power
DCBATOUT
5V_S0
APL5332KAC-TRLGP
VCC(I)
VCC(I)
3D3V_S0
Adapter
VCC(I)
Input Signal
AD_OFF
Output Signal
(O)
(I)
Charger_ISL6255
AD_IN
CHARGE_OFF
Input Power
AD_JK
VCC(O)
VCC(I)
5V_AUX_S5
B
Output Power
AD+
BAT+SENSE
VCC(I)
BT_SCL_5
TI TPS51116
1.8V / 0.9V
Input Signal
PM_SLP_S5#
BT_SDA_5
ISL6268_1D2V
Output Signal
PGOOD(OD / 3.3V)
1D8V_S3_PG
1D2V_S0_EN
5V_S5
Input Power
DCBATOUT
5V_S5
A
FLASH_GPIO1
S5
S3
VCC(I)
VCC(I)
Output Power
VCC(O)
VCC(O)
BT_TH
DCBATOUT
1.8V_S3
Input Signal
FOR
SS_STBY1(I / 5V) 1.2V
VCC
Output Power
AC_IN
1D2V_PWR
Input Power
FLASH_GPIO2
Input Signal
Output Signal
THM (I / 3.3V)
BATT (I / 3.3V)
CHARGE_LED#
XTAL2/PB4 (O/5V)
XTAL1/PB3 (O/5V)
B
BL2#
SCL (IO / 5V)
SDA (IO / 5V)
Output Power
DCBATOUT
VCC (O)
RESET#/PB5 (I/5V)
PB0/MOSI/AIN0
BT+
VCC (O)
PB0/MOSI/AIN0
1D2V (6.5A)
AD+
Input Power
DCIN (I)
VIN
ISL6268_VGA_CORE
0.9V_S3
VGA_CORE_EN
5V_S5
DCBATOUT
Input Signal
FOR
SS_STBY1(I / 5V) 1.2V
VCC
A
Wistron Corporation
1D2V_PWR
Input Power
<Core Design>
Output Power
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
VGA_CORE_S0 (15A)
Title
Power Block Diagram
Size
A3
VIN
Document Number
Rev
Orta
Date: Tuesday, December 12, 2006
5
AD_IN
LDO (O / 5.4V)
CLS (I / 3.3V)
4
3
2
SA
Sheet
1
36
of
46
A
B
C
D
E
3D3V_S0
R94
1
1
10KR2J-3-GP
2
3
D
CPU_VCORE
VID=1.20V(25W)/1.15V(35W)
Iomax=21A(25W)/35A (35W)
OCP=40A~45A
S
2N7002-9-GP
Q4
34 VCORE_EN
PSI#
1
6
R90
1
4
2
G
6 CPU_PRESENT#
R89
ISL6264_VID5 1
R88
2
ISL6264_VID4 1
R87
2
ISL6264_VID3 1
R86
2
ISL6264_VID2 1
R85
2
ISL6264_VID1 1
R84
2
ISL6264_VID0 1
R83
2
VID5
10R2J-2-GP
VID4
10R2J-2-GP
VID3
10R2J-2-GP
VID[5..0]
6
4
VID2
10R2J-2-GP
VID1
10R2J-2-GP
C87
2
1 R77
2R3J-GP
ISL6264_PGOOD
R79
2
U24
3D3V_S0
1 R80
10KR2J-3-GP
GND_T
PGOOD
PSI_L
VR_ON
VID5
VID4
VID3
VID2
VID1
VID0
BOOT1
0R2J-2-GPDY
OCP:40A*1.25=50A
50A*2mV/A=10uA*Rocset
Rocset=10K
2
ISL6264_SET
ISL6264_RBIAS
ISL6264_OFS
ISL6264_SOFT
ISL6264_OCSET
ISL6264_VW
1 R78
2
150KR2F-L-GP
ISL6264_AGND
1 R76
2
DY 36K5R2F-GP
C85
1
2
ISL6264_AGND
ISL6264_AGND
SC220P50V2JN-3GP
1
2
R64
97K6R2F-GP
C76
1
2
SC1KP50V2KX-1GP1 R69
2
6K81R2F-1-GP
2
C74
1
ISL6264_COMP
2
ISL6264CRZ-T-GP
2
1
SC1KP50V2KX-1GP
ISL6264_DFB
ISL6264_VSEN
C66
2
ISL6264_DROOP
ISL6264_VDIFF
1
2
1KR2F-3-GP
ISL6264_VSUM
ISL6264_VIN
ISL6264_FB
R60
R59
30
29
28
27
26
25
24
23
22
21
5V_S0
C82
SC2D2U10V5KX-2GP
3
ISL6264_LG2 38
ISL6264_RTN
SC470P50V2KX-3GP
1
UGATE1
PHASE1
PGND1
LGATE1
PVCC
LGATE2
PGND2
PHASE2
UGATE2
BOOT2
ISL6264_VDD
ISL6264_ISEN2
ISL6264_ISEN1
C71
1
SET
RBIAS
OFS
SOFT
OCSET
VW
COMP
FB
VDIFF
VSEN
11
12
13
14
15
16
17
18
19
20
ISL6264_VCC_PRM
SCD047U10V2KX-2GP
1
2
3
4
5
6
7
8
9
10
RTN
DROOP
DFB
VO
VSUM
VIN
GND
VDD
ISEN2
ISEN1
R75
1
2
10KR2F-2-GP
ISL6264_UG1 38
ISL6264_PH1 38
ISL6264_LG1 38
2
1
1
ISL6264_AGND
2
41
40
39
38
37
36
35
34
33
32
31
Positive offset:
(1.2V/R7)*R11
2ISL6264_BOOT1+ 1
SCD1U25V3KX-GP
ISL6264_AGND
RBIAS=1.55V
Inner 3K ohm
VID0
10R2J-2-GP
ISL6264_BOOT1
VRM_PWRGD
G25
2
ISL6264_PSI#
ISL6264_VR_ON
34
2
1
SET "H"-->Audio filter
GAP-CLOSE
1
1KR2J-1-GP
R91
10KR2J-3-GP
1KR2J-1-GP
ISL6264_PH2 38
ISL6264_UG2 38
C72
ISL6264_BOOT2
1 R63
2R3J-GP
2
ISL6264_BOOT2+
1
2
SCD1U25V3KX-GP
R52
3K65R2F-1-GP
R46
0R2J-2-GP
1
DCBATOUT_6264
ISL6264_ISEN2
C44
ISL6264_VCC_PRM
C43
SCD22U10V2KX-1GP
1
ISL6264_VSUM
2
ISL6264_ISEN1+ 38
ISL6264_ISEN1- 38
2
1 R29
2
10KR3F-L-GP
ISL6264_AGND
ISL6264_ISEN1
SCD22U16V3KX-2-GP
C45
1
2
2
2
2
C58
SCD01U25V2KX-3GP
1 R56
2
3K65R3F-GP
R44
1
2
1R2F-GP
R40
1
2
10KR2F-2-GP
R45
1KR2F-3-GP
1
R47
10R2J-2-GP
1
2
G22
2
1 R51
2
10R3J-3-GP
2
C50
ISL6264_AGND
2
GAP-CLOSE
1
ISL6264_AGND
2
1
COREFB#
1
6
COREFB
ISL6264_AGND
G23
2
1
6
GAP-CLOSE
1
SC180P50V2JN-1GP
Parallel
2
2
2
1
1
SCD068U16V2KX-GP
C51
SC1KP50V2KX-1GP
1 R49
2
10KR3F-L-GP
20061109
2
1
2
C52
SC1KP50V2KX-1GP
2
C54
SCD22U10V3KX-2GP
C64
1
5V_S0
1 R50
2
10R3J-3-GP
SC1U10V3KX-3GP
2
SCD22U10V3KX-2GP
C55
C56
1
1
255R2F-L-GP
1
3
TABLE 1. VOLTAGE IDENTIFICATION CODES
VID5 VID4 VID3 VID2 VID1 VID0 DAC
0
0
0
0
0
0
1.550
0
0
0
0
0
1
1.525
0
0
0
0
1
0
1.500
0
0
0
0
1
1
1.475
0
0
0
1
0
0
1.450
0
0
0
1
0
1
1.425
0
0
0
1
1
0
1.400
0
0
0
1
1
1
1.375
0
0
1
0
0
0
1.350
0
0
1
0
0
1
1.325
0
0
1
0
1
0
1.300
0
0
1
0
1
1
1.275
0
0
1
1
0
0
1.250
0
0
1
1
0
1
1.225
0
0
1
1
1
0
1.200
0
0
1
1
1
1
1.175
0
1
0
0
0
0
1.150
0
1
0
0
0
1
1.125
0
1
0
0
1
0
1.100
0
1
0
0
1
1
1.075
0
1
0
1
0
0
1.050
0
1
0
1
0
1
1.025
0
1
0
1
1
0
1.000
0
1
0
1
1
1
0.975
0
1
1
0
0
0
0.950
0
1
1
0
0
1
0.925
0
1
1
0
1
0
0.900
0
1
1
0
1
1
0.875
0
1
1
1
0
0
0.850
0
1
1
1
0
1
0.825
0
1
1
1
1
0
0.800
0
1
1
1
1
1
0.775
1
0
0
0
0
0
0.7625
1
0
0
0
0
1
0.75
1
0
0
0
1
0
0.7375
1
0
0
0
1
1
0.725
1
0
0
1
0
0
0.7125
1
0
0
1
0
1
0.7
1
1
1
1
1
1
0.375
2
3D3V_S0
1 R27
2
3K65R3F-GP
ISL6264_ISEN2+ 38
1 R34
1R2F-GP
ISL6264_ISEN2- 38
2
1 R37
2
10KR2F-2-GP
SCD047U10V2KX-2GP
ISL6264_AGND
1 R35
2
11KR2F-L-GP
R32
1 R286
2 1
2
2K61R3F-GP
NTC-10K-9-GP
Parallel
ISL6264_RTN- 38
ISL6264_VSEN+ 38
Place close to L30
1
hexainf@hotmail.com
GRATIS - FOR FREE
1
G21
1
2
GAP-CLOSE-PWR-2U
ISL6264_AGND
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU Vcore Power_1
Size
A2
Date:
A
B
C
D
Document Number
Rev
SA
Orta
Tuesday, December 12, 2006
E
Sheet
37
of
46
A
B
C
D
E
20061109
DCBATOUT
DCBATOUT_6264
20061109
G15
1
DCBATOUT_6264
G
S
S
S
G
S
S
S
ISL6264_PH1
4
3
2
1
4
3
2
1
37
4
3
2
1
2
1
1
C73
1
C36
SCD1U50V3KX-GP
2
2
FDS6298-GP
U16
C41
SC10U25V6KX-1GP
FDS6298-GP
U44
S
S
S
G
ISL6264_UG1
DY
C33
SC10U25V6KX-1GP
1
D
D
D
D
D
D
D
D
DY
Overlap with one of H/S MOSFET
37
5
6
7
8
5
6
7
8
5
6
7
8
D
D
D
D
U17
AOL1426-GP
GAP-OPEN-PWR
G12
1
2
GAP-OPEN-PWR
G11
1
2
VCC_CORE_S0
CYNTEC 1004
RDC= 1.05 +-5%
Idc=30A , Isat = 60AVCC_CORE_S0
GAP-OPEN-PWR
G10
1
2
GAP-OPEN-PWR
G9
1
2
L10
1
2
IND-D36UH-9-GP
GAP-OPEN-PWR
G8
1
2
D
D
D
D
D
D
D
D
U26
R290
0R0402-PAD
1
AO4456-GP
3
2
S
S
S
G
S
S
S
G
4
3
2
1
3
2
R289
0R0402-PAD
4
3
2
1
GAP-OPEN-PWR
1
5
6
7
8
5
6
7
8
20061109
U21
AO4456-GP
4
GAP-OPEN-PWR
G13
1
2
SC10U25V6KX-1GP
2
4
20061113
2
GAP-OPEN-PWR
G14
1
2
ISL6264_ISEN1- 37
37
ISL6264_ISEN1+ 37
ISL6264_LG1
VCC_CORE_S0
20061109
1
1
1
2
2
SE330U2VDM-L-GP
1
1
2
SE330U2VDM-L-GP
R97
0R0402-PAD
2
R96
0R0402-PAD
37 ISL6264_VSEN+
1
R288
0R0402-PAD
Parallel
2
R287
0R0402-PAD
2
U25
AO4456-GP
1
5
6
7
8
S
S
S
G
S
S
S
G
4
3
2
1
D
D
D
D
D
D
D
D
U20
AO4456-GP
DY
4
3
2
1
5
6
7
8
20061109
TC8
DY
37 ISL6264_RTN-
L11
1
2
IND-D36UH-9-GP
37 ISL6264_PH2
TC12
Panasonic 330uF / ESR=9mohm
VCC_CORE_S0
37 ISL6264_UG2
2
SE330U2VDM-L-GP
2
2
TC1
SE330U2VDM-L-GP
1
TC9
SE330U2VDM-L-GP
2
2
2
TC11
2
G
S
S
S
4
3
2
1
1
2
D
D
D
D
D
D
D
D
G
S
S
S
4
3
2
1
1
1
5
6
7
8
5
6
7
8
5
6
7
8
4
3
2
1
FDS6298-GP
U19
C40
SC10U25V6KX-1GP
DY
C35
SC10U25V6KX-1GP
S
S
S
G
FDS6298-GP
U45
C32
SC10U25V6KX-1GP
DY
Overlap with one of H/S MOSFET
2
SCD1U50V3KX-GP
D
D
D
D
U15
AOL1426-GP
C69
SE330U2VDM-L-GP
2
TC2
20061113
1
20061109
1
DCBATOUT_6264
1
Close to Choke
ISL6264_ISEN2- 37
37
ISL6264_ISEN2+ 37
ISL6264_LG2
Close to Choke
CYNTEC 1004
RDC= 1.05 +-5% , Idc=30A , Isat = 60A
1
<Core Design>
1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU Vcore Power_2
Size
A3
Document Number
Rev
A
B
C
D
SA
Orta
Date: Tuesday, December 12, 2006
Sheet
E
38
of
46
5
4
3
2
1
Aux Power
D
D
3D3V_AUX_S5
1
I max = 120 mA
G913CF-GP
74.00913.A3F
2nd:74.09198.07F
(RT9198-33PBG)
1 2
G913_SET
R354
22KR2F-GP R2
1
5
4
R355
36K5R3F-2-GP
BC3
SC22P50V2JN-4GP
R1
BC1
Vout = 1.25*(1+ R1/R2)
2
SET
OUT
2
BC2
SHDN#
GND
IN
SC1U16V3ZY-GP
SC1U16V3ZY-GP
C
1
1
2
3
2
U51
2
5V_AUX_S5
1
3D3V_AUX_S5
C
B
A
hexainf@hotmail.com
GRATIS - FOR FREE
B
<Core Design>
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
3D3V_AUX
Size
A3
Document Number
Rev
Orta
Date: Tuesday, December 12, 2006
SA
Sheet
39
of
46
DY
D2
2
Layout Trace 200mil
1
Layout Trace200mil
SSM34PT
AD+
DCBATOUT
Layout Trace 300mil
AO4433-GP
U1
EC9
SCD1U50V3ZY-GP
DY
2
2
C4
SC1U50V5ZY-1-GP
2
P2003EVG-GP
2nd:A04433(84.04433.A37)
G2
GAP-CLOSE
D
D
D
D
8
7
6
5
BT+
U9
For EMI
EC11
ID = 10A @
VGS = 10V
1
GAP-CLOSE
1
DY
G1
S
S
S
G
ISL6255_CSON
DY
SCD1U50V3ZY-GP
1
2
3
4
1
1
1
1
2
3
4
2R4
D02R3721F-GP-U
2
AD+_TO_SYS
2
SCD1U50V3ZY-GP
2
S
S
S
G
1
1
8
7
6
5
EC1
DY
D
D
D
D
ISL6255_CSOP_1
R21
226R3F-GP
ISL6255_SGATE
VCOMP
DY
ICOMP
3S
Float
2S
1
C20
SC10U35V0ZY-GP
2
24K3R3F-GP
1
R41
1
1
1
1
1
1
2
2
1
C21
SC10U35V0ZY-GP
DY
R280 1
100KR2J-1-GP
C422
CHG_I_PWM 31
VADJ
Cell voltage
VREF
4.41V/cell
Float
4.20V/cell
GND
3.99V/cell
C65
ISOURCE_MAX = (((ACLIM/VREF)*0.05+0.05)/Rsense)
Adaptor is 90W/19V : I_LIMIT = 4.02A ( 85% )
2
1
2
31
1
1
1
2
1
2
2
5
6
7
8
DY
SC10U10V5KX-2GP
2
1
2
1
2
C27
SC2700P50V3KX-1GP
1
SC10U10V5KX-2GP
2
1
1
2
DY
<Core Design>
AD_IA
C423
Wistron Corporation
DY
R42
2
G
2
C418
R282
100R2F-L1-GP-U
SCD1U16V2ZY-2GP
GND
CHG_3S_4S#
S
31
DY
2
Q7
4S
2N7002-11-GP
1
2
VDD
2
1
2
R276
DY 100KR2J-1-GP
D
Operate Mode
1
2N7002-11-GP
D
1
R278
150KR2J-GP
DY
CELLS
ISL6255_CELLS
S
G
CHG_ON#
C421
SC100P50V2JN-3GP
31
2
1
R62
100KR2J-1-GP
R283
10KR2J-3-GP SCD01U16V2KX-3GP
C424
3D3V_AUX_S5
Q8
ISL6255_VCOMP
100KR2J-1-GP
C57
ISL6255_VDD
R61
R277
SC6800P25V2KX-1GP
2
ISL6255_EN
2
C411
CHG_V_PWM 31
ISL6255_VDD
100KR2J-1-GP
1
DY
100KR2J-1-GP
DY
2
Near ISL6255
Pin 26
R281 1
2
ISL6255_CHLIM
R53
R284
10KR3F-L-GP
100KR3F-GP
7
6
5
4
3
DY
Iomax=9.6A
Qg=18~nC,
Rdson=13.5~16.5mohm
ISL6255_ACLIM
1
CELLS
EN
DCSET
VDD
DCIN
2
1
1
C60
2
2
DCPRN
ACSET
1
R68
15K4R3-GP
ISL6255_VADJ
C415
C48
SC1000P100V3KX-GP
SC10U25V0KX-3GP
9
8
2
ICM
C420
SC10U25V0KX-3GP
ACPRN
DY
2
27
R54
R55
73K2R3F-1-GP
14KR3F-GP
Layout Trace 250mil
2
10
IND-10UH-110-GP
SC10U25V0KX-3GP
VREF
2
CSON
4
3
2
1
26
2
11
ISL6255_DCIN
ISL6255_VDD
1
CHLIM
1
ACLIM
CSOP
S
S
S
G
CSIN
25
BT+
2
D02R3721F-GP-U
1
ISL6255_VREF
U11
FDS8884-GP
R279
1
2
Near ISL6255 Pin 13
ISL6255_LGATE SC1U16V3ZY-GP
CHG_PWR-3
SCD1U50V3ZY-GP
13
2
R39
2R3J-2-GP
2
14
12
28
1
3
GND
VADJ
1
G51
GAP-CLOSE
1
15
PGND
17
18
16
LGATE
VDDP
BOOT
20
19
UGATE
21
CSIP
1
2ISL6255_VDD
2R3J-2-GP
C26
ISL6255_VDDP
1
2
24
SC1U16V3ZY-GP
ACSET Threshold 1.27V typ.
ACSET > 1.29V Max. --> AC
DETECT
SGATE
23
R267
ISL6255HAZ-T-GP
SCD1U50V3ZY-GP
C59
1
2
ISL6255_ACSET
R285
200KR3F-GP
22
PHASE
BGATE
2
DY
2
1
L8
CHG_PWR-2
C419
1
G52
GAP-CLOSE
D
D
D
D
SC10U10V5ZY-1GP
AD+
1
2
0R2J-2-GP
4
3
2
1
2
1
D22
BAT54-7-F-GP
ISL6255_ACPRN#
2
AC_IN#
DY
2
S
2R3J-2-GP
U14
31
2
1
DY
2ISL6255_BOOT_1
1
R272
100KR2J-1-GP
AC_IN# 1
R273
5
6
7
8
10KR2F-2-GP
R275
U10
C416
FDS8884-GP
SCD1U50V3ZY-GP
C28
SCD1U50V3ZY-GP
1
R271
ISL6255_UGATE
2
2
C414
SC1U50V5ZY-1-GP
ISL6255_CSIP
1
Q9
G
Iomax=9.6A
Qg=18~nC,
Rdson=13.5~16.5mohm
DCBATOUT
S
S
S
G
ISL6255_CSOP
ISL6255_CSIN
ISL6255_VDD
ISL6255_BGATE
SCD1U50V3ZY-GP
C25
1
2
D
D
D
D
5V_AUX_S5
D
BSS84LT1G-GP
2
2
R270
2R3J-2-GP
2
1
1
ISL6255_CSIN_1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
130KR2F-GP
Title
CHARGER ISL6225
Size
A3
Document Number
Rev
SA
Orta
Date: Tuesday, December 12, 2006
Sheet
40
of
46
A
B
C
D
E
Adaptor in to generate DCBATOUT
DY
D1
PZM24NB1
2
3
1
AD+
DC1
4
4
K
1
2
3
4
D3
P4SSMJ24PT-GP
200KR2F-L-GP
B
1
2
E
C
2nd:A04433(84.04433.A37)
R2
100KR2F-L1-GP
C
R1
R2
1
C2
SCD1U50V3ZY-GP
2
B
ID = -10A/70deg
Rds(ON) = 24mohm
SO-8
C1
Q1
AD_OFF
Layout Trace 200mil
8
7
6
5
P2003EVG-GP
PDTA124EU-1-GP
Q2
31
D
D
D
D
1
DC-JACK115-GP
22.10037.C51
AD+_2
SCD47U50V5ZY
A
2
EC2
SCD1U50V3ZY-GP
2
1
2
R3
R1
5
6
MH1
DY
R2
3
C3
SCD1U50V3ZY-GP
1
1
2
U2
S
S
S
G
1
Layout Trace 200mil
AD+_JK
1
2
4
E
PDTC124EU-1-GP
R1
1KR2J-1-GP
3
2
3
2
1
2
1
D21
BAV99-5-GP
D20
BAV99-5-GP
D19
BAV99-5-GP
DY
DY
DY
BAT1
3
8
1
2
3
R269
470KR2F-GP
BATTERY CONNECTOR
3
1
3D3V_AUX_S5
2
1
3D3V_AUX_S5
31
31
31
1
R266
1
R265
BAT_SCL
BAT_SDA
BAT_IN#
2
3
4
5
6
7
9
BATA_SCL_1
BATA_SDA_1
2
227R3F-GP
27R3F-GP
2
1
DY
2
1
DY
2
SYN-CON7-21-GP
20.80862.007
<Variant Name>
1
hexainf@hotmail.com
GRATIS - FOR FREE
2
1
2
1
1
2
DY
DY EC84
EC85
SC100P50V2JN-3GP
EC8
SC1000P50V3JN-GP
EC7
SCD1U50V3ZY-GP
EC83
SC100P50V2JN-3GP
DY
SC1000P50V3JN-GP
EC81
SCD1U50V3ZY-GP
DY
2
Layout Trace 320mil
1
BT+
2
1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
AD/BATT CONN
Size
A3
Document Number
Rev
A
B
C
D
SA
Orta
Date: Tuesday, December 12, 2006
Sheet
E
41
of
46
5
4
DCBATOUT
3
2
1
DCBATOUT_6236
G32
2
DCBATOUT_6236
1
GAP-OPEN-PWR
G30
1
2
GAP-OPEN-PWR
G84
1
2
S
S
S
G
Id=9.3A
Qg=9.8~nC,
Rdson=19.6~24mohm
C600
SCD1U25V3KX-GP
1
2
3
4
5V_AUX_S5
1
G86
1
2
SCD1U50V3ZY-GP
1
2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
1
2
1
DY
TC18
Id=9.3A
Qg=9.8~nC,
Rdson=19.6~24mohm
TC19
2
GAP-CLOSE
2
C598
SC1U10V3KX-3GP
1
U36
AO4422-1-GP
84.04422.B37
1
NEC 220uF
Nippon
6D3V, V Size Chemi-Con
ESR=25mohm
Al Cap.
6D3V, F61
ESR=10mohm.
6236_LGATE1
Nippon
NEC 220uF
Chemi-Con
6D3V, V Size
Al Cap.
ESR=25mohm
6D3V, F61
ESR=10mohm.
20061109
3D3V_S5
G94
3D3V_PWR
2
IND-2D2UH-47-GP
Rds(on)(max):
20m ohms
R394
0R3-0-U-GP
6236_BOOT2 1
2
6236_LGATE2
Iomax=6A
OCP>12A
Netswap 1004
DCR=8.56mohm
Iheat=11.1A, Isat=16.5A
2
5
6
7
8
6236_SKIP# 1 R399
2
3V/5V_POK
0R2J-2-GP
3V/5V_EN
6236_UGATE2
6236_PHASE2
C341
SE220U6D3VM-7GP
74.06236.073
ISL6236IRZA-T-GP
R390
0R3-0-U-GP
1
26236_BOOT1
32
31
30
29
28
27
26
25
1
C338
ST220U6D3VDM-15GP
U33
AO4422-1-GP
84.04422.B37
6236_R12
D
D
D
D
8
7
6
5
2
1
R386
0R2J-2-GP
C589
SCD1U25V3KX-GP
REFIN2
ILIM2
OUT2
SKIP#
POK2
EN2
UGATE2
PHASE2
R401
422KR3F-GP
6236_ILIM2 1
2
4
3
2
1
LDOREFIN
LDO
VIN
VREF3
EN_LDO
VCC
TON
REF
BYP
OUT1
FB1
ILIM1
POK1
EN1
UGATE1
PHASE1
L25
5V_VCC
1
9
10
11
12
13
14
15
16
GND
1
R388
0R2J-2-GP
AO4468-GP
84.04468.037
4
3
2
1
8
7
6
5
4
3
2
1
Id=9.2A
Qg=9~12nC,
Rdson=17.4~22mohm
6236_R22
6236_FB1
6236_ILIM1
1 R387
2
412KR3F-GP
3V/5V_POK
3V/5V_EN
6236_UGATE1
6236_PHASE1
2
1
U35
2
C603
SCD1U10V2MX-3GP
2
33
C608
2
5
6
7
8
2
6236_TON
6236_REF
2
1
1
6236_VREF3
2
1
BOOT1
LGATE1
PVCC
SECFB
GND
PGND
LGATE2
BOOT2
1
DY
U56
Id=9.2A
Qg=9~12nC,
Rdson=17.4~22mohm
IND-3D3UH-55-GP
2
1
2
TC15
ST220U6D3VDM-15GP
1
2
SE220U6D3VM-7GP
GAP-OPEN-PWR
G82
1
2
DY
R393
39KR3F-GP
C599
SC1U10V3KX-3GP
S
S
S
G
GAP-OPEN-PWR
G81
1
2
GAP-OPEN-PWR
G83
1
2
1
R398
0R2J-2-GP
1
2
D
D
D
D
5V_PWR
TC14
1
2
U30
AO4468-GP
84.04468.037
L22
G79
LDO_EN
1
8
7
6
5
D
D
D
D
S
S
S
G
1
2
3
4
1
2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
2
Cyntec
DCR=11~13.2mohm
Irms=11A,Isat=14.5A
5V_S5
B
C578
R396
0R2J-2-GP
DY
S
S
S
G
SCD1U50V3ZY-GP
1
2
C577
C592
SC4D7U10V5KX-1GP
DCBATOUT_6236
D
D
D
D
C284
1
R392
100KR2F-L1-GP
Iomax=5A
OCP>10A
GAP-OPEN-PWR
G80
1
2
2
2
1
DCBATOUT_6236
GAP-OPEN-PWR
2
5V_AUX_S5
2
C591
SCD1U25V3KX-GP
DCBATOUT_6236
GAP-OPEN-PWR
G42
1
2
1
5V_VCC
6236_VIN
GAP-OPEN-PWR
G43
1
2
GAP-OPEN-PWR
G78
1
2
D
C597
SCD01U50V2KX-1GP
1
GAP-OPEN-PWR
G44
1
2
C
1
R391
0R2J-2-GP
GAP-OPEN-PWR
G45
1
2
D
17
18
19
20
21
22
23
24
1
GAP-OPEN-PWR
G31
1
2
2
GAP-OPEN-PWR
G93
1
2
C
GAP-OPEN-PWR
G92
1
2
GAP-OPEN-PWR
G91
1
2
GAP-OPEN-PWR
G90
1
2
GAP-OPEN-PWR
G89
1
2
GAP-OPEN-PWR
G88
1
2
GAP-OPEN-PWR
G87
1
2
GAP-OPEN-PWR
B
GAP-OPEN-PWR
G85
1
2
GAP-OPEN-PWR
R403
1
3V/5V_EN
2
2KR2F-3-GP
3D3V_PWR
R400
200KR2F-L-GP
DY
R402
100KR2J-1-GP
If LIR=0.35
△I=5x0.35=1.75A
Vin=20V;Fsw=500K
L~2.2uH
2
2
If LIR=0.35
△I=5x0.35=1.75A
Vin=20V;Fsw=400K
L~3.3uH
Maximum current:5A
1
35 S5PWR_ENABLE
1
Maximum current:5A
OCP:5x2=10A
3V/5V_POK 34
Iocp=10-(1.75/2)~9.125A
Vth=9.125A*24mOhm=219mV
R(Ilim)=(219mV*10)/5uA
~438K--->442K
OCP:5x2=10A
Iocp=10-(1.75/2)~9.125A
Vth=9.125A*24mOhm=219mV
R(Ilim)=(219mV*10)/5uA
~438K--->442K
<Core Design>
A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ISL6236_5V_3D3V
Size
A3
Document Number
Date: Tuesday, December 12, 2006
5
4
3
2
Rev
SA
Orta
Sheet
1
42
of
46
A
B
C
D
E
DCBATOUT_51124
1D8V_PWR
1D8V_S3
G72
1
L7
1
51124_LL2
51124_DRVL1
A
B
GND
1
VCC
5
2
1
2
3
Y
4
1
C38
16,23,28,31,33 LPC_RST#
19
PWM_CTRL
hexainf@hotmail.com
GRATIS - FOR FREE
283k/CH1
346k/CH2
1
2
3
346k/CH1
423k/CH2
OE
A
GND
1
2
2
2
SE390U2D5VM-GP
1
1
1
2
1
GAP-OPEN-PWR
G62
1
2
1
1
2
2
2
1
Kemet
Nippon
220uF/ 4V
Chemi-Con
ESR=15mohm Al Cap.
390uF/2D5V
ESR=15mohm
GAP-OPEN-PWR
<Core Design>
VCC
5
Y
4
L4
1
VX
Wistron Corporation
2
IND-1D8UH-3-GP
NC7SZ126P5X-GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
C34
B
1D2V(VCC_NB)
1.0
1.2
C
2
STRP_DATA
0
1
A
GAP-OPEN-PWR
G61
1
2
3D3V_S0
51124_GND
D
SCD1U16V2ZY-2GP
230k/CH1
283k/CH2
51124_GND
DY
GAP-OPEN-PWR
G60
1
2
1
V5FILT
12 STRP_DATA
TONSEL
R26
4K32R2F-GP
U7
2
OPEN
RX
R22
0R2J-2-GP
NC7SZ08M5X-NL-GP
GND
2
3D3V_S0
R31
U8
1
1
R25
1K69R2F-2-GP
110KR2J-3-GP
2
Vtrip(mV)=Rtrip(Kohm)*10(uA)
Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin))
51124_VFB2
51124_DRVL2
DYC425
2
GAP-OPEN-PWR
G59
1
2
TC4
SE390U2D5VM-GP
51124_VBST2
1
2 51124_LL2_1 1
2 C62
0R3-0-U-GP
SCD1U50V3ZY-GP
SCD1U16V2ZY-2GP
1
R58
1
51124_GND
51124_LL2
R28
1KR2F-3-GP
DY TC5
ST220U4VDM-L5-GP
GAP-CLOSE-PWR
DY
SCD1U50V3ZY-GP
Id=9.6A
Qg=18~nC,
Rdson=13.5~16.5mohm
2
S
S
S
G
SCD1U50V3ZY-GP
1
C42
2
51124_VBST1
Netswap
DCR=7.5m ohm
Irms=12A,Isat=20A
1
2C61
IND-1D5UH-18-GP
4
3
2
1
1
GAP-OPEN-PWR
G58
1
2
Voutsetting=1.2047V
2
2
G24
2 51124_LL1_1
0R3-0-U-GP
GAP-OPEN-PWR
G57
1
2
1D2V_PWR
1
2
U12
AO4706-GP
51124_GND
GAP-OPEN-PWR
G56
1
2
1D2V Iomax=8A
OCP>16A
2
51124_DRVH2
GAP-OPEN-PWR
G55
1
2
C29
SCD1U50V3ZY-GP
1
51124_DRVL2
20061109
C413
2
51124_GND
C22
SC10U25V6KX-1GP
U13
AO4468-GP
Id=9.2A
Qg=9~12nC,
Rdson=17.4~22mohm
2
20061113
2
GAP-OPEN-PWR
G54
1
2
DCBATOUT_51124
SC33P50V3JN-GP
51124_GND
1
R57
51124_V5FILT
D
D
D
D
20061109
51124_LL1
2
5
6
7
8
R66
R70
10KR3F-L-GP
20KR3F-GP
1
2
2
1
DY
DY
R74 10KR2J-3-GP
0R2J-2-GP
SC10U25V6KX-1GP
18
13
25
3
1
1
PGND1
PGND2
GND
GND
51124_DRVH1
51124_DRVH2
1
2
DRVL1
DRVL2
21
10
19
12
VBST1
VBST2
51124_TRIP1
51124_TRIP2
51124_TONSEL
4
DRVH1
DRVH2
1D2V_S0
G53
1
1
17
14
TPS51124RGER-GPU1
OCP
22
9
TRIP1
TRIP2
C53
SCD01U25V2KX-3GP
DY
1D2V_PWR
R67
5
6
7
8
LL1
LL2
GAP-OPEN-PWR
Vout=0.758V*(R1+R2)/R2
TONSEL
1
20
11
GAP-OPEN-PWR
G63
1
2
3
S
S
S
G
2
C46
2
1
2
DY
SCD01U25V2KX-3GP
20061113
EN1
EN2
GAP-OPEN-PWR
G64
1
2
1D2V_PWRGD 34
D
D
D
D
51124_LL1
51124_LL2
23
8
GAP-OPEN-PWR
G65
1
2
Nippon
Chemi-Con
Al Cap.
390uF/2D5V
ESR=15mohm
Kemet
220uF/ 4V
ESR=15mohm
51124_GND
4
3
2
1
51124_EN1_1
51124_EN2_1
2
0R2J-2-GP
2
0R2J-2-GP
V5FILT
V5IN
2
1
R48 1
R43
19,31,44 PM_SLP_S5#
34,44 1D2V_S0_EN
15
16
GAP-OPEN-PWR
G66
1
2
TC6
GAP-CLOSE
2
51124_V5FILT
1D8V_S3_PWRGD 34
G20
GAP-CLOSE
1
2
PGOOD1
PGOOD2
51124_GND
VO1
VO2
VFB1
VFB2
2
5
U18
1
6
1
2
C75
SC1U10V3ZY-6GP
DY
DY
R30
47KR3F-GP
24
7
51124_PGD1
51124_PGD2
1
2
2
1D2V_PWR
1D8V_PWR
51124_VFB2
51124_VFB1
C427
TC7
ST220U4VDM-L5-GP
2
51124_DRVL1
10KR2J-3-GP
P/H CPU CORE PAGE
G16
1
2
R65
3D3R3J-L-GP
1
C81
SC4D7U10V5ZY-3GP
SC10U25V6KX-1GP
51124_VFB1
5V_S5
3
DY
SCD1U50V3ZY-GP
R38
2
R36
10KR2J-3-GP
C37
R33
64K9R2F-1-GP
1
1
1
Id=13.2A
Qg=27nC,
Rdson=6.8~8.2mohm
DY
GAP-OPEN-PWR
G67
1
2
2
S
S
S
G
GAP-OPEN-PWR
1D8V_PWR
Voutsetting=1.8046V
20061109
4
GAP-OPEN-PWR
G68
1
2
IND-1D5UH-18-GP
5
6
7
8
U22
AO4706-GP
3D3V_S5
GAP-OPEN-PWR
G69
1
2
1D8V Iomax=8A
OCP>16A
SC33P50V3JN-GP
3D3V_S5
D
D
D
D
GAP-OPEN-PWR
G7
1
2
1
L9
1
20061109
GAP-OPEN-PWR
G70
1
2
Tai-Tech
DCR=3.5m ohm
Irms=20A,Isat=28A
51124_LL1
GAP-OPEN-PWR
G6
1
2
GAP-OPEN-PWR
G71
1
2
C67
SCD1U50V3ZY-GP
2
GAP-OPEN-PWR
G19
1
2
2
2
51124_DRVH1
C47
1
GAP-OPEN-PWR
G18
1
2
4
S
S
S
G
Id=9.6A
Qg=18~nC,
Rdson=13.5~16.5mohm
4
3
2
1
2
GAP-OPEN-PWR
G17
1
2
C63
SC10U25V6KX-1GP
U23
AO4406-1-GP
4
3
2
1
1
D
D
D
D
G5
1
20061109
DCBATOUT_51124
5
6
7
8
DCBATOUT
2
Title
TPS51124_1D8V_1D2V
Size
A3
Document Number
Date: Tuesday, December 12, 2006
Rev
SA
Orta
Sheet
43
E
of
46
5
4
0D9V_S3
Iomax=1.7A
2
1
1D5V_S0
Iomax=0.7A
1D8V_S3
3D3V_S5
OCP=3A
1
C332
DY
SC10U10V5ZY-1GP
C331
SC10U10V5ZY-1GP
2
2
C321
SC1U10V3ZY-6GP
D
GAP-OPEN-PWR
G48
1
2
3
4
FB
2
GAP-OPEN-PWR
G50
1
2
1D5V_S0
GAP-OPEN-PWR
C347
2
R220
26K7R3F-GP
SO-8-P
1
APL5915-KAI-TRL-GP
5913_FB
2
PM_SLP_S3#
1
19,28,31,34,35,45
GND
1
GAP-OPEN-PWR
VOUT
VOUT
2
R218
30K1R3F-GP
C342
C352
1
EN
5
9
TC3
ST100U4VBM-10-GP
DY
2
1
VIN
VIN
SC10U6D3V5MX-3GP
POK
5913_EN_U748
2
0R2J-2-GP
1
7
R188
2
1
OCP>=1.8A
1D5V_LDO
SC10U6D3V5MX-3GP
1
GAP-OPEN-PWR
G49
1
2
Vo(cal.)=1.5096V
1
TPAD28
25913_POK_U74
0R2J-2-GP
2
GAP-OPEN-PWR
G29
1
2
U34
R189
1
TP44
6
GAP-OPEN-PWR
G28
1
2
SC82P50V2JN-3GP
1
2
2
2
C229
SC10U10V5ZY-1GP
1
C221
SC10U10V5ZY-1GP
1
TPS51100DGQ-1-GP
11
DDR_VREF_S3
C525
SCD1U16V2ZY-2GP
GAP-OPEN-PWR
G26
1
2
1
2
3
4
5
GND
1
R356
1
R357
19,31,43 PM_SLP_S5#
VIN
VDDQSNS
S5
VLDOIN
GND
VTT
S3
PGND
VTTREF VTTSNS
2
GAP-OPEN-PWR
G47
1
2
2
10
51100_S5 9
2
0R2J-2-GP
8
51100_S3
2
7
0R2J-2-GP
6
G46
1
R190
10KR2J-3-GP
2
D
VCNTL
1
1D8V_S3
2
G27
U28
5V_S5
1
0D9V_S3
1
DDR_VREF_PWR
1
2
2
C252
SC10U10V5ZY-1GP C205
SC10U10V5ZY-1GP
1
1
5V_S5
3
KEMET
100uF, 4V, B2 Size
Iripple=1.1A, ESR=70moh
Vo=0.8*(1+(R1/R2))
C
C
5V_S5
20061011PM
1
1D8V_S3
20061011PM
1
SO-8-P
2
R320
470R3F-GP
APL5913-KAC-1-GP
SC10U10V5ZY-1GP
1
C584
DY
2
1
R380
78K7R3F-GP
C296
GAP-OPEN-PWR
G39
1
2
C458
C461
DY
B
GAP-OPEN-PWR
G40
1
2
GAP-OPEN-PWR
20061012PM
1D2V_LDO_S0
G33
2D5V_S0
1
Vo=0.8*(1+(R1/R2))
2
GAP-OPEN-PWR
G34
1
2
GAP-OPEN-PWR
C459
2
GAP-OPEN-PWR
G38
1
2
20061012PM
OCP>=1.8A
1D2V_S0
G37
1
2
Add 10K PL for
solve EN pin issue
2
2
2
2
GND
1
2
C580
1
1
2
2
R324
1KR3F-GP
2
GND
1
APL5915-KAI-TRL-GP
5915_FB
FB
2
R384
40K2R3F-GP
1D2V_S0_PWR
GAP-OPEN-PWR
G35
1
2
1
2
2
FB
GAP-OPEN-PWR
G77
1
2
SC10U6D3V5MX-3GP
3
4
1
VOUT
VOUT
2
EN
SC10U6D3V5MX-3GP
8
GAP-OPEN-PWR
G76
1
2
2D5V_LDO
1
1
5
9
1
5915_EN
2
0R2J-2-GP
R293
PM_SLP_S3#
VIN
VIN
2
POK
GAP-OPEN-PWR
G75
1
2
Vo(cal.)=2.528V
SC2700P50V3KX-1GP
7
C433
SC10U10V5ZY-1GP
1
34 2D5V_S0_PG
5915_POK
2
0R2J-2-GP
2
GAP-OPEN-PWR
G74
1
2
DY
6
U47
VCNTL
2
2
SC1U10V3ZY-6GP
R294
4,35,45
C430
SC10U10V5ZY-1GP
C429
B
1
1
R295
10KR2J-3-GP
2
1
1
1
?
DY
SB
2
G73
VOUT
VOUT
3
4
SC22U6D3V6KX-1GP
3D3V_S5
SCD1U16V
5V_S5
EN
R375
10KR2J-3-GP
5
9
SC22U6D3V6KX-1GP
C278
3D3V_S5
8
VIN
VIN
1
2 0R2J-2-GP
POK
2
1 R374
7
C276
SC56P50V2JN-2GP
1D2V_PG
0R2J-2-GP
1
34,43 1D2V_S0_EN
R373
2
1
1
1
2
1
VCNTL
2D5V_S0
Iomax=0.5A
6
U31
TP82
TPAD28
SC10U10V5ZY-1GP
C275DY
R164
1KR2J-1-GP
1D2V_S0
Iomax=2A
1
1
C277
SC1U10V3ZY-6GP
1
2
3D3V_S0
TC10
ST100U4VBM-10-GP
GAP-OPEN-PWR
G36
1
2
KEMET
100uF, 4V, B2 Size
Iripple=1.1A, ESR=70mohm
GAP-OPEN-PWR
<Core Design>
Vo=0.8*(1+(R1/R2))
Wistron Corporation
A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
A
Title
2D5V/1D5V/0D9V
Size
A3
Document Number
Rev
SA
Orta
Date: Tuesday, December 12, 2006
5
4
3
2
Sheet
1
44
of
46
5
4
3
2
1
RUN_POWER_ON
5V_S0
1
1
2
1
2
DY
1
U58
S
S
S
G
D
D
D
D
8
7
6
5
AO4468-GP
Run Power
EC120
SCD1U25V3ZY-1GP
2
EC119
SCD1U25V3ZY-1GP
2
Q17
2N7002-9-GP
1
DY
DY
DY
2
G
D
EC113
SCD1U25V3ZY-1GP
3D3V_S5
1
2
3
4
23D3V_S0_EN
0R2J-2-GP
C616
SCD1U25V3ZY-1GP
S
8
7
6
5
3D3V_S0
1
2
3
2
0R3-0-U-GP
C651
SC1U10V3KX-3GP
1
1
1D8V_S3
1D8V_S0
S
2
PM_SLP_S3#
2
K
1
G
D
D
D
D
AO4468-GP
EC112
SCD1U25V3ZY-1GP
R433
DY
1
U54
S
S
S
G
DY
2
3
SCD22U50V5ZY-GP
R456
PM_SLP_S3#
C563
DY
DUMMY-C2
Q18
2N7002-9-GP
Q22_D
D
19,28,31,34,35,44
5V_S0_EN
D
R488
1KR3F-GP
2
2
2
2
1
330KR3F-GP
2
0R2J-2-GP
D29
MMGZ5242BPT-GP
1
R476
330KR3F-GP
C691
DY
PM_RUNCTL_G
2
1
1
1
R459
47KR3F-GP
G
R487
1
R372
1
D
3
A
S
2
1
2
3
4
1
TP0610K-T1-GP
2 R475 PM_RUNCTL
10KR3F-L-GP
1
D
5V_S5
Q19
DCBATOUT
DY
1
2
3
4
C
1
2 R157
0R2J-2-GP
1D8V_EN_S0_R
U29
S
S
S
G
D
D
D
D
8
7
6
5
C
1
1
DY
EC52
SCD1U25V3ZY-1GP
2
DY
C272
SCD1U25V3ZY-1GP
2
2
1
AO4468-GP
EC50
SCD1U25V3ZY-1GP
DY
B
D12
BAV99PT-GP-U
3D3V_S0
1 R160
2
0R2J-2-GP
DY
Power On Logic
1
DY
2
DY
BAV99PT-GP-U
D13
2
DY
1
1D8V_S0
3
1 R158
2
0R2J-2-GP
3
B
<Core Design>
A
hexainf@hotmail.com
GRATIS - FOR FREE
A
Wistron Corporation
Add as ATI suggestion
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PWR CTL LOGIC / PWR PLANE
Size
A3
Document Number
Rev
Date: Tuesday, December 12, 2006
5
4
3
2
SA
Orta
Sheet
1
45
of
46
3
2
3D3V_S5
3D3V_S5
5
6
K1
K2
DY
1
CPU
K4
SPRING-5-GP
34.41Y01.001
1
DY
DY
SPRING-7
K6
1
K9
DY
H3
HOLE
H4
HOLE
H5
HOLE
DY
10
13
12
TSLCX14MTCX-1-GP
7
TSLCX14MTCX-1-GP
1
DY
34.42Y01.001
K7
1
Near CCD
K3
DY
1
SPRING-23-GP
34.39S07.001
DY
34.4G502.001
Near H15
DY
SPRING-23-GP
SPRING-7
DY
SPRING-23-GP
34.39S07.001
K11
34.39S07.001
1
DY
SPRING-23-GP
SPRING-7
34.49U26.001
H2
HOLE
K8
1
34.49U26.001
SPRING-7
H1
HOLE
11
TSLCX14MTCX-1-GP
Near H8
K10DY
1
34.49U26.001
SPRING-23-GP
34.39S07.001
34.42Y01.001
34.42Y01.001
34.42Y01.001
PCMCIA
K5
1
SPRING-5-GP
TSLCX14MTCX-1-GP
DY
DY
34.41Y01.001
8
U60F
D
Near H8
1
U60E
7
7
U3C
TSAHCT125PW-GP
DUMMY in SA
CPU
9
3D3V_S5
8
7
D
U60D
7
9
3D3V_S5
14
U60C
14
10
14
5V_S0
1
14
4
14
5
34.39S07.001
34.49U26.001
K12
1
TOP(CARD READER BD)
34.42Y01.011
H6
HOLE
H7
HOLE
H8
HOLE
SPRING-23-GP
H9
HOLE
H10
HOLE
H11
HOLE
34.39S07.001
H12
HOLE
BOT(SB)
34.42Y01.011
1
GP10
GNDPAD
1
GP6
GNDPAD
1
GP4
GNDPAD
1
GP3
GNDPAD
1
1
GP2
GNDPAD
1
1
1
EC54
EC55
DY
DY
1
DY
1
EC53
B
SCD1U16V2ZY-2GP
2
DY
1
1
DY
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
EC98 EC46
SCD1U16V2ZY-2GP
2
DY
SCD1U16V2ZY-2GP
2
DY
1
EC104
DY
1
EC47
DY
SCD1U16V2ZY-2GP
2
EC97
1
1
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
DY
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
DY
SCD1U16V2ZY-2GP
2
EC94 EC15
DY
1
EC80
DY
1
EC5
1
1
DY
SCD1U16V2ZY-2GP
2
EC10
1
DY
SCD1U16V2ZY-2GP
2
DY
1
EC108 EC86
SCD1U16V2ZY-2GP
2
DY
1
1
EC101
SCD1U16V2ZY-2GP
2
1
DY
SCD1U16V2ZY-2GP
2
DY
SCD1U16V2ZY-2GP
2
EC21 EC99
1
DY
SCD1U16V2ZY-2GP
2
EC92
1
1
DY
SCD1U16V2ZY-2GP
2
DY
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
DY
SCD1U16V2ZY-2GP
2
1
EC82 EC88
1
EC4
DY
SCD1U16V2ZY-2GP
2
EC3
1
EC111
B
GP1
GNDPAD
1D8V_S0
VCC_CORE_S0
DCBATOUT
GP9
GNDPAD
BOT(MINI CARD)
34.4G502.001
1
BOT(CPU)
34.42Y01.011
H24
HOLE
SCD1U16V2ZY-2GP
2
BOT(MDC)
34.42Y01.011
H23
HOLE
1
1
H13
HOLE
GP5
GNDPAD
1
GP7
GNDPAD
1
H22
HOLE
GP8
GNDPAD
1
1
H21
HOLE
1
H20
HOLE
1
1
H19
HOLE
1
H16
HOLE
1
1
H17
HOLE
1
1
1
H18
HOLE
1
1
1
1
H15
HOLE
1
1
1
H14
HOLE
1
1
C
1
C
1D8V_S3
3D3V_S0
5
4
3
DY
EC69
1
EC75
SCD1U16V2ZY-2GP
2
DY
SCD1U16V2ZY-2GP
2
EC123
DY
DY
1
1
1
DY
SCD1U16V2ZY-2GP
2
DY
SCD1U16V2ZY-2GP
2
1
EC106 EC74
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
EC58
DY
DY
<Core Design>
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1
EC107
SCD1U16V2ZY-2GP
2
DY
1
EC105
SCD1U16V2ZY-2GP
2
DY
1
DY
SCD1U16V2ZY-2GP
2
EC95 EC96
1
DY
1
EC116
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
DY
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
EC89
1
DY
EC56
1
DY
1
EC102
SCD1U16V2ZY-2GP
2
DY
1
EC22
DY
SCD1U16V2ZY-2GP
2
EC48
1
DY
SCD1U16V2ZY-2GP
2
1
EC49
SCD1U16V2ZY-2GP
2
1
DY
SCD1U16V2ZY-2GP
2
1
DY
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
EC18 EC66
SCD1U16V2ZY-2GP
2
EC67
DY
DY
1
1
EC122
1
EC70
SCD1U16V2ZY-2GP
2
1
DY
1
SCD1U16V2ZY-2GP
2
DY
SCD1U16V2ZY-2GP
2
1
EC103 EC110
DY
SCD1U16V2ZY-2GP
2
EC27
1
DY
DY
1D2V_S0
SCD1U16V2ZY-2GP
2
1
EC14
EC93
1
DY
SCD1U16V2ZY-2GP
2
EC109
DY
1
EC68
1
DY
SCD1U16V2ZY-2GP
2
EC57
1
DY
SCD1U16V2ZY-2GP
2
DY
1
1
EC59 EC71
SCD1U16V2ZY-2GP
2
DY
SCD1U16V2ZY-2GP
2
1
EC121
SCD1U16V2ZY-2GP
2
DY
SCD1U16V2ZY-2GP
2
DY
1
EC76 EC6
1
1
DY
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
EC100
5V_S0
SCD1U16V2ZY-2GP
2
A
DY
SCD1U16V2ZY-2GP
2
DY
SCD1U16V2ZY-2GP
2
DY
SCD1U16V2ZY-2GP
2
1
EC91 EC90
1
EC87
1
5V_USB1_S5
Title
Size
Date:
2
EMI/Spring/Boss
Document Number
Orta
Tuesday, December 12, 2006
Rev
SA
Sheet
1
46
of
46