Compal Confidential

Transcription

Compal Confidential

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Compal Confidential
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2
QALEA/QALEB Schematics Document
AMD APU Trinity FS1r2 + FCH Hudson-M3 + GPU Seymour XTX/Thames XT
2012-01-16
REV:0.4
3
3
4
4
Compal Secret Data
Security Classification
2011/04/18
Issued Date
2015/07/08
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
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Title
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B
Date:
Compal Electronics, Inc.

Document Number
Şɯɨɩɨ
Monday, January 16, 2012
1
of
Sheet
E
Rev
0.4
50
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B
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D
E
Compal confidential
File Name : QALEA/QALEB
Themes XT M2/Seymour XTX M2
VRAM
64M16/128M16/256M16
DDR3 x 8
1
PCIE x 16 Gen2
1
AMD FS1r2 APU
Page 17焍
焍24
DP Port2
HDMI Conn.
RTD2132S
DP Port1
Page 5焍
焍9
4 * x1 PCI-E 2.0
LVDS Conn.
GPP3
Page 26
4 in 1 Conn.
GPP1
x4 UMI Gen. 1
2.5GT/s per lane
GPP0
2Channel Speaker
LAN
CardReader
IC
RTL 8111F
PCI Express
Mini card Slot 1
Page 33
Page 12焍
焍16
Combo jack
CMOS Camera Page 26
BlueTooth CONN Page 32
USB PORT 3.0 x3 Page 34
USB PORT 2.0 x1 +Charger
WLAN
EC
Page 13
Page 35
6*SATA serial
LPC BUS
SPI ROM
4MB
15" only
Finger Printer
Page 31
G Sensor
Page 33
3
ENE KB9012
Power Board
Audio Jacks
14*USB2.0/
4*USB3.0,10*USB2.0
FCH CRT (VGA DAC)
CRT CONN
Page 28
Sub board
Page 29
PCI-E(WLAN)
WLAN
2
CX20671-21Z
uFCBGA-656
24.5mm x 24.5mm
USB(BT)
Internal MIC
Audio Codec
AZALIA
Hudson M3
RTS5229
3
Page 10焍
焍11
BANK 0, 1, 2
Page 27
Page 25
2
Dual Channel
1.5V DDRIII 1600 (1866)
Trinity
uPGA 722 pin
35mm x 35mm
DP Port0
LVDS
translator
Memory BUS(DDRIII) 204pin DDRIII-SO-DIMM X2
UPEK TCS5DA6C0
ST LIS34ALTR
Page 30
SATA0
ODD board
LAN
SATA3.0 HDD CONN
Page 30
Track Point
SATA1
Page 33
SATA ODD CONN
Int.KBD
Audio Jack+
USB2.0
Page 30
Page 33
Click Pad
Page 33
Thermal Sensor
FingerPrint
Fintek 5303
4
4
Page 32
Card reader
Compal Secret Data
2011/04/18
Issued Date
2015/07/08
Deciphered Date
A
B
C
D
Title
Size
B
Date:

Document Number
Şɯɨɩɨ
2
of
Sheet
E
Rev
0.4
50
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B
C
D

2
S0
S3
S5
N/A
VIN
Adapter power supply (19V)
N/A
N/A
B+
AC or battery power rail for power circuit.
N/A
N/A
N/A
+APU_CORE
Core voltage for APU
ON
OFF
OFF
+APU_CORE_NB
Voltage for On-die VGA of APU
ON
OFF
OFF
+1.5V
1.5V power rail for APU VDDIO and DDR
ON
ON
OFF
+0.75VS
0.75V switched power rail for DDR terminator
ON
OFF
OFF
+1.2VS
1.2V (VDDR, VDDP) switched power rail for APU
ON
OFF
OFF
+2.5VS
2.5V for APU VDDA
ON
OFF
OFF
+1.1VALW
1.1V switched power rail for FCH
ON
ON
ON*
+1.1VS
1.1V switched power rail for FCH
ON
OFF
OFF
+1.5VS
1.5V switched power rail
ON
OFF
OFF
+VGA_CORE
0.95-1.2V switched power rail
ON
OFF
OFF
+1.5VGS
ON
OFF
OFF
+1.8VGS
ON
OFF
OFF
+1.0VGS
1.0V switched power rail for VGA
ON
OFF
OFF
+3VALW
3.3V always on power rail
ON
ON
ON*
+3VS_WLAN
3.3V power rail for WLAN
ON
OFF
OFF
+3VS
ON
OFF
OFF
+5VALW
5V always on power rail
ON
ON
ON*
+5VS
5V switched power rail
ON
OFF
OFF
+VSB
VSB always on power rail
ON
ON
ON*
+RTCVCC
RTC power
ON
ON
ON
FCH Hudson-M2/3
SATA Port List
USB1.1
SATA0
HDD
PCIE0
LAN
SATA1
ODD
PCIE1
WLAN
SATA2
NC
PCIE2
NC
SATA3
NC
PCIE3
Card Reader
SATA4
NC
PCIE0
NC
NC
SATA5
FCH Hudson-M2/3
USB Port List
Comal
PCIE Port List
APU
1
Description
PCIE1
FCH
Power Plane
NC
PCIE3
NC
ɩ
Device
Address
HEX
Device
Smart Battery
0001-011xb
15H
F75303 (DDR,VRAM,CPUCORE)1001-101xb
Address
9AH
HEX
SB-TSI
1001-100xb
98H
Seymour XTX
1000-0010b
82H
:
:
:
:
:
Port1
NC
1
USB2.0 Port
Port1
NC
Port2
NC
Port3
NC
Port4
NC
Port5
WLAN
Port6
CMOS
Port7
FP
Port8
BT
Port9
NC
2
Port10
USB 3.0
Port11
USB 3.0
Port12
USB 3.0
Port13

UMA@
DIS@
PX40@
PX50@
CMOS@
NC
Port0
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
ɨ
Port0
USB2.0
NC
PCIE2
E
NC
UMA only
DIS muxluss
PX4.0 Support
PX5.0 Support
USB camera
LVDS translator
CONN@ : ME components
X76@, H2G@, S2G@ : VRAM
3
Tha@:
Sey@:
3
Thames VGA
Seymour VGA

ɥ
SDV:
CMOS@/DIS@/PX40@/SEY@ + X76@
(FCH_SMB0)
Address
HEX
DDR DIMM1 (FCH_SMB0)
Device
1001-000xb
DDR DIMM2 (FCH_SMB0)
1001-001xb
PJ201,PJ401,PJ502,PJ503,PJ504,PJ601,PJ603,PJ604,
PJ701,PJ702,PJ703,PJ704,J1,J2301,J2401,J2402,J2403
PJ402,PJ403,PJ501,PJ602,PJ801,PJ802,PJ803,PJ804,PJ805
WLAN (FCH_SMB0)
Security ROM

4
4
Compal Secret Data
2011/04/18
Issued Date
2015/07/08
Deciphered Date
A
B
C
D
Title
Size
B
Date:

Document Number
Şɯɨɩɨ
3
of
Sheet
E
Rev
0.4
50
5
4
3
2
ś
Şŵ
D
Ʉ All the ASIC supplies, except for VDDR3, must fully reach their respective
nominal voltages within 20 ms of the start of the ramp-up sequence, though a
shorter ramp-up duration is preferred. There is no timing requirement on the
ramp up of VDDR3 relative to other power rails.
Ʉ The external pull-up resistors on the DDC/AUX signals (if applicable) should
ramp up before or after both VDDC and VDD_CT have ramped up.
Ʉ VDDC and VDD_CT should not ramp up simultaneously. For example, VDDC
should reach 90% before VDD_CT starts to ramp up (or vice versa).
Ʉ For power down, reversing the ramp-up sequence is recommended.
ɪſɪŜɪ
ƀ
ɏſɨŜɥƀ
C
1
ɨſɨŜɬ
ƀ
Wͺ'W/KϬ͗>ŽǁͲхZĞƐĞƚĚ'Wh͖,ŝŐŚͲхEŽƌŵĂůŽƉĞƌĂƚŝŽŶ
Wͺ'W/Kϭ͗>ŽǁͲхĚ'WhWŽǁĞƌK&&͖,ŝŐŚͲхĚ'WhWŽǁĞƌKE
ś
Wͺ'W/KϬ͗,ŝŐŚͲхEŽƌŵĂůŽƉĞƌĂƚŝŽŶ;Ě'WhŝƐŶŽƚƌĞƐĞƚŽŶKŵŽĚĞͿ
Wͺ'W/Kϭ͗>ŽǁͲхĚ'WhWŽǁĞƌK&&͖,ŝŐŚͲхĚ'WhWŽǁĞƌKE;ĂůǁĂǇƐ,ŝŐŚͿ
Ě'WhWŽǁĞƌWŝŶƐ
sŽůƚĂŐĞ
Wyϯ͘Ϭ
KDŽĚĞ DĂǆĐƵƌƌĞŶƚ
W/ͺWs͕W/ͺsZ͕d^s͕sZϰ͕sͺd͕
WͺWs͕W΀&͗΁ͺsϭϴ͕W΀͗΁ͺWs͕
W΀͗΁ͺsϭϴ͕s͕sϭ/͕ϮsY͕sϮ/͕
W>>ͺWs͕DWsϭϴ͕ĂŶĚ^Wsϭϴ
ϭ͘ϴs
K&&
KE
ϭϲϳϵŵ
W΀&͗΁ͺsϭϬ͕W΀͗΁ͺsϭϬ͕W>>ͺs͕ĂŶĚ
^WsϭϬ
ϭ͘Ϭs
K&&
KE
ϳϳϱŵ
W/ͺs
ϭ͘Ϭs
K&&
KE
ϭ͘ϭ
sZϯ
ϯ͘ϯs
K&&
KE
ϲϬŵ
/&ͺs;ĐƵƌƌĞŶƚĐŽŶƐƵŵƉƚŝŽŶсϱϱŵΛϭ͘Ϭs͕ŝŶ
KŵŽĚĞͿ
^ĂŵĞĂƐ
s
K&&
KE
^ĂŵĞĂƐ
W/ͺs
ϳϬŵ
sZϭ
ϭ͘ϱs
K&&
K&&
ϭ͘Ϯ
sͬs/
d
K&&
K&&
Ϯϴ
D
C
ŵſɨŜɨɩƀ
ɏſɨŜɯƀ
ŝ'Wh
PE_GPIO0(PXS_RST#)
PE_EN
Ě'Wh

K^ǁŝƚĐŚ
BIF_VDDC
PE_GPIO1(PXS_PWREN)
PX_mode
нϯ͘ϯs>t
B

нϭ͘ϱs

MOS
ϭ
LDO
Ϯ
Regulator
ϱ
нϯ͘ϯs'^
нϭ͘Ϭs'^

нϱs>t
T4+16clock
нϭ͘ϴs'^
B
нϭ͘ϱs
н
SI4800
ϯ
Regulator
ϰ
нϭ͘ϱs'^
нs'ͺKZ
PWRGOOD
A
A
Compal Secret Data
Issued Date
2011/04/18
Deciphered Date
2015/07/08
Title
Size
B
Date:
5
4
3
2

Document Number
Şɯɨɩɨ
4
50
Sheet
of
1
Rev
0.4
A
B
C
D
17
PCIE_CRX_GTX_P[0..15]
PCIE_CTX_GRX_P[0..15]
17
17
PCIE_CRX_GTX_N[0..15]
PCIE_CTX_GRX_N[0..15]
17
E
JCPU1A
PCI EXPRESS
2

35
35
33
33
PCIE_CRX_DTX_P0
PCIE_CRX_DTX_N0
PCIE_CRX_DTX_P1
PCIE_CRX_DTX_N1
35
35
PCIE_CRX_DTX_P3
PCIE_CRX_DTX_N3
12
12
12
12
12
12
12
12
AE5
AE6
AD8
AD7
AC9
AC8
AC5
AC6
AG8
AG9
AG6
AG5
AF7
AF8
AE8
AE9
UMI_RXP0
UMI_RXN0
UMI_RXP1
UMI_RXN1
UMI_RXP2
UMI_RXN2
UMI_RXP3
UMI_RXN3
+1.2VS
1
R1
2 P_ZVDDP
196_0402_1%
AG11
P_GPP_RXP0
P_GPP_RXN0
P_GPP_RXP1
P_GPP_RXN1
P_GPP_RXP2
P_GPP_RXN2
P_GPP_RXP3
P_GPP_RXN3
P_UMI_RXP0
P_UMI_RXN0
P_UMI_RXP1
P_UMI_RXN1
P_UMI_RXP2
P_UMI_RXN2
P_UMI_RXP3
P_UMI_RXN3
P_GFX_TXP0
P_GFX_TXN0
P_GFX_TXP1
P_GFX_TXN1
P_GFX_TXP2
P_GFX_TXN2
P_GFX_TXP3
P_GFX_TXN3
P_GFX_TXP4
P_GFX_TXN4
P_GFX_TXP5
P_GFX_TXN5
P_GFX_TXP6
P_GFX_TXN6
P_GFX_TXP7
P_GFX_TXN7
P_GFX_TXP8
P_GFX_TXN8
P_GFX_TXP9
P_GFX_TXN9
P_GFX_TXP10
P_GFX_TXN10
P_GFX_TXP11
P_GFX_TXN11
P_GFX_TXP12
P_GFX_TXN12
P_GFX_TXP13
P_GFX_TXN13
P_GFX_TXP14
P_GFX_TXN14
P_GFX_TXP15
P_GFX_TXN15
GRAPHICS
P_GFX_RXP0
P_GFX_RXN0
P_GFX_RXP1
P_GFX_RXN1
P_GFX_RXP2
P_GFX_RXN2
P_GFX_RXP3
P_GFX_RXN3
P_GFX_RXP4
P_GFX_RXN4
P_GFX_RXP5
P_GFX_RXN5
P_GFX_RXP6
P_GFX_RXN6
P_GFX_RXP7
P_GFX_RXN7
P_GFX_RXP8
P_GFX_RXN8
P_GFX_RXP9
P_GFX_RXN9
P_GFX_RXP10
P_GFX_RXN10
P_GFX_RXP11
P_GFX_RXN11
P_GFX_RXP12
P_GFX_RXN12
P_GFX_RXP13
P_GFX_RXN13
P_GFX_RXP14
P_GFX_RXN14
P_GFX_RXP15
P_GFX_RXN15
P_GPP_TXP0
P_GPP_TXN0
P_GPP_TXP1
P_GPP_TXN1
P_GPP_TXP2
P_GPP_TXN2
P_GPP_TXP3
P_GPP_TXN3
GPP
1
AB8
AB7
AA9
AA8
AA5
AA6
Y8
Y7
W9
W8
W5
W6
V8
V7
U9
U8
U5
U6
T8
T7
R9
R8
R5
R6
P8
P7
N9
N8
N5
N6
M8
M7
P_UMI_TXP0
P_UMI_TXN0
P_UMI_TXP1
P_UMI_TXN1
P_UMI_TXP2
P_UMI_TXN2
P_UMI_TXP3
P_UMI_TXN3
UMI
PCIE_CRX_GTX_P0
PCIE_CRX_GTX_N0
PCIE_CRX_GTX_P1
PCIE_CRX_GTX_N1
PCIE_CRX_GTX_P2
PCIE_CRX_GTX_N2
PCIE_CRX_GTX_P3
PCIE_CRX_GTX_N3
PCIE_CRX_GTX_P4
PCIE_CRX_GTX_N4
PCIE_CRX_GTX_P5
PCIE_CRX_GTX_N5
PCIE_CRX_GTX_P6
PCIE_CRX_GTX_N6
PCIE_CRX_GTX_P7
PCIE_CRX_GTX_N7
PCIE_CRX_GTX_P8
PCIE_CRX_GTX_N8
PCIE_CRX_GTX_P9
PCIE_CRX_GTX_N9
PCIE_CRX_GTX_P10
PCIE_CRX_GTX_N10
PCIE_CRX_GTX_P11
PCIE_CRX_GTX_N11
PCIE_CRX_GTX_P12
PCIE_CRX_GTX_N12
PCIE_CRX_GTX_P13
PCIE_CRX_GTX_N13
PCIE_CRX_GTX_P14
PCIE_CRX_GTX_N14
PCIE_CRX_GTX_P15
PCIE_CRX_GTX_N15
P_ZVDDP
P_ZVSS
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
PCIE_CTX_C_DRX_P0
PCIE_CTX_C_DRX_N0
PCIE_CTX_C_DRX_P1
PCIE_CTX_C_DRX_N1
C33
C34
C123
C124
1
1
1
1
2
2
2
2
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
PCIE_CTX_C_DRX_P3
PCIE_CTX_C_DRX_N3
C35
C36
1
1
2 .1U_0402_16V7K
2 .1U_0402_16V7K
UMI_TXP0_C
UMI_TXN0_C
UMI_TXP1_C
UMI_TXN1_C
UMI_TXP2_C
UMI_TXN2_C
UMI_TXP3_C
UMI_TXN3_C
C37
C38
C39
C40
C41
C42
C43
C44
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
AB2
AB1
AA3
AA2
Y5
Y4
Y2
Y1
W3
W2
V5
V4
V2
V1
U3
U2
T5
T4
T2
T1
R3
R2
P5
P4
P2
P1
N3
N2
M5
M4
M2
M1
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_N15
AD5
AD4
AD2
AD1
AC3
AC2
AB5
AB4
AG2
AG3
AF4
AF5
AF1
AF2
AE2
AE3
AH11 P_ZVSS
1
R2
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
PCIE_CTX_GRX_P0
PCIE_CTX_GRX_N0
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_N8
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_N9
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_P12
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_N13
PCIE_CTX_GRX_P14
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_P15
PCIE_CTX_GRX_N15
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
1
PCIE_CTX_DRX_P0
PCIE_CTX_DRX_N0
PCIE_CTX_DRX_P1
PCIE_CTX_DRX_N1
35
35
33
33
PCIE_CTX_DRX_P3
PCIE_CTX_DRX_N3
35
35
UMI_TXP0
UMI_TXN0
UMI_TXP1
UMI_TXN1
UMI_TXP2
UMI_TXN2
UMI_TXP3
UMI_TXN3
2
12
12
12
12
12
12
12
12
2
196_0402_1%
LOTES_ACA-ZIF-109-P12-A_FS1R2
CONN@
3
3

ʫɨŜɬ
ʫɩŜɬ

ʫɨŜɬ
ʫɏ

ʫɏɏ
4
4
ʫɨŜɩ
Compal Secret Data
2011/04/18
Issued Date
2015/07/08
Deciphered Date
A
B
C
D
ɨɩŵ
Size
Document Number
Custom
Şɯɨɩɨ
5
of
Date:
Sheet
Title
E
Rev
0.4
50
A
B
C
D
E
1
1
JCPU1B
10
10
10
10
10
DDRA_SBS0#
DDRA_SBS1#
DDRA_SBS2#
DDRA_SDM[7..0]
2
3
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7
DDRA_SDQS7#
10
10
10
10
DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_CLK1#
10
10
DDRA_CKE0
DDRA_CKE1
10
10
DDRA_ODT0
DDRA_ODT1
10
10
DDRA_SCS0#
DDRA_SCS1#
10
10
10
DDRA_SRAS#
DDRA_SCAS#
DDRA_SWE#
10
10
MEM_MA_RST#
MEM_MA_EVENT#
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
DDRA_SMA14
DDRA_SMA15
U20
R20
R21
P22
P21
N24
N23
N20
N21
M21
U23
M22
L24
AA25
L21
L20
DDRA_SBS0#
DDRA_SBS1#
DDRA_SBS2#
U24
U21
L23
DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7
E14
J17
E21
F25
AD27
AC23
AD19
AC15
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7
DDRA_SDQS7#
G14
H14
G18
H18
J21
H21
E27
E26
AE26
AD26
AB22
AA22
AB18
AA18
AA14
AA15
DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_CLK1#
T21
T22
R23
R24
DDRA_CKE0
DDRA_CKE1
H28
H27
DDRA_ODT0
DDRA_ODT1
Y25
AA27
DDRA_SCS0#
DDRA_SCS1#
V22
AA26
DDRA_SRAS#
DDRA_SCAS#
DDRA_SWE#
V21
W24
W23
MEM_MA_RST#
MEM_MA_EVENT#
H25
T24
W20
+MEM_VREF
+1.5V
ɨɬ
JCPU1C
MEMORY CHANNEL A
DDRA_SMA[15..0]
1
R3
2 M_ZVDDIO
39.2_0402_1%
W21
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_BANK0
MA_BANK1
MA_BANK2
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_CLK_H0
MA_CLK_L0
MA_CLK_H1
MA_CLK_L1
MA_CKE0
MA_CKE1
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_ODT0
MA_ODT1
MA_CS_L0
MA_CS_L1
MA_RAS_L
MA_CAS_L
MA_WE_L
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
MA_RESET_L
MA_EVENT_L
M_VREF
M_ZVDDIO
E13
J13
H15
J15
H13
F13
F15
E15
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
H17
F17
E19
J19
G16
H16
H19
F19
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
H20
F21
J23
H23
G20
E20
G22
H22
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
G24
E25
G27
G26
F23
H24
E28
F27
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
AB28
AC27
AD25
AA24
AE28
AD28
AB26
AC25
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
Y23
AA23
Y21
AA20
AB24
AD24
AA21
AC21
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
AA19
AC19
AC17
AA17
AB20
Y19
AD18
AD17
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
AA16
Y15
AA13
AC13
Y17
AB16
AB14
Y13
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
DDRA_SDQ[63..0]
10
11
11
11
11
11
DDRB_SMA[15..0]
DDRB_SBS0#
DDRB_SBS1#
DDRB_SBS2#
DDRB_SDM[7..0]
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS7
DDRB_SDQS7#
11
11
11
11
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#
11
11
DDRB_CKE0
DDRB_CKE1
11
11
DDRB_ODT0
DDRB_ODT1
11
11
DDRB_SCS0#
DDRB_SCS1#
11
11
11
DDRB_SRAS#
DDRB_SCAS#
DDRB_SWE#
11
11
MEM_MB_RST#
MEM_MB_EVENT#
MEMORY CHANNEL B
DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
DDRB_SMA14
DDRB_SMA15
T27
P24
P25
N27
N26
M28
M27
M24
M25
L26
U26
L27
K27
W26
K25
K24
DDRB_SBS0#
DDRB_SBS1#
DDRB_SBS2#
U27
T28
K28
DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7
D14
A18
A22
C25
AF25
AG22
AH18
AD14
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS7
DDRB_SDQS7#
C15
B15
E18
D18
E22
D22
B26
A26
AG24
AG25
AG21
AF21
AG17
AG18
AH14
AG14
R26
R27
P27
P28
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#
DDRB_CKE0
DDRB_CKE1
J26
J27
DDRB_ODT0
DDRB_ODT1
W27
Y28
DDRB_SCS0#
DDRB_SCS1#
V25
Y27
DDRB_SRAS#
DDRB_SCAS#
DDRB_SWE#
V24
V27
V28
MEM_MB_RST#
MEM_MB_EVENT#
J25
T25
ɨɑ
MB_BANK0
MB_BANK1
MB_BANK2
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
MB_CLK_H0
MB_CLK_L0
MB_CLK_H1
MB_CLK_L1
MB_CKE0
MB_CKE1
MB_ODT0
MB_ODT1
MB_CS_L0
MB_CS_L1
MB_RAS_L
MB_CAS_L
MB_WE_L
MB_RESET_L
MB_EVENT_L
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
A14
B14
D16
E16
B13
C13
B16
A16
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
C17
B18
B20
A20
E17
B17
B19
C19
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
C21
B22
C23
A24
D20
B21
E23
B23
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
E24
B25
B27
D28
B24
D24
D26
C27
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ[63..0]
11
2
AG26 DDRB_SDQ32
AH26 DDRB_SDQ33
AF23 DDRB_SDQ34
AG23 DDRB_SDQ35
AG27 DDRB_SDQ36
AF27 DDRB_SDQ37
AH24 DDRB_SDQ38
AE24 DDRB_SDQ39
AE22
AH22
AE20
AH20
AD23
AD22
AD21
AD20
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
AF19 DDRB_SDQ48
AE18 DDRB_SDQ49
AE16 DDRB_SDQ50
AH16 DDRB_SDQ51
AG20 DDRB_SDQ52
AG19 DDRB_SDQ53
AF17 DDRB_SDQ54
AD16 DDRB_SDQ55
3
AG15 DDRB_SDQ56
AD15 DDRB_SDQ57
AG13 DDRB_SDQ58
AD13 DDRB_SDQ59
AG16 DDRB_SDQ60
AF15 DDRB_SDQ61
AE14 DDRB_SDQ62
AF13 DDRB_SDQ63
CONN@
CONN@
ɤ
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
ɥŜɮɬ
+1.5V
2
+1.5V
4
4
R4
1K_0402_1%
2 1K_0402_5%
MEM_MA_EVENT#
R6
1
2 1K_0402_5%
MEM_MB_EVENT#
ɨɬ
1
1
+MEM_VREF
2
R5
1
R7
1K_0402_1%
1
2
2
C45
1000P_0402_50V7K
1
C46
.1U_0402_16V7K
Compal Secret Data
2011/04/18
Issued Date
2015/07/08
Deciphered Date
A
B
C
D
ɨɩŵ
Size
Document Number
Rev
Custom
0.4
Şɯɨɩɨ
6
of
50
Date:
Sheet
Title
E
A
B
C
ANALOG/DISPLAY/MISC
27
27
HDMI_TX0P
HDMI_TX0N
27
27
HDMI_CLKP
HDMI_CLKN
12
12
12
12
1
1
2 .1U_0402_16V7K
2 .1U_0402_16V7K
DP1_TXP3 F2
DP1_TXN3 F1
C50
C51
1
1
2 .1U_0402_16V7K
2 .1U_0402_16V7K
DP2_TXP0 L9
DP2_TXN0 L8
C55
C56
1
1
2 .1U_0402_16V7K
2 .1U_0402_16V7K
DP2_TXP1 L5
DP2_TXN1 L6
C57
C58
1
1
2 .1U_0402_16V7K
2 .1U_0402_16V7K
DP2_TXP2 K8
DP2_TXN2 K7
C59
C60
1
1
2 .1U_0402_16V7K
2 .1U_0402_16V7K
DP2_TXP3 J6
DP2_TXN3 J5
APU_CLK
APU_CLK#
APU_DISP_CLK
APU_DISP_CLK#
45
45
2
45
APU_CLK
APU_CLK#
AE11
AD11
APU_DISP_CLK
APU_DISP_CLK#
AB11
AA11
B3
A3
APU_SVC
APU_SVD
C3
APU_SVT
APU_SIC
APU_SID
AG12
AH12
T32
T23
T24
T25
T26
T27
T28
T29
APU_VDDNB_SEN
45
APU_VDD_SEN_H
APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBRDY
APU_DBREQ#
APU_VDD_SEN_L
APU_VDDNB_SEN
T20
APU_VDD_SEN_H
H10
J10
F10
G10
F9
G9
H9
B4
C5
A4
A5
C4
B5
C6
B6
A6 DP_INT_PWM
C1 DP_AUX_ZVSS
SVT
SIC
SID
RESET_L
PWROK
PROCHOT_L
THERMTRIP_L
ALERT_L
AD12
M18
N18
F11
G11
H11
J11
F12
G12
J12
H12
AE10
AD10
L10
M10
P19
R19
K22
T19
N19
AA12
TEST6
TEST9
TEST10
TEST14
TEST15
TEST16
TEST17
TEST18
TEST19
TEST20
TEST24
TEST25_H
TEST25_L
TEST28_H
TEST28_L
TEST30_H
TEST30_L
TEST31
TEST32_H
TEST32_L
TEST35
SVC
SVD
VSS_SENSE
VDDP_SENSE
VDDNB_SENSE
VDDIO_SENSE
VDD_SENSE
VDDR_SENSE
1
R13
APU_TEST18
APU_TEST19
APU_TEST20
APU_TEST24
TEST25_H
TEST25_L
TEST28_H
TEST28_L
TEST30_H
TEST30_L
APU_TEST31
2 150_0402_1%
T14
T15
T7
T8
APU_TEST35
P18
R18
R14
R15
R16
R17
R20
R23
1
1
1
1
1
1
2
2
2
2
2
2
R25
1
2 39.2_0402_1%
R26
R27
R28
1
1
1
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
510_0402_1%
510_0402_1%
1
2 1K_0402_5%
R52
1
2 1K_0402_5%
APU_DBREQ#
R32
1
2 1K_0402_5%
APU_TCK
R37
1
2 1K_0402_5%
APU_TMS
R39
1
2 1K_0402_5%
APU_TDI
R36
2
1 1K_0402_5%
APU_TRST#
R33
1
@
2 1K_0402_5%
APU_SVT
R38
1
@
2 1K_0402_5%
APU_SVC
31,38
H_PROCHOT#
38,45

Ŝ
ɬ
+1.5V
+1.2VS
R21
1K_0402_5%
2 300_0402_5%
2 300_0402_5%
2 10K_0402_5%
@
ALLOW_STOP
+1.5V
2
R18
10K_0402_5%
3
APU_THERMTRIP#
+3VALW
Q2
1
H_THERMTRIP#
14
MMBT3904_NL_SOT23-3
12
T9
T10
+1.5V
@
3
ALERT_L
R29
10K_0402_5%
@ Q3
1
R30 1
@
2 0_0402_5%
R31 1
@
2 0_0402_5%
APU_ALERT#_FCH
13
MMBT3904_NL_SOT23-3
APU_ALERT#_EC
31
CPU TSI interface level shift
3
ALLOW_STOP
@
1
C69
+3VS
2 1K_0402_5%
APU_SVD
1
2 1K_0402_5%
APU_SIC
R43
1
2 1K_0402_5%
APU_SID
R46
1
2 1K_0402_5%
ALERT_L
R54
1
2 300_0402_5%
APU_RST#
R57
1
2 300_0402_5%
APU_PWRGD
1 R35
BSH111, the Vgs is:
min = 0.4V
Max = 1.3V
2
2
30K_0402_1%
SIT, NO.3
Q4
3
1
R44 1
EC_SMB_DA
S
D
1
R41
2
2 0.1U_0402_16V4Z
G
R40
1 R34
31.6K_0402_1%
APU_SID
@
2 0_0402_5%
@

śɨɩɬ
Y10
AA10
Y12
K21
RSVD1
RSVD2
RSVD3
RSVD4
H_PROCHOT#_EC
SIT, NO.16
T30
T31
FVT, NO.36
R49
1
R78
T1
T2
T3
T4
T5
T6
+1.5V
3
2
G
S
9
CONN@
T21
Q7
2N7002K_SOT23-3
APU_PROCHOT#
DP_INT_PWM
W10 FS1R2
AC12 ALLOW_STOP
FS1R2
DMAACTIVE_L
TEST4
TEST5
TDI
TDO
TCK
TMS
TRST_L
DBRDY
DBREQ_L
H_PROCHOT#_EC: default low/active high
APU_PROCHOT# : default high/ active low
H_PROCHOT#: default high/ active low
R12
1K_0402_5%
LVDS_HPD
25
ML_VGA_HPD
13
HDMI_DET
27
D
DP_BLON
DP_DIGON
DP_VARY_BL
DISP_CLKIN_H
DISP_CLKIN_L
SIT, NO.4
D3 LVDS_HPD
E3 ML_VGA_HPD
D7 HDMI_DET
E7
F7
G7
DP0_HPD
DP1_HPD
DP2_HPD
DP3_HPD
DP4_HPD
DP5_HPD
1
C
45

ɏ
AC10
AE12
AF12
CLKIN_H
CLKIN_L
+1.5V

Ş
E
APU_VDD_SEN_L
AF10
AB12
APU_PROCHOT#
APU_THERMTRIP#
ALERT_L
DP2_TXP3
DP2_TXN3
1 1.8K_0402_5%

G5
G6
DP5_AUXP
DP5_AUXN
DP_AUX_ZVSS
DP2_TXP2
DP2_TXN2
2
F5
F6
DP4_AUXP
DP4_AUXN
HDMI
R81
B
45
APU_RST#
APU_PWRGD
DP2_TXP1
DP2_TXN1
1 1.8K_0402_5%
DP0_AUXN
SDV2, NO.45
C
T33
APU_PROCHOT#
DP2_TXP0
DP2_TXN0
2
E
12
APU_RST#
APU_PWRGD
DP1_TXP3
DP1_TXN3
R79
B
12
12,45
To FCH
DP0_AUXP
1
C67
C68
DP1_TXP2
DP1_TXN2
1 1.8K_0402_5%

1
HDMI_TX1P
HDMI_TX1N
DP1_TXP2 G3
DP1_TXN2 G2
1 1.8K_0402_5%
2
2 2
27
27
2 .1U_0402_16V7K
2 .1U_0402_16V7K
2
ML_VGA_AUXN R8
2
HDMI_TX2P
HDMI_TX2N
1
1
DP1_TXP1
DP1_TXN1
HDMI_CLK
27
HDMI_DATA
27
ML_VGA_AUXP R9
1
27
27
C65
C66
DP1_TXP0
DP1_TXN0
13
13
3
ML_VGA_TXP3
ML_VGA_TXN3
DP1_TXP1 H2
DP1_TXN1 H1
ML_VGA_AUXP_C
ML_VGA_AUXN_C

1
13
13
2 .1U_0402_16V7K
2 .1U_0402_16V7K
If not used, pins are left unconnected (DG ref.)
20101111

25
25
2 2
ML_VGA_TXP2
ML_VGA_TXN2
1
1
DP0_AUXP_C
DP0_AUXN_C
2
13
13
C63
C64
2 .1U_0402_16V7K
2 .1U_0402_16V7K
1
ML_VGA_TXP1
ML_VGA_TXN1
DP1_TXP0 H5
DP1_TXN0 H4
DISPLAY PORT MISC.
ML_VGA_TXP0
ML_VGA_TXN0
13
13
2 .1U_0402_16V7K
2 .1U_0402_16V7K
2 .1U_0402_16V7K
2 .1U_0402_16V7K
1
1
E5
E6
DP3_AUXP
DP3_AUXN
TEST
13
13
1
1
DP0_TXP3
DP0_TXN3
1
1
D5 HDMI_CLK
D6 HDMI_DATA
DP2_AUXP
DP2_AUXN
RSVD
1
C61
C62
DP1_AUXP
DP1_AUXN
DISPLAY PORT 0
J3
J2
DP0_TXP2
DP0_TXN2
DISPLAY PORT 1
K2
K1
DP0_TXP1
DP0_TXN1
C53
C48
E1 ML_VGA_AUXP C54
E2 ML_VGA_AUXN C49
D1 DP0_AUXP
D2 DP0_AUXN
DP0_AUXP
DP0_AUXN
LVDS
DISPLAY PORT 2
K5
K4
DP0_TXP0
DP0_TXN0
CLK
DP0_TXP0 L3
DP0_TXN0 L2
SER.
2 .1U_0402_16V7K
2 .1U_0402_16V7K
CTRL
1
1
JTAG
C52
C47
DP0_TXP0_C
DP0_TXN0_C
E
SENSE
25
25
D
JCPU1D

@ R47 1
BSH111_SOT23-3
2
0_0402_5%
2
0_0402_5%
EC_SMB_DA2
FCH_SID
18,25,31,32,33To
EC
To FCH
14
2
1 @ R50 2
0_0402_5%
G
+1.5VS
APU_SIC
1
R55 1
EC_SMB_CK
D
S
4
Q5
3
@ R58 1
2
0_0402_5%
2
0_0402_5%
EC_SMB_CK2
FCH_SIC
18,25,31,32,33To
14
EC
To FCH
4
BSH111_SOT23-3
1 @ R59 2
0_0402_5%
+3VS
R60
1
2 10K_0402_5%
HDMI_CLK
R61
1
2 10K_0402_5%
HDMI_DATA
2011/04/18
Issued Date
ŞɩŜɪŜɪ

Ş
A
Compal Secret Data
B
2015/07/08
Deciphered Date
C
D
ɨɩŵŵ
Size
Document Number
Custom
Şɯɨɩɨ
7
of
50
Date:
Sheet
Title
E
Rev
0.4
A

JCPU1F
1
2
180P_0402_50V8J
2
C76
1
180P_0402_50V8J
C86
2
C72
C81
1
0.01U_0402_16V7K
C75
22U_0603_6.3V6M
C85
2
180P_0402_50V8J
C80
1
0.01U_0402_16V7K
C71
22U_0603_6.3V6M
C84
180P_0402_50V8J
C79
22U_0603_6.3V6M
2
0.01U_0402_16V7K
C70
0.22U_0402_6.3V6K
1
2
1
2
1
2
1
2
180P_0402_50V8J
C83
+
2
330U_D2_2.5VY_R9M
C98
180P_0402_50V8J
C136
180P_0402_50V8J
C97
0.22U_0402_6.3V6K
AG10
AH8
AH9
AH10
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
A19
A21
A23
A25
A7
AA4
AA7
AB13
AB15
AB19
AB21
AB23
AB25
AB27
AB9
AC14
AC16
AC18
AC20
AC24
AC26
AC28
AC4
AC7
AD9
AE13
AE15
AE17
M9
N10
N4
N7
R10
R4
T11
T9
U10
U18
U4
U7
V11
AE19
AE23
AE25
AE27
AE4
AE7
AF14
AF16
AF18
AF20
AF22
AF26
AF28
AF9
AG4
AG7
AH13
AH15
AH17
AH19
AH21
P9
C18
D21
W14
P11
C7
E8
K18
W12
1
2
+1.2VS
1
2
0.22U_0402_6.3V6K
2
C114
1
0.22U_0402_6.3V6K
@2
C113
1
1000P_0402_50V7K
@2
C112
1
1000P_0402_50V7K
@2
C111
1
1000P_0402_50V7K
2
C110
2
1
1000P_0402_50V7K
2
1
C109
1
180P_0402_50V8J
VDDA

2011/04/18
Issued Date
ɏ
ɩɩɨɥ
ɥŜɩɩɩ
ɥŜɥɨɪ
ɨɯɥɩ
ɏ
ɩɩɩ
ɨɥɨ
ɥŜɩɩɩ
ɨɯɥɪ
ɏɏ
ɩɩɩ
ɨɯɥɨ
ɏ
ſƀ
ɩɩɫ
ɫŜɮɫ
ɥŜɩɩɭʫɩſƀ
ɨɯɥɨʫɩſƀ
ɥŜɩɩɩ
ɨɯɥɩ
ɥŜɩɩɩ
ɨɫ
ɨɯɥɩ
ɫŜɮɨ
ɥŜɩɩɨ
ɪŜɪɨ
ɏ
ſɩƀ
ɨɥɥɩ
ɥŜɨɨɩ
Compal Secret Data
2015/07/08
Deciphered Date
B
3

C108
A
2
1
2
+VDDA
1
2
1
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
CONN@
4.7U_0402_6.3V6M
2
2
1
180P_0402_50V8J
2
C217
1
22U_0603_6.3V6M
2
C215
1
22U_0603_6.3V6M
2
C214
1
@
22U_0603_6.3V6M
2
C216
2
1
180P_0402_50V8J
2
1
C102
2
+1.5V
1
180P_0402_50V8J
T23
T26
U22
U25
U28
Y26
T20
R28
R25
R22
V20
V23
V26
W22
W25
W28
Y24
G28
1
C101
+APU_CORE_NB_CAP
0.22U_0402_6.3V6K
K13
K12
ɫɥ
C117
1
0.22U_0402_6.3V6K
C116
3300P_0402_50V7-K
C115
2
2
1

4
1
C96
2
1
+APU_CORE_NB_CAP
+1.5V
CONN@
L1
FBMA-L11-201209-221LMA30T_0805
2
1
1
0.22U_0402_6.3V6K
2
C95
1
0.22U_0402_6.3V6K
2
C94
1
0.22U_0402_6.3V6K
2
C93
1
0.22U_0402_6.3V6K
2
C92
2
1
0.22U_0402_6.3V6K
1
C91
2
+APU_CORE_NB
C90
1
4.7U_0603_6.3V6K
2
C89
2
1
4.7U_0603_6.3V6K
2
1
C88
2
1
4.7U_0603_6.3V6K
2
1
4.7U_0603_6.3V6K
2
1
C87
1
22U_0603_6.3V6M
2
C11
C12
D9
D8
D12
D11
B11
A12
B10
E12
B9
C100
VDDR_1
VDDR_2
VDDR_3
VDDR_4
1
@
180P_0402_50V8J
2
AB10
VDDP_1
VDDP_2
VDDP_3
VDDP_4
VDDP_5
1
+1.5V
C107
1
0.22U_0402_6.3V6K
C106
2
0.22U_0402_6.3V6K
C105
C104
180P_0402_50V8J
C103
180P_0402_50V8J
2
1
AH6
AH5
AH4
AH3
AH7
VDDIO_19
VDDIO_20
VDDIO_21
VDDIO_22
VDDIO_23
VDDIO_24
VDDIO_25
VDDIO_26
VDDIO_27
VDDIO_28
VDDIO_29
VDDIO_30
VDDIO_31
VDDIO_32
VDDIO_33
VDDIO_34
VDDIO_35
VDDIO_36
2
C78
+1.2VS

VDDIO_1
VDDIO_2
VDDIO_3
VDDIO_4
VDDIO_5
VDDIO_6
VDDIO_7
VDDIO_8
VDDIO_9
VDDIO_10
VDDIO_11
VDDIO_12
VDDIO_13
VDDIO_14
VDDIO_15
VDDIO_16
VDDIO_17
VDDIO_18
1
0.22U_0402_6.3V6K
3
1
J20
L4
R7
W18
A15
AB17
AC22
AE21
AF24
AH23
AH25
B7
C14
C16
C2
C20
C22
C24
C26
C28
D13
D15
D17
D19
D23
D25
D27
E4
E9
F14
F16
F18
F20
F22
F26
F28
G13
G15
G17
G19
G21
G23
G25
G4
J22
J24
J4
J7
K11
K14
K9
AC11
L19
L7
M11
AF11
V19
V9
W16
W4
W7
Y11
Y20
Y22
Y9
A17
A13
K16
F24
G8
H7
J8
+APU_CORE_NB
22U_0603_6.3V6M
H26
K20
J28
K23
K26
L22
L25
L28
M20
M23
M26
N22
N25
N28
P20
P23
P26
AA28
+1.5V
1
2
0.22U_0402_6.3V6K
VDDNB_13
VDDNB_14
VDDNB_15
VDDNB_16
VDDNB_17
VDDNB_18
VDDNB_19
VDDNB_20
VDDNB_21
VDDNB_22
VDDNB_23
1
2
C99
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
VDDNB_6
VDDNB_7
VDDNB_8
VDDNB_9
VDDNB_10
VDDNB_11
VDDNB_12
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49
VDD_50
VDD_51
VDD_52
VDD_53
VDD_54
VDD_55
VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
C82
C8
D10
B8
B12
C9
A9
A10
A8
A11
E10
E11
C10
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
+APU_CORE
R11
T10
H8
G1
U11
W11
W13
W15
W17
W19
AB3
AD3
AD6
AE1
L1
Y6
M6
N11
N1
T3
T6
U19
U1
Y16
Y18
Y3
D4
F4
AF6
AF3
L11
0.22U_0402_6.3V6K
ɥŜɬ
JCPU1E
C77
F8
H6
J1
J14
P6
P10
J16
J18
J9
K19
K3
K17
M3
K6
V10
V18
V3
F3
L18
V6
W1
T18
Y14
AA1
AB6
AC1
R1
P3
K10
H3
M19
C74
+APU_CORE
ɬŵɪŜɬ
0.22U_0402_6.3V6K
ɪŜɩ
VDDNB_CAP_1
VDDNB_CAP_2
+2.5VS
E
+APU_CORE
+APU_CORE_NB
2
D
ɭɥ
ɫɫ
2
1
C
C73
1
ʫɏ
ʫɏɏ
ʫɨŜɬ
ŵ
ʫɨŜɩ
ʫɩŜɬ
B

C
D
ɨɩŵ
Size
Document Number
Custom
Şɯɨɩɨ
8
of
Date:
Sheet
4
Title
E
Rev
0.4
50
4
3
2
+3VS

1
SIT, NO.4
D
R63
4.7K_0402_5%
2
R62
47K_0402_5%
2
D
1
1
5
25
1
APU_INVT_PWM
D
Q6
S
2N7002K_SOT23-3
2
E
2
R67
4.7K_0402_5%
3
1
C
3
DP_INT_PWM
1
7
MMBT3904_NL_SOT23-3
G
1
R66
Q8
2
2
2.2K_0402_5% B
C
C
B
B
A
A
Compal Secret Data
Issued Date
2011/04/18
2015/07/08
Deciphered Date
5
4
3
2
ɨɩ
Size
Document Number
Rev
Custom
0.4
Şɯɨɩɨ
9
50
of
Date:
Sheet
Title
1
A
B
+VREF_DQ
C
+1.5V
D
E
+1.5V
JDIMM2
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDM3
DDRA_SDQ26
DDRA_SDQ27
6
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
DDRA_CKE0
DDRA_CKE0
6
DDRA_SBS2#
DDRA_SBS2#
DDRA_SMA12
DDRA_SMA9
DDRA_SMA8
DDRA_SMA5
2
DDRA_SMA3
DDRA_SMA1
6
6
6
6
6
6
DDRA_CLK0
DDRA_CLK0#
DDRA_CLK0
DDRA_CLK0#
DDRA_SMA10
DDRA_SBS0#
DDRA_SBS0#
DDRA_SWE#
DDRA_SCAS#
DDRA_SWE#
DDRA_SCAS#
DDRA_SMA13
DDRA_SCS1#
DDRA_SCS1#
DDRA_SDQ32
DDRA_SDQ33
6
6
DDRA_SDQS4#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS4
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDM5
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ48
DDRA_SDQ49
3
6
6
DDRA_SDQS6#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS6
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ58
DDRA_SDQ59
R2005
10K_0402_5%
1
2
1
+3VS
1
2
2
205
C2011
0.1U_0402_16V4Z
R2000
10K_0402_5%
2
C2010
2.2U_0603_6.3V6K
1
CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
G1
CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
G2
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
6
DDRA_SMA[0..15]
6
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDM2
DDRA_SDQ22
DDRA_SDQ23
ɨ
+1.5V
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQS3#
DDRA_SDQS3
2
DDRA_SDQS3#
DDRA_SDQS3
6
0.1U_0402_16V4Z
2
C2001
6
DDRA_CKE1
DDRA_CKE1
2
C2002
1
0.1U_0402_16V4Z
DDRA_SDQ30
DDRA_SDQ31
1
0.1U_0402_16V4Z
2
C2003
C2004
1
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
2
2
C2005
C2006
1
0.1U_0402_16V4Z
1
6
DDRA_SMA15
DDRA_SMA14
DDRA_SMA11
DDRA_SMA7
DDRA_SMA6
DDRA_SMA4
2
DDRA_SMA2
DDRA_SMA0
DDRA_CLK1
DDRA_CLK1#
DDRA_SBS1#
DDRA_SRAS#
DDRA_SCS0#
DDRA_ODT0
DDRA_ODT1
DDRA_CLK1
DDRA_CLK1#
DDRA_SBS1#
DDRA_SRAS#
6
6
6
6
DDRA_SCS0#
DDRA_ODT0
6
DDRA_ODT1
6
+1.5V
6
+1.5V
2
DDRA_SDQ18
DDRA_SDQ19
1
DDRA_SMA[0..15]
6
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQS5#
DDRA_SDQS5
ɨɬ
ɨɬ
DDRA_SDM4
DDRA_SDQS5#
DDRA_SDQS5
R2002
1K_0402_1%
+VREF_CA
R2001
1K_0402_1%
+VREF_DQ
+VREF_CA
+VREF_DQ
1
2
C2007
1
2
C2008
R2003
1K_0402_1%
1
DDRA_SDQS2#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS2
MEM_MA_RST#
6
DDRA_SDM[0..7]
+VREF_CA
1
2
C2000
2
6
6
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SDM1
MEM_MA_RST#
1
2
C2009
R2004
1K_0402_1%
1
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ[0..63]
DDRA_SDQ12
DDRA_SDQ13
1000P_0402_50V7K
DDRA_SDQ10
DDRA_SDQ11
6
6
0.1U_0402_16V4Z
DDRA_SDQS1#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS1
DDRA_SDQS0#
DDRA_SDQS0
DDRA_SDQ6
DDRA_SDQ7
2
6
6
DDRA_SDQS0#
DDRA_SDQS0
1
DDRA_SDQ8
DDRA_SDQ9
1
DDRA_SDQ4
DDRA_SDQ5
2
DDRA_SDQ2
DDRA_SDQ3
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
1
DDRA_SDM0
VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26
1000P_0402_50V7K
DDRA_SDQ0
DDRA_SDQ1
VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25
0.1U_0402_16V4Z
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
6
6
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDM6
3
+1.5V
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ60
DDRA_SDQ61
1
+
DDRA_SDQS7#
DDRA_SDQS7
DDRA_SDQS7#
DDRA_SDQS7
6
6
C2025
330U_D2_2V_Y
2
DDRA_SDQ62
DDRA_SDQ63
MEM_MA_EVENT#
MEM_MA_EVENT#
6
FCH_SDATA0
11,14,31,33
FCH_SCLK0
11,14,31,33
+0.75VS
206
FOX_AS0A626-U2RN-7F
CONN@
śɬŜɩ
4
4
Compal Secret Data
Issued Date
2011/04/18
Deciphered Date
2015/07/08
Title
Size
C
Date:
A
B
C
D
Şɨ
Document Number
Şɯɨɩɨ
of
10
Sheet
E
Rev
0.4
50
A
B
C
DDRB_SDQ[0..63]
DDRB_SDQ[0..63]
DDRB_SDM[0..7]
+1.5V
+1.5V
+VREF_DQ
DDRB_SDM0
DDRB_SDQS2#
DDRB_SDQS2
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDM3
DDRB_SDQ26
DDRB_SDQ27
+VREF_DQ
+VREF_CA
DDRB_SDQS0#
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS0
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDM1
MEM_MB_RST#
MEM_MB_RST#
ɨɬ
ɨɬ
+VREF_DQ
+VREF_CA
6
6
6
1
2
1
2
2
DDRB_CKE0
DDRB_CKE0
6
DDRB_SBS2#
DDRB_SBS2#
DDRB_SMA12
DDRB_SMA9
DDRB_SMA8
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1
6
6
DDRB_CLK0
DDRB_CLK0#
6
6
DDRB_SBS0#
6
DDRB_SWE#
DDRB_SCAS#
6
DDRB_SCS1#
DDRB_CLK0
DDRB_CLK0#
DDRB_SMA10
DDRB_SBS0#
DDRB_SWE#
DDRB_SCAS#
DDRB_SMA13
DDRB_SCS1#
DDRB_SDQ32
DDRB_SDQ33
6
6
DDRB_SDQS4#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS4
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDM5
3
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ48
DDRB_SDQ49
6
6
DDRB_SDQS6#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS6
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDM7
DDRB_SDQ58
DDRB_SDQ59
R2006
10K_0402_5%
1
2
1
+3VS
<BOM Structure>
<BOM Structure>
R2007
R
2007
205
2
10K_0402_5%
4
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
G1
CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
G2
1
2
1
C2015
2
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDM2
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQS3#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS3
ɩ
6
6
+1.5V
DDRB_SDQ30
DDRB_SDQ31
0.1U_0402_16V4Z
2
2
C2016
6
1
C2014
DDRB_SDQS2#
DDRB_SDQS2
DDRB_SDQ4
DDRB_SDQ5
1000P_0402_50V7K
6
6
6
0.1U_0402_16V4Z
DDRB_SDQ16
DDRB_SDQ17
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
C2013
DDRB_SDQ10
DDRB_SDQ11
VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26
C2012
DDRB_SDQS1#
DDRB_SDQS1
VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25
1000P_0402_50V7K
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQS1#
DDRB_SDQS1
6
6
DDRB_SMA[0..15]
0.1U_0402_16V4Z
DDRB_SDQ2
DDRB_SDQ3
6
6
DDRB_SDM[0..7]
DDRB_SMA[0..15]
E
JDIMM1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
DDRB_SDQ0
DDRB_SDQ1
1
D
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
DDRB_CKE1
DDRB_CKE1
1
0.1U_0402_16V4Z
6
C2017
1
2
0.1U_0402_16V4Z
2
C2018
1
0.1U_0402_16V4Z
C2019
1
2
0.1U_0402_16V4Z
2
C2020
C2021
1
0.1U_0402_16V4Z
1
DDRB_SMA15
DDRB_SMA14
2
DDRB_SMA11
DDRB_SMA7
DDRB_SMA6
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
DDRB_CLK1
DDRB_CLK1#
DDRB_SBS1#
DDRB_SRAS#
DDRB_SCS0#
DDRB_ODT0
DDRB_ODT1
+0.75VS
+1.5V
DDRB_CLK1
DDRB_CLK1#
6
6
DDRB_SBS1#
DDRB_SRAS#
6
6
DDRB_SCS0#
DDRB_ODT0
6
6
DDRB_ODT1
6
C2022
0.1U_0402_16V4Z
2
1
1
2
C2023
4.7U_0603_6.3V6K
1
+
8/25
2
C2024
330U_D2_2V_Y
@
+VREF_CA
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDM4
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQS5#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS5
6
6
DDRB_SDQS7#
DDRB_SDQS7
6
3
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDM6
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQS7#
DDRB_SDQS7
6
DDRB_SDQ62
DDRB_SDQ63
MEM_MB_EVENT#
MEM_MB_EVENT#
6
FCH_SDATA0
10,14,31,33
FCH_SCLK0
10,14,31,33
+0.75VS
206
FOX_AS0A626-UARN-7F
CONN@
4
śɰŜɩ
Compal Secret Data
Issued Date
2011/04/18
Deciphered Date
2015/07/08
Title
Size
C
Date:
A
B
C
D
Şɩ
Document Number
Şɯɨɩɨ
of
11
Sheet
E
Rev
0.4
50
A
B
C125
1
2
C
8/25
R71
R73
+VDDAN_11_PCIE
2
1
1
2 590_0402_1% PCIE_CALRP
2 2K_0402_1% PCIE_CALRN
V33
V31
W 30
W 32
AB26
AB27
AA24
AA23
1
1
32K_X1
22P_0402_50V8J
Y1
32.768KHZ_12.5PF_CM31532768DZFT
2
R75
20M_0402_5%
AA27
AA26
W 27
V27
V26
W 26
W 24
W 23
2
C130 1
2
32K_X2
27P_0402_50V8J
AF29
AF31
Close to HUDSON-M2/3
8/26 G3 mode RTC time issue - need to check
2
PCI CLKS
UMI_RX0P
UMI_RX0N
UMI_RX1P
UMI_RX1N
UMI_RX2P
UMI_RX2N
UMI_RX3P
UMI_RX3N
PCIE_CALRP
PCIE_CALRN
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
R74
C134
1
2
1
3
GND
GND
2
4
7
7
3
APU_DISP_CLK
APU_DISP_CLK#
H33
H31
FVT, NO.20
7
7
25M_X2
33P_0402_50V8J
17
17
R76
R77
CLK_PCIE_VGA
CLK_PCIE_VGA#
1
1
T24
T23
APU_CLK
APU_CLK#
2 0_0402_5%
2 0_0402_5%
J30
K29
CLK_PCIE_VGA_R
CLK_PCIE_VGA#_R
H27
H28
J27
K26
WLAN
33
33
35
35
3
R150 1
R142 1
CLK_PCIE_WLAN
CLK_PCIE_WLAN#
R80
R82
CLK_PCIE_LAN
CLK_PCIE_LAN#
1
1
2 0_0402_5%
2 0_0402_5%
CLK_PCIE_WLAN_R
CLK_PCIE_WLAN#_R
F33
F31
2 33_0402_5%
2 33_0402_5%
CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R
E33
E31
M23
M24
SDV2, NO.54
M27
M26
35
35
R83
R84
CLK_PCIE_CARD
CLK_PCIE_CARD#

1
1
2 33_0402_5%
2 33_0402_5%
CLK_PCIE_CARD_R
CLK_PCIE_CARD#_R
N25
N26
R23
R24
SDV2, NO.64
N27
R27
35
J26
25M_X1
C31
25M_X2
C33
SLT_GFX_CLKP
SLT_GFX_CLKN
GPP_CLK0P
GPP_CLK0N
INTE#/GPIO32
INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35
GPP_CLK1P
GPP_CLK1N
AJ3
AL5
AG4
AL6
AH3
AJ5
AL1
AN5
AN6
AJ1
AL8
AL3
AM7
AJ6
AK7
AN8
AG9
AM11
AJ10
AL12
AK11
AN12
AG12
AE12
AC12
AE13
AF13
AH13
AH14
AD15
AC15
AE16
AN3
AJ8
AN10
AD12
AG10
AK9
AL10
AF10
AE10
AH1
AM9
AH8
AG15
AG13
AF15
AM17
AD16
AD13
AD21
AK17
AD19
AH9
1
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
16
16
16
16
16
2
T11
R209 1
R208 1
2 0_0402_5%
2 0_0402_5%
@
@
AF18
AE18
AC16
AD18
R110 1
GPP_CLK2P
GPP_CLK2N
GPP_CLK3P
GPP_CLK3N
GPP_CLK4P
GPP_CLK4N
LPCCLK0
GPP_CLK5P
GPP_CLK5N
GPP_CLK6P
GPP_CLK6N
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/CLK_REQ6#/GPIO49
SERIRQ/GPIO48
GPP_CLK7P
GPP_CLK7N
GPP_CLK8P
GPP_CLK8N
DMA_ACTIVE#
PROCHOT#
APU_PG
LDT_STP#
APU_RST#
14M_25M_48M_OSC
S5_CORE_EN
RTCCLK
INTRUDER_ALERT#
VDDBT_RTC_G
25M_X1
25M_X2
32K_X1
PXS_RST# 14,17
PXS_PWREN 14,19,43,44
T22
B25
2 0_0402_5%
@
R215 1
LPCCLK0
D25
D27
C28
A26
A29
A31
B27
AE27
AE19
2 33_0402_5%
SERIRQ
G25
E28 APU_PROCHOT#_R
E26
G26
F26
H7
F1
F3
E6
G4
R85
31
1
APU_RST#
RTC_CLK
APU_PCIE_RST#
7
+RTCBATT
16,31
1
W=20mils
32K_X1
32K_X2
7
45,7
1
2
510_0402_5%
C132
2
JCMOS1 @
SHORT PADS
17,33,35
U3
Compal Secret Data
@
1
2
0_0402_5%
ALLOW_STOP 7
APU_PROCHOT#
2 0_0402_5%
@
APU_PWRGD
for Clear CMOS
4
R91
0_0402_5%
@ R92
16,31
1
Y
33,35
CLK_PCI_EC
3
R87
G2
CLK_PCI_DB
LPC_CLK1 16
LPC_AD0 31,33,35
LPC_AD1 31,33,35
LPC_AD2 31,33,35
LPC_AD3 31,33,35
LPC_FRAME# 31,33,35
P
5
16
16
AB5
21807-A13-HUDSON-M3_FCBGA656
2011/04/18
Issued Date
PLT_RST#
B
2015/07/08
Deciphered Date
31,35
8/26
A
CLK_LAN_25M_R
APU_CLKP
APU_CLKN
32K_X2
2
2
R90
@
8.2K_0402_5%
2
1
1
150P_0402_50V8J
ɯɰŵɨɪɬ
C135
APU_PCIE_RST#_C
2 22_0402_5%
DISP2_CLKP
DISP2_CLKN
C133
1
2
MC74VHC1G08DFT2G_SC70-5
2
B
1
2
1
33_0402_5%
A
R89
@
0.1U_0402_16V4Z
3
4
1
DISP_CLKP
DISP_CLKN
+3V_FCH
G
ɨ
ſ
ř
řřƀ
ɏɏɤś
R86
CLK_LAN_25M
PCIE_RCLKP
PCIE_RCLKN
LPC
1
R88
1M_0402_5%
R26
T26
CLK_CALRN
APU
G30
G28
25M_X1
X1
25MHZ_20PF_7V25000016
C131
F27
S5 PLUS
8/26 follow CRB 33P_0402_50V8J
1
2
2 2K_0402_1% CLK_CALRN
CLOCK GENERATOR
1
+1.1VS_CKVDD
16
PCI_CLK3
PCI_CLK4
1
UMI_TXP0
UMI_TXN0
UMI_TXP1
UMI_TXN1
UMI_TXP2
UMI_TXN2
UMI_TXP3
UMI_TXN3
PCIRST#
AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8
AD9/GPIO9
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#/GPIO40
REQ2#/CLK_REQ8#/GPIO41
REQ3#/CLK_REQ5#/GPIO42
GNT0#
GNT1#/GPO44
GNT2#/SD_LED/GPO45
GNT3#/CLK_REQ7#/GPIO46
CLKRUN#
LOCK#
PCI_CLK1
2
AB33
AB31
AB28
AB29
Y33
Y31
Y28
Y29
UMI_TX0P
UMI_TX0N
UMI_TX1P
UMI_TX1N
UMI_TX2P
UMI_TX2N
UMI_TX3P
UMI_TX3N
AF3
AF1
AF5
AG2
AF6
1U_0402_6.3V6K
SDV2, NO.42
AE30
AE32
AD33
AD31
AD28
AD29
AC30
AC32
UMI_RXP0_C
UMI_RXN0_C
UMI_RXP1_C
UMI_RXN1_C
UMI_RXP2_C
UMI_RXN2_C
UMI_RXP3_C
UMI_RXN3_C
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
PCICLK0
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39
PCI INTERFACE
5
5
5
5
5
5
5
5
2
2
2
2
2
2
2
2
PCIE_RST#
A_RST#
PCI EXPRESS INTERFACES
1
1
1
1
1
1
1
1
1
C126
C118
C119
C120
C127
C121
C128
C122
UMI_RXP0
UMI_RXN0
UMI_RXP1
UMI_RXN1
UMI_RXP2
UMI_RXN2
UMI_RXP3
UMI_RXN3
AE2
AD5
APU_PCIE_RST#_C
2 33_0402_5% A_RST#
1 R72
PLT_RST#
5
5
5
5
5
5
5
5
E
HUDSON-2
150P_0402_50V8J
ɰɥŵɨɫɭ
C129 1
D
U2A
ŵŵŵŵ
Size Document Number
Rev
Custom
0.4
Şɯɨɩɨ
12
50
of
Date:
Sheet
Title
C
D
E
4
A
B
C
D
E
ɫ
ĺŞŜ
1
SPI_CLK_FCH
8/26 use +3VALW
R93
33_0402_5%
@
2
+3VALW
U2B
R95
1
1
SATA_FTX_C_DRX_P1 AN22
SATA_FTX_C_DRX_N1 AL22
AH20
AJ20
SATA_FRX_C_DTX_N1
SATA_FRX_C_DTX_P1
AJ22
AH22
AM23
AK23
AH24
AJ24
AN24
AL24
AL26
AN26
AJ26
AH26
AN29
AL28
2
AK27
AM27
AL29
AN31
AL31
AL33
AH33
AH31
AJ33
AJ31
+AVDD_SATA
1K_0402_1% 2
1 R107
SATA_CALRP
AF28
931_0402_1% 2
1 R108
SATA_CALRN
AF27
10K_0402_5% 2
1 R214
SD CARD
SATA_FTX_DRX_P1
SATA_FTX_DRX_N1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_TX1P
SATA_TX1N
SATA_RX1N
SATA_RX1P
GBE_COL
GBE_CRS
GBE_MDCK
GBE_MDIO
GBE_RXCLK
GBE_RXD3
GBE_RXD2
GBE_RXD1
GBE_RXD0
GBE_RXCTL/RXDV
GBE_RXERR
GBE_TXCLK
GBE_TXD3
GBE_TXD2
GBE_TXD1
GBE_TXD0
GBE_TXCTL/TXEN
GBE_PHY_PD
GBE_PHY_RST#
GBE_PHY_INTR
SATA_TX2P
SATA_TX2N
SATA_RX2N
SATA_RX2P
SATA_TX3P
SATA_TX3N
GBE LAN
C143 1
C142 1
SATA_RX0N
SATA_RX0P
SD_CLK/SCLK_2/GPIO73
SD_CMD/SLOAD_2/GPIO74
SD_CD/GPIO75
SD_WP/GPIO76
SD_DATA0/SDATI_2/GPIO77
SD_DATA1/SDATO_2/GPIO78
SD_DATA2/GPIO79
SD_DATA3/GPIO80
SATA_RX3N
SATA_RX3P
SATA_TX4P
SATA_TX4N
SATA_RX4N
SATA_RX4P
SATA_TX5P
SATA_TX5N
SATA_RX5N
SATA_RX5P
SPI_DI/GPIO164
SPI_DO/GPIO163
SPI_CLK/GPIO162
SPI_CS1#/GPIO165
ROM_RST#/SPI_WP#/GPIO161
SPI ROM
30
30
30
30
AL20
AN20
SATA_FRX_C_DTX_N0
SATA_FRX_C_DTX_P0
SATA_TX0P
SATA_TX0N
NC6
NC7
VGA_RED
NC8
NC9
VGA_GREEN
NC10
NC11
VGA_BLUE
NC12
NC13
VGA DAC
30
30
SATA_FTX_C_DRX_P0 AK19
SATA_FTX_C_DRX_N0 AM19
SERIAL ATA
SATA_FTX_DRX_P0
SATA_FTX_DRX_N0
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
VGA_HSYNC/GPO68
VGA_VSYNC/GPO69
VGA_DDC_SDA/GPO70
VGA_DDC_SCL/GPO71
SATA_CALRP
SATA_CALRN
VGA_DAC_RSET
AD22
AF21
SATA_ACT#/GPIO67
SATA_X1
3
AG21
AUX_VGA_CH_P
AUX_VGA_CH_N
VGA MAINLINK
+3VS
SATA_X2
AUXCAL
ML_VGA_L0P
ML_VGA_L0N
ML_VGA_L1P
ML_VGA_L1N
ML_VGA_L2P
ML_VGA_L2N
ML_VGA_L3P
ML_VGA_L3N
AL14
AN14
AJ12
AH12
AK13
AM13
AH15
AJ14
AC4
AD3
AD9
W10
AB8
AH7
AF7
AE7
AD7
AG8
AD1
AB7
AF9
AG6
AE8
AD8
AB9
AC2
AA7
W9
V6
V5
V3
T6
V1
+3VALW
R101
10K_0402_5%
2SPI_SB_CS0#
SPI_SO
1
2 SPI_WP#
R94
10K_0402_5%
1
FVT, No.44
1
0.1U_0402_16V4Z
U4
1
2
3
4
CS#
DO
WP#
GND
VCC
HOLD#
CLK
DI
8
7
6
5
SPI_HOLD#
SPI_CLK_FCH
SPI_SI
1
2 SPI_CLK_FCH_R
R99
0_0402_5%
W25Q32BVSSIG_SO8
FCH SCLv1.20 19:
GBE_COL/GBE_CRS/GBE_RXERR NC
+3V_FCH
GBE_PHY_INTR
R100 1
2 10K_0402_5%
GBE_PHY_INTR
2
SPI_SO
SPI_SI
SPI_CLK_FCH_R
SPI_SB_CS0#
SPI_WP#
R104 1
2 150_0402_1%
R105 1
2 150_0402_1%
DAC_RED
L32
DAC_GRN
M29
R106 1
DAC_BLU
2 150_0402_1%
M28
N30
CRT_HSYNC
CRT_VSYNC
M33
N32
R109 1
28
28
28
28
2 715_0402_1%
V28
V29
ML_VGA_AUXP_C
ML_VGA_AUXN_C
U28 AUXCAL
28
28
28
CRT_DDC_DATA
CRT_DDC_CLK
R111 1
2 100_0402_1%
T31
T33
T29
T28
R32
R30
P29
P28
7
7
+VDDAN_11_ML
ML_VGA_TXP0
ML_VGA_TXN0
ML_VGA_TXP1
ML_VGA_TXN1
ML_VGA_TXP2
ML_VGA_TXN2
ML_VGA_TXP3
ML_VGA_TXN3
7
7
7
7
7
7
7
7
3
+FCH_VDDAN_33_DAC
1
R112
2
10K_0402_5%
ML_VGA_HPD/GPIO229
C138
22P_0402_50V8J
@
C141
1
2
L30
K31
+3VALW
2SPI_HOLD#
10K_0402_5%
HUDSON-2
30
30
C139 1
C140 1
C29
ML_VGA_HPD
7
SIT, NO.4
AH16
AM15
AJ16
8/26
32
33
BT_ON#
WLBT_OFF#
33 WL_OFF#
BT_ON#
AK15
AN16
AL16
WLBT_OFF#
WL_OFF#
8/25
30
ODD_EN
K6
ODD_EN
FANOUT0/GPIO52
FANOUT1/GPIO53
FANOUT2/GPIO54
VIN0/GPIO175
HW MONITOR
FANIN0/GPIO56
FANIN1/GPIO57
FANIN2/GPIO58
VIN1/GPIO176
VIN2/SDATI_1/GPIO177
VIN3/SDATO_1/GPIO178
VIN4/SLOAD_1/GPIO179
TEMPIN0/GPIO171
VIN5/SCLK_1/GPIO180
1
R119
2
K5
10K_0402_5%
1
R122
2
1
R123
2
K3
10K_0402_5%
M6
10K_0402_5%
TEMPIN1/GPIO172
VIN6/GBE_STAT3/GPIO181
VIN7/GBE_LED3/GPIO182
M3
L2
N4
P1
P3
M1
M5
TEMPIN2/GPIO173
NC1
NC2
NC3
NC4
NC5
TEMPIN3/TALERT#/GPIO174
4
7
N2
1
R113
1
R114
1
R115
1
R116
1
R117
1
R118
1
R120
1
R121
AG16
AH10
A28
G27
L4
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
Used as GPIO181 or configure as one of the following:
-> 10-Kȍ 5% pull-down resistor.
-> 10-Kȍ 5% pull-up resistor to +3.3V_S5.
-> Enabled integrated pull-down/up and left unconnected.
APU_ALERT#_FCH
Compal Secret Data
2011/04/18
Issued Date
2015/07/08
Deciphered Date
A
4
Follow Comal ORB Rework Memo
B
C
D
ŵŵ
ŵŵ
Size
Document Number
Custom
Şɯɨɩɨ
13
of
50
Date:
Sheet
Title
E
Rev
0.4
A
B
1 0_0402_5%
FCH_PWRGD
VGATE
31,45
TEST0
TEST1
TEST2
T9
T10
V9
@
C145
U5 @
.1U_0402_16V7K
1
35
+3VS
GATEA20
31
31
31
KB_RST#
EC_SCI#
EC_SMI#
R126 1
+3V_FCH
For ODD Power Leakage issue
31
+3VS
2 10K_0402_5%
@
AG19
R9
C26
T5
U4
K1
V7
R10
AF19
SYS_RESET#
FCH_PCIE_WAKE#
7
H_THERMTRIP#
2
31
WD_PWRGD
U2
EC_RSMRST#
35
2
R213
10K_0402_5%
AE22
LAN_CLKREQ#
1
G
35
3
1
CARD_CLKREQ#
ODD_DA#_FCH_R
D
ODD_DA#_FCH
S
30
29
10,11,31,33
10,11,31,33
Q43
2N7002K_SOT23-3
33
FCH_SPKR
FCH_SCLK0
FCH_SDATA0
FCH_SCLK0
FCH_SDATA0
FCH_SCLK1
FCH_SDATA1
WLAN_CLKREQ#
19,44
VGA_PWRGD
2
+3V_FCH

R128 1
@
2 2.2K_0402_5%
TEST0
R129 1
@
2 2.2K_0402_5%
TEST1
R130 1
@
2 2.2K_0402_5%
TEST2
18
R131 2
PEG_CLKREQ#
@
1 0_0402_5% PEG_CLKREQ#_R
AG24
AE24
AE26
AF22
AH17
AG18
AF24
AD26
AD25
T7
R7
AG25
AG22
J2
AG26
V8
W8
Y6
V10
AA8
AF25
ODD_DA#_FCH_R
ɯŵɨɭś
ɐŜ
śśŞ
ʫɪŜɪɬŜ
+3V_FCH
R154
1
2 10K_0402_5%
30
ODD_DETECT#
35 USB_OC3#
34
34
USB_OC3#
ODD_DETECT#
USB_OC3#
T19
USB_OC1#
USB_OC0#
USB_OC1#
USB_OC0#
M7
R8
T1
P6
F5
P5
J7
T8
USB_RCOMP
USB_FSD1P/GPIO186
USB_FSD1N
TEST0
TEST1/TMS
TEST2
GA20IN/GEVENT0#
KBRST#/GEVENT1#
LPC_PME#/GEVENT3#
LPC_SMI#/GEVENT23#
LPC_PD#/GEVENT5#
SYS_RESET#/GEVENT19#
WAKE#/GEVENT8#
IR_RX1/GEVENT20#
THRMTRIP#/SMBALERT#/GEVENT2#
WD_PWRGD
USB 1.1
A
31
3
2
FCH_POK
1
USBCLK/14M_25M_48M_OSC
USB_FSD0P/GPIO185
USB_FSD0N
USB_HSD13P
USB_HSD13N
USB_HSD12P
USB_HSD12N
USB_HSD11P
USB_HSD11N
USB_HSD10P
USB_HSD10N
USB_HSD9P
USB_HSD9N
RSMRST#
USB_HSD8P
USB_HSD8N
CLK_REQ4#/SATA_IS0#/GPIO64
SMARTVOLT1/SATA_IS2#/GPIO50
SATA_IS4#/FANOUT3/GPIO55
SATA_IS5#/FANIN3/GPIO59
SPKR/GPIO66
SCL0/GPIO43
SDA0/GPIO47
SCL1/GPIO227
SDA1/GPIO228
CLK_REQ2#/FANIN4/GPIO62
CLK_REQ1#/FANOUT4/GPIO61
IR_LED#/LLB#/GPIO184
SMARTVOLT2/SHUTDOWN#/GPIO51
DDR3_RST#/GEVENT7#/VGA_PD
GBE_LED0/GPIO183
SPI_HOLD#/GBE_LED1/GEVENT9#
GBE_LED2/GEVENT10#
GBE_STAT0/GEVENT11#
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#
USB_HSD7P
USB_HSD7N
USB 2.0
G
1
2
B
Y
PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
PCIE_RST2#/PCI_PME#/GEVENT4#
RI#/GEVENT22#
SPI_CS3#/GBE_STAT1/GEVENT21#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
ACPI / WAKE UP EVENTS
31
31
31
5
P
4
FCH_PWRGD
EC_LID_OUT#
USB MISC
HUDSON-2
AB6
R2
W7
T3
W2
J4
N7
T13
31
+3VS @
C144 .1U_0402_16V7K
1
2
45
USB_HSD6P
USB_HSD6N
USB_HSD5P
USB_HSD5N
USB_HSD4P
USB_HSD4N
USB_HSD3P
USB_HSD3N
USB_HSD2P
USB_HSD2N
USB_HSD1P
USB_HSD1N
BLINK/USB_OC7#/GEVENT18#
USB_OC6#/IR_TX1/GEVENT6#
USB_OC5#/IR_TX0/GEVENT17#
USB_OC4#/IR_RX0/GEVENT16#
USB_OC3#/AC_PRES/TDO/GEVENT15#
USB_OC2#/TCK/GEVENT14#
USB_OC1#/TDI/GEVENT13#
USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
USB_HSD0P
USB_HSD0N
USBSS_CALRP
USBSS_CALRN
USB_SS_TX3P
USB_SS_TX3N
USB_SS_RX3P
USB_SS_RX3N
1
R205
1
R143
1
R145
1
R149
1
R155
1
2 10K_0402_5%
USB_OC0#
@
2 10K_0402_5%
ODD_DETECT#
@
2 10K_0402_5%
H_THERMTRIP#
@
2 100K_0402_5%
29
29
29
USB_OC1#
29
29
HDA_BITCLK_AUDIO
HDA_SDOUT_AUDIO
HDA_SDIN0
R138 1
R140 1
HDA_SYNC_AUDIO
HDA_RST_AUDIO#
2 33_0402_5%
2 33_0402_5%
HDA_BITCLK
HDA_SDOUT
HDA_SDIN0
HDA_SYNC
HDA_RST#
12,17
12,19,43,44
ODD_DA#_FCH_R
0_0402_5%
0_0402_5%
PXS_RST#
PXS_PWREN
SDV2, NO.51
2
2
R156 1
2 10K_0402_5% CARD_CLKREQ#
R151 1
2 2.2K_0402_5%
R211 1 DIS@
31
FCH_SCLK0
R152 1
2 2.2K_0402_5%
R153 1
2 10K_0402_5%
WD_PWRGD
R159 1
2 8.2K_0402_5%
LAN_CLKREQ#
EC_PXCONTROL
EC_PXCONTROL
@
2 10K_0402_5%
HDA_SDIN0
R167 1
@
2 10K_0402_5% PEG_CLKREQ#_R
CLKREQG Not Implemented:
Used as GPIO65, IDLEEXIT#, or left unconnected.
2
K19
J19
J21
D21
C20
D23
C22
F21
E20
F20
A22
E18
A20
J18
H18
G18
B21
K18
D19
A18
C18
B19
B17
A24
D17
T34
T35
T36
T37
T38
T39
T43
T44
T45
T40
T41
T42
T49
T50
T51
T46
T47
T48
10K_0402_5%
R206
R166 1
GPIO189
GPIO190
USB_SS_TX1P
USB_SS_TX1N
PS2_DAT/SDA4/GPIO187
PS2_CLK/CEC/SCL4/GPIO188
SPI_CS2#/GBE_STAT2/GPIO166
USB_SS_TX0P
USB_SS_TX0N
PS2KB_DAT/GPIO189
PS2KB_CLK/GPIO190
PS2M_DAT/GPIO191
PS2M_CLK/GPIO192
EMBEDDED CTRL
KSO_0/GPIO209
KSO_1/GPIO210
KSO_2/GPIO211
KSO_3/GPIO212
KSO_4/GPIO213
KSO_5/GPIO214
KSO_6/GPIO215
KSO_7/GPIO216
KSO_8/GPIO217
KSO_9/GPIO218
KSO_10/GPIO219
KSO_11/GPIO220
KSO_12/GPIO221
KSO_13/GPIO222
KSO_14/GPIO223
KSO_15/GPIO224
KSO_16/GPIO225
KSO_17/GPIO226
SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
EC_PWM0/EC_TIMER0/GPIO197
EC_PWM2/EC_TIMER2/WOL_EN/GPIO199
KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208
G8
B9
USB_RCOMP
R127 1
2 11.8K_0402_1%
H1
H3
H6
H5
1
H10
G10
K10
J12
G12
F12
K12
K13
USB30_P12
USB30_N12
34
34
USB30_P11
USB30_N11
34
34
USB30_P10
USB30_N10
34
34
LP3
LP2
LP1
B11
D11
E10
F10
C10
A10
H9
G9
A8
C8
F8
E8
BT
FP
CMOS
WLAN
USB20_P8
USB20_N8
32
32
USB20_P7
USB20_N7
35
35
USB20_P6
USB20_N6
26
26
USB20_P5
USB20_N5
33
33
1
1
1
1
1
@
@
@
@
@
FVT, NO.26
C6
A6
USB30_N12
USB30_N11
USB30_N10
USB20_N6
USB20_N0
C5
A5
Near Device
R230
R231
R232
R233
R234
2
2
2
2
2
300_0402_5%
300_0402_5%
300_0402_5%
300_0402_5%
300_0402_5%
C222
C223
C224
C225
C226
1
1
1
1
1
@
@
@
@
@
2
2
2
2
2
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
2
C1
C3
E1
E3
USB20_P0
USB20_N0
C16
A16
USBSS_CALRP
USBSS_CALRN
R132 1
R133 1
35
35
RP1
2 1K_0402_1%
2 1K_0402_1%
+FCH_VDD_11_SSUSB_S
A14
C14
C12
A12
D15
B15
USB30_FTX_DRX_P2_C
USB30_FTX_DRX_N2_C
E14
F14
USB30_FRX_DTX_P2
USB30_FRX_DTX_N2
F15
G15
USB30_FTX_DRX_P1_C
USB30_FTX_DRX_N1_C
H13
G13
USB30_FRX_DTX_P1
USB30_FRX_DTX_N1
J16
H16
USB30_FTX_DRX_P0_C
USB30_FTX_DRX_N0_C
J15
K15
USB30_FRX_DTX_P0
USB30_FRX_DTX_N0
H19
G19
G22
G21
E22
H22
J22
H21
R144 1
R147 1
FCH_SIC
FCH_SID
C212 1
C213 1
2 .1U_0402_16V7K
2 .1U_0402_16V7K
USB30_FTX_DRX_P2
USB30_FTX_DRX_N2
USB30_FRX_DTX_P2
USB30_FRX_DTX_N2
C218 1
C219 1
2 .1U_0402_16V7K
2 .1U_0402_16V7K
USB30_FTX_DRX_P1
USB30_FTX_DRX_N1
USB30_FRX_DTX_P1
USB30_FRX_DTX_N1
C220 1
C221 1
2 .1U_0402_16V7K
2 .1U_0402_16V7K
USB30_FTX_DRX_P0
USB30_FTX_DRX_N0
USB30_FRX_DTX_P0
USB30_FRX_DTX_N0
34
34
34
34
34
34
34
34
34
34
34
34
LP3
LP2
3
LP1
2 10K_0402_5%
2 10K_0402_5%
FCH_SIC
FCH_SID
EC_PWM2
EC_PWM2
7
7
16
strap pin
K21
K22
F22
F24
E24
B23
C24
F18
4
GPIO188
GPIO189
GPIO190
10K_0402_5%
R210
HDA_BITCLK
10K_0402_5%
R158
2
@ 1
2 10K_0402_5%
A
6
DIS@
Q44B
DMN66D0LDW-7_SOT363-6
3
4
8/26
10K_0402_5%
R165
2
1
EC_RSMRST#
@
2 UMA@ 1
2 2.2K_0402_5%
R163 1
4
10K_0402_5%
R157
2 UMA@ 1
FCH_SDATA1
1
FCH_SCLK1
2 10K_0402_5%
DIS@
2 10K_0402_5%
R161 1
USB_SS_RX2P
USB_SS_RX2N
USB_SS_RX0P
USB_SS_RX0N
SCL1/SDA1: ASF-Capable LAN Devices Not Implemented: Used as
GPIO227 or configured for one of the following options: 10-Kȍ 5% pull-up
resistor to +3.3V_S5; 10-Kȍ 5% pull-down resistor.
10K_0402_5%
R164
2 DIS@ 1
R160 1
8/25
GPIO188
R146
R148
FCH_SDATA0
+3V_FCH
R162 1
2 10K_0402_5%
2
+3V_FCH
2 10K_0402_5% WLAN_CLKREQ#
DIS@ 1
DIS@ 1
DIS@
Q44A
1
+3VS
R174 1
USB_SS_TX2P
USB_SS_TX2N
USB_SS_RX1P
USB_SS_RX1N
2 10K_0402_5% FCH_PCIE_WAKE#
2 10K_0402_5%
AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO167
AZ_SDIN1/GPIO168
AZ_SDIN2/GPIO169
AZ_SDIN3/GPIO170
AZ_SYNC
AZ_RST#
EC_LID_OUT#
3
@
AB3
AB1
AA2
Y5
Y3
Y1
AD6
AE4
USB 3.0
R139
2 10K_0402_5%
2 33_0402_5%
2 33_0402_5%
HD AUDIO
1
R134 1
R135 1
5
R137
E
U2D
PCIE_RST2 : Reset PCIE device on Hudson2/3
1 0_0402_5%
GPIO
@
R125 2
D
USB OC
R124 2
C
GPIO188
GPIO189
0
0
0
PX
0
0
1
Reserved
0
1
0
DISCRET
0
1
1
B
GPIO190
Function
UMA
Compal Secret Data
2011/04/18
Issued Date
2015/07/08
Deciphered Date
C
D
ŵŵ
ŵŵ
Size
Document Number
Custom
Şɯɨɩɨ
14
of
50
Date:
Sheet
Title
E
Rev
0.4
A
B
C
+3VS
PCI/GPIO I/O
CORE S0
CLKGEN I/O
PCI EXPRESS
MAIN LINK
SERIAL ATA
GBE LAN
3.3V_S5 I/O
22U_0603_6.3V6M
2
1
2
1
2
+1.1VS
42ohm @ 100MHz
1
2
R178
0_0805_5%
N20
M20
+3V_FCH
1
R179
+3V
+1.1VALW
1
R181
2
1U_0402_6.3V6K
1
2
0_0603_5%
3
SIT, NO.50
T12
T13
+1.1V
+VDDAN_33_HWM
USB SS
1
26mA
VDDIO_AZ_S
AA4
1
2
0_0603_5%
1
2
.1U_0402_16V7K
2
C211
1
2
1
R182
2
0_0402_5%
1
R184
2 2.2U_0402_6.3V6M
2
0_0402_5%
+3VS
+VDDIO_AZ
ɏɏ
śʫɪŜɪŵ
ɨŜɬɏɬřɪŜɪŵɨŜɨɏɬŜ
śʫɪŜɪŵ
ɨŜɬɏɥřɪŜɪŵɨŜɨɥŜ
4
Compal Secret Data
2011/04/18
Issued Date
2015/07/08
Deciphered Date
B
ś
ɏɪɪɏɏś
ʫɪŜɪɏɬŜ
.1U_0402_16V7K
2
C210
2
1
1U_0402_6.3V6K
1
C209
42 ohm/4A
+VDDCR_11_SSUSB
10U_0603_6.3V6M
1
R185
FBMA-L11-201209-221LMA30T_0805
1
C206 1
POWER
2 L16
C208
2.2U_0402_6.3V6M
C207
SIT, NO.49
SIT, NO.55
+3V_FCH
M8
2
VDDCR_11_SSUSB_S_1
VDDCR_11_SSUSB_S_2
VDDCR_11_SSUSB_S_3
VDDCR_11_SSUSB_S_4
220 ohm
.1U_0402_16V7K
N16
N17
P17
M17
2
C205
424mA
1
.1U_0402_16V7K
2
VDDAN_33_HWM_S
2.2U_0402_6.3V6M
1
.1U_0402_16V7K
C203
2
.1U_0402_16V7K
C202
1U_0402_6.3V6K
1
C199
+VDDAN_11_SSUSB
1
1
12mA
VDDAN_11_SSUSB_S_1
VDDAN_11_SSUSB_S_2
VDDAN_11_SSUSB_S_3
VDDAN_11_SSUSB_S_4
VDDAN_11_SSUSB_S_5
L13
1
2
MBK1608221YZF_2P
+VDDPL_11_SYS_S
C204
2
0_0603_5%
J24
2.2U_0402_6.3V6M
282mA
C201
1
R183
VDDPL_11_SYS_S
C198
2.2U_0402_6.3V6M
C200
40mils
70mA
VDDCR_11_USB_S_1
VDDCR_11_USB_S_2
2
P16
M14
N14
P13
P14
ɏɨɨɏɏ
ʫɨŜɨɏɬɪŜɥ
Śř
ʫɨŜɨɏɥŜ
+1.1V
42mA
+FCH_VDD_11_SSUSB_S
+3VS
A
ʫɏɪŜɪ
ʫɪŜɪɏɬɪ
Śř
ʫɪŜɪɏɥŜ
ŞɩśʫɪŜɪɏɥ
Ŝ
L8
1
2
MBK1608221YZF_2P
220 ohm
C192
1U_0402_6.3V6K
C191
2
2
0_0402_5%
SIT, NO.56
+VDDCR_1.1V
1
2
SIT, NO.54
+VDDXL_3.3V
1
1
+1.1VS
42ohm @ 100MHz
1
2
R175
0_0805_5%
22U_0603_6.3V6M
1
2.2U_0402_6.3V6M
G24
187mA
USB
10U_0603_6.3V6M
C163
1U_0402_6.3V6K
C174
1U_0402_6.3V6K
2
C179
2
2
VDDCR_11_S_1
VDDCR_11_S_2
1
+VDDIO_33_S
1
1U_0402_6.3V6K
VDDAN_11_USB_S_1
VDDAN_11_USB_S_2
2
5mA
VDDXL_33_S
C156
1
2
C173
2
1
1U_0402_6.3V6K
1
C178
VDDAN_33_USB_S_1
VDDAN_33_USB_S_2
VDDAN_33_USB_S_3
VDDAN_33_USB_S_4
VDDAN_33_USB_S_5
VDDAN_33_USB_S_6
VDDAN_33_USB_S_7
VDDAN_33_USB_S_8
VDDAN_33_USB_S_9
VDDAN_33_USB_S_10
VDDAN_33_USB_S_11
VDDAN_33_USB_S_12
N18
L19
M18
V12
V13
Y12
Y13
W11
2
22U_0603_6.3V6M
C167
1U_0402_6.3V6K
1
2
C172
VDDIO_GBE_S_1
VDDIO_GBE_S_2
VDDIO_33_S_1
VDDIO_33_S_2
VDDIO_33_S_3
VDDIO_33_S_4
VDDIO_33_S_5
VDDIO_33_S_6
VDDIO_33_S_7
VDDIO_33_S_8
+1.1VS
42ohm @ 100MHz
1
2
R172
0_0603_5%
+AVDD_SATA
59mA
VDDCR_11_GBE_S_1
VDDCR_11_GBE_S_2
1U_0402_6.3V6K
C162
2
1
2.2U_0402_6.3V6M
1
2
2
2
2
.1U_0402_16V7K
2
C197
1
.1U_0402_16V7K
C196
10U_0603_6.3V6M
C195
1
2
1
U12
U13
+VDDCR_11V_USB
L14
1
2
+VDDPL_33_PCIE
MBK1608221YZF_2P
L15
1
2
+VDDPL_33_SATA
MBK1608221YZF_2P
1
AA21
Y20
AB21
AB22
AC22
AC21
AA20
AA18
AB20
AC19
140mA
.1U_0402_16V7K
C190
L12
1
2
MBK1608221YZF_2P
+3VS
2
@
2
C187
2
1
1U_0402_6.3V6K
1
G7
H8
J8
K8
K9
M9
M10
N9
N10
M12
N12
M11
2
1
2
0_0805_5%
+1.1V
220 ohm
1
2
.1U_0402_16V7K
SIT, NO.48
1
VDDIO_33_GBE_S
470mA
.1U_0402_16V7K
2
C184
1
1U_0402_6.3V6K
2
C183
1
VDDAN_11_ML_1
VDDAN_11_ML_2
VDDAN_11_ML_3
VDDAN_11_ML_4
2
+VDDAN_11_PCIE
C177
AA9
AA10
1
1337mA
VDDAN_11_SATA_1
VDDAN_11_SATA_4
VDDAN_11_SATA_2
VDDAN_11_SATA_3
VDDAN_11_SATA_5
VDDAN_11_SATA_6
VDDAN_11_SATA_7
VDDAN_11_SATA_8
VDDAN_11_SATA_9
VDDAN_11_SATA_10
1
+VDDAN_11_PCIE
.1U_0402_16V7K
2
0_0402_5%
1U_0402_6.3V6K
C182
10U_0603_6.3V6M
1
2
C189
2
1
2.2U_0402_6.3V6M
C188
1
VDDPL_11_DAC
AB24
Y21
AE25
AD24
AB23
AA22
AF26
AG27
C171
.1U_0402_16V7K
C170
.1U_0402_16V7K
AB10
+VDDAN_11_USB_S
2
.1U_0402_16V7K
2
C194
1
2.2U_0402_6.3V6M
C193
L11
1
2
+VDDPL_33_USB_S
MBK1608221YZF_2P
220 ohm
2
L10
+3V
4
2
1
+1.1V
220 ohm
220 ohm
1
SIT, NO.47
1
2
MBK1608221YZF_2P
220 ohm
C181
C180
2
SIT, NO.53
3
1
10U_0603_6.3V6M
2
1
Y22
V23
V24
V25
+VDDAN_33_USB
220 ohm/2A
.1U_0402_16V7K
C186
2.2U_0402_6.3V6M
C185
2
V21
226mA
1
R180
L6
1
2
FBMA-L11-201209-221LMA30T_0805
1
LDO_CAP
7mA
AB11
AA11
+3V
VDDPL_33_SATA
VDDAN_11_PCIE_1
VDDAN_11_PCIE_2
VDDAN_11_PCIE_3
VDDAN_11_PCIE_4
VDDAN_11_PCIE_5
VDDAN_11_PCIE_6
VDDAN_11_PCIE_7
VDDAN_11_PCIE_8
C166
2 0_0603_5%
+3V
1
+VDDPL_11_DAC
M31
2
1088mA
+VDDAN_11_ML
R177 1
2
SIT, NO.52
220 ohm
2
2.2U_0603_6.3V6K
2 0_0402_5%
SIT, NO.51
L7
1
2 +VDDPL_33_SSUSB_S
MBK1608221YZF_2P
VDDPL_33_PCIE
1
2
.1U_0402_16V7K
R176 1
C169
4.7U_0402_6.3V6M
2
VDDPL_33_USB_S
12mA
1
2
C165
1
C164
C168
1
11mA
@
0.1U_0402_16V4Z
2
C176
2
1
2.2U_0603_6.3V6K
C175
220 ohm
VDDPL_33_SSUSB_S
AG28
+VDDPL_33_SATA
L5
30mil
1
2
FBMA-L11-201209-221LMA30T_0805
VDDAN_33_DAC
14mA
D7
ɏśɨŜɯ

220 ohm/2A
11mA
AH29
+VDDPL_33_PCIE
+FCH_VDDAN_33_DAC
VDDPL_33_ML
V22
L18
+VDDPL_33_USB_S
+3VS
VDDPL_33_DAC
30mA
T22
+VDDPL_33_SSUSB_S
L4
1
2
MBK1608221YZF_2P
12mA
U22
+FCH_VDDAN_33_DAC
+1.1VS
20mA
1
+1.1VS_CKVDD
1U_0402_6.3V6K
+VDDPL_33_ML
C150
+VDDPL_33_DAC
2 0_0402_5%
2
C161
2 0_0402_5%
R1691
H26
J25
K24
L22
M22
N21
N22
P22
.1U_0402_16V7K
R1731
1
+1.1VS_CKVDD
340mA
VDDAN_11_CLK_1
VDDAN_11_CLK_2
VDDAN_11_CLK_3
VDDAN_11_CLK_4
VDDAN_11_CLK_5
VDDAN_11_CLK_6
VDDAN_11_CLK_7
VDDAN_11_CLK_8
C160
2
+VDDPL_33_MLDAC
VDDPL_33_SYS
2
.1U_0402_16V7K
1
.1U_0402_16V7K
2
C158
1
.1U_0402_16V7K
C153
L3
1
2
MBK1608221YZF_2P
@
H24
+VDDPL_33_SYS
1
1U_0402_6.3V6K
47mA
+VDDPL_33_MLDAC
2
C159
2
0_0402_5%
1
C149
1
T14
T17
T20
U16
U18
V14
V17
V20
Y17
.1U_0402_16V7K
2
VDDCR_11_1
VDDCR_11_2
VDDCR_11_3
VDDCR_11_4
VDDCR_11_5
VDDCR_11_6
VDDCR_11_7
VDDCR_11_8
VDDCR_11_9
C148
C157
2
1
.1U_0402_16V7K
1
.1U_0402_16V7K
2
C152
1
.1U_0402_16V7K
2
C151
1
VDDIO_33_PCIGP_1
VDDIO_33_PCIGP_2
VDDIO_33_PCIGP_3
VDDIO_33_PCIGP_4
VDDIO_33_PCIGP_5
VDDIO_33_PCIGP_6
VDDIO_33_PCIGP_7
VDDIO_33_PCIGP_8
VDDIO_33_PCIGP_9
VDDIO_33_PCIGP_10
.1U_0402_16V7K
AB17
AB18
AE9
AD10
AG7
AC13
AB12
AB13
AB14
AB16
+VDDIO_33_PCIGP
1
R170
+VCC_VDDCR_11
HUDSON-2
102mA
C155
2
0_0603_5%
22U_0603_6.3V6M
2
1
R171
+3VS
C146
1
.1U_0402_16V7K
C147
2
2.2U_0402_6.3V6M
C154
1
+FCH_VDDAN_33_DAC
+3VS
1007mA
+VDDPL_33_SYS
220 ohm
E
+1.1VS
U2C
L2
1
2
MBK1608221YZF_2P
1
R168
D
C
D
Size
Document Number
Custom
Şɯɨɩɨ
15
of
Date:
Sheet
Title
E
Rev
0.4
50
5
4
3
2
1
DEBUG STRAPS
STRAP PINS
USE
DEBUG
STRAPS
CLK_PCI_EC
NON_FUSION
CLOCK MODE
EC
ENABLED
DEFAULT
S5 PLUS
MODE
DISABLED
1
2
1
PULL
LOW
PCI_AD24
PCI_AD23
USE PCI
PLL
DISABLE
ILA
AUTORUN
USE FC
PLL
USE DEFAULT
PCIE STRAPS
DISABLE PCI
MEM BOOT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
BYPASS
PCI PLL
ENABLE
ILA
AUTORUN
BYPASS
FC PLL
USE EEPROM
PCIE STRAPS
ENABLE PCI
MEM BOOT
D
@
+3V_FCH
10K_0402_5%
2
S5 PLUS
MODE
ENABLED
PCI_AD25
R192
1
+3V_FCH
10K_0402_5%
2
+3V_FCH
R191
@
SPI ROM
PCI_AD26
DEFAULT
10K_0402_5%
@
+3V_FCH
DEFAULT
CLKGEN
DISABLE
R190
@
+3VS
PULL
HIGH
PCI_AD27
12
PCI_AD27
12
PCI_AD26
12
PCI_AD25
12
PCI_AD24
12
PCI_AD23
C
PCI_CLK1
PCI_CLK3
1
2
1
2
1
2
1
1
1
2
1
2
1
2
1
2
1
2
1
2
1
2.2K_0402_5%
@
R197
2.2K_0402_5%
@
R196
2.2K_0402_5%
@
R204 2.2K_0402_5%
R203 2.2K_0402_5%
@
R202 10K_0402_5%
R201 10K_0402_5%
R200 10K_0402_5%
@
@
R195
RTC_CLK
2.2K_0402_5%
@
R194
EC_PWM2
2.2K_0402_5%
LPC_CLK1
14
R193
CLK_PCI_EC
2
PCI_CLK4
12
12,31
+3VS
10K_0402_5%
12,31
LPC ROM
1
DEFAULT
R189
12
CLKGEN
ENABLED
2
DEFAULT
10K_0402_5%
12
RTC_CLK
1
DEFAULT
+3VS
12
EC_PWM2
2
EC
DISABLED
1
FUSION
CLOCK
MODE
2
IGNORE
DEBUG
STRAP
1
FORCE
PCIE GEN1
2
PULL
LOW
LPC_CLK1
DEFAULT
R188
EFUSE
ALLOW
PCIE GEN2
PCI_CLK4
R199 10K_0402_5%
VSSPL_SYS
PCI_CLK3
10K_0402_5%
VSSXL
VSSPL_DAC
VSSAN_DAC
VSSANQ_DAC
VSSIO_DAC
PCI_CLK1
R187
H25
VSSAN_HWM
PULL
HIGH
FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]
R198 10K_0402_5%
N8
K25
T25
T27
U6
U14
U17
U20
U21
U30
U32
V11
V16
V18
W4
W6
W25
W28
Y14
Y16
Y18
AA6
AA12
AA13
AA14
AA16
AA17
AA25
AA28
AA30
AA32
AB25
AC6
AC18
AC28
AD27
AE6
AE15
AE21
AE28
AF8
AF12
AF16
AF33
AG30
AG32
AH5
AH11
AH18
AH19
AH21
AH23
AH25
AH27
AJ18
AJ28
AJ29
AK21
AK25
AL18
AM21
AM25
AN1
AN18
AN28
AN33
10K_0402_5%
B
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R186
C
GROUND
D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
2
HUDSON-2
A3
A33
B7
B13
D9
D13
E5
E12
E16
E29
F7
F9
F11
F13
F16
F17
F19
F23
F25
F29
G6
G16
G32
H12
H15
H29
J6
J9
J10
J13
J28
J32
K7
K16
K27
K28
L6
L12
L13
L15
L16
L21
M13
M16
M21
M25
N6
N11
N13
N23
N24
P12
P18
P20
P21
P31
P33
R4
R11
R25
R28
T11
T16
T18
2
U2E
@
B
T21
L28
K33
N28
R6
A
A
Compal Secret Data
Issued Date
2011/04/18
Deciphered Date
2015/07/08
Title
Size
B
Date:
5
4
3
2
Şŵ
Document Number
Şɯɨɩɨ
16
Sheet
of
1
Rev
0.4
50
5
4
5
5
D
U1401A
PCIE_CTX_GRX_P0
PCIE_CTX_GRX_N0
AA38
Y37
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_N1
Y35
W36
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_N2
W38
V37
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_N3
V35
U36
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_N4
U38
T37
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_N5
T35
R36
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_N6
R38
P37
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_N7
P35
N36
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_N8
N38
M37
M35
L36
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_N10
L38
K37
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_N11
K35
J36
PCIE_CTX_GRX_P12
PCIE_CTX_GRX_N12
J38
H37
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_N13
H35
G36
PCIE_CTX_GRX_P14
PCIE_CTX_GRX_N14
G38
F37
PCIE_CTX_GRX_P15
PCIE_CTX_GRX_N15
F35
E37
PCIE_TX0P
PCIE_TX0N
PCIE_RX1P
PCIE_RX1N
PCIE_TX1P
PCIE_TX1N
PCIE_RX2P
PCIE_RX2N
PCIE_TX2P
PCIE_TX2N
PCIE_RX3P
PCIE_RX3N
PCIE_TX3P
PCIE_TX3N
PCIE_RX4P
PCIE_RX4N
PCIE_TX4P
PCIE_TX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
2
5
5
1
Y33
Y32
PCIE_CRX_C_GTX_P0
PCIE_CRX_C_GTX_N0
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 C1401 DIS@
1 C1402 DIS@
PCIE_CRX_GTX_P0
PCIE_CRX_GTX_N0
W33
W32
PCIE_CRX_C_GTX_P1
PCIE_CRX_C_GTX_N1
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 C1404 DIS@
1 C1405 DIS@
PCIE_CRX_GTX_P1
PCIE_CRX_GTX_N1
U33
U32
PCIE_CRX_C_GTX_P2
PCIE_CRX_C_GTX_N2
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 C1406 DIS@
1 C1407 DIS@
PCIE_CRX_GTX_P2
PCIE_CRX_GTX_N2
U30
U29
PCIE_CRX_C_GTX_P3
PCIE_CRX_C_GTX_N3
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 C1408 DIS@
1 C1403 DIS@
PCIE_CRX_GTX_P3
PCIE_CRX_GTX_N3
T33
T32
PCIE_CRX_C_GTX_P4
PCIE_CRX_C_GTX_N4
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 C1409 DIS@
1 C1410 DIS@
PCIE_CRX_GTX_P4
PCIE_CRX_GTX_N4
T30
T29
PCIE_CRX_C_GTX_P5
PCIE_CRX_C_GTX_N5
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 C1411 DIS@
1 C1412 DIS@
PCIE_CRX_GTX_P5
PCIE_CRX_GTX_N5
P33
P32
PCIE_CRX_C_GTX_P6
PCIE_CRX_C_GTX_N6
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 C1413 DIS@
1 C1414 DIS@
PCIE_CRX_GTX_P6
PCIE_CRX_GTX_N6
P30
P29
PCIE_CRX_C_GTX_P7
PCIE_CRX_C_GTX_N7
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 C1415 DIS@
1 C1416 DIS@
PCIE_CRX_GTX_P7
PCIE_CRX_GTX_N7
N33
N32
PCIE_CRX_C_GTX_P8
PCIE_CRX_C_GTX_N8
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 C1417 DIS@
1 C1418 DIS@
PCIE_CRX_GTX_P8
PCIE_CRX_GTX_N8
PCIE_CRX_GTX_P9
PCIE_CRX_GTX_N9
U1401G
LVDS CONTROL
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
TXOUT_U3P
TXOUT_U3N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_RX13P
PCIE_RX13N
PCIE_TX13P
PCIE_TX13N
PCIE_RX14P
PCIE_RX14N
PCIE_TX14P
PCIE_TX14N
PCIE_RX15P
PCIE_RX15N
PCIE_TX15P
PCIE_TX15N
N30
N29
PCIE_CRX_C_GTX_P9
PCIE_CRX_C_GTX_N9
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 C1419 DIS@
1 C1420 DIS@
L33
L32
PCIE_CRX_C_GTX_P10
PCIE_CRX_C_GTX_N10
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 C1421 DIS@
1 C1422 DIS@
PCIE_CRX_GTX_P10
PCIE_CRX_GTX_N10
L30
L29
PCIE_CRX_C_GTX_P11
PCIE_CRX_C_GTX_N11
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 C1423 DIS@
1 C1424 DIS@
PCIE_CRX_GTX_P11
PCIE_CRX_GTX_N11
K33
K32
PCIE_CRX_C_GTX_P12
PCIE_CRX_C_GTX_N12
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 C1425 DIS@
1 C1426 DIS@
PCIE_CRX_GTX_P12
PCIE_CRX_GTX_N12
J33
J32
PCIE_CRX_C_GTX_P13
PCIE_CRX_C_GTX_N13
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 C1427 DIS@
1 C1428 DIS@
PCIE_CRX_GTX_P13
PCIE_CRX_GTX_N13
K30
K29
PCIE_CRX_C_GTX_P14
PCIE_CRX_C_GTX_N14
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 C1429 DIS@
1 C1430 DIS@
PCIE_CRX_GTX_P14
PCIE_CRX_GTX_N14
H33
H32
PCIE_CRX_C_GTX_P15
PCIE_CRX_C_GTX_N15
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 C1400 DIS@
1 C1431 DIS@
PCIE_CRX_GTX_P15
PCIE_CRX_GTX_N15
TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
TXOUT_L3P
TXOUT_L3N
12,14
12,33,35
1
PXS_RST#
2
APU_PCIE_RST#
IN1
IN2
PCIE_CALRP
AH16
1 1K_0402_5%
AA30
1
GPU_RST#
PWRGOOD
PCIE_CALRN
Y30
1.27K_0402_1% 1 DIS@
2 R1403
Y29
2K_0402_1% 1 DIS@
2 R1405
3
CALIBRATION
R1404 2 DIS@
AJ38
AK37
AH35
AJ36
AG38
AH37
AF35
AG36
AP34
AR34
AW37
AU35
C
AR37
AU39
AP35
AR35
AN36
AP37
+3VGS
PCIE_REFCLKP
PCIE_REFCLKN
B
AK35
AL36
2160809000A11SEYMOU_FCBGA962
DIS@
U1400
VCC
AB35
AA36
CLK_PCIE_VGA
CLK_PCIE_VGA#
AK27
AJ27
LVTMDP
PCIE_TX7P
PCIE_TX7N
GND
CLK_PCIE_VGA
CLK_PCIE_VGA#
VARY_BL
DIGON
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
CLOCK
12
12
D

5
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_N9
PCIE_RX0P
PCIE_RX0N
PCI EXPRESS INTERFACE
C
3
OUT
4
GPU_RST#
B
DIS@
+1.0VGS
PERSTB
R2486
DIS@
100K_0402_5%
2
ɬŜɥ
@
A
A
Compal Secret Data
Issued Date
2011/04/18
Deciphered Date
2015/07/08
Title
Size
C
Date:
5
4
3
2
ɏɏɩɏŵ
Document Number
Rev
0.4
Şɯɨɩɨ
of
17
50
Sheet
1
5
4
3
2
1
ŞŞ
U1401B
TXCAP_DPA3P
TXCAM_DPA3N
TX0P_DPA2P
TX0M_DPA2N
MUTI GFX
DPA
+1.8VGS
10K_0402_5%
1 X76@
2
R1410
VRAM_ID3
10K_0402_5%
1 X76@
2
R1425
10K_0402_5%
1 X76@
2
R1426
VRAM_ID0
VRAM_ID1
VRAM_ID2
VRAM_ID3
D
10K_0402_5%
1 X76@
2
R1431
10K_0402_5%
1 X76@
2
R1432
AR8
AU8
AP8
AW8
AR3
AR1
AU1
AU3
AW3
AP6
AW5
AU5
AR6
AW6
AU6
AT7
AV7
AN7
AV9
AT9
AR10
AW10
AU10
AP10
AV11
AT11
AR12
AW12
AU12
AP12
+3VGS
AJ21
AK21
10K_0402_5%
1
2
R1528 GPU_GPIO9
10K_0402_5%
1 DIS@
2
R1411 GPU_GPIO0
10K_0402_5%
1 DIS@
2
R1412 GPU_GPIO1
10K_0402_5%
1
@
2
R1413 GPU_GPIO2
10K_0402_5%
1
@
2
R1414 GPU_GPIO11
10K_0402_5%
1
@
2
R1415 GPU_GPIO12
@
NC_DVPCNTL_MVP_0
NC_DVPCNTL_MVP_1
NC_DVPCNTL_0
NC_DVPCNTL_1
NC_DVPCNTL_2
NC_DVPCLK
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
NC_DVPDATA_17
NC_DVPDATA_18
NC_DVPDATA_19
NC_DVPDATA_20
NC_DVPDATA_21
NC_DVPDATA_22
NC_DVPDATA_23
SWAPLOCKA
SWAPLOCKB
TX2P_DPA0P
TX2M_DPA0N
TXCBP_DPB3P
TXCBM_DPB3N
TX4P_DPB1P
TX4M_DPB1N
TX5P_DPB0P
TX5M_DPB0N
TXCCP_DPC3P
TXCCM_DPC3N
TX0P_DPC2P
TX0M_DPC2N
DPC
TX1P_DPC1P
TX1M_DPC1N
TX2P_DPC0P
TX2M_DPC0N
NC_TXCDP_DPD3P
NC_TXCDM_DPD3N
NC_TX3P_DPD2P
NC_TX3M_DPD2N
DPD
I2C
AK26
AJ26
TX3P_DPB2P
TX3M_DPB2N
DPB
NC_TX4P_DPD1P
NC_TX4M_DPD1N
NC_TX5P_DPD0P
NC_TX5M_DPD0N
10K_0402_5%
1
@
2
R1416 GPU_GPIO13
10K_0402_5%
1
@
2
R1417 GPU_GPIO16
10K_0402_5%
1
@
2
R1418 GPIO24_TRSTB
8/25
GPU_GPIO6
T1408
10K_0402_5%
1
@
2
R1419 GPIO25_TDI
10K_0402_5%
1
@
2
R1420 GPIO27_TMS
10K_0402_5%
1
@
2 R1421
GPU_GPIO9
GPU_GPIO11
GPU_GPIO12
GPU_GPIO13
GPIO26_TCK
C
44
R1423 1
44
14
GPU_VID0
GPU_GPIO16
GPU_VID0
2 10K_0402_5%
GPU_VID1
@
GPU_VID1
PEG_CLKREQ#
GPIO24_TRSTB
GPIO25_TDI
GPIO26_TCK
GPIO27_TMS
GPIO28_TDO
PEG_CLKREQ#
T1400
2
+1.8VGS
1
R1424
499_0402_1%
DIS@
AK24
1
+VREFG_GPU
+1.8VGS
2
1
BLM15BD121SN1D_2P~D
1
R
RB
.1U_0402_16V7K
DIS@
C1441
1U_0402_6.3V6K
DIS@
C1440
10U_0603_6.3V6M
DIS@
C1439
2
1
2
R2/NC
R2B/NC
G2/NC
G2B/NC
B2/NC
B2B/NC
C/NC
Y/NC
COMP/NC
H2SYNC/GENLK_CLK
V2SYNC/GENLK_VSYNC
A2VDDQ/NC
VREFG
AN31
XTALIN
XTALOUT
AV33
AU34
2
.1U_0402_16V7K
DIS@
C1444
1U_0402_6.3V6K
DIS@
C1443
10U_0603_6.3V6M
DIS@
C1442
AW34
1
2
AW35
1
R2SET/NC
PLL/CLOCK
DPLL_VDDC
DDC2CLK
DDC2DATA
+1.8VGS
DIS@
L1404
(1.8V@20mA TSVDD)
4
DIS@
C1446
20P_0402_50V8
27MHZ 16PF 5YEA27000163IF50Q5
FVT, NO.19
1
2
1U_0402_6.3V6K
DIS@
C1448
2
3
10U_0603_6.3V6M
DIS@
C1447
3
GND
AJ32
AJ33
+TSVDD
1
2
0.1U_0402_16V4Z
DIS@
C1449
XTALIN
1
2
BLM15BD121SN1D_2P~D
GND
XO_IN
AUX2P
AUX2N
XO_IN2
DDCCLK_AUX3P
DDCDATA_AUX3N
DIS@
Y1400
1
DDC1CLK
DDC1DATA
AUX1P
AUX1N
XTALIN
XTALOUT
1
DPLUS
DMINUS
THERMAL
NC_DDCCLK_AUX4P
NC_DDCDATA_AUX4N
DDCCLK_AUX5P
DDCDATA_AUX5N
TS_FDO
DDC6CLK
DDC6DATA
TS_A/NC
TSVDD
TSVSS
TX_PWRS_ENB
PS_1[4]
GPIO0

ɥśɬɥʩ
ɨś
TX_DEEMPH_EN
PS_1[5]
GPIO1
Ş
ɥśŞ
ɨśŞ
BIF_GEN3_EN_A
PS_1[1]
GPIO2
PS_2[4]
GPIO9
0
K4W2G1646C-HC11
128M x 16 x 4 (1G)
AV31
AU30
6DPVXQJ*%
316$4
1
1
0
AR32
AT31
AT33
AU32
AU14
AV13
BIF_VGA DIS
AT15
AR14
AU16
AV15
AT17
AR16
ɪ
ɥś
ɪŞ
ɨś
ɪŞ
ſśŵŵƀ
ɨ

ɥś

ɨś
ſŞ
ƀ
ɥ
ɨɥɥŞɬɨɩɩɬɥɬſƀ
ɨɥɨŞɨɩɬɨɥſƀ
ɨɥɨŞɩɩɬɩɥſƀ
ɨɥɨŞɫɩɬɫɥſƀ
ɨɥɨŞɯɩɬɯɥſƀ
ɨɥɥŞɬɨɩɩɬɬɨɩſƀ
ɨɥɨŞɨɩɬɥɨɥſƀ
ƃɨɪśɨɨƄ
ROMIDCFG[2:0]
PS_0[3..1]
BIOS_ROM_EN
PS_2[3]
ɩɩ
AU20
AT19
AT21
AR20
D
AT23
AR22
ƃɨƄ
ƃɥƄ
ɏ
ɏɥƃɫƄ
ɏɨƃɪƄ
ɏɨƃɩƄ
AF37
AE38
R1422 1 DIS@
2 499_0402_1%
AD34
AE34
+AVDD
(1.8V@65mA AVDD)
AC33
AC34
+VDD1DI
(1.8V@100mA VDD1DI) 1
AC30
AC31
AD30
AD31
1
2
1
2
2
+1.8VGS
L1402 DIS@
BLM15BD121SN1D_2P~D
1
DIS@
L1401 1
1
2
1
2

Ŝ

ɥ
ś
ř
+1.8VGS
AC36
AC38
ɥɥŞ
ɥɨŞ
ɨɥŞ
ɨɨŞ
AD39
AD37
AE36
AD35

ɥś
ɨś
AU22
AV21
AB34

ɩɩʰɥř

ɩɩʰɨř
ɏ
ɯ
ɩɨ
ſŵŵƀ
2 BLM15BD121SN1D_2P~D
C
1
ɏɏɏƃɩƄ
ɏɏɏƃɨƄ
ɏɏɏƃɥƄ
2
ɏɪƃɬƄ
ɏɪƃɫƄ
ɏɥƃɬƄ
ɨɨɨʰɥ
ɨɨɥʰɨ
ɨɥɨʰɩ
ɨɥɥʰɪ
ɥɨɨʰɫ
ɥɨɥʰɬ
ɥɥɨʰɭ
ɥɥɥʰ
2
AF30
AF31
AC32
AD32
AF32
AD29 GENLK_CLK
AC29 GENLK_VSYNC
T1401
T1402
FVT, NO.32
+3VGS
AG31
AG32
NC_DDCCLK_AUX7P
NC_DDCDATA_AUX7N

+3VGS
DIS@
R1427
10K_0402_5%
AG33
DIS@
R1428
10K_0402_5%
AD33
AF33
VGA_SMB_CK2
AA29
VGA_SMB_DA2
2
AF29
AG29
1
DPLL_PVDD
DPLL_PVSS
DDC/AUX
+DPLL_VDDC
0
řŵŵ
ɥśř
ɨśř
GPIO_28_FDO
DAC2
+DPLL_VDDC
1
R1437 DIS@ 1M_0402_5%
1
VDD1DI
VSS1DI
HPD1
2
AL31
DIS@
C1445
20P_0402_50V8
RSET
AVDD
AVSSQ
A2VSSQ/TSVSSQ
AM32
AN32
+DPLL_PVDD
AK32
XTALOUT
HSYNC
VSYNC
A2VDD/NC
AH13
1
DIS@
L1400
2
1
BLM15BD121SN1D_2P~D
B
BB
DIS@
C1438
.1U_0402_16V7K
+1.0VGS
B
G
GB
DAC1
VDD2DI/NC
VSS2DI/NC
+DPLL_PVDD
1
GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
NC_GENERICF_HPD5
NC_GENERICG_HPD6
2
2
DIS@
L1403
DIS@
R1429
249_0402_1%
128M x 16 x 4 (1G)
SCL
SDA
GENERAL PURPOSE I/O
AH20
AH18
AN16
AH23
AJ23
AH17
AJ17
AK17
AJ13
AH15
AJ16
AK16
AL16
AM16
AM14
AM13
AK14
AG30
AN14
AM17
AL13
AJ14
AK13
AN13
AM23
AN23
AK23
AL24
AM24
AJ19
AK19
AJ20
AK20
AJ24
AH26
AH24
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
VGA_SMB_DA2
VGA_SMB_CK2
AT27
AR26
AR30
AT29
NA
4
3
EC_SMB_CK2
25,31,32,33,7
2
VRAM_ID2
PIN

MLPS_DISABLE
5
VRAM_ID1
R1409
MLPS
1
R1408
2
H5TQ2G63BFR-11C
+\QL[*%
316$<2
STRAPS
95$0B,'
1
2
1 X76@
95$0B,'
2
1 X76@
10K_0402_5%
AU26
AV25
1U_0402_6.3V6K
DIS@
C1433
10K_0402_5%
TX1P_DPA1P
TX1M_DPA1N
95$0B,'
10U_0603_6.3V6M
DIS@
C1434
VRAM_ID0
.1U_0402_16V7K
DIS@
C1432
R1407
9HQGRU
1U_0402_6.3V6K
DIS@
C1436
2
AT25
AR24
10U_0603_6.3V6M
DIS@
C1437
1 X76@
ŵ
.1U_0402_16V7K
DIS@
C1435
10K_0402_5%
AU24
AV23
2

ɏɥ
ɏɨ
DIS@ Q1400B
2N7002KDWH_SOT363-6
1
AM26
AN26
6
EC_SMB_DA2
25,31,32,33,7
DIS@ Q1400A
2N7002KDWH_SOT363-6
AM27
AL27
R1433 1
AM19
AL19
AN20
AM20
AL30
AM30
AL29
AM29
AN21
AM21
AJ30
AJ31
AK30
AK29
R1435
@
1
2 0_0402_5%
2 0_0402_5%
@
B
For GDDR5 support, or for any memory data rate above 2 Gb/s
a 100-MHz reference clock is required
Clock Input Configuraiton -GDDR5 with Park, Madison and Broadway
a) 27MHz (3.3V) oscillator connected to XO_IN, AND
b) 100MHz (3.3V) oscillator (no spread or spreaded) connected to XO_IN2
Clock Input Configuraiton -GDDR5 with M97
a) 100MHz (1.8V) oscillator connected to XTALIN
Clock Input Configuraiton -GDDR3/DDR3
a) 27MHz crystal connected to XTALIN or XTALOUT or
b) 27MHz (1.8V) oscillator connected to XTALIN or
c) 27MHz (3.3V) oscillator connected to XO_IN (Park, Madison, and Broadway only)
DIS@
2
A
A
Issued Date
Compal Secret Data
2011/04/18
Deciphered Date
2015/07/08
Title
Size
D
Date:
5
4
3
2
ɏɏɩɏɏ
Document Number
Rev
0.4
Şɯɨɩɨ
Sheet
18
50
of
1
5
4
3
+5VS
1
+5VS
55mA@1.0V, in BACO mode
3
+3VGS
2
2
1
PX40@
Q1405
3 AO3416_SOT23-3
2
PX40@
C1460
22U_0805_6.3V6M
D
4
3
2
G
2
1
2N7002K_SOT23-3
S
G
C1462
@
.1U_0402_16V7K
1
2
G
+VGA_CORE
R1401 1 PX50@ 2
0_0603_5%
S
PX40@
Q1404
1 AO3416_SOT23-31
D
1
2
PX_EN
S
2
G
2
+VGA_CORE
S
PX40@
Q1406
D
20
D
1
2
6
5
8/25
+BIF_VDDC
1
PX40@
Q1403B
2N7002KDWH_SOT363-6
3
PX40@
Q1402
3 AO3416_SOT23-3
D
P
1.0V_ON#
PX40@
Q1403A
2N7002KDWH_SOT363-6
2
PX40@
Q1401
1 AO3416_SOT23-31
3
1.0V_ON#
U1402
PX40@
4
Y
A
+1.0VGS
VDDC_ON#
3
5
1
D
B
2
G
2
R1439
10K_0402_5%
PX40@
G
PX40@
1 R1440 2
10K_0402_5%
+3VGS
1
D
VGA_PWRGD
R1438
10K_0402_5%
PX40@
S
14,44
.1U_0402_16V7K
@ C1459
1
+3VGS
2
C1461
.1U_0402_16V7K
@
VDDC_ON#
+3VGS
B
A
Y
1
2
D1400
RB751V-40_SOD323-2
PX40@
PX_MODE
PX_MODE
44
PX40@
C1463
1U_0603_10V6K
RUNPWROK
R1460 1 PX50@ 2 0_0402_5%
short Jumper J2
1
ʫɪŜɪʫɪŜɪ
+3VS
+3VGS
2
J1
@
+3VALW
1
10U_0603_6.3V6M
2MM
1
C1464
PX50@
1
C
3
@
R1443
100K_0402_5%
2
2
PX50@
R1446
20K_0402_5%
20K_0402_5%
G
1 PX50@
C1466
.1U_0603_25V7K
D
2
S
IN
Q1407 PX50@
AP2301GN-HF_SOT23-3
C
@
Q1408
2
D
2N7002K_SOT23-3
PXS_PWREN#
1
PX50@
Q1410
2
2N7002K_SOT23-3
@
R1447
2 0_0402_5%
3
GND
3
PXS_PWREN
R1444
470_0603_5%
@
S
1
@
Q1409
DDTC124EKA-7-F_SC59-3
G
12,14,43,44
C1465
PX50@
2
3
1
OUT
PX50@
R1445
PXS_PWREN
2
2
1
1
+5VALW
PXS_PWREN#
PXS_PWREN
1U_0603_10V6K
1
2
1 2
R1461 1 PX50@ 2 0_0603_5%
PXS_PWREN
4
PX40@
2
PX40@
R1442
20K_0402_5%
FVT, NO.8
1
3
1
P
2
SDV2, NO.52
G
5
U1403
SDV2, NO.57
ʫɨŜɬʫɨŜɬ
+1.5V
+1.5VGS
J2
@
2
B
1
B
2MM
DIS@
U1404
AO4430L_SO8
1
8
7
6
5
1
2
3
1 DIS@
C1469
1U_0603_10V6K
2
2
R1448 @
470_0603_5%
1 2
+VSB
4
2
1 DIS@
C1468
10U_0603_6.3V6M
1
DIS@
C1467
10U_0603_6.3V6M
FVT, No.47
@
Q1411
2N7002K_SOT23-3
2
D
+3VALW
FVT, No.45
S
1
2
20K_0402_5%
R1452
0_0402_5%
DIS@ DIS@
Q1412A
@
2N7002KDWH_SOT363-6
2
1
R1450
1
2
1
2
DIS@
C1470
.1U_0603_25V7K
PX_MODE#
@
1 R1453
2 0_0402_5%
1
PX_MODE#
3
2
6
DIS@
R1451
100K_0402_5%
DIS@
Q1412B
2N7002KDWH_SOT363-6
5
4
1
PX_MODE
G
FVT, No.46
3
DIS@
R1449
330K_0402_5%
DIS@
R1454
100K_0402_5%
A
2
A
Compal Secret Data
Issued Date
2011/04/18
Deciphered Date
2015/07/08
Title
Size
C
Date:
5
4
3
2
ɏɏɩɏ
Document Number
Şɯɨɩɨ
Sheet
of
19
50
1
Rev
0.4
5
4
3
2
1
U1401F
U1401H
DP_VDDC
0_0402_5%
AN19
AP18
AP19
AW20
AW22
150_0402_1%
2
DIS@ 1 R1458
AW18
DP_VDDR
AH34
AJ34
DP_VDDC
AL33
AM33
DP/DPD_VSSR#1
DP/DPD_VSSR#2
DP/DPD_VSSR#3
DP/DPD_VSSR#4
DP/DPD_VSSR#5
DP/DPB_VSSR#1
DP/DPB_VSSR#2
DP/DPB_VSSR#3
DP/DPB_VSSR#4
DP/DPB_VSSR#5
DPCD_CALR
DPAB_CALR
DP E/F POWER
DPEF/DPE_VDD18#1
DPEF/DPE_VDD18#2
DP PLL POWER
DPAB_VDD18/DPA_PVDD
DP_VSSR/DPA_PVSS
DPEF/DPE_VDD10#1
DPEF/DPE_VDD10#2
DPAB_VDD18/DPB_PVDD
DP_VSSR/DPB_PVSS
DP/DPE_VSSR#1
DP/DPE_VSSR#2
DP/DPE_VSSR#3
DP/DPE_VSSR#4
DPCD_VDD18/DPC_PVDD
DP_VSSR/DPC_PVSS
C1471
1
AN29
AP29
AP30
AW30
AW32
AW28
R1457
AU28
AV27
DP_VDDR
AV29
AR28
DP_VDDR
AU18
AV17
DP_VDDR
AV19
AR18
DP_VDDR
AM37
AN38
DP_VDDR
AL38
AM35
DP_VDDR
1 DIS@
2
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
DPCD_VDD18/DPD_PVDD
DP_VSSR/DPD_PVSS
DP_VDDR
AF34
AG34
DP_VDDC
AK33
AK34
DPEF/DPF_VDD18#1
DPEF/DPF_VDD18#2
DPEF_VDD18/DPE_PVDD
DP_VSSR/DPE_PVSS
DPEF/DPF_VDD10#1
DPEF/DPF_VDD10#2
DPEF_VDD18/DPF_PVDD
DP_VSSR/DPF_PVSS
AF39
AH39
AK39
AL34
AM34
150_0402_1%
2
DIS@ 1 R1459
AM39
8/26
AMD:
no display from GPU,
can uninstall the capacitors
0_0402_5% 1 DIS@
2
1
2
1
2
1
2
1
2
1U_0402_6.3V6K
C1486
@
1
10U_0603_6.3V6M
C1485
@
2
.1U_0402_16V7K
C1484
@
1
1U_0402_6.3V6K
C1480
@
2
10U_0603_6.3V6M
C1479
@
1
.1U_0402_16V7K
C1478
@
2
1U_0402_6.3V6K
C1475
@
@
C1473
1
1
2
F15
F17
F19
F21
F23
F25
F27
F29
F31
F33
F7
F9
G2
G6
H9
J2
J27
J6
J8
K14
K7
L11
L17
L2
L22
L24
L6
M17
M22
M24
N16
N18
N2
N21
N23
N26
N6
R15
R17
R2
R20
R22
R24
R27
R6
T11
T13
T16
T18
T21
T23
T26
U15
U17
U2
U20
U22
U24
U27
U6
V11
V16
V18
V21
V23
V26
W2
W6
Y15
Y17
Y20
Y22
Y24
Y27
U13
V13
2 R1455
8/26
DP/DPF_VSSR#1
DP/DPF_VSSR#2
DP/DPF_VSSR#3
DP/DPF_VSSR#4
DP/DPF_VSSR#5
DPEF_CALR
DIS@
B
GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60
GND/PX_EN#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89
GND#90
GND#91
GND#92
GND#93
GND#94
GND#95
GND#96
GND#97
GND#98
GND
+1.0VGS
10U_0603_6.3V6M
C1474
@
AN34
AP39
AR39
AU37
2
DIS@ 1 R1456
150_0402_1%
DP_VDDC
C
1
2
PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
PCIE_VSS#32
PCIE_VSS#33
PCIE_VSS#34
PCIE_VSS#35
GND#100
GND#101
GND#102
GND#103
GND#104
GND#105
GND#106
GND#107
GND#108
GND#109
GND#110
GND#111
GND#112
GND#113
GND#114
GND#115
GND#116
GND#117
GND#118
GND#119
GND#120
GND#121
GND#122
GND#123
GND#124
GND#125
GND#126
GND#127
GND#128
GND#129
GND#130
GND#131
GND#132
GND#133
GND#134
GND#135
GND#136
GND#137
GND#138
GND#139
GND#140
GND#141
GND#142
GND#143
GND#144
GND#145
GND#146
GND#147
GND#148
GND#149
GND#150
GND#151
GND#153
GND#154
GND#155
GND#156
GND#157
GND#158
GND#159
GND#160
GND#161
GND#163
GND#164
GND#165
GND#166
GND#167
GND#168
GND#169
GND#170
GND#171
GND#172
GND#173
GND#174
GND#175
GND#152
GND#162
VSS_MECH#1
VSS_MECH#2
VSS_MECH#3
A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13
A39
AW1
AW39
D
C
PX_EN
19
2
AN33
AP33
DP_VDDR
AB39
E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34
M34
M39
N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39
W31
W34
Y34
Y39
R1430
4.7K_0402_5%
1
DPAB/DPB_VDD10#1
DPAB/DPB_VDD10#2
DP_VDDR
1U_0402_6.3V6K
C1477
@
DPCD/DPD_VDD10#1
DPCD/DPD_VDD10#2
+1.8VGS
AP25
AP26
10U_0603_6.3V6M
DPAB/DPB_VDD18#1
DPAB/DPB_VDD18#2
.1U_0402_16V7K
AP14
AP15
DPCD/DPD_VDD18#1
DPCD/DPD_VDD18#2
AN27
AP27
AP28
AW24
AW26
.1U_0402_16V7K
C1481
@
DP_VDDC
DP/DPA_VSSR#1
DP/DPA_VSSR#2
DP/DPA_VSSR#3
DP/DPA_VSSR#4
DP/DPA_VSSR#5
DP_VDDC
1U_0402_6.3V6K
C1483
@
AP22
AP23
DP/DPC_VSSR#1
DP/DPC_VSSR#2
DP/DPC_VSSR#3
DP/DPC_VSSR#4
DP/DPC_VSSR#5
AP31
AP32
@
DP_VDDR
DPAB/DPA_VDD10#1
DPAB/DPA_VDD10#2
DP_VDDR
10U_0603_6.3V6M
C1482
@
AN17
AP16
AP17
AW14
AW16
DPCD/DPC_VDD10#1
DPCD/DPC_VDD10#2
AN24
AP24
.1U_0402_16V7K
C1487
@
AP13
AT13
DPAB/DPA_VDD18#1
DPAB/DPA_VDD18#2
1U_0402_6.3V6K
C1472
@
DP_VDDC
D
DP A/B POWER
DPCD/DPC_VDD18#1
DPCD/DPC_VDD18#2
10U_0603_6.3V6M
C1488
@
AP20
AP21
.1U_0402_16V7K
C1476
@
DP C/D POWER
DP_VDDR
B
MECH#1
MECH#2
MECH#3
T1403PAD
T1404PAD
T1405PAD
DIS@
A
A
Compal Secret Data
Issued Date
2011/04/18
Deciphered Date
2015/07/08
Title
Size
C
Date:
5
4
3
2
ɏɏɩɏŵ
Document Number
Şɯɨɩɨ
of
20
50
Sheet
1
Rev
0.4
3
2
+PCIE_VDDR
+1.8VGS
DIS@ L1410 (1.8V@300mA VDDR4)
1
2
+VDDR4
BLM15BD121SN1D_2P~D
1
2
1
AF13
AF15
AG13
AG15
AD12
AF11
AF12
AG11
2
M20
M21
V12
U12
VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4
VDDR4#4
VDDR4#5
VDDR4#7
VDDR4#8
VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#6
NC_VDDRHA
NC_VSSRHA
NC_VDDRHB
NC_VSSRHB
PLL
H7
H8
+SPLL_PVDD
AM10
MPV18#1
MPV18#2
.1U_0402_16V7K
DIS@
C1452
1U_0402_6.3V6K
DIS@
C1451
10U_0603_6.3V6M
DIS@
C1450
44
VCCSENSE_VGA
1
AF28
AG28
2
44
.1U_0402_16V7K
DIS@
C1455
1U_0402_6.3V6K
DIS@
C1454
10U_0603_6.3V6M
DIS@
C1453
2
1
2
1U_0402_6.3V6K
DIS@
C1493
1U_0402_6.3V6K
DIS@
C1492
1U_0402_6.3V6K
DIS@
C1491
.1U_0402_16V7K
DIS@
C1490
10U_0603_6.3V6M
DIS@
C1494
1
2
10U_0603_6.3V6M
DIS@
C1516
1U_0402_6.3V6K
@
C1515
1U_0402_6.3V6K
DIS@
C1514
1U_0402_6.3V6K
DIS@
C1513
1U_0402_6.3V6K
DIS@
C1512
2
1
2
2
1
2
1
2
1U_0402_6.3V6K
DIS@
C1531
2
1
1U_0402_6.3V6K
DIS@
C1522
2
1
1U_0402_6.3V6K
DIS@
C1521
2
1
1U_0402_6.3V6K
DIS@
C1530
2
1
1U_0402_6.3V6K
DIS@
C1529
2
1
1U_0402_6.3V6K
DIS@
C1520
2
1
1U_0402_6.3V6K
DIS@
C1527
2
1
1U_0402_6.3V6K
DIS@
C1519
2
1
1U_0402_6.3V6K
DIS@
C1526
2
1
1U_0402_6.3V6K
DIS@
C1525
1
1U_0402_6.3V6K
DIS@
C1524
+VGA_CORE
1
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1U_0402_6.3V6K
DIS@
C1552
2
1U_0402_6.3V6K
DIS@
C1551
1
1U_0402_6.3V6K
DIS@
C1550
2
1U_0402_6.3V6K
DIS@
C1549
1
1U_0402_6.3V6K
DIS@
C1548
2
1U_0402_6.3V6K
DIS@
C1546
1
1U_0402_6.3V6K
DIS@
C1545
2
1U_0402_6.3V6K
DIS@
C1544
1
1
2
+VGA_CORE
1
2
PCIE_VDDC
0.1u
1u
10u
CRB
3
10
2
Design
0
5 (1@)
1
+BIF_VDDC
1u
10u
CRB
2
1
Design
2
0
VDDC
1u
10u
22u
CRB
30
9
0
2
+VGA_CORE
1U_0402_6.3V6K
DIS@
C1543
AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
AH27
AH28
M26
N24
N27
R18
R21
R23
R26
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28
CRB
Design
1
0
1
2
3 (2@)
3
1
1
VDDCI
1u
10u
22u
1
CRB
10
3
0
Design
25
1
1
C
Design
9
2
1
2
+BIF_VDDC
ɏśɥŜɰɪɬɒɨŜɩ
1
2
ŵŵ
řɏʫɨŜɥ
ɏ
ř

řɏ
1
2
+VGA_CORE
VSSSENSE_VGA
AH29
FB_VDDC
FB_VDDCI
FB_GND
AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13
ɥŜɯŞɨŜɨɬɒɭ
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2

DIS@
+SPLL_PVDD
1
1
22U_0603_6.3V6M
DIS@
C1568
SPVSS
+1.8VGS
DIS@
L1406
2
1
BLM15BD121SN1D_2P~D
2
10U_0603_6.3V6M
DIS@
C1567
SPV10
VOLTAGE
SENESE
2
1
1U_0402_6.3V6K
DIS@
C1566
VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8
VDDCI#9
VDDCI#10
VDDCI#11
VDDCI#12
VDDCI#13
VDDCI#14
ISOLATED VDDCI#15
CORE I/O VDDCI#16
VDDCI#17
VDDCI#18
VDDCI#19
VDDCI#20
VDDCI#21
VDDCI#22
+MPLL_PVDD
2
2
1U_0402_6.3V6K
DIS@
C1565
SPV18
+1.8VGS
1
1
1U_0402_6.3V6K
DIS@
C1564
AN9
AN10
1
2
PCIE_VDDR
0.01u
0.1u
1u
10u
B
+SPLL_VDDC
DIS@
L1405
2
1
BLM15BD121SN1D_2P~D
1
1U_0402_6.3V6K
DIS@
C1563
B
+MPLL_PVDD
D
+1.0VGS
+PCIE_VDDC
1U_0402_6.3V6K
DIS@
C1542
AF23
AF24
AG23
AG24
2
ſɨŜɥɒɨɰɩɥɏƀ
22U_0603_6.3V6M
DIS@
C1556
.1U_0402_16V7K
DIS@
C1536
+VDDR3
2
1
1U_0402_6.3V6K
DIS@
C1562
Design
1
1
1
I/O
(3.3V@60mA VDDR3)
2
2
1
1U_0402_6.3V6K
DIS@
C1561
CRB
1
1
1
VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4
1
1U_0402_6.3V6K
DIS@
C1560
SPV10
0.1u
1u
10u
LEVEL
TRANSLATION
AF26
AF27
AG26
AG27
2
2
1U_0402_6.3V6K
DIS@
C1518
Design
1
1
1
2
1
1
1U_0402_6.3V6K
DIS@
C1559
CRB
1
1
1
1
1
Design
1
1
1
SPV18
0.1u
1u
10u
2
1U_0402_6.3V6K
DIS@
C1535
1U_0402_6.3V6K
DIS@
C1534
1U_0402_6.3V6K
DIS@
C1533
10U_0603_6.3V6M
DIS@
C1532
1U_0402_6.3V6K
DIS@
C1540
1U_0402_6.3V6K
DIS@
C1539
2
2
1
2
1U_0402_6.3V6K
DIS@
C1558
CRB
2
2
1
2
1
2
1
VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC#27
VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32
VDDC/BIF_VDDC#33
VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41
VDDC/BIF_VDDC#42
VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58
CORE
G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28
2
1
1U_0402_6.3V6K
DIS@
C1517
Design
1
1
0
2
1
1
.1U_0402_16V7K
DIS@
C1554
MPV18
0.1u
1u
10u
CRB
2
2
2
1
(1.8V@250mA VDD_CT)
1U_0402_6.3V6K
DIS@
C1553
VDDR4
0.1u
1u
10u
Design
3
1
+3VGS
1U_0402_6.3V6K
DIS@
C1538
CRB
3
1
+VDDC_CT
DIS@ L1409
1
2
BLM15BD121SN1D_2P~D
PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12
POWER
C
Design
1
3
1
10U_0603_6.3V6M
DIS@
C1537
CRB
1
3
1
VDDR3
1u
10u
2
Design
6
5
5
+1.8VGS
VDD_CT
0.1u
1u
10u
2
1
1U_0402_6.3V6K
DIS@
C1523
2
1
1
1U_0402_6.3V6K
DIS@
C1541
2
1
.1U_0402_16V7K
DIS@
C1502
2
1
.1U_0402_16V7K
DIS@
C1510
2
1
.1U_0402_16V7K
DIS@
C1509
1
.1U_0402_16V7K
DIS@
C1508
2
.1U_0402_16V7K
DIS@
C1501
2
1
1U_0402_6.3V6K
DIS@
C1507
2
1
1U_0402_6.3V6K
DIS@
C1506
2
1
1U_0402_6.3V6K
DIS@
C1500
2
1
1U_0402_6.3V6K
DIS@
C1505
2
1
1U_0402_6.3V6K
DIS@
C1499
2
10U_0603_6.3V6M
DIS@
C1504
2
1
AA31
AA32
AA33
AA34
V28
W29
W30
Y31
AB37
10U_0603_6.3V6M
DIS@
C1555
CRB
11
10
6
2
1
PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8
PCIE_VDDR/PCIE_PVDD
1U_0402_6.3V6K
DIS@
C1557
VDDR1
0.1u
1u
10u
2
1
10U_0603_6.3V6M
DIS@
C1498
D
1
10U_0603_6.3V6M
DIS@
C1497
+
10U_0603_6.3V6M
DIS@
C1503
1
@
10U_0603_6.3V6M
DIS@
C1496
220U_B2_2.5VM_R35
C1495
PCIE
VDDR1#1
VDDR1#2
VDDR1#3
VDDR1#4
VDDR1#5
VDDR1#6
VDDR1#7
VDDR1#8
VDDR1#9
VDDR1#10
VDDR1#11
VDDR1#12
VDDR1#13
VDDR1#14
VDDR1#15
VDDR1#16
VDDR1#17
VDDR1#18
VDDR1#19
VDDR1#20
VDDR1#21
VDDR1#22
VDDR1#23
VDDR1#24
VDDR1#25
VDDR1#26
VDDR1#27
VDDR1#28
VDDR1#29
VDDR1#30
VDDR1#31
VDDR1#32
VDDR1#33
VDDR1#34
1U_0402_6.3V6K
DIS@
C1511
MEM I/O
AC7
AD11
AF7
AG10
AJ7
AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10
J7
J9
K11
K13
K8
L12
L16
L21
L23
L26
L7
M11
N11
P7
R11
U11
U7
Y11
Y7
.1U_0402_16V7K
DIS@
C1489
U1401E
ɪŵ
ɬřʰɨŜɬ
1
+1.8VGS
DIS@ L1408
2
1
MBK1608121YZF_0603
ſɨŜɯɒɬɥɫɏƀ
+1.5VGS
1U_0402_6.3V6K
DIS@
C1528
4
1U_0402_6.3V6K
DIS@
C1547
5
1
2
A
A
DIS@
L1407
2
1
BLM15BD121SN1D_2P~D
2
1
2
.1U_0402_16V7K
DIS@
C1458
1
1U_0402_6.3V6K
DIS@
C1457
+SPLL_VDDC
10U_0603_6.3V6M
DIS@
C1456
+1.0VGS
1
Compal Secret Data
Issued Date
2
2011/04/18
Deciphered Date
2015/07/08
Title
Size
C
Date:
5
4
3
2
ɏɏɩɏ
Document Number
Şɯɨɩɨ
of
21
50
Sheet
1
Rev
0.4
5
4
3
+1.5VGS
2
1
+1.5VGS
1
1
The Seymour M2 only support channel B (64 bit)
DIS@
R1463
40.2_0402_1%
2
2
R1462
40.2_0402_1%
DIS@
+VDD_MEM15_REFDA
+VDD_MEM15_REFSA
+1.5VGS
R1466 1 Tha@
R1467 1 Sey@
R1468 1 Tha@
R1469 1 Sey@
R1470 1 Tha@
R1471 1 Tha@
L18
L20
L27
N12
AG12
2 240_0402_1%
2 240_0402_1%
2 240_0402_1%
M12
M27
AH12
2 240_0402_1%
2 240_0402_1%
2 240_0402_1%
NC_DQA0_0/DQA_0
NC_MAA0_0/MAA_0
NC_DQA0_1/DQA_1
NC_MAA0_1/MAA_1
NC_DQA0_2/DQA_2
NC_MAA0_2/MAA_2
NC_DQA0_3/DQA_3
NC_MAA0_3/MAA_3
NC_DQA0_4/DQA_4
NC_MAA0_4/MAA_4
NC_DQA0_5/DQA_5
NC_MAA0_5/MAA_5
NC_DQA0_6/DQA_6
NC_MAA0_6/MAA_6
NC_DQA0_7/DQA_7
NC_MAA0_7/MAA_7
NC_DQA0_8/DQA_8
NC_MAA1_0/MAA_8
NC_DQA0_9/DQA_9
NC_MAA1_1/MAA_9
NC_DQA0_10/DQA_10
NC_MAA1_2/MAA_10
NC_DQA0_11/DQA_11
NC_MAA1_3/MAA_11
NC_DQA0_12/DQA_12
NC_MAA1_4/MAA_12
NC_DQA0_13/DQA_13
NC_MAA1_5/MAA_13_BA2
NC_DQA0_14/DQA_14
NC_MAA1_6/MAA_14_BA0
NC_DQA0_15/DQA_15
NC_MAA1_7/MAA_A15_BA1
NC_DQA0_16/DQA_16
NC_DQA0_17/DQA_17
NC_WCKA0_0/DQMA_0
NC_DQA0_18/DQA_18
NC_WCKA0B_0/DQMA_1
NC_DQA0_19/DQA_19
NC_WCKA0_1/DQMA_2
NC_DQA0_20/DQA_20
NC_WCKA0B_1/DQMA_3
NC_DQA0_21/DQA_21
NC_WCKA1_0/DQMA_4
NC_DQA0_22/DQA_22
NC_WCKA1B_0/DQMA_5
NC_DQA0_23/DQA_23
NC_WCKA1_1/DQMA_6
NC_DQA0_24/DQA_24
NC_WCKA1B_1/DQMA_7
NC_DQA0_25/DQA_25
GDDR5/DDR2/GDDR3
NC_DQA0_26/DQA_26 NC_EDCA0_0/QSA_0/RDQSA_0
NC_DQA1_0/DQA_32
NC_EDCA1_2/QSA_6/RDQSA_6
NC_DQA1_1/DQA_33
NC_EDCA1_3/QSA_7/RDQSA_7
NC_DQA1_2/DQA_34
NC_DQA1_3/DQA_35 NC_DDBIA0_0/QSA_0B/WDQSA_0
NC_DQA1_10/DQA_42NC_DDBIA1_3/QSA_7B/WDQSA_7
NC_DQA1_11/DQA_43
NC_DQA1_12/DQA_44
NC_ADBIA0/ODTA0
NC_DQA1_13/DQA_45
NC_ADBIA1/ODTA1
NC_DQA1_14/DQA_46
NC_DQA1_15/DQA_47
NC_CLKA0
NC_DQA1_16/DQA_48
NC_CLKA0B
NC_DQA1_17/DQA_49
NC_DQA1_18/DQA_50
NC_CLKA1
NC_DQA1_19/DQA_51
NC_CLKA1B
NC_DQA1_20/DQA_52
NC_DQA1_21/DQA_53
NC_RASA0B
NC_DQA1_22/DQA_54
NC_RASA1B
NC_DQA1_23/DQA_55
NC_DQA1_24/DQA_56
NC_CASA0B
NC_DQA1_25/DQA_57
NC_CASA1B
NC_DQA1_26/DQA_58
NC_DQA1_27/DQA_59
NC_CSA0B_0
NC_DQA1_28/DQA_60
NC_CSA0B_1
NC_DQA1_29/DQA_61
NC_DQA1_30/DQA_62
NC_CSA1B_0
NC_DQA1_31/DQA_63
NC_CSA1B_1
NC_MVREFDA
NC_MVREFSA
NC_CKEA0
NC_CKEA1
NC_MEM_CALRN0
MEM_CALRN1
NC_MEM_CALRN2
NC_WEA0B
NC_WEA1B
2
G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
A_BA2
A_BA0
A_BA1
A32
C32
D23
E22
C14
A14
E10
D9
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
DQMA#[7..0]
C34
D29
D25
E20
E16
E12
J10
D7
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
QSA[7..0]
A34
E30
E26
C20
C16
C12
J11
F8
QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7
J21
G19
ODTA0
ODTA1
H27
G27
CLKA0
CLKA0#
J14
H14
CLKA1
CLKA1#
K23
K19
RASA0#
RASA1#
K20
K17
CASA0#
CASA1#
K24
K27
CSA0#_0
M13
K16
CSA1#_0
K21
J20
CKEA0
CKEA1
K26
L15
WEA0#
WEA1#
23
U1401D
DDR2
GDDR3/GDDR5
DDR3
MDA[0..63]
MDA[0..63]
MAA[12..0]
A_BA[2..0]
MAA[12..0]
23
A_BA[2..0]
23
23
23
QSA#[7..0]
ODTA0
ODTA1
2
DIS@
C1570
1U_0402_6.3V6K
23
23
23
CLKA0 23
CLKA0# 23
CLKA1 23
CLKA1# 23
RASA0#
RASA1#
CASA0#
CASA1#
23
23
23
23
CSA0#_0
23
CSA1#_0
23
CKEA0
CKEA1
23
23
WEA0#
WEA1#
23
23
NC_MAA0_8
NC_MAA1_8
H23
J19
MAA13
MAA14
MAA13
MAA14
Y12
AA12
+VDD_MEM15_REFDB
+VDD_MEM15_REFSB
DDR2
GDDR5/GDDR3
DDR3
DQB0_0/DQB_0
DQB0_1/DQB_1
DQB0_2/DQB_2
DQB0_3/DQB_3
DQB0_4/DQB_4
DQB0_5/DQB_5
DQB0_6/DQB_6
DQB0_7/DQB_7
DQB0_8/DQB_8
DQB0_9/DQB_9
DQB0_10/DQB_10
DQB0_11/DQB_11
DQB0_12/DQB_12
DQB0_13/DQB_13
DQB0_14/DQB_14
DQB0_15/DQB_15
DQB0_16/DQB_16
DQB0_17/DQB_17
DQB0_18/DQB_18
DQB0_19/DQB_19
DQB0_20/DQB_20
DQB0_21/DQB_21
DQB0_22/DQB_22
DQB0_23/DQB_23
DQB0_24/DQB_24
DQB0_25/DQB_25
DQB0_26/DQB_26
DQB0_27/DQB_27
DQB0_28/DQB_28
DQB0_29/DQB_29
DQB0_30/DQB_30
DQB0_31/DQB_31
DQB1_0/DQB_32
DQB1_1/DQB_33
DQB1_2/DQB_34
DQB1_3/DQB_35
DQB1_4/DQB_36
DQB1_5/DQB_37
DQB1_6/DQB_38
DQB1_7/DQB_39
DQB1_8/DQB_40
DQB1_9/DQB_41
DQB1_10/DQB_42
DQB1_11/DQB_43
DQB1_12/DQB_44
DQB1_13/DQB_45
DQB1_14/DQB_46
DQB1_15/DQB_47
DQB1_16/DQB_48
DQB1_17/DQB_49
DQB1_18/DQB_50
DQB1_19/DQB_51
DQB1_20/DQB_52
DQB1_21/DQB_53
DQB1_22/DQB_54
DQB1_23/DQB_55
DQB1_24/DQB_56
DQB1_25/DQB_57
DQB1_26/DQB_58
DQB1_27/DQB_59
DQB1_28/DQB_60
DQB1_29/DQB_61
DQB1_30/DQB_62
DQB1_31/DQB_63
MAB0_0/MAB_0
MAB0_1/MAB_1
MAB0_2/MAB_2
MAB0_3/MAB_3
MAB0_4/MAB_4
MAB0_5/MAB_5
MAB0_6/MAB_6
MAB0_7/MAB_7
MAB1_0/MAB_8
MAB1_1/MAB_9
MAB1_2/MAB_10
MAB1_3/MAB_11
MAB1_4/MAB_12
MAB1_5/BA2
MAB1_6/BA0
MAB1_7/BA1
WCKB0_0/DQMB_0
WCKB0B_0/DQMB_1
WCKB0_1/DQMB_2
WCKB0B_1/DQMB_3
WCKB1_0/DQMB_4
WCKB1B_0/DQMB_5
WCKB1_1/DQMB_6
WCKB1B_1/DQMB_7
GDDR5/DDR2/GDDR3
EDCB0_0/QSB_0/RDQSB_0
DDBIB0_0/QSB_0B/WDQSB_0
ADBIB0/ODTB0
ADBIB1/ODTB1
CLKB0
CLKB0B
CLKB1
CLKB1B
RASB0B
RASB1B
CASB0B
CASB1B
CSB0B_0
CSB0B_1
CSB1B_0
CSB1B_1
CKEB0
CKEB1
MVREFDB
MVREFSB
WEB0B
WEB1B
R1434
MEM_CALRP1
NC_MEM_CALRP0
NC_MEM_CALRP2
C5
C3
E3
E1
F1
F3
F5
G4
H5
H6
J4
K6
K5
L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5
AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6
AJ4
AK3
AF8
AF9
AG8
AG7
AK9
AL7
AM8
AM7
AK1
AL4
AM6
AM1
AN4
AP3
AP1
AP5
23
23
1 DIS@
2 1K_0402_5%
GPUTESTA
GPUTESTB
T1406
T1407
AD28
AK10
AL10
TESTEN
GDDR5
C
C37
C35
A35
E34
G32
D33
F32
E32
D31
F30
C30
A30
F28
C28
A28
E28
D27
F26
C26
A26
F24
C24
A24
E24
C22
A22
F22
D21
A20
F20
D19
E18
C18
A18
F18
D17
A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13
J13
H11
G10
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5
1
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
GDDR5
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
MEMORY INTERFACE A
D
DDR2
GDDR5/GDDR3
DDR3
DIS@
R1465
100_0402_1%
2
DDR2
GDDR3/GDDR5
DDR3
DIS@
C1569
1U_0402_6.3V6K
MEMORY INTERFACE B
1
2
U1401C
+VDD_MEM15_REFSB
1
+VDD_MEM15_REFDB
1
DIS@
R1464
100_0402_1%
CLKTESTA
CLKTESTB
MAB0_8
MAB1_8
DRAM_RST
D
P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
B_BA2
B_BA0
B_BA1
H3
H1
T3
T5
AE4
AF5
AK6
AK5
DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7
DQMB#[7..0]
F6
K3
P3
V5
AB5
AH1
AJ9
AM5
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
QSB[7..0]
G7
K1
P1
W4
AC4
AH3
AJ8
AM3
QSB#0
QSB#1
QSB#2
QSB#3
QSB#4
QSB#5
QSB#6
QSB#7
T7
W7
ODTB0
ODTB1
L9
L8
CLKB0
CLKB0#
AD8
AD7
CLKB1
CLKB1#
T10
Y10
RASB0#
RASB1#
W10
AA10
CASB0#
CASB1#
P10
L10
CSB0#_0
AD10
AC10
CSB1#_0
U10
AA11
CKEB0
CKEB1
N10
AB11
WEB0#
WEB1#
T8
W8
MAB13
MAB14
AH11
DRAM_RST#_R
24
MDB[0..63]
MDB[0..63]
MAB[12..0]
B_BA[2..0]
MAB[12..0]
24
B_BA[2..0]
24
24
24
QSB#[7..0]
24
C
ODTB0
ODTB1
24
24
CLKB0 24
CLKB0# 24
CLKB1 24
CLKB1# 24
RASB0#
RASB1#
24
24
CASB0#
CASB1#
24
24
CSB0#_0
CSB1#_0
24
24
CKEB0
CKEB1
24
24
WEB0#
WEB1#
24
24
MAB13
MAB14
24
24
8/25
B
B
DIS@
DIS@
Themes XT
Seymour XTX
R1466
POP
@
R1467
@
POP
R1468
POP
@
@
POP
R1470
POP
@
R1471
POP
@
R1469

ſɩɬƀ

ƋƋɏɪŵ
ɬ

ŶŶ
ř

1
+1.5VGS
+1.5VGS
R1472
4.7K_0402_5%
@
2
1
1
+1.5VGS
SDV2, NO.39
2
R1474
40.2_0402_1%
DIS@
2
R1473
40.2_0402_1%
DIS@
23,24
+VDD_MEM15_REFDA
+VDD_MEM15_REFSA
DRAM_RST#
DIS@
1 R1476 2
10_0402_5%
1 R1475 2
51.1_0402_1%
DIS@
DRAM_RST#_R
A
1
DIS@
R1478
100_0402_1%
1
2
1
DIS@
C1572
1U_0402_6.3V6K
2
DIS@
C1573
120P_0402_50V8
DIS@
R1479
4.99K_0402_1%
1
2
DIS@
C1571
1U_0402_6.3V6K
2
DIS@
R1477
100_0402_1%
1
2
1
2
A
Compal Secret Data
Issued Date
2011/04/18
Deciphered Date
2015/07/08
Title
ɏɏɩɏ Rev
0.4
Şɯɨɩɨ
Sheet
22
50
of
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size
R&D Document Number
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
Date:
5
4
3
2
1
5
4
3
2
1
The Seymour M2 only support channel B (64 bit),
this page unmount all parts
U1405
U1406
U1407
U1408
ZZZ1
22
QSA[7..0]
22
22
22
A_BA0
A_BA1
A_BA2
QSA[7..0]
22
22
22
CLKA0
CLKA0#
CKEA0
22
22
22
22
22
ODTA0
CSA0#_0
RASA0#
CASA0#
WEA0#
QSA#[7..0]
QSA#[7..0]
C
22,24
QSA2
QSA0
F3
C7
DQMA#2
DQMA#0
E7
D3
QSA#2
QSA#0
G3
B7
ODT/ODT0
CS/CS0
RAS
CAS
WE
DML
DMU
RESET
1
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
CLKA0
CLKA0#
CKEA0
J7
K7
K9
A1
A8
C1
C9
D2
E9
F1
H2
H9
ODTA0
CSA0#_0
RASA0#
CASA0#
WEA0#
K1
L2
J3
K3
L3
QSA3
QSA1
F3
C7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMA#3
DQMA#1
E7
D3
QSA#3
QSA#1
G3
B7
DRAM_RST# T2
L8
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
2
Tha@
R1480
243_0402_1%
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
L8
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
A_BA0
A_BA1
A_BA2
+1.5VGS
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DQSL
DQSU
T2
DRAM_RST#
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CK
CK
CKE/CKE0
K1
L2
J3
K3
L3
MDA0
MDA5
MDA1
MDA6
MDA3
MDA4
MDA2
MDA7
M8
H1
+1.5VGS
BA0
BA1
BA2
J7
K7
K9
D7
C3
C8
C2
A7
A2
B8
A3
VREFC_A2
VREFD_Q2
Tha@
R1481
243_0402_1%
96-BALL
SDRAM DDR3
K4W1G1646E-HC12_FBGA96
X76@
2
CLKA0 1 Tha@
R1484
40.2_0402_1%
J1
L1
J9
L9
VREFCA
VREFDQ
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
E3
F7
F2
F8
H3
H8
G2
H7
MDA24
MDA30
MDA27
MDA29
MDA25
MDA28
MDA26
MDA31
D7
C3
C8
C2
A7
A2
B8
A3
MDA15
MDA10
MDA14
MDA11
MDA13
MDA9
MDA12
MDA8
VREFC_A3
VREFD_Q3
M8
H1
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
+1.5VGS
BA0
BA1
BA2
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE
+1.5VGS
A1
A8
C1
C9
D2
E9
F1
H2
H9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ/ZQ0
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
22
22
22
CLKA1
CLKA1#
CKEA1
22
22
22
22
22
ODTA1
CSA1#_0
RASA1#
CASA1#
WEA1#
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J7
K7
K9
F3
C7
DQMA#4
DQMA#5
E7
D3
QSA#4
QSA#5
G3
B7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DQSL
DQSU
DML
DMU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
RESET
ZQ/ZQ0
J1
L1
J9
L9
Tha@
R1482
243_0402_1%
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
ODT/ODT0
CS/CS0
RAS
CAS
WE
L8
96-BALL
SDRAM DDR3
X76@
E3
F7
F2
F8
H3
H8
G2
H7
MDA38
MDA36
MDA39
MDA34
MDA35
MDA33
MDA37
MDA32
D7
C3
C8
C2
A7
A2
B8
A3
MDA42
MDA44
MDA40
MDA46
MDA43
MDA45
MDA41
MDA47
VREFC_A4
VREFD_Q4
M8
H1
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
+1.5VGS
CK
CK
CKE/CKE0
K1
L2
J3
K3
L3
QSA4
QSA5
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
BA0
BA1
BA2
DRAM_RST# T2
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
M2
N8
M3
A_BA0
A_BA1
A_BA2
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B2
D9
G7
K2
K8
N1
N9
R1
R9
A_BA0
A_BA1
A_BA2
M2
N8
M3
CLKA1
CLKA1#
CKEA1
J7
K7
K9
A1
A8
C1
C9
D2
E9
F1
H2
H9
ODTA1
CSA1#_0
RASA1#
CASA1#
WEA1#
K1
L2
J3
K3
L3
QSA6
QSA7
F3
C7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMA#6
DQMA#7
E7
D3
QSA#6
QSA#7
G3
B7
+1.5VGS
DRAM_RST# T2
L8
1
22
M2
N8
M3
DQMA#[7..0]
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
MDA23
MDA19
MDA22
MDA18
MDA21
MDA17
MDA20
MDA16
B1
B9
D1
D8
E2
E8
F9
G1
G9
J1
L1
J9
L9
Tha@
R1483
243_0402_1%
VREFCA
VREFDQ
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
96-BALL
SDRAM DDR3
X76@
E3
F7
F2
F8
H3
H8
G2
H7
MDA55
MDA51
MDA48
MDA52
MDA50
MDA53
MDA49
MDA54
D7
C3
C8
C2
A7
A2
B8
A3
MDA60
MDA57
MDA63
MDA56
MDA61
MDA59
MDA62
MDA58
H2G
H2G@
X7635939L01
D
ZZZ2
+1.5VGS
BA0
BA1
BA2
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE
DQSL
DQSU
DML
DMU
+1.5VGS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
RESET
ZQ/ZQ0
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
S2G
S2G@
X7635939L02
A1
A8
C1
C9
D2
E9
F1
H2
H9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
C
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
2
DQMA#[7..0]
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
E3
F7
F2
F8
H3
H8
G2
H7
1
MAA[14..0]
MAA[14..0]
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
2
22
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
MDA[0..63]
MDA[0..63]
22
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
VREFCA
VREFDQ
1
22
M8
H1
2
D
VREFC_A1
VREFD_Q1
96-BALL
SDRAM DDR3
X76@
+1.5VGS
2
C1583
1
2
2
1
C1582
1
1
Tha@
VREFD_Q4
R1503
4.99K_0402_1%
Tha@
Tha@
2
2
2
Tha@
VREFC_A4
R1502
4.99K_0402_1%
Tha@
2
C1581
1
1
C1580
1
1
1
2
2
2
1
2
C1579
1
1
2
C1578
1
2
1
1
1
2
2
2
1
2
C1577
1
1
2
C1576
1
2
2
1
2
VREFD_Q3
R1501
4.99K_0402_1%
Tha@
B
.1U_0402_16V7K
Tha@
R1493
4.99K_0402_1%
Tha@
.1U_0402_16V7K
Tha@
+1.5VGS
R1492
4.99K_0402_1%
Tha@
VREFC_A3
R1500
4.99K_0402_1%
Tha@
.1U_0402_16V7K
Tha@
+1.5VGS
R1491
4.99K_0402_1%
Tha@
VREFD_Q2
R1499
4.99K_0402_1%
Tha@
.1U_0402_16V7K
Tha@
+1.5VGS
R1490
4.99K_0402_1%
Tha@
VREFC_A2
R1498
4.99K_0402_1%
Tha@
.1U_0402_16V7K
Tha@
.1U_0402_16V7K
C1575
0.01U_0402_16V7K
Tha@
R1489
4.99K_0402_1%
Tha@
VREFC_A1
Tha@
R1497
4.99K_0402_1%
+1.5VGS
.1U_0402_16V7K
1
VREFD_Q1
Tha@
R1496
4.99K_0402_1%
.1U_0402_16V7K
2
CLKA1# 1 Tha@
R1495
40.2_0402_1%
R1488
4.99K_0402_1%
Tha@
2
2
2
CLKA1 1 Tha@
R1494
40.2_0402_1%
1
Tha@
R1487
4.99K_0402_1%
Tha@
R1486
4.99K_0402_1%
B
+1.5VGS
1
+1.5VGS
2
+1.5VGS
2
C1574
0.01U_0402_16V7K
Tha@
1
2
1
2
CLKA0# 1 Tha@
R1485
40.2_0402_1%
+1.5VGS
+1.5VGS
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1U_0402_6.3V6K
Tha@
C1620
1
1U_0402_6.3V6K
Tha@
C1619
2
1U_0402_6.3V6K
Tha@
C1618
1
1U_0402_6.3V6K
Tha@
C1617
2
1U_0402_6.3V6K
Tha@
C1616
1
1U_0402_6.3V6K
Tha@
C1615
2
1U_0402_6.3V6K
Tha@
C1614
1
1U_0402_6.3V6K
Tha@
C1613
2
1U_0402_6.3V6K
Tha@
C1612
1
1U_0402_6.3V6K
Tha@
C1611
2
1U_0402_6.3V6K
Tha@
C1610
1
1U_0402_6.3V6K
Tha@
C1609
2
1U_0402_6.3V6K
Tha@
C1608
1
1U_0402_6.3V6K
Tha@
C1607
2
1U_0402_6.3V6K
Tha@
C1606
1
1U_0402_6.3V6K
Tha@
C1605
2
1U_0402_6.3V6K
Tha@
C1604
1
1U_0402_6.3V6K
Tha@
C1603
2
+1.5VGS
1U_0402_6.3V6K
Tha@
C1602
1
1U_0402_6.3V6K
Tha@
C1601
2
10U_0603_6.3V6M
Tha@
C1600
1
10U_0603_6.3V6M
Tha@
C1599
2
10U_0603_6.3V6M
Tha@
C1598
1
10U_0603_6.3V6M
Tha@
C1597
2
.1U_0402_16V7K
Tha@
C1596
1
.1U_0402_16V7K
Tha@
C1595
2
.1U_0402_16V7K
Tha@
C1594
1
.1U_0402_16V7K
Tha@
C1593
2
.1U_0402_16V7K
Tha@
C1592
1
.1U_0402_16V7K
Tha@
C1591
2
.1U_0402_16V7K
Tha@
C1590
1
.1U_0402_16V7K
Tha@
C1589
2
.1U_0402_16V7K
Tha@
C1588
1
.1U_0402_16V7K
Tha@
C1587
2
.1U_0402_16V7K
Tha@
C1586
1
.1U_0402_16V7K
Tha@
C1585
.1U_0402_16V7K
Tha@
C1584
+1.5VGS
1
2
A
A
Compal Secret Data
Issued Date
2011/04/18
Deciphered Date
2015/07/08
Title
Size
C
Date:
5
4
3
2
ɏɏɩɏɏ
Document Number
Şɯɨɩɨ
of
23
50
Sheet
1
Rev
0.4
5
4
3
2
1
The Seymour M2 only support channel B (64 bit)
22
QSB[7..0]
QSB#[7..0]
QSB[7..0]
22
22
22
CLKB0
CLKB0#
CKEB0
QSB#[7..0]
22
22
22
22
22
ODTB0
CSB0#_0
RASB0#
CASB0#
WEB0#
R1504
C
M2
N8
M3
B_BA0
B_BA1
B_BA2
J7
K7
K9
K1
L2
J3
K3
L3
QSB2
QSB0
F3
C7
DQMB#2
DQMB#0
E7
D3
QSB#2
QSB#0
G3
B7
2
CLKB0 1 Sey@
R1504
56_0402_1%
22,23
T2
DRAM_RST#
L8
1
40.2_0402_1%
Tha@
C1621
0.01U_0402_16V7K
DIS@
R1505
J1
L1
J9
L9
DIS@
R1506
243_0402_1%
CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE
DML
DMU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
RESET
ZQ/ZQ0
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
1
2
M2
N8
M3
CLKB0
CLKB0#
CKEB0
J7
K7
K9
A1
A8
C1
C9
D2
E9
F1
H2
H9
ODTB0
CSB0#_0
RASB0#
CASB0#
WEB0#
K1
L2
J3
K3
L3
QSB3
QSB1
F3
C7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMB#3
DQMB#1
E7
D3
QSB#3
QSB#1
G3
B7
ODT/ODT0
CS/CS0
RAS
CAS
WE
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DQSL
DQSU
DML
DMU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
RESET
ZQ/ZQ0
J1
L1
J9
L9
E3
F7
F2
F8
H3
H8
G2
H7
MDB26
MDB30
MDB24
MDB29
MDB27
MDB28
MDB25
MDB31
D7
C3
C8
C2
A7
A2
B8
A3
MDB15
MDB10
MDB14
MDB11
MDB12
MDB9
MDB13
MDB8
VREFC_A3_B
VREFD_Q3_B
M8
H1
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
MAB14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
+1.5VGS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CK
CK
CKE/CKE0
L8
DIS@
R1507
243_0402_1%
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
BA0
BA1
BA2
DRAM_RST# T2
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
+1.5VGS
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DQSL
DQSU
B_BA0
B_BA1
B_BA2
96-BALL
SDRAM DDR3
X76@
R1510
2
CLKB1# 1 Sey@
R1511
56_0402_1%
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
40.2_0402_1%
Tha@
2
CLKB1 1 Sey@
R1510
56_0402_1%
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
MAB14
U1411
VREFCA
VREFDQ
+1.5VGS
BA0
BA1
BA2
2
2
1
2
CLKB0# 1 Sey@
R1505
56_0402_1%
MDB0
MDB4
MDB1
MDB6
MDB3
MDB7
MDB2
MDB5
M8
H1
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B2
D9
G7
K2
K8
N1
N9
R1
R9
M2
N8
M3
B_BA0
B_BA1
B_BA2
+1.5VGS
A1
A8
C1
C9
D2
E9
F1
H2
H9
22
22
22
CLKB1
CLKB1#
CKEB1
22
22
22
22
22
ODTB1
CSB1#_0
RASB1#
CASB1#
WEB1#
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
J7
K7
K9
K1
L2
J3
K3
L3
QSB4
QSB5
F3
C7
DQMB#4
DQMB#5
E7
D3
QSB#4
QSB#5
G3
B7
DRAM_RST# T2
L8
B1
B9
D1
D8
E2
E8
F9
G1
G9
J1
L1
J9
L9
DIS@
R1508
243_0402_1%
U1412
VREFCA
VREFDQ
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
96-BALL
SDRAM DDR3
X76@
E3
F7
F2
F8
H3
H8
G2
H7
MDB33
MDB37
MDB35
MDB39
MDB32
MDB36
MDB34
MDB38
D7
C3
C8
C2
A7
A2
B8
A3
MDB44
MDB41
MDB47
MDB43
MDB45
MDB40
MDB46
MDB42
VREFC_A4_B
VREFD_Q4_B
M8
H1
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
MAB14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
+1.5VGS
BA0
BA1
BA2
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DQSL
DQSU
DML
DMU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
RESET
ZQ/ZQ0
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B2
D9
G7
K2
K8
N1
N9
R1
R9
B_BA0
B_BA1
B_BA2
M2
N8
M3
CLKB1
CLKB1#
CKEB1
J7
K7
K9
A1
A8
C1
C9
D2
E9
F1
H2
H9
ODTB1
CSB1#_0
RASB1#
CASB1#
WEB1#
K1
L2
J3
K3
L3
QSB6
QSB7
F3
C7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMB#6
DQMB#7
E7
D3
QSB#6
QSB#7
G3
B7
+1.5VGS
DRAM_RST# T2
L8
1
DQMB#[7..0]
DQMB#[7..0]
22
22
22
22
D7
C3
C8
C2
A7
A2
B8
A3
VREFC_A2_B
VREFD_Q2_B
B1
B9
D1
D8
E2
E8
F9
G1
G9
J1
L1
J9
L9
DIS@
R1509
243_0402_1%
VREFCA
VREFDQ
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
96-BALL
SDRAM DDR3
X76@
E3
F7
F2
F8
H3
H8
G2
H7
MDB55
MDB50
MDB54
MDB51
MDB53
MDB49
MDB52
MDB48
D7
C3
C8
C2
A7
A2
B8
A3
MDB56
MDB59
MDB63
MDB62
MDB57
MDB61
MDB58
MDB60
D
+1.5VGS
BA0
BA1
BA2
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE
+1.5VGS
A1
A8
C1
C9
D2
E9
F1
H2
H9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DQSL
DQSU
DML
DMU
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
RESET
ZQ/ZQ0
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
C
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
2
MAB[14..0]
MAB[14..0]
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
MDB19
MDB20
MDB22
MDB16
MDB23
MDB17
MDB21
MDB18
1
22
22
MDB[0..63]
MDB[0..63]
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
E3
F7
F2
F8
H3
H8
G2
H7
1
22
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
2
D
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
MAB14
U1410
VREFCA
VREFDQ
2
U1409
VREFC_A1_B M8
VREFD_Q1_B H1
96-BALL
SDRAM DDR3
X76@
C1622
0.01U_0402_16V7K
DIS@
40.2_0402_1%
Tha@
R1511
40.2_0402_1%
Tha@
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
1
1
2
2
VREFD_Q4_B
1
1
R1527
4.99K_0402_1%
DIS@
2
2
1
R1525
4.99K_0402_1%
DIS@
.1U_0402_16V7K
DIS@
C1630
VREFC_A4_B
.1U_0402_16V7K
DIS@
C1629
2
1
2
1
.1U_0402_16V7K
DIS@
C1628
VREFD_Q3_B
R1526
4.99K_0402_1%
DIS@
2
.1U_0402_16V7K
DIS@
C1627
1
R1519
4.99K_0402_1%
DIS@
2
2
2
R1524
4.99K_0402_1%
DIS@
2
R1518
4.99K_0402_1%
DIS@
VREFC_A3_B
1
1
2
.1U_0402_16V7K
DIS@
C1626
R1523
4.99K_0402_1%
DIS@
2
R1517
4.99K_0402_1%
DIS@
VREFD_Q2_B
1
1
1
1
1
2
R1522
4.99K_0402_1%
DIS@
2
1
2
R1516
4.99K_0402_1%
DIS@
VREFC_A2_B
.1U_0402_16V7K
DIS@
C1625
2
1
2
1
1
.1U_0402_16V7K
DIS@
C1624
2
VREFC_A1_B
R1521
4.99K_0402_1%
DIS@
2
1
.1U_0402_16V7K
DIS@
C1623
VREFD_Q1_B
R1520
4.99K_0402_1%
DIS@
R1515
4.99K_0402_1%
DIS@
2
R1514
4.99K_0402_1%
DIS@
2
R1513
4.99K_0402_1%
DIS@
2
R1512
4.99K_0402_1%
DIS@
1
1
B
1
B
1
2
+1.5VGS
+1.5VGS
2
1
2
1
2
1
2
1
2
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
Compal Secret Data
Issued Date
1
2011/04/18
Deciphered Date
2015/07/08
Title
Size
C
Date:
5
4
3
2
1
2
1
2
1
2
1
2
1
2
1U_0402_6.3V6K
DIS@
C1667
1
1U_0402_6.3V6K
DIS@
C1666
2
1U_0402_6.3V6K
DIS@
C1665
1
1U_0402_6.3V6K
DIS@
C1664
2
1U_0402_6.3V6K
DIS@
C1663
1
1U_0402_6.3V6K
DIS@
C1662
2
1U_0402_6.3V6K
DIS@
C1661
1
1U_0402_6.3V6K
DIS@
C1660
2
1U_0402_6.3V6K
DIS@
C1659
1
1U_0402_6.3V6K
DIS@
C1658
2
1U_0402_6.3V6K
DIS@
C1657
1
1U_0402_6.3V6K
DIS@
C1656
2
1U_0402_6.3V6K
DIS@
C1655
1
1U_0402_6.3V6K
DIS@
C1654
2
1U_0402_6.3V6K
DIS@
C1653
1
1U_0402_6.3V6K
DIS@
C1652
2
1U_0402_6.3V6K
DIS@
C1651
1
1U_0402_6.3V6K
DIS@
C1650
2
+1.5VGS
1U_0402_6.3V6K
DIS@
C1649
1
1U_0402_6.3V6K
DIS@
C1648
2
10U_0603_6.3V6M
DIS@
C1647
1
10U_0603_6.3V6M
DIS@
C1646
2
10U_0603_6.3V6M
DIS@
C1645
1
10U_0603_6.3V6M
DIS@
C1644
2
.1U_0402_16V7K
DIS@
C1643
1
.1U_0402_16V7K
DIS@
C1642
2
.1U_0402_16V7K
DIS@
C1641
1
.1U_0402_16V7K
DIS@
C1640
2
.1U_0402_16V7K
DIS@
C1639
1
.1U_0402_16V7K
DIS@
C1638
2
.1U_0402_16V7K
DIS@
C1637
1
.1U_0402_16V7K
DIS@
C1636
2
.1U_0402_16V7K
DIS@
C1635
1
.1U_0402_16V7K
DIS@
C1634
2
.1U_0402_16V7K
DIS@
C1633
1
.1U_0402_16V7K
DIS@
C1632
A
.1U_0402_16V7K
DIS@
C1631
+1.5VGS
1
2
ɏɏɩɏɏ
Document Number
Şɯɨɩɨ
of
24
50
Sheet
1
A
Rev
0.4
5
4
+3VS
3
2
1
ņ
ņ
œ
Ő
Ŏ
0_0402_5%
+3VS_PS
30mil
Part number: SA00004EU10
30mil
R2101
0_0603_5%
+3VS_PS
U2101
2
1 +DP_V33
L2101
FBMA-L11-201209-221LMA30T_0805
+DP_V33
2
1 +SWR_VDD
L2102
FBMA-L11-201209-221LMA30T_0805
1
2 +SWR_LX
L2100
4.7UH_PG031B-4R7MS_1.1A_20%
1
2
C2101
2
C2103
C2102
2
1
+SWR_V12
3
60mil 13
18
60mil 12
60mil 11
27
7
TXEC+
TXEC-
DP_V33
SWR_VDD
PVCC
Power
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0603_6.3V6M
D
40mil
SWR_LX
SWR_VCCK
VCCK
DP_V12
TXE2+
TXE2-
LVDS
Close to Pin3
TXE1+
TXE1TXE0+
TXE0-
19
20
LVDS_ACLK 26
LVDS_ACLK# 26
21
22
LVDS_A2 26
LVDS_A2# 26
23
24
LVDS_A1 26
LVDS_A1# 26
25
26
LVDS_A0 26
LVDS_A0# 26
2
MIIC_SCL R2102 1
2
MIIC_SDA R2103 1
0_0402_5%
+SWR_VDD
R2169 2
1 10K_0402_5%
U2100
WP
MIIC_SCL_R
MIIC_SDA_R
8
7
6
5
1 A0
VCC
A0 2 A1
WP
A1 3 A2
SCL
A2 4
SDA
GND
CAT24C64WI-GT3_SO8
D
+3VS_PS
Reserved for EC programming ROM
Need EC confirm
1
7
R2171 1
LVDS_HPD
9
10
CSCL
CSDA
2 1K_0402_1%
LVDS_HPD_C
SDV2, NO.49
R2106
100K_0402_5%
C
+1.2VS
Close to L29
@ L2103
1
+SWR_V12 2
FBMA-L11-201209-221LMA30T_0805
Close to
Pin27
HPD
LVDS
EDID
ROM
DP_REXT
DP_GND
2
MIICSCL1
MIICDA1
MIICSCL0
MIICSDA0
GND
R2107
12K_0402_1%
14
15
16
17
R2104
4.7K_0402_5%
TL_INVT_PWM 26
TL_ENVDD 26
APU_INVT_PWM 9
TL_BKOFF#_R
MIIC_SCL
29
28
31
30
EDID_CLK
26
EDID_DATA
26
R2105
4.7K_0402_5%
@
MIIC_SCL
MIIC_SDA
33
RTD2132S-GR_QFN32_5X5
2132S-Ver E: External ROM, pin31 PU +3VS
Internal RAM support, pin31 PD to GND
EEROM EEROM EEROM EEROM
C
Change to 12Kohm 1% (DG ref.)
20101114
20110124 Modify
1
2
CIICSCL1
CIICSDA1
GPIO(PWM OUT)
GPIO(Panel_VCC)
GPIO(PWM IN)
GPIO(BL_EN)
C2100
2
0.1U_0402_16V4Z
1
C2111
2
0.1U_0402_16V4Z
1
C2110
C2109
2
0.1U_0402_16V4Z
22U_0603_6.3V6M
1
8
4
LANE0P
LANE0N
1
2
Close to Pin13
32
AUX_P
AUX_N
1
5
6
2
1
2
DP0_TXP0_C
DP0_TXN0_C
Other
2
DP0_AUXP_C
DP0_AUXN_C
7
7
2
1
C2108
2
0.1U_0402_16V4Z
1
C2107
0.1U_0402_16V4Z
2
C2105
0.1U_0402_16V4Z
C2104
10U_0603_6.3V6M
2
1
22U_0603_6.3V6M
C2106
+SWR_VDD
1
7
7
1
Close to Pin18
DP-IN
Close to L27
GPIO
RTD2132S
2
1
A0
R2167 2
1 10K_0402_5%
A1
R2168 2
1 10K_0402_5%
WP
R2170 2
1 10K_0402_5%
Close to Pin7
+3VS_PS
Vendor advise reserve it
R2100
1
R2160
1
2 0_0402_5%
ENBKL
EDID_DATA
R2108 1
2 4.7K_0402_5%
EDID_CLK
R2109 1
2 4.7K_0402_5%
MIIC_SDA
R2110 1
2 4.7K_0402_5%
CSCL
R2158 1
2 4.7K_0402_5%
CSDA
R2159 1
2 4.7K_0402_5%
31
B
B
TL_BKOFF#_R
2 0_0402_5%
@
TL_BKOFF#
26
C2112
.1U_0402_16V7K
1
2
BKOFF#
A
U2104
2 100K_0402_5%
TL_BKOFF#_R R2165 1
2 100K_0402_5%
4
G
Y
3
26,31
B
1
2 100K_0402_5%
R2164 1
P
2
TL_INVT_PWM R2163 1
TL_ENVDD
5
+3VS_PS
Vendor Suggest 2011.08.15
+3VS
2
+3VS_PS
1 10K_0402_5%
R2178 2
1 10K_0402_5%
Q2107A
1
CSDA
R2177 2
6
EC_SMB_DA2
5
EC_SMB_DA2
CSDA
18,31,32,33,7
@
R2117
Q2107B
R2116
4
CSCL
3
EC_SMB_CK2
EC_SMB_CK2
A
Issued Date
2015/07/08
Deciphered Date
5
4
3
TL_CLK
31
31
A
FVT, NO.21
Compal Secret Data
2011/04/18
0_0402_5%
TL_DATA
18,31,32,33,7
0_0402_5%
@
CSCL
2
Şɩɨɪɩ
Size
Document Number
Rev
Custom
0.4
Şɯɨɩɨ
25
50
Date:
Sheet
of
Title
1
1
2
3
4
5
ŵŜ
+3VS
+5VALW
W=60mils
1
1
+LCDVDD
R2111
150_0603_1%
R2112
100K_0402_5%
1
SDV2, NO.29
2
2
A
C2114
4.7U_0805_10V4Z
+LEDVDD
Place closed to JLVDS1
2
3
1
1
2
R2114
220K_0402_1%
1
3
C2118
0.1U_0402_16V4Z
1
2
FBMA-L11-201209-221LMA30T_0805
L2104
2
G
3
R2115
100K_0402_5%
C2116
4.7U_0805_25V6-K
2
1
2
2
C2115
0.1U_0402_16V4Z
1
2
4.7U_0805_25V6-K
2N7002K_SOT23-3
1
+LCDVDD_CONN
C2119
S
W=60mils
0.1U_0402_16V4Z
Q2102
AP2301GN-HF_SOT23-3
Q2101
+LCDVDD
1
C2120
D
2
TL_ENVDD
TL_ENVDD
1
25
2
2N7002K_SOT23-3
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
DISPOFF#
INVPWM
SIT, NO.74
14
14
25
25
+3VS_CMOS
DMIC_CLK
DMIC_1_2
+3VS
Logo_LED#
+3VALW
USB20_N6
USB20_P6
LVDS_ACLK
LVDS_ACLK#
LOGO RED LIGHT
8/25
tune LED
CMOS
25
25
25
25
25
25
LVDS_A2
LVDS_A2#
LVDS_A1
LVDS_A1#
LVDS_A0
LVDS_A0#
25
25
EDID_DATA
EDID_CLK
+3VS
+LCDVDD_CONN
31,35
DMIC_CLK
DMIC_1_2
Logo_LED#
2 4.99K_0402_1%
USB20_N6
USB20_P6
R2166 1
B
1
+3VS
@ R2118
4.7K_0402_5%
2
@ D2101
2
1
RB751V-40_SOD323-2
2 0_0402_5%
1
R2119
2 0_0402_5%
DISPOFF#
2 0_0402_5%
@ R2121
10K_0402_5%
C
C2117 @
680P_0402_50V7K
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
B
46
45
44
43
42
41
G6
G5
G4
G3
G2
G1
STARC_107K40-000001-G2
CONN@
+3VS
2
2
R2120
10K_0402_5%
2
R2123
1
2 10K_0402_5% INVPWM
C2121
1
2 220P_0402_50V7K INVPWM
C2124
1
2 220P_0402_50V7K DISPOFF#
C2122
1 @ 2 10P_0402_50V8J
EDID_CLK
C2123
1 @ 2 10P_0402_50V8J
EDID_DATA
DISPOFF#
3
@
R2162 1
TL_BKOFF#
2
@ D2100
PJSOT24C 3P C/A SOT-23
PN:SCA00001G00
1
R2161 1
BKOFF#
1
25
EDID_DATA
EDID_CLK
1
25,31
1
JLCD1
(20 MIL)
29
29
1
2
Q2100
2
G
S
1
D
A
B+
R2113
1
2
0_0805_5%
+3VS
C
SDV2, NO.76
SIT, NO.78
C2145
1
2 22P_0402_50V8J
DMIC_CLK
C2144
1
2 22P_0402_50V8J
DMIC_1_2

1
+3VS
R2175
4.7K_0402_5%
@
D2110
1
CMOS@
Q2103
(20 MIL)
2
@
2
+3VS
RB751V-40_SOD323-2
25
R2173
TL_INVT_PWM
+3VALW
2 0_0402_5%
INVPWM
1
@
R2174
10K_0402_5%
R2172
10K_0402_5%
@
31
CMOS_ON#
2
2
1
1
CMOS@
2
R2125 1
150K_0402_5%
2
1
2
(20 MIL)
1
2
1
3
CMOS SUSPEND 2.4mA
AP2301GN-HF_SOT23-3
CMOS@
C2125
0.1U_0402_16V4Z
C2127
0.1U_0402_16V4Z
CMOS@
+3VS_CMOS
1
CMOS@
1
C2126
10U_0603_6.3V6M
2
2
4.7V
C2128
0.1U_0402_16V4Z
CMOS@
D
D
Compal Secret Data
Issued Date
2011/04/18
Deciphered Date
2015/07/08
ŵ
Custom
Şɯɨɩɨ
Date:
Sheet
26
of
Title
1
2
3
4
5
Rev
0.4
50
5
4
3
2
1
FVT, NO.6
7
7
7
7
7
7
7
7
1
1
1
1
1
1
1
1
R2126
R2127
R2128
R2129
R2130
R2131
R2132
R2133
HDMI_CLKP
HDMI_CLKN
HDMI_TX0P
HDMI_TX0N
HDMI_TX1P
HDMI_TX1N
HDMI_TX2P
HDMI_TX2N
@
@
@
@
@
@
@
@
2
2
2
2
2
2
2
2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
HDMI_CLK+_CONN
HDMI_CLK-_CONN
HDMI_TX0+_CONN
HDMI_TX0-_CONN
HDMI_TX1+_CONN
HDMI_TX1-_CONN
HDMI_TX2+_CONN
HDMI_TX2-_CONN
D
D
+3VS
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
R2134
1
1
2
HDMI_CLK+_CONN
HDMI_TX0+_CONN
4
4
3
3
HDMI_CLK-_CONN
L2106
2
2
HDMI_TX0+_CONN
HDMI_TX2+_CONN
4
3
HDMI_TX0-_CONN
604_0402_1%
D
L2107
4
1
2
4
3
2
HDMI_TX1+_CONN
3
HDMI_TX1-_CONN
G
S
1
HDMI_TX2N
4
1
2
4
3
HDMI_TX2+_CONN
3
HDMI_TX2-_CONN
C
0_0402_5%
1
@
R2142
2
1
@
R2144
2 0_0402_5%
2
2
HDMIDAT_R
2N7002K_SOT23-3
L2108
HDMI_TX2P
3
2N7002KDWH_SOT363-6
Q2104B
@
R2143
100K_0402_5%
WCM-2012-900T_4P
4
HDMI_DATA
3
1
HDMI_TX1N
7
Q2105
2
+5VS
1
HDMI_TX1P
HDMICLK_R
604_0402_1%
R2141
WCM-2012-900T_4P
C
6
2N7002KDWH_SOT363-6
Q2104A
604_0402_1%
R2140
3
1
HDMI_CLK
1
4
7
604_0402_1%
R2139
1
HDMI_TX2-_CONN
HDMI_TX0N
604_0402_1%
R2138
HDMI_TX1-_CONN
1
604_0402_1%
R2137
HDMI_TX1+_CONN
WCM-2012-900T_4P
HDMI_TX0P
604_0402_1%
R2136
HDMI_TX0-_CONN
HDMI_CLKN
604_0402_1%
R2135
2
5
HDMI_CLK-_CONN
L2105
HDMI_CLKP
2
HDMI_CLK+_CONN
WCM-2012-900T_4P
@ R2145
0_0805_5%
ɩɥɨɨŜɥɯŜɨɪ
3
2
HDMI_CLK-_CONN
HDMI_CLK+_CONN
2 8
HDMI_CLK+_CONN
HDMI_TX1-_CONN
4 7
HDMI_TX1-_CONN
HDMI_TX1+_CONN
5 6
HDMI_TX1+_CONN
2
HDMI_CLK-_CONN
9
+5VS
RB491D-YS_SOT23-3
D2104
F2100
1.1A_6V_SMD1812P110TF
1
D2105
1 1
+5VS_HDMI_F
+5VS_HDMI
3 2
2
1
8
C2129
0.1U_0402_16V4Z
B
B
HDMI_TX0+_CONN
4 7
HDMI_TX2-_CONN
5 HDMI_TX2+_CONN
6
C
Q2106
MMBT3904_NL_SOT23-3
7
1
2
B
R2148
1
2
150K_0402_5%
E
HDMI_DET
HDMI_TX2+_CONN
3 HDMI_HPD
HDMIDAT_R
HDMICLK_R
@
R2149
200K_0402_5%
R2150
100K_0402_5%
HDMI_CLK-_CONN
HDMI_CLK+_CONN
HDMI_TX0-_CONN
2
8
JHDMI1
HDMI_HPD
2
8
2
R2147
2K_0402_5%
1
HDMI_TX0-_CONN
2 1
9
HDMI_TX0+_CONN
3
D2102
1 1
HDMI_TX0-_CONN
HDMI_TX2-_CONN
R2146
2K_0402_5%
+3VS
1
YSCLAMP0524P_SLP2510P8-10-9
HDMI_TX0+_CONN
HDMI_TX1-_CONN
HDMI_TX1+_CONN
HDMI_TX2-_CONN
HDMI_HPD
D2103
1 9
HDMI_HPD
HDMICLK_R
2 8
HDMICLK_R
HDMIDAT_R
4 7
HDMIDAT_R
+5VS_HDMI
5 6
+5VS_HDMI
SDV2, NO.56
3 A
HDMI_TX2+_CONN
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+
20
21
22
23
SUYIN_100042GR019M23DZL
CONN@
A
8
Compal Secret Data
2011/04/18
Issued Date
2015/07/08
Deciphered Date
5
4
3
2

Size
Document Number
Custom
Şɯɨɩɨ
27
of
Date:
Sheet
Title
1
Rev
0.4
50
A
DAC_BLU
DAC_BLU
1
DAC_GRN
13
FCM1608CF-121T03_2P
1
2
L2109
FCM1608CF-121T03_2P
1
2
L2110
FCM1608CF-121T03_2P
1
2
L2111
1
1
DAC_GRN
R2151
150_0402_1%
R2152
150_0402_1%
2
13
C
DAC_RED
1
DAC_RED
2
13
1
1
B
2
1
R2153
150_0402_1%
1
C2130
2
C2131
2
2
C2132
10P_0402_50V8J
D
E
RED
1
GREEN
BLUE
1
C2133
2
D2107
1
C2134
2
2
BLUE
C2135
10P_0402_50V8J
6
5
10P_0402_50V8J 10P_0402_50V8J
I/O4
I/O2
VDD
GND
I/O3
I/O1
3
RED
+R_CRT_VCC
10P_0402_50V8J10P_0402_50V8J
4
2
1
GREEN
AZC099-04S.R7G_SOT23-6
+CRT_VCC
D2108
R2154
1
CRT_DDC_DATA
1K_0402_5%
5
VDD
GND
3
JVGA_HS
2
A
1
5
P
2
CRT_HSYNC
2
U2102
CRT_DDC_CLK
Y
4
1
2
L2112
FCM1608CF-121T03_2P
CRT_HSYNC_1
G
13
I/O2
2
OE#
C2136
0.1U_0402_16V4Z
I/O4
+R_CRT_VCC
1
2
6
2
3
I/O1
1
JVGA_VS
1
2
R2155
1
I/O3
JVGA_HS
74AHCT1G125GW_SOT353-5
+CRT_VCC
4
@
C2137
10P_0402_50V8J
2
1
A
1
5
P
2
CRT_VSYNC
U2103
Y
4
1
CRT_VSYNC_1
3
2
JVGA_VS
L2113
FCM1608CF-121T03_2P
G
13

2
OE#
C2138
0.1U_0402_16V4Z
1K_0402_5%
1
74AHCT1G125GW_SOT353-5
2
@
C2139
10P_0402_50V8J
+5VS
+R_CRT_VCC
+CRT_VCC
D2106
2
1
F2101
2
1
3
1
3
RB491D-YS_SOT23-3
+R_CRT_VCC
1.1A_6V_SMD1812P110TF
R2156
4.7K_0402_5%
R2157
4.7K_0402_5%
JCRT1
2
2
SDV2, NO.93
2
1
1
W=40mils
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
RED
13
CRT_DDC_DATA
CRT_DDC_DATA
CRT_DDC_DATA
GREEN
JVGA_HS
BLUE
JVGA_VS
13
CRT_DDC_CLK
CRT_DDC_CLK
CRT_DDC_CLK
@
C2141
100P_0402_50V8J
1
1
2
2
@
C2142
68P_0402_50V8J
1
4
2
AMD check list update
20101110
Compal Secret Data
2011/04/18
Issued Date
Deciphered Date
2015/07/08
C2143
B
C
D
SDV2, NO.22
16
17
C-H_13-12201558CP
CONN@
100P_0402_50V8J
4

Custom
Şɯɨɩɨ
28
of
50
Date:
Sheet
Title
A
3
C2140
0.1U_0402_16V4Z
E
Rev
0.4
1
2
CX20671
High Definition Audio Codec SoC
With Integrated Class-D Stereo
Amplifier.
An integrated 5 V to 3.3 V Low-dropout
voltage regulator (LDO).
An integrated 3.3 V to 1.8V Low-dropout
SDV2,
voltage regulator (LDO).
+LDO_OUT_3.3V
1
Near Pin 2
To support Wake-on-Jack or Wake-on-Ring, the CODEC
VAUX_3.3 & VDD_IO pins must be powerd by a rail that
is not removed unless AC power is removed.
*DSH page42 has more detail.
2 1U_0402_6.3V6K
1
2 0.1U_0402_16V4Z
C1133
1
2 4.7U_0603_6.3V6K
C1134
1
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
R1102 1
@
2 0_0402_5%
R1104 1
@
2 0_0402_5%
R1105 1
@
2 0_0402_5%
1
1
+3VS
C1130
4.7U_0603_6.3V6K
Near Pin 3
@ C1129
0.1U_0402_16V4Z
2
C1124
4.7U_0603_6.3V6K
1
R1121
10K_0402_5%
A
SIT, NO.81
Near Pin 28
1
1
1
C1132
0.1U_0402_16V4Z
RB751V-40_SOD323-2
2 0.1U_0402_16V4Z
C1104 @1
@ C1112
4.7U_0603_6.3V6K
FILT_1.8_R
1
SDV2, NO.35
2
C1113
0.1U_0402_16V4Z
Near Pin 7
PC_BEEP
2
2
0.1U_0402_16V4Z
C1142
D1101
2
1
PC_BEEP_C
1
FCH_SPKR
2 33_0402_5%
2
14
R1120 1
2
ICH Beep
C1141 1 @ 2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
C1103 @1
+5VS
@ C1114
1U_0402_6.3V6K
2
C1116
0.1U_0402_16V4Z
C1102 @1
1
1
Near Pin 27
C1111 1 @ 2 0.1U_0402_16V4Z
BEEP#
1
2
NO.71
1
@ C1119
4.7U_0603_6.3V6K
2
C1121
0.1U_0402_16V4Z
Layout Note:Path from +5VS to Pin12,
Pin15 must be very low
resistance (<0.01 ohms)
RB751V-40_SOD323-2
31
1
2
EC Beep
C1135
C1136
Near Pin 29
2

5
2
A
4
FILT_1.65_R
D1102
2
3
+3VS
1
MIC_JD
B
D
3
S
Q1103
LBSS138LT1G_SOT-23-3
2
2 33K_0402_5%
R1130 1
G
1
C1146
1U_0402_6.3V6K
14
14
HDA_SDIN0
HDA_SDOUT_AUDIO
R1115 1
R1129 1
1
2
@
31
31
EAPD
EC_MUTE#
26
DMIC_CLK
26
DMIC_1_2
R1111 1
R1131 1
10
PC_BEEP
2 0_0402_5%
2 0_0402_5%
38
37
CX_GPIO0
29
27
28
26
SENSE_A
PORTB_R
PORTB_L
B_BIAS
40
1
11
13
SPK_R2+
SPK_R1-
16
14
36
SENSE_A
35
34
33
PORTC_R
PORTC_L
potential leakage concern
R1113 1
R1114 1
R1116 1
C1108 1
2 0_0805_5%
2 0.1U_0402_16V4Z
2 5.11K_0402_1%
2 20K_0402_1%
MIC_JD
2 39.2K_0402_1% PLUG_IN
2 2.2U_0603_6.3V6K
R1133 1
+5VS
Port B
Port A
+3VS
2 100_0402_1%
EXT_MIC
External MIC
EXT_MIC
B
35
+MICBIASB
+MICBIASB
C_BIAS
PORTC_R
PORTC_L
GPIO0/EAPD#
GPIO1/SPK_MUTE#
DMIC_CLK
DMIC_1/2
EXT_MIC
R1132 1
2 2K_0402_5%
R1128
23
22
HP_OUTR_R
HP_OUTL_R
R1117 1
R1118 1
2 15_0402_5%
2 15_0402_5%
HP_OUTR
HP_OUTL
24
25
39
NC
NC
NC
LEFT+
LEFT-
1
2 4.7K_0402_5%
HP_OUTR
HP_OUTL
Headphone
35
35
Changed from 5.1ohm to 15ohm
for "zi zi"noise.
21
19
20
AVEE
FLY_P
FLY_N
RIGHT+
RIGHT-
32
31
30
AVEE
FLY_P
FLY_N
C1110 1
2 1U_0603_10V4Z
C1122
1
2 0.1U_0402_16V4Z
C1125
1
2 4.7U_0603_6.3V6K
Near Pin 21
Rdc < 0.05 ohms
Rated Current > 2A
GND
SPK_L2+
SPK_L1-
1
R1137
+CLASSD_5V
C1107 1
PC_BEEP
PORTA_R
PORTA_L
2
DMIC_CLK_R
R1138 1
FBMA-10-100505-301T_2P
2 0_0402_5% DMIC_1_2_R
R1139 1
Near Pin 17
12
15
17
LPWR_5.0
RPWR_5.0
CLASS-D_REF
BIT_CLK
SYNC
SDATA_IN
SDATA_OUT
SDV2, NO.13
D
S
1
5
8
6
4
RESET#
41
2
G
3
HDA_SYNC_AUDIO
HDA_BITCLK_AUDIO
HDA_SYNC_AUDIO
HDA_SDOUT_AUDIO
Internal SPEAKER
@
Q1104
BSS138_NL_SOT23-3
1
HDA_SYNC_AUDIO
9
2 33_0402_5%
EAPD active low
0=power down ex AMP
1=power up ex AMP
Internal DMIC
+5VS
HDA_RST#_AUDIO
EXT_MIC
2 33K_0402_5%
C1147
1U_0402_6.3V6K
@
3
7
2
18
2 4.7K_0402_5%
FILT_1.65
HDA_BITCLK_AUDIO
@
AVDD_3.3
AVDD_5V
AVDD_HP
14
R1112 1
PLUG_IN
CX_GPIO0
14
+3VS
HDA_RST_AUDIO#
2
PLUG_IN
35
14
U1101
FILT_1.8
VDD_IO
VAUX_3.3
DVDD_3.3
ſƀ
Sense resistors must be
connected same power
that is used for
VAUX_3.3
Near Pin 26
10K only needed if supply to VAUX_3.3
is removed during system re-start.
CX20671-21Z_QFN40_6X6
2
R1136
0_0402_5%
FVT, NO.29
C

C

Width 20 mil
JSPK1
SPK_R1SPK_R2+
SPK_L1SPK_L2+
L1102
L1103
L1104
L1105
1
1
1
1
2
2
2
2
1
2
3
4
5
6
SPK_R1-_CONN
SPK_R2+_CONN
SPK_L1-_CONN
SPK_L2+_CONN
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
1
2
3
4
GND
GND
ACES_50302-00401-004
CONN@
@
1
2 10U_0603_6.3V6M
@
EMI
FVT, NO.49
SDV2, NO.92
2
Near Pin 15
31
R1140 1
SPK_RT_Detect#
@
1
2 0_0402_5%
1
2
1
2
1
2
1000P_0402_50V7K
C1120
Near Pin 12
C1140
2 0.1U_0402_16V4Z
@
1000P_0402_50V7K
1
C1139
2 10U_0603_6.3V6M
C1118
@
1000P_0402_50V7K
2 0.1U_0402_16V4Z
1
C1138
1
C1117
1000P_0402_50V7K
C1115
C1137
+CLASSD_5V
@
Note.
QALEA 14" => JSPK1 => 4Pin
QALEB 15" => JSPK1 => 6Pin
D
D
HDA_RST#_AUDIO
C1123 @1
2 22P_0402_50V8J
HDA_SYNC_AUDIO
C1126 @1
2 22P_0402_50V8J
HDA_SDOUT_AUDIO
C1128 @1
2 22P_0402_50V8J
C1131 @1
2 22P_0402_50V8J
HDA_BITCLK_AUDIO R1123
1
@
2 33_0402_5%
HDA_BITCLK_AUDIO_R
Compal Secret Data
Issued Date
2011/04/18
Deciphered Date
2015/07/08
ɩɥɭɮɨ
Custom
Şɯɨɩɨ
Date:
Sheet
29
50
of
Title
1
2
3
4
5
Rev
0.4
A
B
C
D
E
F
G
H
Ŝ
JHDD1
13
13
13
13
1
2
3
4
5
6
7
SATA_FTX_DRX_P0
SATA_FTX_DRX_N0
SATA_FTX_DRX_P0
SATA_FTX_DRX_N0
C2401 1
C2402 1
SATA_FRX_C_DTX_N0
SATA_FRX_C_DTX_P0
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_FRX_DTX_N0
SATA_FRX_DTX_P0
+3VS
GND
A+
AGND
BB+
GND
1
1
31
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
HDD_DETECT#
+5VS_HDD
SDV2, NO.77
+5VS_HDD
SDV2, NO.5
@
@
1
2
10U_0603_6.3V6M
2
C2406
1
1U_0603_10V4Z
C2471
2
1000P_0402_50V7K
C2405
1
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
+5VS
+5VS_HDD
@ J2401
1
1
2
2
JUMP_43X79
23
24
GND
GND
SANTA_198202-1
CONN@
2
2

Ŝ
@ J4
1
+5VS
JODD1
14
R2406 1
ODD_DETECT#
R2401 1
2 0_0402_5%
@
2 0_0402_5%
ODD_DETECT#_R
R2437 1
ODD_DA#_FCH
2 0_0402_5%
ODD_DA#_R
1
R2438
10K_0402_5%
C2486
0.01U_0402_16V7K
1
1
2
2
C2501
10U_0805_10V4Z
R2440
8
9
10
11
12
13
DP
+5V
+5V
MD
GND
GND
1
GND
GND
15
14
SANTA_204901-1
CONN@
2
C2413 1
2 0.01U_0402_16V7K
100K_0402_5%
13
2
ODD_EN
Q2410
IN
GND
3
1
Q2411
2
SATA_FRX_DTX_N1
SATA_FRX_DTX_P1
+5VS_ODD
+5VS_ODD
14
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
3
GND
A+
AGND
BB+
GND
2
C2408 1
C2409 1
SATA_FRX_C_DTX_N1
SATA_FRX_C_DTX_P1
SATA_FRX_C_DTX_N1
SATA_FRX_C_DTX_P1
+5VS_ODD
1
13
13
1
2
3
4
5
6
7
SATA_FTX_DRX_P1
SATA_FTX_DRX_N1
SATA_FTX_DRX_P1
SATA_FTX_DRX_N1
2
2
AP2301GN-HF_SOT23-3
OUT
13
13
1
JUMP_43X79
3
3
Note.
QALEA 14" => JODD1
QALEB 15" => JODD2
Ş
GS_VOUTX
GS_VOUTY
2
2
1
2
GS_ON#
GS_ON#
R2410
1
2
150K_0402_5%
1
@
C2421
0.01U_0402_16V7K
1Q2402
AP2301GN-HF_SOT23-3
1
2
@
R2411
150K_0402_5%
31
31
.1U_0402_16V7K
2
1
C2416
1
4
9
11
13
16
1
.1U_0402_16V7K
NC
NC
NC
NC
NC
NC
COM
COM
COM
COM
1
C2412
2
3
5
6
7
2 56K_0402_5%
2 56K_0402_5%
31
Vs
Vs
.1U_0402_16V7K
2
1
.1U_0402_16V7K
C2410
1
R2403 1
R2404 1
VOUTX
VOUTY
C2418
14
15
C2417
10U_0603_6.3V6M
FVT, NO.15
4
1
+3VS_GS
2 0_0603_5%
12
10
8
.1U_0402_16V7K
@
Xout
Yout
Zout
C2411
R2405 1
ST
2
2
U2406
2
31 GS_SELFTEST
+3VS
FVT, NO.11
2
2
R2409
0_0603_5%
C2419
0.1U_0402_16V4Z
2
3
R2402
100K_0402_5%
1
1
+3VS
+3VS_GS
1
2
1
C2420
0.01U_0402_16V7K
2
C2487
10U_0603_6.3V6M
@
4
APS_GND
LIS34ALTR LGA 16P G-SENSOR
APS_GND
@
J2402
1
Note.
Main Source => C2417 use 10U (SE000005T80)
2nd Source => C2417 use 10K (SD013100280)
2
2MM
Compal Secret Data
APS_GND
Issued Date
2011/04/18
2015/07/08
Deciphered Date
A
B
C
D
E
F
Title
Size
B
Date:
ŵŵ
Ş
Document Number
Şɯɨɩɨ
30
of
Sheet
G
H
Rev
0.4
50
2
3
4
J2200
+EC_AVCC
1
+3VLP
1
SIT, NO.71
33
KSO[0..17]
33
KSI[0..7]
B
KSO[0..17]
KSI[0..7]
SDV2, NO.65
+3VALW
1
@
2 47K_0402_5%
KSO1
R2213
1
@
2 47K_0402_5%
KSO2
R2214
1
2 2.2K_0402_5%
EC_SMB_CK1
R2215
1
2 2.2K_0402_5%
EC_SMB_DA1
+3VS
R2236
1
@
2 100K_0402_5%
SPK_RT_Detect#
R2235
1
@
2 10K_0402_5%
H_PROCHOT#_EC
38,39
38,39
18,25,32,33,7
18,25,32,33,7
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
14
14
14
26
33
30
33
PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
CMOS_ON#
TP_RESET
GS_ON#
WL_OFF_EC#
SIT, NO.65 32 EC_TACH
@
C
+3VALW
D2200
33,35
RB751V-40_SOD323-2
2
1 33,35
FCH_POK
+3VS
2
1
2
R2220
10K_0402_5%
@
R2217
1
2 2.2K_0402_5%
EC_SMB_CK2
R2218
1
2 2.2K_0402_5%
EC_SMB_DA2
C2220
1 @ 2 100P_0402_50V8J EC_SMB_CK2
C2219
1 @ 2 100P_0402_50V8J EC_SMB_DA2
77
78
79
80
PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
CMOS_ON#
TP_RESET
GS_ON#
WL_OFF_EC#
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
EC_TX_P80_DATA
EC_RX_P80_CLK
32 EC_FAN_PWM
30 GS_SELFTEST
1
R2221
0_0402_5%
12,16
RTC_CLK
1
R2200
EC_TACH
EC_PME#
EC_TX_P80_DATA
EC_RX_P80_CLK
FCH_PWROK
EC_FAN_PWM
GS_SELFTEST
122
123
XCLKI
2
XCLKO
0_0402_5%
2
14
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
EC_SMB_CK1/GPIO44
EC_SMB_DA1/GPIO45
SM
EC_SMB_CK2/GPIO46
EC_SMB_DA2/GPIO47
R2225
100K_0402_5%
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
GPIO0A
GPIO0B
GPIO0C
GPIO0D
EC_INVT_PWM/GPIO11
FAN_SPEED1/GPIO14
EC_PME#/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
PCH_PWROK/GPIO18
SUSP_LED#/GPIO19
NUM_LED#/GPIO1A
XCLKI/GPIO5D
XCLKO/GPIO5E
C2215
20P_0402_50V8
1
1
@
2 2.2K_0402_5%
EC_SMB_CK2
R2226
1
@
2 2.2K_0402_5%
EC_SMB_DA2
POP for susclk implemented
20100810
FVT, NO.35
3
67
EC_VDD/AVCC
GPIO0F
BEEP#/GPIO10
GPIO12
ACOFF/GPIO13
BATT_TEMP/GPIO38
GPIO39
ADP_I/GPIO3A
GPIO3B
GPIO42
IMON/GPIO43
DAC_BRIG/GPIO3C
EN_DFAN1/GPIO3D
IREF/GPIO3E
CHGVADJ/GPIO3F
21
23
26
27
63
64
65
66
75
76
BEEP#
WLAN_WAKE#
ACOFF
BEEP# 29
WLAN_WAKE#
ACOFF 37,39
BATT_TEMP
GS_VOUTX
ADP_I
GS_VOUTY
BRDID
APU_IMON
33
68
70
71
72
AOU_CTL2
FCH_PWR_EN
AOU_CTL3
SPK_RT_Detect#
R2232 1
BM#
R2230 1
EC_MUTE#
R2202 1
BEEP#
R2205 1
LID_SW#
R2206 1
2 100K_0402_5%
EC_MUTE#/GPIO4A
USB_EN#/GPIO4B
CAP_INT#/GPIO4C
EAPD/GPIO4D
TP_CLK/GPIO4E
TP_DATA/GPIO4F
CPU1.5V_S3_GATE/GPXIOA00
WOL_EN/GPXIOA01
ME_EN/GPXIOA02
VCIN0_PH/GPXIOD00
83
84
85
86
87
88
2 100K_0402_5%
@
2 10K_0402_5%
+3VALW_EC
97
98
99
109
2 100K_0402_5%
+3VALW
FVT, NO.24
R2223 1
R2224 1
EAPD_R
TL_CLK
SIT, NO.58
2 0_0402_5%
2 0_0402_5%
@
VGATE
APU_ALERT#_EC
9012_PH1
SPI Flash ROM
GPIO
Bus
GPIO
SPIDI/GPIO5B
SPIDO/GPIO5C
SPICLK/GPIO58
SPICS#/GPIO5A
ENBKL/GPIO40
PECI_KB930/GPIO41
FSTCHG/GPIO50
BATT_CHG_LED#/GPIO52
CAPS_LED#/GPIO53
PWR_LED#/GPIO54
BATT_LOW_LED#/GPIO55
SYSON/GPIO56
VR_ON/GPIO57
PM_SLP_S4#/GPIO59
EC_RSMRST#/GPXIOA03
EC_LID_OUT#/GPXIOA04
PROCHOT_IN/GPXIOA05
H_PROCHOT#_EC/GPXIOA06
VCOUT0_PH/GPXIOA07
GPO
BKOFF#/GPXIOA08
PBTN_OUT#/GPXIOA09
PCH_APWROK/GPXIOA10
SA_PGOOD/GPXIOA11
119
120
126
128
BATT_LEN#
BM#
73
74
89
90
91
92
93
95
121
127
ENBKL
ADP_ID
FSTCHG
AOU_EN
AOAC_WLAN
HDD_DETECT#
CP_RESET#
SYSON
VR_ON
VSB_ON
100
101
102
103
104
105
106
107
108
EC_RSMRST#
EC_LID_OUT#
Turbo_V
H_PROCHOT#_EC
MAINPWON_R
BKOFF#
PBTN_OUT#
110
112
114
115
116
117
118
ACIN
EC_ON
ON/OFF
LID_SW#
SUSP#
124
+V18R
29
R2207
100K_0402_1%
+5VALW
R2208 1
USB_ON#
2 10K_0402_5%
@
SIT, NO.88
R2209
33K_0402_5%
+5VS
FVT, NO.23
14,45
APU_ALERT#_EC
9012_PH1 38
SPI Device Interface
EAPD
BRDID
EC_MUTE# 29
USB_ON# 34
TL_CLK 25
TL_DATA 25
TP_CLK 33
TP_DATA 33
VGATE
SIT, NO.69
2 10K_0402_5%
@
45
AOU_CTL2 35
FCH_PWR_EN
36
AOU_CTL3 35
SPK_RT_Detect#
29
EC_MUTE#
USB_ON#
TL_CLK
TL_DATA
TP_CLK
TP_DATA
SIT, NO.70
SIT, NO.62
BATT_TEMP 38
GS_VOUTX 30
ADP_I 38,39
GS_VOUTY 30
APU_IMON
HDD_DETECT#
SDV2, NO.66
PS2 Interface
SDV
SDV2
FVT
SIT
SVT
V
V
V
V
A
SDV2, NO.58
DA Output
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
V
V
V
V
max
1
CLK_PCI_EC
PCIRST#/GPIO05
EC_RST#
EC_SCII#/GPIO0E
GPIO1D
FVT, NO.37
+3VS
R2227
AD Input
VAD_BID
0 V
0.289
0.538
0.875
1.264
+3VALW
PWM Output
SIT, NO.2
SDV2, NO.82
FVT NO.31
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
GATEA20/GPIO00
KBRST#/GPIO01
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC & MISC
LPC_AD0
V
V
V
V
typ
7
TP_CLK
R2210 1
2 4.7K_0402_5%
TP_DATA
R2211 1
BATT_TEMP
C2211
1
2 100P_0402_50V8J
ACIN
C2212
1
2 100P_0402_50V8J
SIT, NO.73
2 4.7K_0402_5%
B
EAPD_R
SIT, NO.63
BATT_LEN#
BM# 39,40
38
EC_RSMRST# 14
EC_LID_OUT# 14
Turbo_V 38
H_PROCHOT#_EC
ENBKL
R2233 1
@
2 100K_0402_5%
VR_ON
R2234 1
@
2 100K_0402_5%
+3VALW
ENBKL 25
ADP_ID 37
FSTCHG 39
AOU_EN 35
AOAC_WLAN 33
HDD_DETECT# 30
CP_RESET# 33
SYSON 41,43
VR_ON 42,45
VSB_ON 38
R2216
10K_0402_5%
8/25
SIT, NO.64
35
FVT, NO.30
LAN_WAKE#
EC_PXCONTROL
2
0_0402_5%
EC_PME#
SIT, NO.1
38,7
MAINPWON_R R2228 1
BKOFF# 25,26
PBTN_OUT# 14
EC_PXCONTROL
1
R2219
@
2 0_0402_5%
MAINPWON
37,38,40
14
SDV2, NO.46
AC_IN/GPXIOD01
EC_ON/GPXIOD02
ON/OFF/GPXIOD03
GPI
LID_SW#/GPXIOD04
SUSP#/GPXIOD05
GPXIOD06
PECI_KB9012/GPXIOD07
V18R
2011.10.13
ACIN 35,37
EC_ON 35,40
ON/OFF 35
LID_SW# 35
SUSP# 36,39,42,44
Follow ABO Common Design
C
1
R2212
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
SIT, NO.72
V AD_BID
0 V
0.250
0.503
0.819
1.185
2
2
EC_RST#
EC_SCI#
ADP_PROTECT
Q2201
2N7002K_SOT23-3
min
2
C2210
0.1U_0402_16V4Z
EC_SCI#
ADP_PROTECT
D
2
VAD_BID
0 V
0.216
0.436
0.712
1.036
1
14
38
1
+3VALW_EC
S
AGND/AGND
12,16 CLK_PCI_EC
12,31,35 PLT_RST#
2 47K_0402_5%
12
13
37
20
38
2
1
69
@
1
2
3
4
5
7
8
10
2
R2203 1
+3VALW_EC
R2204 1
26,35
G
ECAGND
2 22P_0402_50V8J
GATEA20
KB_RST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
2
@ JUMP_43X39
A
14 GATEA20
14 KB_RST#
12 SERIRQ
12,33,35 LPC_FRAME#
12,33,35 LPC_AD3
12,33,35 LPC_AD2
12,33,35 LPC_AD1
12,33,35 LPC_AD0
2 10_0402_5%
1
FVT, NO.12
9
22
33
96
111
125
2
U2200
C2209 @1
Logo_LED#
+3VALW_EC
J2201
1
+3VALW
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD0
EC_VDD/VCC
1
1000P_0402_50V7K
2
C2208
1
1000P_0402_50V7K
2
C2207
1
0.1U_0402_16V4Z
2
C2206
2
1
0.1U_0402_16V4Z
2
ECAGND
C2205
2 0_0603_5%
2
1
0.1U_0402_16V4Z
L2201 1
1
C2204
2
C2202
1000P_0402_50V7K
0.1U_0402_16V4Z
1
C2203
1
2
@ JUMP_43X39
+EC_AVCC
C2201
0.1U_0402_16V4Z
2
5
3.3V +/- 5%
Vcc
R2207 100K +/- 5%
Board ID
R2209
0K +/- 5%
0
8.2K
+/- 5%
1
18K +/- 5%
2
33K +/- 5%
3
4
56K +/- 5%
1
2 0_0603_5%
GND/GND
GND/GND
GND/GND
GND/GND
GND0
L2200 1
11
24
35
94
113
+3VALW_EC
Logo_LED#
1
+3VALW_EC +3VLP
2
1
KB9012QF-A3_LQFP128_14X14
C2216
4.7U_0805_10V4Z
2
SDV2, NO.79
Security ROM
1
+3VS
R2231 1
@
1
2 10M_0402_5%
@
2
XCLKI
XCLKO
12,31,35
Y2200
PLT_RST#
R2222
10K_0402_5%
@
U2201
1
2 NC
PLT_RST# 3 NC
4 PROT#
GND
2
+3VS
VCC
WP
SCL
SDA
8
7
6
5
1
ROM_WP
FCH_SCLK0
10,11,14,33
FCH_SDATA0 10,11,14,33
C2200
0.1U_0402_16V4Z
2
PCA24S08D_SO8
EEPROM SA00004MK00
32.768KHZ_12.5PF_CM31532768DZFT
D
@
C2217
18P_0402_50V8J
1
SDV2, NO.44
2
D
1@
C2218
18P_0402_50V8J
2
Compal Secret Data
Issued Date
2011/04/18
Deciphered Date
2015/07/08
Şɰɥɨɩ
Custom
Şɯɨɩɨ
Date:
Sheet
31
of
Title
1
2
3
4
5
Rev
0.4
50
4
3

+3VS
REMOTE1+
+3VS
2
R2434
10K_0402_5%
@
REMOTE1-
1
REMOTE2+
1
2
2
REMOTE2-
C2443
0.1U_0402_16V4Z
1
REMOTE1+
2
REMOTE1-
3
REMOTE2+
4
5
REMOTE2-
C
2
B
2
Q2406
MMST3904-7-F_SOT323-3
E
REMOTE1-
D
2
U2402
D
@
C2441
2200P_0402_50V7K
@
C2440
100P_0402_50V8J
1
C2439
2200P_0402_50V7K
1
1
1
VCC
SCL
DP1
SDA
DN1
ALERT#
DP2
THERM#
DN2
GND
10
EC_SMB_CK2
18,25,31,33,7
9
EC_SMB_DA2
18,25,31,33,7

REMOTE2+
8
@
C2442
100P_0402_50V8J
7
6
1
1
REMOTE1+
1
3

ɏ
ɩɫɥɩ
2
2
B
2
REMOTE2-
C
Q2407 DIS@
MMST3904-7-F_SOT323-3
E
3
5
F75303M_MSOP10
ɨřɩʫŵŞś
ŵśɨɥŵɨɥ
śʳɯɑ
Address 1001_101xb
C
C

ɨ
SDV2, NO.33
JBT1
+3VS
1
2
3
4
5
6
+3VAUX_BT
SIT, NO.17
ACES_50224-00601-001
CONN@
1
14
14
1
USB20_P8
USB20_N8
+3VS
+3VAUX_BT
B
+5VS
@ R2468
10K_0402_5%
2
R2467
10K_0402_5%
2
7
8
1
2
3
4
G1 5
G2 6
C2499 1
2 1U_0603_10V4Z
B
Q30
AP2301GN-HF_SOT23-3
1
2
2
1
1
2
2
2
D
@
Q42
S
2N7002K_SOT23-3
2
G
40mil
31
31
EC_TACH
EC_FAN_PWM
JFAN1
1
2
3
4
5
6
1
2
3
4
G5
G6
ACES_50273-00401-001
CONN@
3
220K_0402_5%
1
10U_0805_10V4Z
BT_ON#
C469
R475
13
1
0.1U_0402_16V4Z
@
R500
470_0402_5%
SDV2, NO.78
C468
1
3
A
A
Compal Secret Data
2011/04/18
Issued Date
Deciphered Date
2015/07/08
Title
Size
B
Date:
5
4
3
2
ŵŵ
Document Number
Şɯɨɩɨ
32
of
50
Sheet
1
Rev
0.4
Mini Card Power Rating

Primary Power (mA)
Power
Normal
1000
750
+3V
330
250
250 (wake enable)
+1.5VS
500
375
5 (Not wake enable)
1
Normal
SIT, NO.57
+3VALW
+VSB
2
1
@ J2403
JUMP_43X79
Auxiliary Power (mA)
Peak
+3VS
+3VS +3VS_WLAN +1.5VS
1
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
PCI_RST#_R
CLK_PCI_DB
SDV2, NO.12
5
5
5
5
R2489
R2490
PCIE_CRX_DTX_N1
PCIE_CRX_DTX_P1
1
1
2 0_0402_5%
2 0_0402_5%
PCIE_CRX_C_DTX_N1
PCIE_CRX_C_DTX_P1
PCIE_CTX_DRX_N1
PCIE_CTX_DRX_P1
PCIE_CTX_DRX_N1
PCIE_CTX_DRX_P1
+3VS_WLAN
R2432
31,35
31,35
EC_TX_P80_DATA
EC_RX_P80_CLK
13,33
WLBT_OFF#
1
1
EC_TX_P80_DATA
EC_RX_P80_CLK
2 100_0402_1%
2 100_0402_1%
R2433
1K_0402_5% 1
2 R2461
53
1
For EC to detect
debug card
R2441
insert.
100K_0402_5%
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND1
LPC_FRAME#_R
LPC_AD3_R
LPC_AD2_R
LPC_AD1_R
LPC_AD0_R
RF_OFF#
R2495 1
R2496 1
2 0_0402_5%
2 0_0402_5%
@
WL_OFF#
13
WL_OFF_EC#
31
APU_PCIE_RST#
FCH_SCLK0
FCH_SDATA0
FCH_SCLK0
FCH_SDATA0
USB20_N5
USB20_P5
USB20_N5
USB20_P5
12,17,35
31
AOAC_WLAN
10,11,14,31
10,11,14,31
G
Q2403
2N7002K_SOT23-3
@
S
D
R2492
1.5M_0402_5%
@
2
C2493
.1U_0603_25V7K
@
14
14
R2477 1
R2478 1
R2474 1
R2475 1
R2476 1
R2479 1
2
2
2
2
2
2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
For AOAC assessment
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
APU_PCIE_RST#
+3VS_WLAN path:
1. +3VS (default)
2. +3VALW
3. +3VALW + Switch
LPC_FRAME#
12,31,35
LPC_AD3
12,31,35
LPC_AD2
12,31,35
LPC_AD1
12,31,35
LPC_AD0
12,31,35
CLK_PCI_DB
12,35
2
BELLW_80003-7021
CONN@
Q2400
SI3456DDV-T1-GE3_TSOP6
@
1
2
Reserve for SW mini-pcie debug card.
Series resistors closed to KBC side.
LPC_FRAME#_R
LPC_AD3_R
LPC_AD2_R
LPC_AD1_R
LPC_AD0_R
PCI_RST#_R
CLK_PCI_DB
4
1
2
0_0402_5%
@
WLAN_EN
D
RF_OFF#
APU_PCIE_RST#
54
GND2
2
R2491
SIT, NO.68
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
6
5
2
1
1
C2494
1U_0402_6.3V6K
@
SIT, NO.67
S
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
R2493
470K_0402_5%
@
2
4
6
8
10
12
14
16
G
2
4
6
8
10
12
14
16
3
WLAN_CLKREQ#
1
3
5
7
9
11
13
15
1
2 0_0402_5%
2
1
1
R2484
WLBT_OFF#
WLAN_CLKREQ#
3
12
12
1
3
5
7
9
11
13
15
WLAN_WAKE#
WLAN_WAKE#
2
JMINI1
31
13,33
14
2 0_0805_5%
@
2
SIT, NO.61
+3VS_WLAN
R2494 1

ɏŜ
ɨɥ
+5VS
LEFT
C2490 1
2 @ 100P_0402_50V8J
MIDDLE
C2491 1
2 @ 100P_0402_50V8J
C2492 1
RIGHT
31
KSO16
C2483 1
2 @ 100P_0402_50V8J
KSO17
C2482 1
2 @ 100P_0402_50V8J
KSO2
C2445 1
2 @ 100P_0402_50V8J
KSO1
C2446 1
2 @ 100P_0402_50V8J
KSO15
C2448 1
2 @ 100P_0402_50V8J
KSO7
C2447 1
2 @ 100P_0402_50V8J
KSO6
C2449 1
2 @ 100P_0402_50V8J
KSI2
C2450 1
2 @ 100P_0402_50V8J
KSO8
C2451 1
2 @ 100P_0402_50V8J
KSO5
C2452 1
2 @ 100P_0402_50V8J
KSO13
C2453 1
2 @ 100P_0402_50V8J
KSI3
C2454 1
2 @ 100P_0402_50V8J
KSO12
C2455 1
2 @ 100P_0402_50V8J
KSO14
C2456 1
2 @ 100P_0402_50V8J
KSO11
C2457 1
2 @ 100P_0402_50V8J
KSI7
C2458 1
2 @ 100P_0402_50V8J
KSO10
C2459 1
2 @ 100P_0402_50V8J
KSI6
C2460 1
2 @ 100P_0402_50V8J
KSO3
C2461 1
2 @ 100P_0402_50V8J
KSI5
C2462 1
2 @ 100P_0402_50V8J
KSO4
C2463 1
2 @ 100P_0402_50V8J
KSI4
C2464 1
2 @ 100P_0402_50V8J
KSI0
C2465 1
2 @ 100P_0402_50V8J
KSO9
C2466 1
2 @ 100P_0402_50V8J
KSO0
C2467 1
2 @ 100P_0402_50V8J
KSI1
C2468 1
2 @ 100P_0402_50V8J
LEFT
MIDDLE
RIGHT
KSO16
KSO17
31
32
CONN PIN define need double check
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
JTP1
18,25,31,32,7
EC_SMB_DA2
31
31
31
1
2
3
4
5
6
7
8
9
10
GND
GND
@
1
@
R2485
1
@
2 0_0402_5%
TP_DETECT
TP_DATA2
TP_CLK2
2 0_0402_5%
CP_RESET#
TP_CLK
TP_DATA
CP_RESET#
TP_CLK
TP_DATA
@ C2489
100P_0402_50V8J
1
1
2
2
@ C2488
100P_0402_50V8J
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
GND
GND
11
12
ACES_51522-01001-001
CONN@
+5VS
GND1
GND2
TP_CLK2
TP_CLK
TP_DATA2
TP_DATA
1
H15
H_2P3
@
R2483
SDV2, NO.73
3
@
H13
H_2P3
1
@
H12
H_2P3
1
@
H8
H_2P3
1
@
H9
H_2P3
1
@
H7
H_2P3
1
1
H6
H_2P3
1
H5
H_4P0
@
EC_SMB_CK2
JAE_FL4S030HA3R3000A-DT
CONN@
1
H4
H_4P0
@
1
2
3
4
5
6
7
8
9
10
11
12
D2403
PJDLC05_SOT23-3
1
@
1
1
H3
H_4P0
TP_RESET
TP_DATA2
TP_RESET
MIDDLE
RIGHT
LEFT
TP_CLK2
18,25,31,32,7
ACES_50524-0100N-001
CONN@

H2
H_4P0
2
SDV2, NO.4
31
JCP1
SIT, NO.20
R2473
1
@
2 4.7K_0402_5%
TP_CLK2
R2464
1
@
2 4.7K_0402_5%
TP_DATA2
R2470
1
@
2 4.7K_0402_5%
TP_RESET
R2472
1
2 0_0402_5%
TP_DETECT
R2471
1
2 100K_0402_1% CP_RESET#
2
KSO[0..17]
C2470
0.1U_0402_16V4Z
D2402
PJDLC05_SOT23-3
1
KSO[0..17]
2 @ 100P_0402_50V8J
31
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
3
KSI[0..7]
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
2
KSI[0..7]
+5VS
1
JKB1
@
FVT, NO.33
@
H25
H_4P0N
@
H11
H_4P0N
H21
H_4P0N
@
1
@
1
H17
H24
H_3P5X4P5N H_3P5X4P5N
1
@
1
@
1
H23
H20
H_5P2X5P7N H_2P1N
1
@
1
H19
H_5P2X5P7N
@
1
H10
H_2P3
@
1
1
H22
H_3P3
@
ZZZ3
Compal Secret Data
FD1
1
FD2
1
FD3
1
FD4
1
LA-8121_PCB
DA80000R200 Issued Date
2011/04/18
Deciphered Date
2015/07/08
Title
Size
C
Date:
ŵŵŵ
Document Number
Şɯɨɩɨ
33
50
Sheet
of
Rev
0.4
5
4
3
2
1
USB3.0 Conn *3
LP1
For EMI request
+USB3_VCCA
L2400
1
2USB30_FTX_DRX_P0_L
2
4
3USB30_FTX_DRX_N0_L
3
USB30_FTX_DRX_N0
D
14
USB30_FTX_DRX_P0
14
USB30_FRX_DTX_N0
14
USB30_FRX_DTX_P0
14
USB30_P10
14
USB30_N10
USB30_FTX_DRX_N0
1@ R2443
2
USB30_FTX_DRX_P0
1@ R2442
2
USB30_FRX_DTX_N0
1@ R2444
2
USB30_FRX_DTX_P0
1@ R2445
2
USB30_P10
1@ R2446
2
USB30_N10
1@ R2447
2
USB30_FTX_DRX_N0_L
0_0402_5%
USB30_FTX_DRX_P0_L
0_0402_5%
USB30_FRX_DTX_N0_L
0_0402_5%
USB30_FRX_DTX_P0_L
0_0402_5%
USB30_P10_L
0_0402_5%
USB30_N10_L
0_0402_5%
USB30_FRX_DTX_N0_L
9
1USB30_FRX_DTX_N0_L
USB30_FRX_DTX_P0_L
8
2USB30_FRX_DTX_P0_L
USB30_FTX_DRX_N0_L
7
4USB30_FTX_DRX_N0_L
USB30_FTX_DRX_P0_L
6
5USB30_FTX_DRX_P0_L
2
L2401
1
USB30_FRX_DTX_P0
1
4
USB30_FRX_DTX_N0
2USB30_FRX_DTX_P0_L
2
4
3USB30_FRX_DTX_N0_L
3
JUSB3
I/O2
I/O4
6
GND
1
WCM-2012HS-900T_4P
VDD
I/O1
I/O3
9
1
8
3
7
2
6
4
5
USB30_FTX_DRX_P0_L
D2404
WCM-2012HS-900T_4P
14
3
USB30_P10_L
150U_B2_6.3VM_R35M
C2473
4
USB30_FTX_DRX_N0
FVT, No.5
W=80mils
+USB3_VCCA
D2405
5
+5VALW
4
USB30_N10_L
1
+
2
470P_0402_50V7K
C2474
1
USB30_FTX_DRX_P0
USB30_FTX_DRX_N0_L
USB30_P10_L
1
USB30_N10_L
USB30_FRX_DTX_P0_L
2
USB30_FRX_DTX_N0_L
SSTX+
VBUS
SSTXD+
GND
DSSRX+
GND
SSRX-
GND
GND
GND
GND
D
10
11
12
13
ACON_TARA4-9K1311
CONN@
L2402
USB30_P10
1
USB30_N10
4
1
2
4
3
2
USB30_P10_L
3
USB30_N10_L
3
TVWDF1004AD0_DFN9
WCM-2012-670T_4P
+5VALW
+USB3_VCCA
U2404
1
2
3
USB_ON# 4
C2475
0.1U_0402_16V4Z
1
2
W=80mils
8
7
6
5
GND VOUT
VIN VOUT
VIN VOUT
EN
FLG
R2487
1
G547I2P81U_MSOP8
2
USB_OC0#
10K_0402_5%
31
For EMI request
14
2
Low Active
USB_ON#
1
C2476
0.1U_0402_16V4Z
L2403
USB30_FTX_DRX_N1
1
USB30_FTX_DRX_P1
4
1
2
4
3
2USB30_FTX_DRX_N1_L
D2406
C
14
USB30_FTX_DRX_N1
14
USB30_FTX_DRX_P1
14
USB30_FRX_DTX_N1
14
USB30_FRX_DTX_P1
14
USB30_P11
14
USB30_N11
1@ R2448
2
USB30_FTX_DRX_P1
1@ R2449
2
USB30_FRX_DTX_N1
1@ R2450
2
USB30_FRX_DTX_P1
1@ R2452
2
USB30_P11
1@ R2451
2
USB30_N11
1@ R2453
2
USB30_FTX_DRX_N1
USB30_FTX_DRX_N1_L
0_0402_5%
USB30_FTX_DRX_P1_L
0_0402_5%
USB30_FRX_DTX_N1_L
0_0402_5%
USB30_FRX_DTX_P1_L
0_0402_5%
USB30_P11_L
0_0402_5%
USB30_N11_L
0_0402_5%
USB30_FRX_DTX_N1
1
USB30_FRX_DTX_P1
4
3USB30_FTX_DRX_P1_L
USB30_FRX_DTX_N1_L
9
1USB30_FRX_DTX_N1_L
WCM-2012HS-900T_4P
USB30_FRX_DTX_P1_L
8
2USB30_FRX_DTX_P1_L
L2404
USB30_FTX_DRX_N1_L
7
4USB30_FTX_DRX_N1_L
USB30_FTX_DRX_P1_L
6
5USB30_FTX_DRX_P1_L
1
2
4
3
C
3USB30_FRX_DTX_P1_L
2
TVWDF1004AD0_DFN9
1
2
2
JUSB2
D2407
USB30_P11_L 3
USB30_FTX_DRX_P1_L
I/O2
I/O4
GND
VDD
6
USB30_FTX_DRX_N1_L
USB30_P11_L
3
L2405
1
USB30_P11_L
5
USB30_N11_L
USB30_FRX_DTX_P1_L
+5VALW
USB30_FRX_DTX_N1_L
4
USB30_N11
4
W=80mils
2USB30_FRX_DTX_N1_L
WCM-2012HS-900T_4P
USB30_P11
LP2
+USB3_VCCA
3
3
1
USB30_N11_L
WCM-2012-670T_4P
I/O1
I/O3
4
9
1
8
3
7
2
6
4
5
USB30_N11_L
SSTX+
VBUS
SSTXD+
GND
DSSRX+
GND
SSRX-
GND
GND
GND
GND
10
11
12
13
ACON_TARA4-9K1311
CONN@
+USB3_VCCB
U2405
C2477
0.1U_0402_16V4Z
1
2
For EMI request
L2406
USB30_FTX_DRX_N2
B
14
USB30_FTX_DRX_N2
14
USB30_FTX_DRX_P2
14
USB30_FRX_DTX_N2
14
USB30_FRX_DTX_P2
14
14
USB30_P12
USB30_N12
USB30_FTX_DRX_N2
1@ R2454
2
USB30_FTX_DRX_P2
1@ R2455
2
USB30_FRX_DTX_N2
1@ R2457
2
USB30_FRX_DTX_P2
1@ R2456
2
USB30_P12
1@ R2458
2
USB30_N12
1@ R2459
2
USB30_FTX_DRX_N2_L
0_0402_5%
USB30_FTX_DRX_P2_L
0_0402_5%
USB30_FRX_DTX_N2_L
0_0402_5%
USB30_FRX_DTX_P2_L
0_0402_5%
USB30_P12_L
0_0402_5%
USB30_N12_L
0_0402_5%
1
USB30_FTX_DRX_P2
4
USB30_FRX_DTX_N2
1
1
4
2
3
2
USB30_FTX_DRX_N2_L
1
2
3
USB_ON# 4
GND VOUT
VIN VOUT
VIN VOUT
EN
FLG
8
7
6
5
G547I2P81U_MSOP8
W=80mils
R2488
1
2
10K_0402_5%
Low Active
3
USB30_FTX_DRX_P2_L
USB_OC1#
2
1
C2480
0.1U_0402_16V4Z
14
1
+
2
470P_0402_50V7K
C2479
+USB3_VCCB
150U_B2_6.3VM_R35M
C2478
+5VALW
1
2
B
WCM-2012HS-900T_4P
D2408
L2407
USB30_FRX_DTX_P2
4
1
4
2
3
2
3
USB30_FRX_DTX_N2_L
USB30_FRX_DTX_N2_L
9
1USB30_FRX_DTX_N2_L
USB30_FRX_DTX_P2_L
8
2USB30_FRX_DTX_P2_L
USB30_FTX_DRX_N2_L
7
4USB30_FTX_DRX_N2_L
USB30_FTX_DRX_P2_L
6
5USB30_FTX_DRX_P2_L
USB30_FRX_DTX_P2_L
LP3
WCM-2012HS-900T_4P
+USB3_VCCB
L2408
USB30_P12
1
USB30_N12
4
1
2
2
USB30_P12_L
3
USB30_N12_L
W=80mils
3
4
3
JUSB1
USB30_FTX_DRX_P2_L
TVWDF1004AD0_DFN9
D2409
WCM-2012-670T_4P
USB30_P12_L 3
I/O2
I/O4
GND
VDD
I/O1
I/O3
USB30_FTX_DRX_N2_L
USB30_P12_L
6
USB30_N12_L
USB30_FRX_DTX_P2_L
2
1
5
4
+5VALW
USB30_FRX_DTX_N2_L
9
1
8
3
7
2
6
4
5
SSTX+
VBUS
SSTXD+
GND
DSSRX+
GND
SSRX-
GND
GND
GND
GND
10
11
12
13
ACON_TARA4-9K1311
CONN@
USB30_N12_L
A
A
Compal Secret Data
Issued Date
2011/04/18
Deciphered Date
2015/07/08
Title
Size
C
Date:
5
4
3
2
ɪŜɥ
Document Number
Şɯɨɩɨ
of
34
Sheet
1
Rev
0.4
50
5
4
3
2
ŵ
ɩŜɥŵ

2
+3VLP
2
2
+3VLP +3VALW
R2460
100K_0402_5%
JAUD1
1
SDV2, NO.31
1
D
JPWR1
FVT, NO.18
FVT, NO.55
31
D2410
2
ON/OFF
3
51_ON#
1
ON/OFFBTN#
SHORT PADS
ON/OFF
31
51_ON#
37
1
2
3
4
ON/OFFBTN#
LID_SW#
LID_SW#
1
2
3
4
G1
G2
5
6
ACES_50504-0040N-001
CONN@
BAV70W_SOT323-3
1
SDV2, NO.98
SDV2, NO.14
D
Q2408
S
2N7002K_SOT23-3
29
29
HP_OUTL
HP_OUTR
29
29
EXT_MIC
PLUG_IN
14
14
USB20_N0
USB20_P0
14
31
USB_OC3#
AOU_EN
31
31
AOU_CTL2
AOU_CTL3
2
ON/OFFBTN#
D
ACES_88194-2041
CONN@
LID_SW#
3
3
G
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
GND1
GND2
2
EC_ON
EC_ON
2
31,40
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+5VALW
R2482
0_0402_5%
@
1
R2481
0_0402_5%
J2405
1
2
1
R2463
10K_0402_5%
1
SDV2, NO.68
1
@
D2416
PJSOT24CH_SOT23-3
C
C
SDV2, NO.32

SDV2, NO.80

JRJ45
PCIE_CTX_DRX_N0
PCIE_CTX_DRX_P0
CLK_PCIE_LAN#
CLK_PCIE_LAN
LAN_CLKREQ#
APU_PCIE_RST#
LAN_WAKE#
FCH_PCIE_WAKE#
CLK_LAN_25M
ACIN
CLK_PCIE_LAN#
CLK_PCIE_LAN
LAN_CLKREQ#
APU_PCIE_RST#
LAN_WAKE#
FCH_PCIE_WAKE#
CLK_LAN_25M
ACIN
+3VS
+3VALW
+RTCBATT
JFPB1
+3VS
1
C2481
0.1U_0402_16V4Z
14
14
+3VS_FP
USB20_N7
USB20_P7
USB20_N7
USB20_P7
FP_GND
2
ACES_50506-01841-P01
CONN@
D2413
AZC199-02SPR7G_SOT23-3
1
2
3
4
1
2
3
4
G1
G2
5
6
ACES_50504-0040N-001
CONN@
1
2 33_0402_5%
1
CLK_LAN_25M R2480 1
SDV2, NO.30
3
PCIE_CTX_DRX_N0
PCIE_CTX_DRX_P0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
GND
GND
2
5
5
12
12
14
12,17,33,35
31
14
12
31,37
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PCIE_CRX_DTX_N0
PCIE_CRX_DTX_P0
3
PCIE_CRX_DTX_N0
PCIE_CRX_DTX_P0
2
5
5
For ESD
B
B
2
1
C2500
22P_0402_50V8J

Ŝ
SDV2, NO.34
+3VS
SDV2, NO.3
SDV2, NO.25
+3VS
+3VALW
JCARD1
5
5
12
12
PCIE_CRX_DTX_P3
PCIE_CRX_DTX_N3
CLK_PCIE_CARD
CLK_PCIE_CARD#
5 PCIE_CTX_DRX_P3
5 PCIE_CTX_DRX_N3
14 CARD_CLKREQ#
12,17,33,35
APU_PCIE_RST#
+3VALW
26,31 Logo_LED#
PCIE_CRX_DTX_P3
PCIE_CRX_DTX_N3
CLK_PCIE_CARD
CLK_PCIE_CARD#
PCIE_CTX_DRX_P3
PCIE_CTX_DRX_N3
CARD_CLKREQ#
APU_PCIE_RST#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
GND
GND
JDB3
12,31,33 LPC_FRAME#
12,31,33 LPC_AD3
12,31,33 LPC_AD2
12,31,33 LPC_AD1
12,31,33 LPC_AD0
12,31 PLT_RST#
12,33 CLK_PCI_DB
31,33 EC_TX_P80_DATA
31,33 EC_RX_P80_CLK
15
16
1
2
3
4
5
6
7
8
9
10
11
12
PLT_RST#
CLK_PCI_DB
1
2
3
4
5
6
7
8
9
10
11 GND
12 GND
13
14
ACES_85201-1205N
CONN@
ACES_50224-0140N-001
CONN@
C2502
12P_0402_50V8J
@
A
A
Compal Secret Data
Issued Date
2011/04/18
Deciphered Date
2015/07/08
5
4
3
2

Size
Document Number
Custom
Şɯɨɩɨ
35
Date:
Sheet
of
Title
1
Rev
0.4
50
B
C
D
ʫɬʫɬ
ʫɪʫɪ
E
ʫɨŜɬʫɨŜɬ
+1.5V
1
+VSB
1
10K_0402_5%
D
2
15VS_GATE_R
1
D
C2311
.1U_0603_25V7K
2
SUSP
Q2304
2N7002K_SOT23-3
G
S
@
Q2300
2N7002K_SOT23-3
S
5VS_GATE 2 R2307
10K_0402_5%
2
2
C2303
1U_0603_10V6K
R2301
470_0603_5%
@
1
2 SUSP
G@
Q2303
2N7002K_SOT23-3
S
No.40
1.5VS_GATE 1
21.5VS_GATE_R
R2309
150K_0402_5%
1
D
C2310
.1U_0603_25V7K
SUSP# 2
Q2306
2N7002K_SOT23-3
G
2
C2300
.1U_0603_25V7K
S
3
3
3
Q2305
2N7002K_SOT23-3
S
R2305
150K_0402_5%
@
Q2302
2N7002K_SOT23-3
3VS_GATE_R
100K_0402_5%
R2306 FVT,
1
1
SUSP
G
1
2 R2308
2
G
FVT, No.2
3
3
S
2
1
3VS_GATE
2
D
2
SUSP
G
2
1
@
C2302
10U_0603_6.3V6M
+5VALW
D
2
R2304
470K_0402_5%
R2302
470_0603_5%
@
1
AP2301GN-HF_SOT23-3
2
2
AP4800BGM-HF_SO-8
C2301
10U_0603_6.3V6M
C2305
10U_0603_6.3V6M
D
FVT, No.3
SUSP
2
C2304
10U_0603_6.3V6M
1
1
1
AP4800BGM-HF_SO-8
1
R2303
470_0603_5%
@
1
2
3
2
4
+VSB
C2308
10U_0603_6.3V6M
8
7
6
5
1 2
2
1
1
1
4
1
1 2
2
1
2
3
1
8
7
6
C2307
10U_0603_6.3V6M5
1
+1.5VS
Q2301
3
+5VS
1
U2301
3
+5VALW
+3VS
U2302
2
+3VALW
1
A
ʫɨŜɨʫɨŜɨ
+1.1VALW
ʫɪʫɪ
ʫɨŜɨʫɨŜɨ
SIT, No.89
SIT, No.90
+1.1VS
U2300
SIT, No.83
SIT, No.83
SIT, No.45
1
D
@
3V_FCH_GATE 2 R2310
3
D
FCH_PWR_EN_R
SIT, No.77
13V_FCH_GATE_R
1
0_0402_5%
2
G
@
Q2313
2N7002K_SOT23-3
2
@
C2312
.1U_0603_25V7K
1.1V_FCH_GATE
D
FCH_PWR_EN_R
2
G
S
@
Q2309
2N7002K_SOT23-3
@
R2322
150K_0402_5%
@
Q2314
2N7002K_SOT23-3
2
C2316
1U_0603_25V6K
1
2
G
S
2
@
2 R2317
1
2
@
C2319
1U_0603_10V6K
SIT, No.46
3
3
+3VALW
+3V
+1.1VALW
+1.1V
1
2
J2302 @
2
1
+RTCBATT
2
Short J2301 for PCH VCCSUS3.3
1
+3VALW
OUT
@
Q2312
2 SUSP
3
ʫɪʫɪɏ
1
1
2
1
1 2
SUSP
+3V_FCH
Q2308
J2301 @
1
G
2
SUSP#
1
2
2
JUMP_43X79
IN
3
GND
3
31,39,42,44
2
@
R2313
100K_0402_5%
R2312
100K_0402_5%
SUSP
2
+5VALW
+0.75VS
43
1
JUMP_43X79
3
2N7002K_SOT23-3
1
11.1V_FCH_GATE_R
0_0402_5%
@
Q2316
2N7002K_SOT23-3
JUMP_43X79
S
2FCH_PWR_EN_R
G
S
SIT, No.44
1
D
D
S
J2303 @
R2319
470_0603_5%
@
@
R2321
470_0603_5%
3
2FCH_PWR_EN_R
@
R2323
100K_0402_5%
1.1VS_GATE_R
1
2
@
C2318
1U_0603_10V6K
+5VALW
1
47K_0402_5%
@
1
2
@
R2324
470_0603_5%
@
C2320
10U_0603_6.3V6M
1
2
3
D
2
1
C2317
10U_0603_6.3V6M
2
SI2305CDS-T1-GE3_SOT23-3
1
2SUSP
@
C2321
10U_0603_6.3V6M
2
1
G
2
1
2
Q2310
2N7002K_SOT23-3
D
1
1
3
2 R2316
S
@
C2309
10U_0603_6.3V6M
2
SI2305CDS-T1-GE3_SOT23-3
+5VALW
S
1.1VS_GATE
G
1
1
1
1
1 2
R2315
220K_0402_5%
SUSP
3
G
FVT, No.4
@
Q2307
2N7002K_SOT23-3
+1.1V
3
R2311
470_0603_5%
@
G
+VSB
@
Q2317
+3V
1
2
4
AP4800BGM-HF_SO-8
+3VALW
1 2
2
C2315
1U_0603_10V6K
+1.1VALW
D
C2314
10U_0603_6.3V6M
SIT, No.43
@
Q2318
D
2
1
2
1
S
2
1
2
3
S
2
8
7
6
C2313
10U_0603_6.3V6M5
1
1
SIT, No.59
31
FCH_PWR_EN
R2325 2
1 0_0402_5%
FCH_PWR_EN_R
4
4
Compal Secret Data
Issued Date
2011/04/18
Deciphered Date
2015/07/08
Title
Size
C
Date:
A
B
C
D
Document Number
Şɯɨɩɨ
of
36
50
Sheet
E
Rev
0.4
4
ADP_ID
31
A/D
Precharge detector
15.97V/14.84V FOR
ADAPTOR
90W 65W
open 10
3.3 1.65
>2.64 1.32~1.98
VS
1
3
1
LL4148_LL34-2
3
2
1
PR118
150K_0402_1%
PC115
0.1U_0603_25V7K
2
G
2
1
PC113
0.01U_0402_25V7K
PRG++ 2
1
PR127
47K_0402_5% 37,39
2
1
D
1
RTCVREF
1
PR120
61.9K_0402_1%
6
PR121
887K_0402_1%
2
1
5
PR126
10K_0402_5%
2
1
VS
1
1 2
3
PC110
2
1
0.01U_0402_25V7K
8
-
B
PACIN
PQ106
S
3
1
+
O
PQ105
2N7002W-T/R7_SOT323-3
PR124
68_1206_5%
7
2
2
1
PR129
22K_0402_1%
1
2
2
LTC015EUBFS8TL_SOT323-3
2
51ON-3
+5VALW
3
51_ON#
39,40 PRECHG
PR122
200K_0402_1%
2
1
PU101B
LM393DG_SO8
2
PC114
0.22U_0603_25V7K
1
PR128
100K_0402_1%
35
3
51ON-2
51ON-1
PR123
68_1206_5%
2
PR125
200_0603_5%
2
CHGRTCP 1
ACON
PD103
RB715F_SOT323-3
2
1
3
2
PQ101
TP0610K-T1-E3_SOT23-3
39
1
1
B
MAINPWON
2
2
31,38,40
4
1
1
BATT+
PD105
LL4148_LL34-2
2
1
VS
PC112
1000P_0402_50V7K
VL
VIN
C
PR115
4.99M_0402_5%
2
1
@
PD104
LL4148_LL34-2
2
B+
Max.
18.384V
17.728V
1
2
Vin Detector
Min.
typ.
L-->H 17.430V 17.901V
H-->L 16.976V 17.262V
PR138
0_0402_5%
1
2
3.3V
PQ104
37,39
P
4
5
PACIN
31,35
G
PACIN
PQ107B
2N7002KDW-2N_SOT363-6
1
PR116
10K_0402_5%
1
3
2
@
@
ACIN
2
ACOFF
PR119
100K_0402_1%
2
1
RTCVREF
PR135
100K_0402_1%
2
1
2
PD101
LLZ4V3B_LL34-2
1
6
2
2
1
PR134
100K_0402_1%
2
1
PR111
10K_0805_5%
1
PU101A
LM393DG_SO8
PR117
10K_0402_5%
2
1
PQ107A
2N7002KDW-2N_SOT363-6
O
@
1
-
2
1
2
8
+
P
2
4
1
2
PC109
0.1U_0402_16V7K
1
2
VINDE-3
PR114
20K_0402_1%
PC108
0.068U_0603_16V7K
2
1
3
G
2
PR113
22K_0402_1%
1
2
VINDE-1
PC107
0.01U_0402_25V7K
1
PR110
84.5K_0402_1%
C
PR112
10K_0402_1%
1
2
PR137
100K_0402_1%
+3VLP
VIN
PR136
100K_0402_1%
VS
31,39
PD107
RB715F_SOT323-3
PC111
0.1U_0603_25V7K
2
1
VIN
VINDE-2
+3VLP
@
2
3
PR109
1M_0402_1%
1
2
VIN
PQ103
BATT+
1
1
2
PR105
1K_1206_5%
1
2
PR108
100K_0402_1%
1
2
2
D
PC106
1000P_0402_50V7K
1
2
PC104
100P_0402_50V8J
1
2
@
PD102
PR104
1K_1206_5%
1
2
2
PL101
SMB3025500YA_2P
PC101
1000P_0402_50V7K
PF101
7A_24VDC_429007.WRML
PR103
1K_1206_5%
1
2
PR107
100K_0402_1%
2
1
VIN
1
APDIN1
1
2
2
1
1
PQ102
TP0610K-T1-E3_SOT23-3
PC105
100P_0402_50V8J
1
1 2APDIN
2 3
3 4
4 5
5
ACES_50312-00541-001
135W
0
0
<0.33
2
PR106
100K_0402_1%
2
1
1
3
ADP_ID
AC Adapter
R(K ohm)
ADP_ID(V)
Detection voltage
PR102
270_0402_1%
1
2
JDCIN1
D
2
2
1
+3VALW
PC102
0.1U_0402_16V7K
PR101
10K_0402_1%
1
2
PC103
680P_0603_50VK
5
1
RTCVREF
+CHGRTC
3
VOUT
2
VIN
GND
PC116
10U_0603_6.3V6M
1
BATT ONLY
Precharge detector
Min.
typ.
Max.
L-->H 7.196V 7.349V 7.505V
H-->L 6.138V 6.214V 6.056V
ACIN
Precharge detector
Min.
typ.
Max.
L-->H 14.991V 15.381V 15.782V
H-->L 13.860V 14.247V 14.621V
2
3.3V
PR131
200_0603_5%
BIT3021A-ST9 SOT89 3P
2CHGRTCIN
1
2
RB751V-40_SOD323-2
PU102
PR133
560_0603_5%
1
2
PC117
1U_0805_25V6K
2
1
+RTCBATT
PR132
560_0603_5%
1
2
1
PD106
A
A
Compal Secret Data
Issued Date
2011/04/18
2015/07/08
Deciphered Date
Title
PWR DCIN / Vin Detector /Pre-charge
Size
Document Number
Custom
Rev
C38-G series Chief River Schematic0.1
Date:
5
4
3
2
Sheet
1
37
of
48
5
4
VMB2
1
PL201
SMB3025500YA_2P
1
2
BATT+
1
PH1 under CPU botten side :
CPU thermal protection at 93 +-3 degree C
Recovery at 56 +-3 degree C
ADP_I
PR231
1
PR206
12.7K_0402_1%
1
2
PR234
9012_PH1 31
2
1
1
39
PR229
PR228
0_0402_5%
@
2
+3VLP
31
100K_0402_1%
1
PR226
0_0402_5%
2
PR232
0_0402_5%
2
MAINPWON
31,37,40
+3VLP
1
PR209
10K_0402_1%
3
S
C
@
1
PR230
0_0402_5%
D
PR211 @
0_0402_5%
2
1
1
PH201
100K_0402_1%_TSM0B104F4251RZ
2
2
2
PR227
1
6
5
OT2 RHYST2
G718TM1U_SOT23-8
1
1
PU202A
LM393DG_SO8
@
PR205
21.5K_0402_1%
ADP_PROTECT
1
2
G
1
@
Turbo_V
B
PQ202
TP0610K-T1-E3_SOT23-3
@
BATT_LEN#
PR215
22K_0402_1%
1
2
VL
+VSBP
PC205
0.1U_0603_25V7K
2
@
1
1
S
2
G
1
31
3
B+
PQ204
D 2N7002KW_SOT323-3
2
PR223
100K_0402_1%
2
@
PC204
0.22U_0603_25V7K
2VREF_8205
2
1
PR214
100K_0402_1%
1
PR221
10K_0402_1%
@
31
+3VALW
PR207
10K_0402_1%
2
2
1
BATT_OUT
@
1
OT1 TMSNS2
2
G
S
7
@
2
PQ203
2N7002KW_SOT323-3
O
-
H_PROCHOT#_EC
1
+
31,7
3
2
GND RHYST1
2ADP_OCP_1
G
S SSM3K7002FU_SC70-3
PR220
100K_0402_1%
1
3
PQ206
2
2
PR218
@
100K_0402_1%
3
PR219
@
221K_0402_1%
PR222 @
10M_0402_5%
1
4
@
2
B
@
8
PR217
10K_0402_1%
1
2
+3VALW
P
PR216
768K_0402_1%
1
@
2
2
@
G
VMB2
PC207
0.01U_0402_25V7K
1
D
+3VLP
1
H_PROCHOT#
4
100K_0402_1%
45,7
VS
3
VCC TMSNS1
1
2
PR208
27.4K_0402_1%
2
+3VS
8
D
+3VLP
47K_0402_1%
1
2
1
PU201
1
+3VLP
2
2
PR224
4.42K_0402_1%
2
PC203
0.1U_0603_25V7K
C
PQ205
2N7002W-T/R7_SOT323-3
A/D
31
1
BATT_TEMP
2
VL
1
2
PR204
10K_0402_5%
47K_0402_1%
1
2
31,39
+3VALW
2
31,39
PR225
2.1K_0402_1%
1
2
31,39
EC_SMB_DA1
1
1
2
PR203
6.49K_0402_1%
EC_SMB_CK1
For KB930 --> Keep PU201 circuit
(Vth = 1.25V)
For KB9012 (Red square) --> Remove PU201 circuit, but keep PR206
PH201
3
2
2
D
PC202
0.01U_0402_25V7K
1
@
PC201
1000P_0402_50V7K
2
SUYIN_200082GR007M211ZR
2
1
PR202
100_0402_1%
1
EC_SMCA
EC_SMDA
2
1
PR201
100_0402_1%
D
1
2
3
4
5
6
7
8
9
2
VMB
PF201
12A_65V_451012MRL
1
2
JBATT1
1
2
3
4
5
6
7
GND
GND
3
31
VSB_ON
D
S
2
G
PR233
0_0402_5%
1
2
@
A
1
PR212
1K_0402_5%
2
3
1
1
SPOK
2
40,41
PC206
1U_0402_6.3V6K
1
PR213
100K_0402_1%
PQ201
2N7002W-T/R7_SOT323-3
PJ201
@ JUMP_43X39
1
2
1
2
+VSB
A
Compal Secret Data
Issued Date
+VSBP
2011/04/18
2015/07/08
Deciphered Date
Title
PWR-BATTERY CONN/OTP
Size
Document Number
Custom
Rev
Date:
5
4
3
2
Sheet
1
38
of
48
3
Need EC write ChargeOption() bit[8]=1
P2
PQ304
AO4423_SO8
4
2
PC308
2200P_0402_50V7K
2
1SS355_SOD323-2
1
1
1
2 ACOFF
3
PR307
10K_0402_1%
1 DISCHG_G-1
1
2
PC307
4.7U_0805_25V6-K
1
2
3
1
3
3
PC311
0.1U_0603_25V7K
2
1
PACIN
19
LX_CHG
1
2
PL301
10UH_+-20%_PCMB104T-100MS_6A
BM
@
18 DH_CHG
17
PR324
2.2_0603_5%
1
2
BST_CHG
PD303
REGN
2
16
1
2
1
PC315
0.047U_0603_25V7M
4
3
2
1
1
15
2
PC318
1U_0603_25V6
2
14
PR327
10_0603_5%
1 13
2
11
6.8_0603_5%
1 12
PR326
1
2
RB751V-40_SOD323-2
DL_CHG
PR320
0.01_1206_1%
1
4
2
3
SRP
SRN
@
BA+
B
1
1
2
PC320
0.1U_0603_25V7K
2
1
2 CHG
PR323
4.7_1206_5%
BTST
1
PC319
680P_0603_50V7K
ILIM
1U_0603_25V6
PC317
10U_0805_25V6K
2
1
BQ24727VCC-1
3
2
1
20
PC316
10U_0805_25V6K
2
1
4
1
HIDRV
SA000051W00
SCL
PR335
0_0402_5%
2
1
BM#
PQ312
AO4466L_SO8
PR318
10_1206_5%
1
2
ACN
ACP
1
2
3
CMPIN
21
C
PQ311
2N7002W-T/R7_SOT323-3
2
PC321
0.1U_0603_25V7K
@
PC322
0.1U_0603_25V7K
BQ24727VCC
PR329
2
1
100K_0402_1%
PD304
RB715F_SOT323-3
2
3
A
2
FSTCHG
3
SUSP#
1
FSTCHG 31
SUSP# 31,36,42,44
A
LTC015EUBFS8TL_UMT3F
PQ316
2011/04/18
Issued Date
Compal Secret Data
2015/07/08
Deciphered Date
Title
Size
Date:
5
2
G
S
1
VCHLIM need over 95mV
1
2
IREF=0.254V~3.048V
D
PQ315 TP0610K-T1-E3_SOT23-3
3
PR328
100K_0402_1%
2
1
IREF=1.016*Icharge
BQ24727VCC
PQ314
AO4466L_SO8
10
@
P2
CC=0.25A~3A
37,40
PQ309
2N7002KW_SOT323-3
5
6
7
8
PR322
1
2
316K_0402_1%
PHASE
PU301
BQ24737RGRR_VQFN20_3P5X3P5
+3VS
3.2935V
PRECHG
S
5
6
7
8
9
SDA
0V
1.882V
2
G
2
PD302
1SS355_SOD323-2
PQ308
PC314
VCC
CHGVADJ
4.35V
D
2
IOUT
PR325
100K_0402_1%
31,40
2
PR303
499K_0402_1%
D
1
1
LODRV
0.1u_0603_50V8
8
+3VALW
1
BATT+
PR308
200K_0402_1%
1
0.1U_0603_25V7K
GND
7
CHGVADJ=(Vcell-4)/0.10627
4.2V
PC306
4.7U_0805_25V6-K
1
2
2
1
0.1U_0603_25V7K
2
TP
SRP
PC313
1
2
PR333
0_0402_5%
0.1U_0603_25V7K 1
2
EC_SMB_DA1
PR334
0_0402_5%
1
2
EC_SMB_CK1
ACDET
SRN
6
CMPOUT
5
ADP_I
64.9K_0603_1%
1
2
PC324 @
4
ACOK
PR315
10K_0402_5%
1
2
PR316
10K_0402_5%
1
2
2
1
432K_0603_1%
31,38
@
2
@
4V
PC305
4.7U_0805_25V6-K
1
2
2
1
2
1
1
PR319
@
B
Vcell
2
2
1
1
2
3
PQ306
PC310
0.1U_0603_25V7K
1
31,38
PQ317
2N7002KW_SOT323-3
@
VIN
8
7
6
5
PR305
47K_0402_1%
1
2
PC312
S
2
@
31,38
2
BATT_OUT 38,39
PR331
10K_0402_1%
S
2N7002KW 1N SOT323-3
BATT_OUT
PQ318
1 2
38,39
3
3
PR332
0_0402_5%
@
D
PC309
2
PR321
1
2 ACOFF-12
10K_0402_5%
2
G
2
1
2
G
PR314
2
PQ313
1
4
5
ACOFF
+
3
1
PR309
150K_0402_1%
P2-2
3
PQ310B
PR317
47K_0402_1%
2
PACIN 1
1
31,37
1
+3VALW
PR330
20K_0402_1%
8
7
6
5
VIN
D
2N7002KDW-2N_SOT363-6
ACON
3
12
@
1
37
2
ACN
P2-1
C
PACIN
B+
4
ACP
PQ310A
2N7002KDW-2N_SOT363-6
37
PC303
@ 10U_0805_25V6K
1
PC302
5600P_0402_25V7K
6
3
2
2
PR302
0.01_1206_1%
1
1
1
2
PC301
0.1U_0603_25V7K
2
1
PR306
200K_0402_1%
2
3
DTA144EUA_SC70-3
2
PL302
1UH_PCMB061H-1R0MS_7A_20%
1
PQ307
2
1
PQ305
2
1
PR301
47K_0402_5%
D
SH00000AA00
PC323
100U_25V_M
8
7
6
5
PC304
@ 10U_0805_25V6K
1
2
3
4
VIN
1
2
3
4
8
7
6
5
PQ303
AO4407A_SO8
1
2
3
PD301
PQ301
AO4407A_SO8
1
PQ302
AO4407A_SO8
1
P3
2
DTA144EUA_SC70-3
B+
PR304
49.9K_0402_1%
1
4
4
1 24727_SN
2
5
4
3
2
CHARGER
Document Number
Rev
0.1
C38-G series Chief River Schematic
Sheet
1
39
of
48
5
4
3
2
1
Note:
Use TPS51125 IC can remove RTC refernece LDO
Use TPS51427 IC must keep RTC refernece LDO
2VREF_8205
PJ402
2
+3VALWP
2
1
1
+3VALW
PC402
1U_0603_10V6K
@ JUMP_43X118
1
D
PJ403
2
+5VALWP
2
D
@
Typ: 175mA
FDV301N_G_1N_SOT23-3
+3VLPP
PQ408
+3VLP
3
1
PC420
1U_0603_10V6K
3
PC424
0.1U_0603_10V7K
1
S
@
2
2
1
D
PQ407
2N7002KW 1N SOT323-3
PR415
100K_0402_1%
2
G
2
PR419
0_0402_5%
2
1
2
2
1
PR416
40.2K_0402_1%
2
BM#
1
31,39
1
PQ402
PC418
4.7U_0805_10V6K
1
2
2
1
PC419
0.1U_0603_25V7K
Typ: 175mA
1
+
PC414
150U_B2_6.3VM_R45M
2
B
+3.3VALWP OCP(min)=5.81A
+5VALWP OCP(min)=8.44A
Compal Secret Data
2011/04/18
Issued Date
Deciphered Date
2015/07/08
Title
3VALWP/5VALWP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
Rev
0.1
C38-G series Chief River Schematic
Date:
5
+5VALWP
A
@
2
TPC8A03-H_SO8
PC417
1U_0603_10V6K
2
1
1
2VREF_8205
1
4
PC422
1U_0603_10V6K
2
1
1
RT8205LZQW(2) WQFN24_4X4
PR410
4.7_1206_5%
LG_5V
2
19
PL402
4.7UH_20%_VMPI1004AR-4R7M-Z01_10A
1
2
PC416
680P_0603_50V7K
LX_5V
5
6
7
8
UG_5V
PQ404
21
20
3
2
1
PR408 PC412
2.2_0603_5% 0.1U_0603_25V7K
2 1
2
BST_5V 1
VL
RT8205_B+
TPC8037-H_SO8
5
6
7
8
PC409
0.1U_0603_25V7K
2
1
PC408
2200P_0402_50V7K
2
1
22
3
2
1
NC
23
SPOK 38,41
18
VIN
VREG5
17
16
15
PC407
4.7U_0805_25V6-K
2
1
1
ENTRIP1
3
2
FB1
REF
4
TONSEL
LGATE1
GND
LGATE2
EN
PC406
4.7U_0805_25V6-K
2
1
ENTRIP1
ENTRIP2
6
5
PHASE1
4
PQ406
VS
UGATE1
PHASE2
24
C
PR414
0_0402_5%
2
1
PR420
100K_0402_1%
VFB=2.0V
UGATE2
PR413
100K_0402_1%
2
1
VL
+3VLP
A
2
5
1
31,37,38 MAINPWON
PR412
100K_0402_1%
3
6
ENTRIP2
1
2
PR418
47K_0402_1%
2
1
12
BOOT1
PQ405B
2N7002KDW-2N_SOT363-6
PQ405A
2N7002KDW-2N_SOT363-6
EC_ON
LG_3V
PGOOD
BOOT2
PR417
499K_0402_1%
1
2
B
31,35
11
4
VO1
B+
ENTRIP1
+5VALW
RT8205_B+
PR406
66.5K_0402_1%
2
VREG3
PR411
@ 499K_0402_1%
1
2
1
2
3
2
10
LX_3V
VO2
13
VS
9
UG_3V
PQ403
AO4712L_SO8
4
8
P PAD
1
FB2
1
2
PC411
0.1U_0603_25V7K
PC413
150U_B2_6.3VM_R45M
PC415
680P_0603_50V7K
2
1
PC423
1U_0603_10V6K
2
1
+
PR407
2.2_0603_5%
2 1
2 BST_3V
8
7
6
5
PR409
4.7_1206_5%
2
1
1
PC410
4.7U_0805_10V6K
1
1
PL401
4.7UH +-20% PCMC063T-4R7MN 5.5A
1
2
+3VALWP
25
7
1
2
3
4
PU401
ENTRIP2
PR405
130K_0402_1%
1
2
2
AO4466L_SO8
PC425
0.1U_0402_16V7K
8
7
6
5
@
PQ401
1
1
2
PC405
2200P_0402_50V7K
2
1
PC404
4.7U_0805_25V6-K
2
1
PC403
4.7U_0805_25V6-K
2
1
C
37,39 PRECHG
PR404
20K_0402_1%
1
2
SKIPSEL
3
1
PC421
0.1U_0603_25V7K
2
1
1
G
PC401
0.1U_0603_25V7K
2
1
2
@ JUMP_43X118
PR403
20K_0402_1%
1
2
1
D
2
S
B+
PR402
30K_0402_1%
1
2
14
RT8205_B+
PJ401
PR401
13K_0402_1%
1
2
2
JUMP_43X118
4
3
2
Sheet
1
40
of
48
5
4
3
2
1
@
2
+1.1VALWP_B+
PJ501
2
1
1
B+
PR502
2.2_0603_5%
1
2
5
EN
SW
VFB
V5IN
RF
DRVL
TP
9
UG_+1.1VALWP
8
SW_+1.1VALWP
7
+1.1VALWP_5V
6
LG_+1.1VALWP
11
1
PC505
4.7U_0805_25V6-K
2
2
1
1
+1.1VALW
@ JUMP_43X118
PL501
1UH +-20%_VMPI0703AR-1R0M-Z01_11A
1
2
+1.1VALWP
+5VALW
2
TPS51212DSCR_SON10_3X3
@
PC507
1U_0603_6.3V6M
PQ502
TPC8A03_SO8
4
1
@ PC509
680P_0603_50V7K
2
3
2
1
2
+1.1VALWP
Iocp=5.85A
1
PR505
4.7_1206_5%
PR506
470K_0402_1%
C
2
3
2
1
+1.1VALWP
+
2
PC519
1U_0603_10V6K
2
1
RF_+1.1VALWP
DRVH
PJ502
BST_+1.1VALWP
PC508
220U_D2_4VY_R15M
4
TRIP
10
1
3
FB_+1.1VALWP
VBST
2
EN_+1.1VALWP
PGOOD
5
6
7
8
2
PQ501
TPC8037-H 1N SO8
4
2
1
TRIP_+1.1VALWP
1
@
PC501
2
1
0.1U_0402_16V7K
@
2
PR503
0_0402_5%
1
2
1
SPOK
PR504
47K_0402_1%
38,40
1
2
34K_0402_1%
D
0.1U_0603_25V7K
PU501
1
PR501
PC506
1
PC504
4.7U_0805_25V6-K
2
1
5
6
7
8
D
PC503
2200P_0402_50V7K
2
1
PC502
0.1U_0402_25V6
2
1
JUMP_43X118
C
PR507
2
5.76K_0402_1%
2
1
1
PR508
10K_0402_1%
@
2
+1.5VP_B+
PJ503
2
1
1
B+
PR509
2.2_0603_5%
1
2
RF
V5IN
DRVL
TP
UG_+1.5VP
SW_+1.5VP
7
+1.5VP_5V
6
LG_+1.5VP
11
PC513
4.7U_0805_25V6-K
1
2
PC512
4.7U_0805_25V6-K
2
1
3
2
1
B
PL502
1.0UH_PCMC104T-1R0MN_20A_20%
1
2
+1.5VP
+5VALW
PC516
1U_0603_6.3V6M
@
PR513
4.7_1206_5%
PQ504
TPC8A03_SO8
4
1
PR514
470K_0402_1%
+
2
2
3
2
1
@ PC518
680P_0603_50V7K
1
PC520
1U_0603_10V6K
2
1
VFB
9
8
PC517
220U_6.3V_M
5
SW
1
4
RF_+1.5VP
DRVH
EN
2
FB_+1.5VP
TRIP
BST_+1.5VP
5
6
7
8
3
10
1
2
EN_+1.5VP
1
PC515
1
@ 2
2
TRIP_+1.5VP
VBST
2
@
0.1U_0402_16V7K
1
2
140K_0402_1%
PR511
0_0402_5%
1
2
1
SYSON
PR512
47K_0402_1%
31,43
PGOOD
2
B
PQ503
TPC8037-H 1N SO8
4
2
0.1U_0603_25V7K
PU502
1
PR510
PC514
1
PC511
2200P_0402_50V7K
2
1
5
6
7
8
PC510
0.1U_0402_25V6
2
1
JUMP_43X118
PR515
11.5K_0402_1%
2
1
PJ504
2
+1.5VP
PR516
10K_0402_1%
2
2
+1.5V
1
1
JUMP_43X118
1
@
A
A
+1.5VP
Iocp=15.6A
Compal Secret Data
2011/04/18
Issued Date
Title
Deciphered Date
5
4
3
2
+1.1VALWP/+1.5VP
Size
Date:
Document Number
Rev
0.1
Sheet
1
41
of
48
5
4
3
2
1
@
2
+1.2VSP_B+
PJ601
2
1
1
B+
PR602
2.2_0603_5%
1
2
SW
VFB
V5IN
RF
DRVL
TP
PC605
4.7U_0805_25V6-K
1
2
3
2
1
UG_+1.2VSP
8
SW _+1.2VSP
7
+1.2VSP_5V
6
LG_+1.2VSP
PL601
1UH +-20%_VMPI0703AR-1R0M-Z01_11A
1
2
+1.2VSP
+5VALW
11
1
PC607
1U_0603_6.3V6M
PR605
4.7_1206_5%
PQ602
TPC8A03_SO8
4
PC609
680P_0603_50V7K
2
3
2
1
2
1
PR606
470K_0402_1%
+
2
PC612
1U_0603_10V6K
2
1
DRVH
EN
BST_+1.2VSP
PC608
220U_D2_4VY_R15M
5
TRIP
10
9
1
4
RF_+1.2VSP
VBST
2
FB_+1.2VSP
PGOOD
5
6
7
8
3
4
2
1
EN_+1.2VSP
1
1
PC601
2
1U_0402_16V7K
@
2
2
PR603
243K_0402_1%
1
2
TRIP_+1.2VSP
2
SUSP#
1
PR601
1
2
75K_0402_1%
1
D
PQ601
TPC8037-H 1N SO8
0.1U_0603_25V7K
PU601
PR610 0_0402_5%
2
1
@
PR604
47K_0402_1%
31,36,39,44
VR_ON
1
31,45
PC606
PC604
4.7U_0805_25V6-K
2
1
D
PC603
2200P_0402_50V7K
2
1
5
6
7
8
PC602
0.1U_0402_25V6
2
1
JUMP_43X118
PR607
C
C
7.15K_0402_1%
2
1
PJ602
2
2
+1.2VSP
@
2
+1.2VS
1
1
JUMP_43X118
1
PR608
10K_0402_1%
+1.2VSP
Iocp=13A
B
B
PU602
APL5508-25DC-TRL_SOT89-3
IN
OUT
1
GND
1
2
PC610
1U_0603_10V6K
PJ604
3
+2.5VSP
2
+2.5VSP
1
2
2
1
1
+2.5VS
@ JUMP_43X39
PR609
10K_1206_5%
2
2
@ JUMP_43X39
1
1
2
2
1
PC611
4.7U_0805_6.3V6K
PJ603
+3VS
(0.38A,20mils ,Via NO.=1)
@
A
A
Compal Secret Data
2011/04/18
Issued Date
Title
Deciphered Date
5
4
3
2
+1.2VSP/+2.5VSP
Size
Date:
Document Number
Rev
0.1
Sheet
1
42
of
48
5
4
3
2
1
+1.5V
D
PJ701
JUMP_43X79
@
1
1
2
2
D
PU701
4
NC
VOUT
NC
PC703
8
+0.75VSP
2
2
1U_0603_10V6K
1
1
+0.75VS
JUMP_43X79
@
9
PC706
1
2
PC705
1
+0.75VSP
10U_0603_6.3V6M
2
2
PR704
2
2
G
PC704
0.1U_0402_16V7K
2
1
S
7
TP
1
D
PJ702
1
VREF
5
APL5336KAI-TRL_SOP8P8
1K_0402_1%
1
1
PR703
0_0402_5%
1
2
@ PC701
1U_0402_6.3V6K
NC
+3VALW
6
VCNTL
GND
2
1
3
PR702
1K_0402_1%
PQ701
2N7002KW 1N SOT323-3
36 SUSP
VIN
10U_0603_6.3V6M
SYSON
PC702
4.7U_0805_6.3V6K
2
2
@ PR701
0_0402_5%
1
2
3
31,41
1
2
1
C
C
PC708
68P_0402_50V8J
2
1
2
1
1
+1.8VGS
JUMP_43X118
1
2
2
PC711
22U_0805_6.3VAM
B
1
1
2
@
PC710
22U_0805_6.3VAM
SY8033BDBC_DFN10_3X3
PJ704
+1.8VSP
+1.8VSP
FB_1.8V
1
2
1
1
PR708
1M_0402_5%
PC712
0.047U_0402_16V7-K
200K_0402_1%
2
PR707
2,14,19,44 PXS_PWREN
1
FB=0.6Volt
PR706
30K_0402_1%
2
FB
EN
PC709
PR705
680P_0603_50V7K 4.7_1206_5%
EN_1.8V
6
2
2
3
LX
SVIN
11
1
5
PVIN
LX_1.8V
1 2
8
PC707
22U_0805_6.3VAM
2
1
B
2
LX
NC
9
JUMP_43X118
PVIN
PG
10
NC
1
TP
1
1
@
2
7
2
PL701
1UH_PH041H-1R0MS_3.8A_20%
1
2
4
PU702
PJ703
+5VALW
2
PR709
14.7K_0402_1%
A
A
Compal Secret Data
2011/04/18
Issued Date
Title
Deciphered Date
5
4
3
2
+0.75VP/+1.8VP
Size
Date:
Document Number
Rev
0.1
Sheet
1
43
of
48
5
4
21
3
2
1
VCCSENSE_VGA
PJ801
@
2
VGA_CORE_B+
2
1
1
B+
2
3
2
1
PC805
4.7U_0805_25V6-K
1
2
PC804
4.7U_0805_25V6-K
2
1
PL801
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
2
+VGA_COREP
EN
11
BOOT2_VGA
SUSP#
1
@
1
2
PC814
10U_0805_6.3V6M
1
PC813
10U_0805_6.3V6M
C
+VGA_COREP
Iocp=32.5A
18
GPU_VID1
GPU_VID0
PJ802
2
+VGA_COREP
Thames
Seymour
2
1
1
+VGA_CORE
@ JUMP_43X118
GPU_VID1
GPU_VID0
GPU_VID1
GPU_VID0
1
1
0.9V
1
1
1
0
1.0V
1
0
1.0V
0
1
1.05V
0
1
1.1V
0
0
1.15V
0
0
1.15V
Core Voltage Level
Core Voltage Level
PJ803
2
31,36,39,42
2
LGATE2_VGA
PR813
47K_0402_5%
1
2 VRON_VGA
PR814
0_0402_5%
1
2
PX_MODE
1
@
2
19
+
2
2
2
1
PC812
10U_0805_6.3V6M
@ PC815
680P_0603_50V7K
+
PC811
470U_D2_2VM_R4.5M
1
2
1
2
1
PC810
470U_D2_2VM_R4.5M
PC816
0.1U_0603_25V7K
1
2
BOOT2_2_VGA
3
2
1
PR808
2.2_0603_5%
2
1
+
PR806
4.7_1206_5%
PC809
470U_D2_2VM_R4.5M
12
4
1
@
2
4
UGATE2_VGA
PQ803
TPCA8057-H 1N PPAK56-8
13
3
2
1
PQ802
TPCA8057-H 1N PPAK56-8
PC808
1U_0603_10V6K
5
+5VALW
14
10
9
VID0
8
7
VREF
6
VID1
BST
PGOOD
V0
1
D
16
17
GND
MODE
DRVH
SW
2
1
2
PR811
10K_0402_1%
VGA_PWRGD
1
18 PC807
TPS51518RUKR_QFN20_3X3
V1
93.1K_0402_1%
1 1
V2
PC817
0.1U_0402_10V7K
PR809
11K_0402_1%
21
4
5
PR810
14,19
TRIP
DRVL
18
21
PR807
5.62K_0402_1%
3
+3VS
PR812
0_0402_5%
1
2
V5IN
V3
2
2
2
C
GSNS
1
100K_0402_1%
15
5
PR805
11K_0402_1%
2
1
4
PR803
41.2K_0402_1%
SLEW
PAD
1
Thames must change PR807 from
5.62k to 11k. Change PR809
from 11k to 5.49k.
VSNS
PU801
PR804
2
PQ801
TPCA8065-H_SOP-ADV8-5
2
10P_0402_25V8J
20
PC801
PR801
0_0402_5%
1
2
VSSSENSE_VGA
1
21
21
2
4700P_0402_25V7K
2
19 1
10P_0402_25V8J
1
2
D
5
PR802
0_0402_5%
PC806
PC803
2200P_0402_50V7K
2
1
PC802
0.1U_0402_25V6
2
1
1
JUMP_43X118
PC818
0.1U_0402_16V7K
2
0.9V
1
1
@ JUMP_43X118
B
B
+1.5V
PJ805
1
1
+1.0VGS
2
PC819
1U_0402_6.3V6K
2
JUMP_43X79
@
1
2
1
+5VALW
2
+VGA_PCIEP
PJ804
JUMP_43X79
2
1
1
+5VALW
2
PR817
1.15K_0402_1%
9
APL5912-KAC-TRL_SO8
1
PC821
0.01U_0402_25V7K
22U_0805_6.3V6M
2
PC823
2
1
FB
VIN
+VGA_PCIEP
3
2
PR818
20K_0402_1%
GND
EN
1
8
1
PXS_PWREN
4
2
PXS_PWREN
VOUT
PC822
1U_0603_25V7K
2
1
12,14,19,43
PR816
40.2K_0402_1%
1
2
VIN
VOUT
1
POK
PC820
4.7U_0805_6.3V6K
2
7
@
5
1
2
@ RB751V-40_SOD323-2
1
2
VCNTL
PU802
6
1
@
PR815
0_0402_5%
PD801
VGA_PCIE
1.0V
PR819
A
1.1 V
4.53K
3K
A
2
PR819
4.53K_0402_1%
2011/04/18
Issued Date
Compal Secret Data
Title
Deciphered Date
Size
Date:
5
4
3
2
VGA_COREP
Document Number
Rev
0.1
Sheet
1
44
of
48
5
4
3
2
1
PC902
PR902
330P_0402_50V7K 2K_0402_1%
2
1
2
1
APU_VDDNB_SEN
PC903
@ PR905
PR904
137K_0402_1%390P_0402_50V7K 32.4K_0402_1%
2
1
2
1
2
1
PR903
3.3K_0402_1%
2
1
CPU_B+
3
2
1
PR912
590_0402_1%
2
1
@
PC906
68U_25V_M
PC911
2200P_0402_50V7K
2
1
PC909
0.01U_0402_25V7K
2
1
PC908
10U_0805_25V6K
2
1
PC907
10U_0805_25V6K
2
1
1
+APU_CORE_NB
1 2
+APU_CORE_NB
Iocp=39A
PR931
2
1
1_0603_5%
27
LGATE1
26
PHASE1
25
UGATE1
+5VS
@
1
2
1
28
PC926
1U_0603_16V6K
29
4
UGATE1
3
2
1
TP
PHASE1
1
PL903
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
1
5
PR939
100K_0402_5%
2 PR937 1
10K_0402_1%
ISEN1
PR941
PC928
2.2_0603_5%
0.22U_0603_25V7K
2 2
1
BOOT1 1
PR943
4.7_1206_5%
VSUM+
VGATE
1 2
4
LGATE1
14,31
PQ904
TPCA8057-H_PPAK56-8-5
PC932
10P_0402_25V8K
2
1
PC924
2200P_0402_50V7K
2
1
30
C
CPU_B+
+5VALW
PC922
0.01U_0402_25V7K
2
1
PR973
0_0603_5%
2
1
PC923
10U_0805_25V6K
2
1
PC920
PR972
0.22U_0603_25V7K 0_0603_5%
2
1
PC921
10U_0805_25V6K
2
1
LGATE2
5
PHASE2
1
UGATE2
32
31
1
PC931
680P_0603_50V7K
VSUM-
2
2
1
PC929
0.22U_0402_10V6K
2
1
PC930
0.22U_0402_10V6K
3
0_0603_5%
2
BOOT2
33
PR970
10K_0402_1%
@
4
2
PR922
PC917
1_0402_1%
1
VSUMN_NB 2
680P_0603_50V7K
PQ903
BOOT1
2
34
49
PGOOD
35
BOOT1
ISEN1
VSUM-
4
2
ISEN2
@
1
PR916
PR919
4.7_1206_5%
3.65K_0402_1%
1
VSUMP_NB 2
PR924
+3VS
24
23
22
FB
21
COMP
UGATE1
FB2
NTC
2
PL901
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
5
3
2
1
UGATEX
38
37
39
LGATEX
PHASEX
41
42
43
40
PWM2_NB
FCCM_NB
PGOOD_NB
44
FB_NB
COMP_NB
46
45
VSEN_NB
ISUMN_NB
48
47
ISEN1_NB
ISUMP_NB
PHASE1
+
@
3
2
1
1
PR942
10_0402_5%
PR945
10.5K_0402_1%
2
IMON
2
D
1
BOOT_NB1
ISEN3
2
APU_IMON
LGATE1
ISEN3
PR938
0_0402_5%
2
1
1
1
4
2
3
+APU_CORE
1
2 ISEN2
PR940
10K_0402_1%
PR944
3.65K_0402_1%
2
1
PR946
1_0402_1%
2
1
CPU_B+
3
2
1
PR962
0_0402_5%
2
1
APU_VDD_SEN_H
APU_VDD_SEN_L
4
PQ906
7
3
2
1
PC948
0.01U_0402_25V7K
1
2
LGATE2
PR966
10_0402_5%
2
1
1
7
PR964
0_0402_5%
2
1
ISEN2
2 PR958 1
10K_0402_1%
PC941
2200P_0402_50V7K
2
1
1
4
2
3
PR961
4.7_1206_5%
1 2
@
PR960
PC945
2.2_0603_5%
0.22U_0603_25V7K
2 2
1
BOOT2 1
+APU_CORE
B
+APU_CORE
Iocp=60A
PL904
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
PHASE2
PR956
10_0402_5%
2
1
PC940
0.01U_0402_25V7K
2
1
PC939
10U_0805_25V6K
2
1
4
UGATE2
PC938
10U_0805_25V6K
2
1
5
PR952
PC942
137K_0402_1% 390P_0402_50V7K
2
1
2
1
PR954
PC943
2K_0402_1% 680P_0402_50V7K
2
1
2
1
PC944
PR957
820P_0402_50V7K
100_0402_1%
2
1
2
1
@
PR949
32.4K_0402_1%
2@
1
PQ905
2
1
PC937
330P_0402_50V7K
PC935
0.082U_0402_16V7K
1
2
2
PR951
2.94K_0402_1%
2
1
PC934
100P_0402_50V8J
2
1
2
PC946
0.1U_0603_50V7K
PR955
604_0402_1%
2
1
PC933
PR948
1000P_0402_50V7K301_0402_1%
2
1
2
1
5
2
1
VSUM-
PH904
10K_0402_5%_ERTJ0ER103J
2
12
1
PR947
2.61K_0402_1%
VSUM+
B
1
31
PWM_Y
PWROK
13
2
PH903
470K_0402_5%_TSM0B474J4702RE
2
1
FCH_PWRGD
+5VS
PR971
0_0402_5%
1
PR936 27.4K_0402_1%
2
1
12
PR968 0_0402_5%
2
1
@
14
1
2
PR950
11K_0402_1%
PC927
1000P_0402_25V6K
1
2
ENABLE
RTN
11
20
VR_ON
VDD
VSEN
31,42
APU_PWRGD
VDDP
SVT
ISUMN
12,7
LGATE2
ISL6277HRTZ-T_TQFN48_6X6
VDDIO
19
PR934
133K_0402_1%
1
2
SVD
18
After rev1.1 must change to 133k
PHASE2
17
2
+1.5VS
UGATE2
VR_HOT_L
ISUMP
APU_SVT
SVC
ISEN1
APU_SVD
7
BOOT2
16
7
VIN
IMON_NB
14
APU_SVC
NTC_NB
36
1
PR926
10.5K_0402_1%
PQ902
CPU_B+
BOOTX
2
7
3
PR901 0_0402_5%
4
2
1 SVC
PR925 0_0402_5%
5
2
1
PR927 0_0402_5%
6
2
1 SVD
PR929 0_0402_5%
7
2
1 VDDIO
PR930 0_0402_5%
8
2
1 SVT
PR933 0_0402_5%
2
1 ENABLE 9
PR932 0_0402_5%
2
1 PWROK 10
ISEN2_NB
ISEN2
2
PH901
470K_0402_5%_TSM0B474J4702RE
2
1
38,7 H_PROCHOT#
1
C
27.4K_0402_1%
2
1
1
PC936
0.22U_0402_10V6K
1
+5VS
1
PR921
PR923
10_0402_5%
2
1
15
2
2
PU901
PC919
1000P_0402_25V6K
4
LGATE_NB1
UGATE_NB1
After rev1.1 must change to 133k
+
2
PHASE_NB1
PR915
PC916
2.2_0603_5%
0.22U_0603_25V7K
1
2 2
1
B+
1
3
2
1
LGATE_NB1
BOOT_NB1
PQ907
FCCM_NB
PR969
2
1
10K_0402_1%
PR920
133K_0402_1%
PL902
FBMA-L18-453215-900LMA90T_1812
2
1
PHASE_NB1
@ PC915
@ PR914
@PR914
100_0402_1% 220P_0402_50V7K
2
1
2
1
PC914
0.1U_0603_50V7K
4
UGATE_NB1
2
PC913
0.1U_0402_25V6
1
2
PC912
0.047U_0402_16V7-K
1
2
1
2
PR911
11K_0402_1%
1
@
PC925
1U_0603_16V6K
2
1
PH902
10K_0402_5%_ERTJ0ER103J
2
12
1
PR909
2.61K_0402_1%
2
PQ901
PC910
1000P_0402_50V7K
VSUMP_NB
VSUMN_NB
PC905
100P_0402_50V8J
2
1
5
+APU_CORE_NB
PR907
PC904
PR908
0_0402_5% 1000P_0402_50V7K 301_0402_1%
2
1
2
1
2
1
5
PR906
10_0402_5%
2
1
2
1
PR913
0_0603_5%
D
PC949
68U_25V_M
7
+APU_CORE
1
2 ISEN1
PR959
10K_0402_1%
PR963
3.65K_0402_1%
1
VSUM+ 2
PC947
680P_0603_50V7K
PR965
1_0402_1%
1
VSUM- 2
A
A
Compal Secret Data
Issued Date
2011/04/18
Deciphered Date
2015/07/08
Title
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size
R&D Document Number
Custom
Date:
5
4
3
2
CPU_COREP
Rev
0.1
1
Sheet
45
of
48
1
@
+
2
5
2
2
+
PC1025
330U_D2_2VM_R7M
1
Issued Date
4
3
PC1019
22U_0603_6.3V6K
2
1
PC1020
330U_D2_2VM_R7M
+
PC1021
330U_D2_2VM_R7M
2
2011/04/18
PC1033
10U_0603_6.3V6K
2
1
+
2
1
PC1032
10U_0603_6.3V6K
2
1
1
+
PC1031
10U_0603_6.3V6K
2
1
2
@
1
PC1030
10U_0603_6.3V6K
2
1
+
PC1024
330U_D2_2VM_R7M
@
PC1018
22U_0603_6.3V6K
2
1
PC1003
22U_0603_6.3V6K
2
1
PC1004
22U_0603_6.3V6K
2
1
PC1005
22U_0603_6.3V6K
2
1
PC1014
22U_0603_6.3V6K
2
1
PC1015
22U_0603_6.3V6K
2
1
PC1016
22U_0603_6.3V6K
2
1
PC1011
22U_0603_6.3V6K
2
1
PC1010
10U_0603_6.3V6K
2
1
PC1009
22U_0603_6.3V6K
2
1
PC1008
22U_0603_6.3V6K
2
1
PC1007
22U_0603_6.3V6K
2
1
PC1006
22U_0603_6.3V6K
2
1
PC1002
22U_0603_6.3V6K
2
1
PC1013
22U_0603_6.3V6K
2
1
+APU_CORE
PC1029
10U_0603_6.3V6K
2
1
1
PC1023
330U_D2_2VM_R7M
@
PC1017
22U_0603_6.3V6K
2
1
4
PC1028
10U_0603_6.3V6K
2
1
2
PC1027
22U_0603_6.3V6K
2
1
+
PC1022
330U_D2_2VM_R7M
1
PC1026
330U_D2_2VM_R7M
C
PC1001
22U_0603_6.3V6K
2
1
D
PC1012
22U_0603_6.3V6K
2
1
5
3
2
Deciphered Date
2
1
+CPU_CORE_NB
+CPU_CORE
+APU_CORE_NB
D
@
+APU_CORE
C
+1.2VS
B
B
+1.2VS
A
A
Compal Secret Data
Title
Size
A3
Date:
Document Number
PROCESSOR DECOUPLING
Sheet
1
46
of
48
Rev
0.1
5
4
3
2
9HUVLRQFKDQJHOLVW3,5/LVW
,WHP
5HDVRQIRUFKDQJH
3*
1
3DJHRI
IRU3:5
0RGLI\/LVW
'DWH
3KDVH
D
D
C
C
B
B
A
A
2011/04/18
Issued Date
Compal Secret Data
Deciphered Date
2015/07/08
Title
Custom
PIR (PWR)
Rev
Date:
5
4
3
2
Sheet
1
47
of
48
5
Phase
SDV2
D
C
B
Date
4
No.
No.1
No.2
No.3
No.4
No.5
No.6
No.7
No.8
No.9
No.10
No.11
No.12
No.13
No.14
No.15
No.16
No.17
No.18
No.19
No.20
No.21
No.22
No.23
No.24
No.25
No.26
No.27
No.28
No.29
No.30
No.31
No.32
No.33
No.34
No.35
No.36
No.37
No.38
No.39
No.40
No.41
No.42
No.43
No.44
No.45
No.46
No.47
No.48
No.49
No.50
No.51
No.52
No.53
No.54
No.55
No.56
No.57
No.58
No.59
No.60
No.61
No.62
No.63
No.64
No.65
No.66
No.67
No.68
No.69
No.70
No.71
No.72
No.73
No.74
No.75
No.76
No.77
No.78
No.79
No.80
No.81
No.82
No.83
No.84
No.85
No.86
No.87
No.88
No.89
No.90
No.91
No.92
No.93
No.94
No.95
No.96
No.97
No.98
No.99
2011/09/13
2011/09/14
2011/09/16
2011/09/16
2011/09/17
2011/09/17
2011/09/17
2011/09/17
2011/09/17
2011/09/26
2011/09/26
2011/09/28
2011/09/28
2011/09/28
2011/09/28
2011/09/28
2011/09/28
2011/09/28
2011/09/28
2011/09/28
2011/09/28
2011/09/30
2011/10/03
2011/10/04
2011/10/05
2011/10/05
2011/10/05
2011/10/05
2011/10/06
2011/10/06
2011/10/06
2011/10/06
2011/10/06
2011/10/06
2011/10/07
2011/10/11
2011/10/11
2011/10/11
2011/10/12
2011/10/12
2011/10/13
2011/10/13
2011/10/13
2011/10/13
2011/10/13
2011/10/14
2011/10/14
2011/10/17
2011/10/17
2011/10/17
2011/10/17
2011/10/17
2011/10/17
2011/10/17
2011/10/18
2011/10/18
2011/10/18
2011/10/19
2011/10/19
2011/10/19
2011/10/20
2011/10/20
2011/10/20
2011/10/21
2011/10/21
2011/10/21
2011/10/21
2011/10/21
2011/10/21
2011/10/21
2011/10/24
2011/10/24
2011/10/24
2011/10/24
2011/10/24
2011/10/24
2011/10/24
2011/10/24
2011/10/24
2011/10/24
2011/10/24
2011/10/24
2011/10/24
2011/10/24
2011/10/24
2011/10/24
2011/10/24
2011/10/24
2011/10/24
2011/10/24
2011/10/25
2011/10/25
2011/10/25
2011/10/26
2011/10/26
2011/10/26
2011/10/26
2011/10/27
2011/10/27
BOM
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Sch
Layout
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
3
2
1
Description
Page29, install R1102, R1104, R1105 for audio noise prevention
page12~16, change FCH P/N from SA000043IC0 to SA000043IG0
Page35, Swap JCARD1 Pin3,4 to Pin9,10 PCIE TX & RX for CardReader no function issue
Page33, Modify JTP1 Pin1 to TP_DATA2, JTP1 Pin6 to TP_CLK2 for Click Pad no function issue
Page30, Modify JHDD1 Pin18 connect to GND for SATA Gen2
Page5~9, Modify U1 to JCPU1
Page10~11, SWAP JDIMM1 & JDIMM2
Page33, Modify JFP1 to JFPB1,Modify JWLAN1 to JMINI1,Modify JLAN1 to JRJ45
Page12, Modify CLRP1 to JCMOS1
Page31, POP U2201,C2200,R2229 for Security ROM Function not work issue
Page14, Modify D1103,D1104 to DIS@ for DIS only
Page33, Reserve R2489,R2490 with PCIE_CRX_C_DTX_N1,PCIE_CRX_C_DTX_P1 for PCIE WLAN RX AC Decouping
Page29, R1111.2 Connect to U1101 Pin38 add net name CX_GPIO0 for vendor request
Page35, Add D2416 to replace D2414 for ESD request
Page5焍9, Modify JCPU1 Footprint to LOTES_ACA-ZIF-109_722P-A39 for A39 DFX Rule
Page12焍16, Modify U2 Footprint to 21807-A11-HUDSON_FCBGA_656P-A39 for A39 DFX Rule
Page17焍22, Modify U1401 Footprint to 2160809000A11SEY_FCBGA_962P-A39 for A39 DFX Rule
Page23焍24, Modify U1405焍U1412 Footprint to K4W1G1646E-HC12_FBGA_96P-A39 for A39 DFX Rule
Page31, Modify Board ID Table for AMD Build Plan Change
Page31, Modify R2209 for QALEA FVT1 Build Board IC Mapping
Page14 & 31, U2200 Pin107 add EC_PXCONTROL connect to D1103.1 , D1104.1 for PX control enable delay
Page28, update JCRT1 Footprint from SUYIN_070546FR015S200ZR_15P to C-H_13-12201558CP_15P-T for ME Conn modify
Page14, D1103 modify to UNPOP for VGA Sequence Tuning
Page14, Add C222焍C237 connect to all USB2.0 port near connector for AMD request that about USB Signal Driving
Page35, Add JDB3 Conn for SW Debug request
Page12, Add TP52焍T58 on U2 GPIO input pin for debug
Page13, Add TP59焍T61, TP67焍T74 on U2 GPIO input pin for debug
Page26, Q2101 P/N change to SB00007H10 for Component common
Page35, JFPB1 update P/N to SP01000Z300 for Conn List update
Page35, JPWR1 update P/N to SP01000Z300 for Conn List update
Page35, JRJ45 update Footprint to ACES_50506-01841-P01_18P-T for Conn List update
Page32, JBT1 update P/N to SP02000TF00 for Conn List update
Page35, JCARD1 update Footprint to ACES_50224-0140N-001_14P-T for Conn List update
Page29, reserve D1101 for Audio Noise issue
Page12, Del TP52焍T58 on U2 GPIO input pin for debug
Page13, Del TP59焍T61, TP67焍T74 on U2 GPIO input pin for debug
Page22, Replace R1476 P/N From D028100A00 to SD028100A80 for HF Part modify
Page19,30,36, Replace Q1409,Q2309,Q2410 P/N From SBX01240010 to SB00000J700 for HF Part modify
Page12, Replace X1 P/N From SJ100003300 to SJ10000EL00 for Sourcer request (No Footprint, Use SJ10000DJ00)
Page12, Replace Y1 P/N From SJ132P7KW10 to SJ10000BM00 for Sourcer request
Page18, Replace Y1400 P/N From SJ100006R00 to SJ10000DY00 for Sourcer request (No Footprint, Use SJ10000DJ00)
Page31, Replace Y2200 P/N From SJ132P7KW10 to SJ10000BM00 for Sourcer request
Page31, Modify U2200 Pin107 EC_PXCONTROL to U2200 Pin108 for ABO Common Design
Page31, Add R2235 pull up to +3VS for H_PROCHOT#_EC
Page19, Replace Q1401,Q1402,Q1404,Q1405 P/N from SB00000FG00 to SB00000FG10 for Sourcer request
Page26, Add C2144,C2145 1000P Caps connect to DMIC_CLK & DMIC_1_2 for EMI Request(Noise issue)
Page25, Add R2171 connect to LVDS_HPD_R for Vendor Request (Noise Filtering)
Page7.9,27 Replace Q2,Q3,Q8,Q2106 P/N From SB000006A00 to SB000006A10 for HF Part modify
Page14, Del D1103,D1104, Add Q44,R211 & use EC_Control to Control PXS_PWREN ON/OFF Timing for VGA Sequence tuning
Page19, Modify C1463,D1400,R1442 BOM Structure from DIS@ to PX40@ & D1400 use 0_0603_5% for PX50
Page7, Modify R65,R69 BOM Structure to @ for Power Leakage issue
Page12, Modify R80,R82 value from 0 ohm to 33 ohm for EMI Noise Issue
Page7, 31, Modify input/output direction: H_PROCHOT#, Turbo_V
Page27, Add Net +5VS_HDMI on D2103 Pin5 & Pin6 For ESD Request
Page19, Modify R1454,Q1412,R1450,R1451,R1449,C1470,U1404,C1467,C1468,C1469,C1470 BOM Structure from PX40 to DIS@ for PX50 Function workable
Page31, Add Net APU_IMON on U2200 Pin76 for Power Team Request
Page35, Add intersheet of PLT_RST# on debug card
Page25, modify net name: LVDS_HPD_R to LVDS_HPD_C
Page33, Del AOAC circuit for Customer request
Page31, Del AOAC Powe Control Pin WLAN_POWER# for Customer request
Page14, Modify USB Signal net name from USB20_[P..N][10..12]_C to USB30_[P..N][10..12]_C for USB30 net name error
Page12, Modify R83,R84 value from 0 ohm to 33 ohm for EMI Noise Issue
Page31, Modify R2212,R2213 BOM Structure to @ for ENE Suggestion
Page31, Modify U2200 Pin 72 Net Name From AOU_ILIM to SPK_RT_Detect# for Speaker main stream & retail
Page31, Add R2236 pul up to +3VS for SPK_RT_Detect#
Page35, Modify JAUD1 Pin20 Net Name From AOU_ILIM to GND , Pin17 From AOU_CTL1 to GND ,Pin4 From NC to AGNDfor USB Charger Function
Page29, Modify JSPK1 P/N From DC030008W00 to SP02000N000 & Add JSPK1 Pin5 connect to SPK_RT_Detect#,JSPK1 Pin6 connect to GND for Speaker main stream & retail
Page31, Modify U2200 Pin120 Net Name From AOU_CTL1 to NC for USB Charger Functionl
Page29, reserve D1102 for Audio Noise issue
Page35, Modify D2415 BOM Structure to POP for ESD Request
Page33, Modify D2402,D2403 BOM Structure to POP for ESD Request
Page34, Modify D2402,D2403 BOM Structure to POP for ESD Request
Page28, Add Q2412 with CRT_DDC_DATA & CRT_DDC_CLK for CRT Power Leakage issue
Page26, Del R2116,R2117, Add R2172~R2176 & Reverse D2110 for PWM Power Leakage issue
Page30, Del C2404,Reserve C2471,C2405 for Intel Circuit Common
Page32, Modify R500 BOM Structure to @ for BOM Error
Page31, Del R2223~R2229, Q2200 to update Security ROM Circuit for Intel Circuit Common
Page35, Swap JRJ45 PCIE_CRX_DTX_P0 to PCIE_CRX_DTX_N0, PCIE_CTX_DRX_P0 to PCIE_CTX_DRX_N0 For LAN Board Common
Page35, Del R2462 to update Power OK circuit for Intel Circuit Common
Page36, Del R2300, R2310, C2312, R2317 update Power OK circuit for Intel Circuit Common
Page31, Modify R2235 BOM Structure to @ for H_PROCHOT#_EC
Page34, Modify D2404,D2406,D2408 P/N from SC300001D00 to SC300002800 for ESD Request
Page34, Modify D2404~D2409,L2400~L2408 BOM Structure from @ to POP for EMC Request
Page27, Modify L2105~L2108 BOM Structure from @ to POP for EMI Request
Page34, Modify L2402,L2405,L2408 P/N from SC300000I00 to SM070000K00 for ESD Request (Footprint SM070000I00)
Page34, Modify L2403, L2404, L2400, L2401, L2406, L2407 P/N from SC300000I00 to SM070001S00 for ESD Request
Page27, Modify D2102,D2103,D2105 P/N from SC300001Y00 to SC300002C00 for ESD Request
Page35, Modify D2413 P/N from SC600001600 to SCA00001L00 for ESD Request
Page29, Modify JSPK1 P/N From SP02000N00 to DC030008W00 For LD Requirement
Page29, Add R1140 connect to SPK_RT_Detect# to GND for Speaker Verify
Page28, Del Q2412 with CRT_DDC_DATA & CRT_DDC_CLK for AMD Design Guide Require
Page26, Del R2122,R2124 with EDID_DATA & EDID_CLK pull up for Duplicate Pull up error
Page26, Modify R2174 BOM Structure to @ for BOM Error
Page25, Reserve R2116, R2117 to Connect from CSCL & CSCA to EC_SMB_DA2 & EC_SMB_CK2 for Power Leakage issue
Page29, Modify D1101, D1102 BOM Structure From @ to POP for Audio Noise issue
Page35, Modify D2416 P/N from SC300001G00 to SCA00001G00 for ESD Request
Page29, Modify C1111 ,C1141 BOM Structure From POP to @ for Audio Noise issue
D
C
B
A
A
2008/08/10
Issued Date
Compal Secret Data
2011/03/04
Deciphered Date
5
4
3
2
Title
EE modify list
Custom
Rev
0.4
LA-7121P
Date:
Sheet
1
48
of
50
5
4
Phase
Date
FVT
2011/11/14
2011/11/14
2011/11/14
2011/11/14
2011/11/14
2011/11/14
2011/11/14
2011/11/14
2011/11/14
2011/11/15
2011/11/21
2011/11/21
2011/11/21
2011/11/21
2011/11/21
2011/11/21
2011/11/21
2011/11/22
2011/11/22
2011/11/22
2011/11/22
2011/11/22
2011/11/22
2011/11/22
2011/11/23
2011/11/23
2011/11/24
2011/11/24
2011/11/24
2011/11/24
2011/11/25
2011/11/25
2011/11/25
2011/11/25
2011/11/26
2011/11/28
2011/11/28
2011/11/28
2011/11/29
2011/11/29
2011/11/29
2011/11/29
2011/11/29
2011/11/29
2011/11/30
2011/11/30
2011/11/30
2011/11/30
2011/11/30
2011/12/02
2011/12/02
2011/12/02
2011/12/02
2011/12/05
No.1
No.2
No.3
No.4
No.5
No.6
No.7
No.8
No.9
No.10
No.11
No.12
No.13
No.14
No.15
No.16
No.17
No.18
No.19
No.20
No.21
No.22
No.23
No.24
No.25
No.26
No.27
No.28
No.29
No.30
No.31
No.32
No.33
No.34
No.35
No.36
No.37
No.38
No.39
No.40
No.41
No.42
No.43
No.44
No.45
No.46
No.47
No.48
No.49
No.50
No.51
No.52
No.53
No.54
2011/12/09
2011/12/09
No.55
power
D
C
MEMO
No.
BOM
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
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V
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V
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Sch
Layout
V
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3
2
1
Description
Page17~24, Modify U1401 P/N From SA000047H00 to SA000047H50 for GPU Version update
Page36, Modify R2305 P/N From SD028200280 (20K_0402_5%) to SD028150380 (150K_0402_5%) for Power Consumption & Power Sequence tuning
Page34, Modify R2442~R2459 BOM Structure From POP to @ for EMI Request
Page27, Modify R2126~R2133 BOM Structure From POP to @ for EMI Request
Page14, Replace C222~C237 to R216~R231 on all usb port signal for AMD Design checklist update (USB no function issue)
Page19, Add R1461 to connect PXS_PWREN to RUNPWROK for PX50 Power Enable
Page14,Remove R230~R231 on all usb port signal for AMD Design checklist update (USB no function issue)
Page35, Remove D2415 for ESD Request
Page30, Reserve R2411,C2421 for G Sensor Vendor Suggestion
Page31, Add J2200,J2201 to improve EC Power Source +3VLP or +3VALW to +3VALW_EC Power Source Option and modify +3VALW Net Name to +3VALW_EC for Lenovo S4 Lid Function
Page31, Update Borad ID table for FVT Phase
Page31, Modify R2209 From 8.2K to 18K for FVT BRDID update
Page30, C2417 BOM Change from 10U (SE000005T80) to 10K (SD013100280) for G Sensor Vendor Suggestion
Page36, Add R2321,R2322,C2317,C2318,C2319,Q2313,Q2314 for +3V_FCH Power Control
Page31, U2200 Pin70 Add FCH_PWR_EN# for +3V_FCH Power Control
Page35, Add R2481 Pull up to +3VLP & Reserve R2482 Pull up to +3VALW for Lenovo S4 LID Function
Page18, Y1400 P/N From SJ10000DY00 to SJ10000CV00 for BOM Change
Page12, X1 P/N From SJ10000EL00 to SJ10000CX00 for BOM Change
Page25, Modify R2117 connect to TL_DATA & R2116 connect to TL_CLK, Two signals connect to R2177,R2178 pull up to +3VS for LVDS Translator EEPROM Reserve
Page31, Modify U2200 Pin86 EAPD to TL_DATA & Add U2200 Pin85 TL_CLK for LVDS Translator EEPROM Reserve Function
Page31, Add U2200 Pin26 EAPD_R for LVDS Translator EEPROM Reserve Function
Page31, Add R2223 & R2224 to option EAPD GPIO Output singal from Pin26 (EAPD_R) or Pin86 (TL_DATA) for LVDS Translator EEPROM Reserve Function
Page14, Del R216~R229 for USB2.0 Signals tuneing circuit remove
Page14, Reserve R230~R234 & C222~C226 with USB2.0 N signals port 0,6,10,11,12 for AMD Suggestion
Page36, Del R2321,R2322,C2317,C2318,C2319,Q2313,Q2314 for +3V_FCH Power Control
Page31, U2200 Pin70 Del FCH_PWR_EN# for +3V_FCH Power Control
Page29, Modify JSPK1 P/N from DC030008W00 to DC030009100 for ME Connector List update
Page31, U2200 Pin127 Add VSB_ON & Reserve R2226 for +VSB Power Control
Page31, Modify R2217, R2218 Power Source from +3VS to +3VALW for +3VGS Power Leakage issue
Page18, Install Q1400, R1427, R1428 & Remove R1433, R1435 for +3VGS Power Leakage issue
Page33, Modify H10 & H22 From NPTH to PTH For ME Drawing Lose
Page31, Del R2226 for VSB_ON resistor double reserve
Page31, Add R2226,R2227 Pull up to +3VS & Reserve R2217,R2218 pull up to +3VALW for SMBUS Leakage issue
Page7, Del R65,R69 & Reserve R45 & R45 with APU_SID & APU_SIC By Pass APU_SID_R & APU_SIC_R for SMBUS Power Leakage Issue
Page31, Reserve C2219,C2210 to +3VALW For SMBUS2 AC Decoulping
Page31, Del C2213,C2214 & Modify R2226,R2227 BOM Structure to @ & R2217,R2218 to POP For SMBUS Power Leakage issue
Page7, Modify R45,R48 BOM Structure to POP & Q9 to @ For SMBUS Power Leakage issue
Page36, Modify R2309 P/N from SD028750180(7.5K) to SD028150380(150K) for Power Sequence tuneing
Page36, Modify C2316 P/N from SE042104K80(0.1U) to SE080105K80(1U) for Power Sequence tuneing
Page19, Modify R1450 P/N from SD028150380(150K) to SD028130380(130K) for Power Sequence tuneing
Page19, Modify C1470 P/N from SE042104K80(0.1U) to SE080105K80(1U) for Power Sequence tuneing
Page13, Modify U4 P/N from SA000041P00(MXIC) to SA00003K800(Winbond) for ROM Part Issue
Page19, Modify C1470 P/N from SE080105K80(1U) to SE042104K80(0.1U) for Power Sequence tuneing
Page35, unmount R2481 and mount R2482 for LID SW function reserved
Page29, unmount R1140 because 14" is no need to select mainstream and retail
Page12, Modify C129 P/N from SE071150J80 (15P) to SE071220J80 (22P) For Crystal Clock Tuneing
Page12, Modify C130 P/N from SE071150J80 (15P) to SE071270J80 (27P) For Crystal Clock Tuneing
Page12, Modify C131,C134 P/N from SE071270J80 (27P) to SE071330J80 (33P) For Crystal Clock Tuneing
Page18, Modify C1445,C1446 P/N from SE071120J80 (12P) to SE071200JN0 (20P) For Crystal Clock Tuneing
Page26, Modify C2144,C2145 BOM Structure to @ for DMIC no function issue
D
C
Page35, unmount R2482 and mount R2481 for LID SW function implement when SMT
power schematics 20110208.dsn
B
B
A
A
2008/08/10
Issued Date
Compal Secret Data
2011/03/04
Deciphered Date
5
4
3
2
Title
EE modify list
Custom
Rev
0.4
LA-7121P
Date:
Sheet
1
49
of
50
5
4
Phase
Date
SIT
2012/01/03
2012/01/03
2012/01/04
2012/01/04
2012/01/04
2012/01/04
2012/01/04
2012/01/04
2012/01/04
2012/01/04
2012/01/04
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2012/01/10
2012/01/11
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2012/01/11
2012/01/11
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2012/01/12
2012/01/16
2012/01/16
No.79
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No.87
No.88
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No.
BOM
Sch
Layout
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2
1
Description
Page31, Add R2228 connect from MAINPWON_R to MAINPWON for Power Circuit update
Page31, Modify R2236 BOM Structure from POP to @ for +3VS Power Leakage Issue
Page7, delete Q9, short and remove 0 ohm: R45&R48
Page7,9,13, short and remove R64&R68, change Page13 net name ML_VGA_HPD, change page7 net name LVDS_HPD
Page15, Modify +VDDAN_11_USB_S power source from +1.1VALW to +1.1V_FCH for reduce power consumption
Page15, Modify +VDDCR_11V_USB power source from +1.1VALW to +1.1V_FCH for reduce power consumption
Page15, Modify +VDDAN_11_SSUSB & +VDDCR_11_SSUSB power source from +1.1VALW to +1.1V_FCH for reduce power consumption
Page15, Modify +VDDIO_33_S power source from +3V_FCH to +3VALW for reduce power consumption
Page15, Modify +VDDXL_3.3V power source from +3V_FCH to +3VALW for reduce power consumption
Page15, Modify +VDDPL_11_SYS_S power source from +1.1VALW to +1.1V_FCH for reduce power consumption
Page15, Modify +VDDAN_33_HWM power source from +3V_FCH to +3VALW for reduce power consumption
Page36, Modify R2314,R2318,R2320,Q2311 BOM Structure from @ to POP for Reduce Power Consumption
Page36, Add Q2313,Q2314,U2304,C2309,C2312,C2321,R2323,R2310,R2324 for +3VALW to +3V_FCH Circuit (Reduce Power Consumption)
Page36, Add Q2316,Q2309,U2303,C2317,C2320,C2318,C2319,R2322,R2317 for +1.1VALW to +1.1V_FCH Circuit (Reduce Power Consumption)
Page14, Remove R146 & R148 for component part reduce
Page7, Remove R207 for component part reduce
Page32, Remove R471 & R472 for component part reduce
Page29, Remove R1106,R1107,R1119,R1134,R1109 for component part reduce
Page35, Remove R2465,R2466 for component part reduce
Page33, Reserve R2483 & R2485 to connect EC_SMB_CK2 & EC_SMB_DA2 for Lenovo Multi-touch function
Page31, Modify EC U2200 111Pin from +3VLP to +3VALW_EC for S4 LID Function (common QILEX)
Page26, Del R2176 to connect to EC_INVPWM for common QILEX
Page14, Add R146 & R148 for component part reduce
Page36, Modify +3V_FCH netname to +3VS_FCH for component part reduce
Page36, Modify +1.1V_FCH netname to +1.1VS_FCH for component part reduce
Page15, Modify +VDDAN_11_USB_S power source from +1.1V_FCH to +1.1VS_FCH for reduce power consumption
Page15, Modify +VDDCR_11V_USB power source from +1.1V_FCH to +1.1VS_FCH for reduce power consumption
Page15, Modify +VDDAN_11_SSUSB & +VDDCR_11_SSUSB power source from +1.1V_FCH to +1.1VS_FCH for reduce power consumption
Page15, Modify +VDDIO_33_S power source from +3VALW to +3VS_FCH for reduce power consumption
Page15, Modify +VDDXL_3.3V power source from +3VALW to +3VS_FCH for reduce power consumption
Page15, Modify +VDDPL_11_SYS_S power source from +1.1V_FCH to +1.1VS_FCH for reduce power consumption
Page15, Modify +VDDAN_33_HWM power source from +3VALW to +3VS_FCH for reduce power consumption
Page29, Remove R1108,R1135,R1110,C1127 for component part reduce
Page31, Remove Pin25 EC_INVT_PWM for Circuit Common
Page31, Modify EC U2200 111Pin from +3VALW_EC to +3VLP for S4 LID Function (common QILEX)
Page36, Modify +3VS_FCH netname to +3V_FCH for component part reduce
Page15, Modify +VDDAN_33_USB power source from +3VS_FCH to +3V_FCH for reduce power consumption
Page15, Modify +VDDPL_33_SSUSB_S power source from +3VS_FCH to +3V_FCH for reduce power consumption
Page15, Modify +VDDPL_33_USB_S power source from +3VS_FCH to +3V_FCH for reduce power consumption
Page15, Modify +VDDIO_33_S power source from +3V_FCH to +3VALW for reduce power consumption
Page15, Modify +VDDAN_33_HWM power source from +3V_FCH to +3VALW for reduce power consumption
Page36, Add J2302 From +1.1VALW to +1.1V_FCH for reduce power consumption
Page36, Modify U2304 Power source from +3V_FCH to +3V for reduce power consumption
Page36, Add J2303 from +3VALW to +3V for reduce power consumption
Page36, Modify U2303 Power source from +1.1V_FCH to +1.1V for reduce power consumption
Page36, Modify J2302 From +1.1V_FCH to +1.1V for reduce power consumption
Page15, Modify +VDDAN_11_USB_S power source from +1.1V_FCH to +1.1V for reduce power consumption
Page15, Modify +VDDCR_11V_USB power source from +1.1V_FCH to +1.1V for reduce power consumption
Page15, Modify +VDDAN_11_SSUSB & +VDDCR_11_SSUSB power source from +1.1V_FCH to +1.1V for reduce power consumption
Page15, Modify +VDDPL_11_SYS_S power source from +1.1V_FCH to +1.1V for reduce power consumption
Page15, Modify +VDDAN_33_USB power source from +3V_FCH to +3V for reduce power consumption
Page15, Modify +VDDPL_33_SSUSB_S power source from +3V_FCH to +3V for reduce power consumption
Page15, Modify +VDDPL_33_USB_S power source from +3V_FCH to +3V for reduce power consumption
Page15, Modify +VDDIO_33_S power source from +3VALW to +3V_FCH for reduce power consumption
Page15, Modify +VDDAN_33_HWM power source from +3VALW to +3V_FCH for reduce power consumption
Page15, Modify +VDDXL_3.3V power source from +3V_FCH to +3V for reduce power consumption
Page33, Add R2493,R2492,R2491,R2494,Q2403,Q2400,C2494,C2493 for AOAC Power Circuit
Page31, U2200 add netname FCH_PWR_EN# on Pin70 for +3V & +1.1V Power Control
Page36, Add R2325 from FCH_PWR_EN# to FCH_PWR_EN#_R for +3V & +1.1V Power Control
Page36, Add FCH_PWR_EN#_R on Q2313.2,Q2314.2,Q2316.2,Q2309.2 for +3V & +1.1V Power Control Enable Option
Page33, Modify JMINI1 pin1 from FCH_PCIE_WAKE# to WLAN_WAKE# for AOAC Function
Pgae31, Modify U2200 Pin26 from EAPD_R to WLAN_WAKE# for AOAC Function
Page31, Add U2200 Pin119 from NC to EAPD_R for Audio Function
Page31, Add U2200 Pin91 from NC to AOAC_WLAN for AOAC Function
Page31, Modify U2200 Pin19 net name from ODD_DA# to WL_OFF_EC# for Circuit common with Intel
Page30, Del R2435 for component reduce
Page33, Add R2496 & reserve R2495 for RF_OFF# source option
Page33, Modify JMINI1 Pin20 net name from WL_OFF# to RF_OFF# for Circuit common with Intel
Page31, Modify R2205 BOM Structure to @ for Common Circuit with Intel
Page31, Modify R2232,R2230 from 10K to 100K & Modify R2202,R2230,R2232 pull up from +3VALW_EC to +3VALW for Common Circuit with Intel
Page31, Modify L2200.1 Power Source from +3VALW to +3VALW_EC for EC_AVCC Power Leakage Issue
Page31, BRDID Table update for SIT Build
Page31, Modify R2209 From 18K to 33K for FVT BRDID update
Page26, Modify R2166 P/N from SD028330080 (33ohm) to SD034499180 (4.99K) for logo led brightness fine tune
Page35, Remove R2469 for logo led brightness fine tune
D
C
B
B
MEMO
Page18, Modify C1445,C1446 P/N from SE071200JN0 to SE071200J80 for FVT SMT Memo
Page36, Modify C2316 P/N from SE080105K80 to SE0000069L0 for FVT SMT Memo
Page26, Add C2144,C2145 P/N SE071220J80 (22P)for FVT SMT Memo
V
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V
Page36, Add Q2317 to Replace U2303 for +1.1V Power Mos layout space not enough issue
Page36, Add Q2318 to Replace U2304 for +3V Power Mos layout space not enough issue
Page29, Modify R1102,R1104,R1105 BOM Structure to @ for Vendor suggestion
Page36, Modify R2323.1 & R2322.1 from +VSB to +5VALW for VGS over spec issue
Page36, Modify Q2317 & Q2318 P/N: from SB00000LQ00 to SB923050030 for VGS over spec issue
Page31,35 Modify U2200 Pin70 Net name from FCH_PWR_EN# to FCH_PWR_EN for +3V & +1.1V power control solution change
Page36, Modify R2325 to POP from FCH_PWR_EN to FCH_PWR_EN_R for +3V & +1.1V Power Control
Page36, Delete R2314,R2318,R2320,Q2311 for Reduce Power Consumption
Page31, Modify R2230 BOM Structure from POP to @ for double pull up error
Page31, Modify R2208 BOM Structure from POP to @ for internal pull high solution
A
A
2008/08/10
Issued Date
Compal Secret Data
2011/03/04
Deciphered Date
5
4
3
2
Title
EE modify list
Custom
Rev
0.4
LA-7121P
Date:
Sheet
1
50
of
50

Compal Confidential

Transcription

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