Compal Confidential
Transcription
Compal Confidential
5 4 3 2 1 D D Compal Confidential C C Fortworth20 EDW10 Schematic Document Intel Protability Processor with ATi RC300ML + IXP150 2004-03-16 B B REV: 0.2 A A Title Compal Electronics, Inc. THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Cover Sheet Rev 0.2 LA-2301 Date: 5 4 3 2 Thursday, April 08, 2004 Sheet 1 1 of 47 5 4 3 2 1 Block Diagram Compal confidential D Model Name : Fortworth 20 File Name : LA-2301 Rev: 0.1 NorthWood-MT -- 533 Presscot-MT--533 uFCPGA 478 Pin Fan Control page 37 Thermal Sensor Clock Generator ADM1032 ICS951402 page 5 page 17 D page 4,5,6 HA#(3..31) HD#(0..63) FSB Memory BUS(DDR) 400/533 MHz CRT Connector 200pin DDR-SODIMM X1 2.5V 200MHz DDR266/333 page 18 BANK 0, 1, 2, 3 ATi RC300ML LVDS Connector page 15,16 BGA-718 Pin page 18 TV Connector page 13,14 page 7,8,9,10,11,12 page 10 On Board RAM x 8 cells A-Link C 66MHz 4X 266MB/s PCI BUS Mini-PCI IEEE 1394 LAN TI TSB43AB21A Realtek RTL8100CL page 28 page 27 3.3V 33MHz CardBus / SD / SM / MMC / MS Pro / XD ENE CB714 page 26 USB port 0, 1, 2, 3 ATi SB200C IXP 150 BGA-457Pin C USBx3 USB conn 3.3V 48MHz USB2.0 page 29 3.3V 24.576MHz AC-Link page 19,20,21,22 page 24 3.3V ATA100 RJ45 page 26 B Slot 0 page 25 5 in 1 Conn. page 25 LPC BUS AC97 Codec 3.3V 33MHz Super I/O K/B Controller SMsC LPC47N217 page 32 Power On/Off Reset & RTC HDD CDROM page 23 ALC250 B MDC page 30 page 30 page 23 AMP& Phone Jack page 31 ENE KB910\ page 33 RJ11 page 30 page 35 DC/DC Interface Suspend page 37 A Power Circuit DC/DC Parallel Port Int.KBD FIR Module EC I/O Buffer page 32 TFDU6102-TR3 page 32 page 33 Touch Pad T/P Switch Board page 34 A Flash ROM SST39VF040-90-4C-NH page 34 page 38,39,40,41 42,43,44,45,46 Title Size B Date: 5 4 3 2 Compal Electronics, Inc. Block Diagram Document Number Rev 0.2 LA-2301 Thursday, April 08, 2004 Sheet 1 2 of 47 5 4 3 Voltage Rails D C 1 Board ID Table for AD channel S0-S1 S3 S5 Vcc Ra Adapter power supply (19V) N/A N/A N/A Board ID AC or battery power rail for power circuit. N/A N/A N/A OFF 0 1 2 3 4 5 6 7 Power Plane Description VIN B+ +CPU_CORE Core voltage for CPU ON OFF +CPU_VID 1.2V rail for Processor VID ON OFF OFF +1.25VS 1.25V switched power rail ON OFF OFF +1.8VS 1.8V switched power rail ON OFF OFF +2.5VALW 2.5V always on power rail ON ON* ON* OFF +2.5V 2.5V power rail ON ON +2.5VS 2.5V switched power rail ON OFF OFF +3VALW 3.3V always on power rail ON ON ON* +3V 3.3V power rail ON ON OFF +3VS 3.3V switched power rail ON OFF OFF +5VALW 5V always on power rail ON ON ON* +5V 5V power rail ON ON OFF +5VS 5V switched power rail ON OFF OFF +12VALW 12V always on power rail ON ON ON* RTCVCC RTC power ON ON ON External PCI Devices DEVICE IDSEL # REQ/GNT # NB Internal VGA N/A N/A A 1394 AD16 0 A LAN AD19 1 D CARD BUS AD20 2 A 5 in 1 AD20 2 B Mini-PCI AD18 3 C/D EC SM Bus1 address 3.3V +/- 5% 100K +/- 5% Rb 0 8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5% NC Board ID 0 1 2 3 4 5 6 7 Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. B 2 VAD_BID min 0V 0.216 V 0.436 V 0.712 V 1.036 V 1.453 V 1.935 V 2.500 V VAD_BID typ 0V 0.250 V 0.503 V 0.819 V 1.185 V 1.650 V 2.200 V 3.300 V VAD_BID max 0V 0.289 V 0.538 V 0.875 V 1.264 V 1.759 V 2.341 V 3.300 V D PCB Revision C 0.1 PIRQ B EC SM Bus2 address Device Address Device Address Smart Battery 0001 011X b ADM1032 1001 100X b EEPROM(24C16) 1010 000X b ALC250 0000 000X b I2C / SMBUS ADDRESSING A DEVICE HEX ADDRESS DDR SO-DIMM 0 A0 1010001X CLOCK GENERATOR (EXT.) D2 1101001X A Title Compal Electronics, Inc. THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 Notes Rev 0.2 LA-2301 Thursday, April 08, 2004 Sheet 1 3 of 47 5 4 HA#[3..31] +CPU_CORE HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31 D C 7 H_BR0# PU R : Intel 220 Ohm ATi RC300 51 Ohm ATi RS250 56 Ohm +CPU_CORE H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_ADS# H_ADS# R1 1 2 56_0402_5% R2 1 2 51_0402_5% H_BREQ0# H_BPRI# H_BNR# H_LOCK# 7 7 7 7 17 CLK_EXT_CPU 17 CLK_EXT_CPU# 7 7 7 H_HIT# H_HITM# H_DEFER# H_BREQ0# CLK_EXT_CPU CLK_EXT_CPU# A#3 A#4 A#5 A#6 A#7 A#8 A#9 A#10 A#11 A#12 A#13 A#14 A#15 A#16 A#17 A#18 A#19 A#20 A#21 A#22 A#23 A#24 A#25 A#26 A#27 A#28 A#29 A#30 A#31 A#32 A#33 A#34 A#35 J1 K5 J4 J3 H3 G1 REQ#0 REQ#1 REQ#2 REQ#3 REQ#4 ADS# AC1 V5 AA3 AC3 AP#0 AP#1 BINIT# IERR# H6 D2 G2 G4 BR0# BPRI# BNR# LOCK# AF22 AF23 BCLK0 BCLK1 F3 E3 E2 POWER HOST ADDR Northwood-MT Prescott-MT HOST ADDR CONTROL CLK CON TROL HIT# HITM# DEFER# GND H1 H4 H23 H26 A11 A13 A15 A17 A19 A21 A24 A26 A3 A9 AA1 AA11 AA13 AA15 AA17 AA19 AA23 AA26 AA4 AA7 AA9 AB10 AB12 AB14 AB16 AB18 AB20 AB21 AB24 AB3 AB6 AB8 AC11 AC13 AC15 AC17 AC19 AC2 AC22 AC25 AC5 AC7 AC9 AD10 AD12 AD14 AD16 AD18 AD21 AD23 AD4 AD8 VSS_0 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 B H_IERR# K2 K4 L6 K1 L3 M6 L2 M3 M4 N1 M1 N2 N4 N5 T1 R2 P3 P4 R3 T2 U1 P6 U3 T4 V2 R6 W1 T5 U4 V3 W2 Y1 AB1 HD#[0..63] POWER VCC_81 VCC_82 VCC_83 VCC_84 VCC_85 VCC_80 VCC_79 VCC_78 VCC_77 VCC_76 VCC_75 VCC_74 JP1A BOOTSELECT H_REQ#[0..4] F13 F15 F17 F19 F9 F11 E8 E20 E18 E16 E14 E12 H_REQ#[0..4] AD1 HA#[3..31] +CPU_CORE 1 A10 A12 A14 A16 A18 A20 A8 AA10 AA12 AA14 AA16 AA18 AA8 AB11 AB13 AB15 AB17 AB19 AB7 AB9 AC10 AC12 AC14 AC16 AC18 AC8 AD11 AD13 AD15 AD17 AD19 AD7 AD9 AE10 AE12 AE14 AE16 AE18 AE20 AE6 AE8 AF11 AF13 AF15 AF17 AF19 AF2 AF21 AF5 AF7 AF9 B11 B13 B15 B17 B19 B7 B9 C10 C12 C14 C16 C18 C20 C8 D11 D13 D15 D17 D19 D7 D9 E10 7 2 VCC_0 VCC_1 VCC_2 VCC_3 VCC_4 VCC_5 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12 VCC_13 VCC_14 VCC_15 VCC_16 VCC_17 VCC_18 VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34 VCC_35 VCC_36 VCC_37 VCC_38 VCC_39 VCC_40 VCC_41 VCC_42 VCC_43 VCC_44 VCC_45 VCC_46 VCC_47 VCC_48 VCC_49 VCC_50 VCC_51 VCC_52 VCC_53 VCC_54 VCC_55 VCC_56 VCC_57 VCC_58 VCC_59 VCC_61 VCC_62 VCC_63 VCC_64 VCC_65 VCC_66 VCC_67 VCC_68 VCC_69 VCC_70 VCC_71 VCC_72 VCC_73 7 3 D#0 D#1 D#2 D#3 D#4 D#5 D#6 D#7 D#8 D#9 D#10 D#11 D#12 D#13 D#14 D#15 D#16 D#17 D#18 D#19 D#20 D#21 D#22 D#23 D#24 D#25 D#26 D#27 D#28 D#29 D#30 D#31 D#32 D#33 D#34 D#35 D#36 D#37 D#38 D#39 D#40 D#41 D#42 D#43 D#44 D#45 D#46 D#47 D#48 D#49 D#50 D#51 D#52 D#53 D#54 D#55 D#56 D#57 D#58 D#59 D#60 D#61 D#62 D#63 HD#[0..63] 7 HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63 B21 B22 A23 A25 C21 D22 B24 C23 C24 B25 G22 H21 C26 D23 J21 D25 H22 E24 G23 F23 F24 E25 F26 D26 L21 G26 H24 M21 L22 J24 K23 H25 M23 N22 P21 M24 N23 M26 N26 N25 R21 P24 R25 R24 T26 T25 T22 T23 U26 U24 U23 V25 U21 V22 V24 W26 Y26 W25 Y23 Y24 Y21 AA25 AA22 AA24 D C B +CPU_CORE AMP_1473129-1 H_BOOTSELECT 44 R_C 1 2 R5 @0_0402_5% @ Pop: Northwood Depop: Prescott A Title Size B Date: 5 4 3 2 A Compal Electronics, Inc. CPU(1/2) Document Number Rev 0.2 LA-2301 Thursday, April 08, 2004 Sheet 1 4 of 47 2 1 D 1 1 2 C1 R17 @10P_0402_50V8J@22_0402_5% 2 C4 2 C5 2 C6 2 C7 2 C8 2 C9 2 C10 2 C11 H_INTR 1 180P_0402_50V8J H_NMI 1 180P_0402_50V8J H_CPUSLP# 1 180P_0402_50V8J H_SMI# 1 180P_0402_50V8J H_STPCLK# 1 180P_0402_50V8J H_IGNNE# 1 180P_0402_50V8J H_A20M# 1 180P_0402_50V8J H_INIT# 1 180P_0402_50V8J 7 7 7 H_RS#0 H_RS#1 H_RS#2 7 H_TRDY# 19 19 19 19 19 19 H_A20M# H_FERR# H_IGNNE# H_SMI# H_PWRGD H_STPCLK# 19 19 19 7 H_INTR H_NMI H_INIT# H_RESET# 7 7 12,17 12,17 H_DBSY# H_DRDY# BSEL0 BSEL1 H_A20M# C6 H_FERR# B6 H_IGNNE# B2 H_SMI# B5 H_PWRGD AB23 H_STPCLK# Y4 H_INTR H_NMI H_INIT# H_RESET# 51_0402_5% 51_0402_5% 51_0402_5% 51_0402_5% 51_0402_5% 51_0402_5% 2 2 2 2 2 2 ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3 ITP_BPM#4 ITP_BPM#5 THERMTRIP# THER MAL Northwood-MT Prescott-MT AC6 AB5 AC4 Y6 AA5 AB4 BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 D4 C1 D5 ITP_TMS F7 ITP_TRST# E6 TCK TDI TDO TMS TRST# MISC 2 61.9_0603_1% COMP0 L24 2 61.9_0603_1% COMP1 P1 1 1 VSSA ITP_CLK0 ITP_CLK1 ITP CLK GROUND AMP_1473129-1 CPU Temperature Sensor 1 2 3 4 R39 +3VS 10mil C15 H_THERMDA @2200P_0603_50V7K 10mil 2 H_THERMDC 30,33 EC_SMC2 30,33 EC_SMD2 2 D+ 3 D- 8 SCLK 7 SDATA VDD1 1 ALERT# 6 THERM# 4 GND 5 1 H_DPSLPR# R93 17,19,44 PM_STPCPU# 1 Q4 MMBT3904_SOT23 2 1 A U1 R86 4.7K_0402_5% R42 10K_0402_5% 2 1 C14 0.1U_0402_10V6K 2 2 R40 R41 3 1 1 +3VS_THMSEN 2 1 1 200_0402_5% 2 2 4.7K_0402_5% 44 44 44 44 44 44 Pop: Northwood Imp: 50 Ohm Depop: Prescott Imp:60 Ohm R_G 2 @0_0402_5% 1 R19 1 R20 +CPU_CORE 2 7 7 7 7 DSTBP#0 DSTBP#1 DSTBP#2 DSTBP#3 F21 J23 P23 W23 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 7 7 7 7 ADDR ADSTB#0 ADSTB#1 L5 R5 H_ADSTB#0 7 H_ADSTB#1 7 DATA DBI#0 DBI#1 DBI#2 DBI#3 E21 G25 P26 V21 H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3 DBR# AE25 NC: W/O ITP PROCHOT# MCERR# SLP# C3 V6 AB26 H_PROCHOT# NC1 NC2 NC3 NC4 NC5 A22 A7 AF25 AF24 AE21 R21 R22 R23 R24 R25 R26 R27 1 1 1 1 1 1 1 H_CPUSLP# 56_0402_5% 2 56_0402_5% 2 56_0402_5% 2 56_0402_5% 2 56_0402_5% 2 56_0402_5% 2 56_0402_5% 2 300_0402_5% 2 56_0402_5% CPU_GHI# 20 for mobile CPU C 7 7 7 7 +CPU_CORE 1 R34 H_PROCHOT# 43 2 51_0402_5% H_CPUSLP# 19 Intel 852GME RDDP 56Ohm. ATi RC300 51Ohm ATi RS250 56 Ohm B +CPU_VID 1 2 8 7 6 5 C13 0.1U_0402_10V6K Pop: Prescott Depop: Northwood R38 680_0402_5% 2 1 10K_1206_8P4R_5% 1 2 10K_0402_5% 1 2 10K_0402_5% CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 +CPU_VID H_VID_PWRGD 35 A Title Size B Date: 3 1 R18 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 Q3 MMBT3904_SOT23 4 D +GTLVREF1 E22 K22 R22 W22 25mil ADM1032ARM_RM8 5 R16 86.6_0603_1% 2 DSTBN#0 DSTBN#1 DSTBN#2 DSTBN#3 3 +3VS RP2 1 TESTHI0 TESTHI1 TESTHI2 TESTHI3 TESTHI4 TESTHI5 TESTHI6 TESTHI7 TESTHI8 TESTHI9 TESTHI10 TESTHI11 TESTHI12 MISC +3VS 1 C3 1U_0603_10V6K 2 AD24 AA2 AC21 AC20 AC24 AC23 AA20 AB22 U6 W4 Y3 CPU_GHI# A6 AD25 H_DPSLPR# MISC COMP0 COMP1 width= 10mil 51.1 Ohm for Northwood, 61.9 Ohm for Prescott AE26 C2 220P_0402_50V7K VCCVID AC26 AD26 OPTIMIZED/COMPAT# AF4 R36 R37 B 25mil VIDPWRGD R25 -> Pop: Prescott Depop: Northwood MISC VCCSENSE VSSSENSE VCCVIDLB AD2 2 VCCSENSE A5 VSSSENSE A4 2 +VCCVIDLB AF3 0_0603_5% VSSA AD22 VCCSENSE VSSSENSE 1 +CPU_VID R35 VCCIOPLL VCCA VID0 VID1 VID2 VID3 VID4 VID5 44 44 + AD20 AE23 AE5 AE4 AE3 AE2 AE1 AD3 C12 33U_D2_8M_R35 1 +VCCIOPLL +VCCA CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 LQG21F4R7N00_0805 1K_1206_8P4R_5% VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 LQG21F4R7N00_0805 L1 1 2 L2 1 2 ITP F8 G21 G24 G3 G6 J2 J22 J25 J5 K21 K24 K3 K6 L1 L23 L26 L4 M2 M22 M25 M5 N21 N24 N3 N6 P2 P22 P25 P5 R1 R23 R26 R4 T21 T24 T3 T6 U2 U22 U25 U5 V1 V23 V26 V4 W21 W24 W3 W6 Y2 Y22 Y25 Y5 +CPU_CORE ITP_TCK ITP_TDI 8 7 6 5 AA21 AA6 F20 F6 DATA RP1 1 2 3 4 AF26 2 THERMDA THERMDC C R28 1 R29 1 R30 1 R31 1 R32 1 R33 1 GTLREF0 GTLREF1 GTLREF2 GTLREF3 ITP MISC J26 K25 K26 L25 DP#0 DP#1 DP#2 DP#3 LEGACY DBSY# DRDY# BSEL0 BSEL1 15mil +GTLVREF1 REF A20M# FERR# IGNNE# SMI# PWRGOOD STPCLK# H5 H2 AD6 AD5 B3 C4 R10 0_0402_5% GROUND CON TROL LINT0 LINT1 INIT# RESET# H_THERMTRIP# A2 6 H_THERMTRIP# +CPU_CORE RS#0 RS#1 RS#2 RSP# TRDY# D1 E5 W5 AB25 H_THERMDA H_THERMDC Place within 1.5" from CPU VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 F1 G5 F4 AB2 J6 +CPU_CORE 1. < 1.5" from the CPU Ball. 2. 220P cap. has to be closed to the ball as possible. R12 3. Intel: 0.63VCC. 51.1_0603_1% ATi: 0.66VCC. 2 2 JP1B SKTOCC# H_FERR# 2 56_0402_1% H_PWRGD 2 300_0402_1% H_THERMTRIP# 2 56_0402_1% 2 H_RESET# 51_0402_5% AE11 AE13 AE15 AE17 AE19 AE22 AE24 AE7 AE9 AF1 AF10 AF12 AF14 AF16 AF18 AF20 AF6 AF8 B10 B12 B14 B16 B18 B20 B23 B26 B4 B8 C11 C13 C15 C17 C19 C2 C22 C25 C5 C7 C9 D10 D12 D14 D16 D18 D20 D21 D24 D3 D6 D8 E1 E11 E13 E15 E17 E19 E23 E26 E4 E7 E9 F10 F12 F14 F16 F18 F2 F22 F25 F5 +CPU_CORE 1 R11 1 R13 1 R14 1 R15 GTL Reference Voltage 1 H_SKTOCC# 1 3 2 4 GND 1 5 2 Compal Electronics, Inc. CPU(2/2) Document Number Rev 0.2 LA-2301 Thursday, April 08, 2004 Sheet 1 5 of 47 5 4 3 +CPU_CORE 1 1 + 2 1 +CPU_CORE + D 2 C16 220U_6SVPC220MV_6.3VM_R15 2 1 + C18 220U_6SVPC220MV_6.3VM_R15 2 1 + C19 220U_6SVPC220MV_6.3VM_R15 2 1 C20 220U_6SVPC220MV_6.3VM_R15 2 1 C21 22U_1206_10V4Z 2 1 C22 @22U_1206_10V4Z 2 1 C23 22U_1206_10V4Z 2 1 C24 22U_1206_10V4Z 2 1 C25 22U_1206_10V4Z 2 1 C26 22U_1206_10V4Z C27 22U_1206_10V4Z 2 D +CPU_CORE +CPU_CORE 1 1 + + 2 C28 220U_6SVPC220MV_6.3VM_R15 2 1 + C30 220U_6SVPC220MV_6.3VM_R15 2 1 + C31 220U_6SVPC220MV_6.3VM_R15 2 C32 220U_6SVPC220MV_6.3VM_R15 1 2 1 C33 22U_1206_10V4Z 2 1 C34 @22U_1206_10V4Z 2 1 C35 22U_1206_10V4Z 2 1 C36 22U_1206_10V4Z 2 1 C37 22U_1206_10V4Z 2 1 C38 22U_1206_10V4Z 2 C39 22U_1206_10V4Z +CPU_CORE +CPU_CORE 1 + 2 1 + C649 220U_6SVPC220MV_6.3VM_R15 1 + 2 C17 220U_6SVPC220MV_6.3VM_R15 1 + C29 C650 @220U_6SVPC220MV_6.3VM_R15 220U_6SVPC220MV_6.3VM_R15 2 2 1 2 C 1 C40 @22U_1206_10V4Z 2 1 C41 @22U_1206_10V4Z 2 1 C42 @22U_1206_10V4Z 2 1 C43 @22U_1206_10V4Z 2 1 C44 @22U_1206_10V4Z 2 1 C45 @22U_1206_10V4Z 2 C46 @22U_1206_10V4Z +CPU_CORE C +CPU_CORE 1 + 2 C651 @220U_6SVPC220MV_6.3VM_R15 1 2 1 C47 @22U_1206_10V4Z 2 1 C48 @22U_1206_10V4Z 2 1 C49 @22U_1206_10V4Z 2 1 C50 @22U_1206_10V4Z 2 1 C51 @22U_1206_10V4Z 2 1 C52 22U_1206_10V4Z 2 C53 22U_1206_10V4Z +CPU_CORE Layout note : Place close to CPU power and ground pin as possible (<1inch) Sanyo : SGA27221300 (220uF, 13m Ohm) 1 2 1 C55 @22U_1206_10V4Z 2 1 C56 @22U_1206_10V4Z 2 1 C57 @22U_1206_10V4Z 2 C54 @22U_1206_10V4Z B B 2 R43 1 300_0402_5% 2 C58 1 @1U_0603_10V6K B 2 +CPU_CORE 3 Q1 1 C H_THERMTRIP# E 5 H_THERMTRIP# MAINPWON 38,39,41 2SC2411K_SC59 A A Title Compal Electronics, Inc. CPU Decoupling THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.2 LA-2301 Date: 5 4 3 2 Thursday, April 08, 2004 Sheet 1 6 of 47 5 4 3 2 HA#[3..31] D 1 HA#[3..31] 4 H_REQ#[0..4] H_REQ#[0..4] HD#[0..63] HD#[0..63] D 4 4 U51A 2 RB751V_SOD323 R801 1 19,23,32,33 NB_RST# 2 NB_RST#_R 270K_0402_5% B 0.1U_0402_10V6K C655 2 1 R709 L Note: PLACE CLOSE TO RC300M, USE 10/10 WIDTH/SPACE +CPU_CORE 2 PLACE CLOSE TO U27 Ball W28, USE 20/20 WIDTH/SPACE R716 1 1 51.1_0603_1% R712 86.6_0603_1% 1 1U_0603_10V6K 1 2 +1.8VS H_ADS# H_BNR# H_BPRI# H_DEFER# H_DRDY# H_DBSY# H_BREQ0# H_LOCK# 5 5 5 5 H_RESET# H_RS#2 H_RS#1 H_RS#0 5 4 4 H_TRDY# H_HIT# H_HITM# 2 22 +CPU_CORE H_ADSTB#1 4 4 4 4 5 5 4 4 CPU_ADS# CPU_BNR# CPU_BPRI# CPU_DEFER# CPU_DRDY# CPU_DBSY# CPU_BR0# CPU_LOCK# H_RESET# H_RS#2 H_RS#1 H_RS#0 A17 G25 G26 J25 CPU_CPURSET# CPU_RS2# CPU_RS1# CPU_RS0# H_TRDY# H_HIT# H_HITM# F26 J26 H25 CPU_TRDY# CPU_HIT# CPU_HITM# A9 AH5 AG5 C7 CPU_RSET SUS_STAT# SYSRESET# POWERGOOD V28 CPU_COMP_N W29 CPU_COMP_P H23 CPVDD J23 CPVSS SUS_STAT#_R NB_RST#_R NB_PWRGD R710 1 2 24.9_0603_1% COMP_N R711 1 2 49.9_0402_1% COMP_P L40 CPVDD 1 2 HB-1M2012-121JT03_0805 2.2U_0805_10V4Z 1 2CPVSS C656 +NB_GTLREF C658 220P_0402_50V8K W28 CPU_VREF Y29 Y28 THERMALDIODE_N THERMALDIODE_P B17 TESTMODE 1 A B26 C30 A27 B29 C28 C29 B28 D28 D26 B27 C26 E25 E26 A26 B25 C25 A28 D27 E27 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 H_DBI#1 H_DSTBN#1 H_DSTBP#1 CPU_D32# CPU_D33# CPU_D34# CPU_D35# CPU_D36# CPU_D37# CPU_D38# CPU_D39# CPU_D40# CPU_D41# CPU_D42# CPU_D43# CPU_D44# CPU_D45# CPU_D46# CPU_D47# CPU_DBI2# CPU_DSTBN2# CPU_DSTBP2# F24 D24 E23 E24 F23 C24 B24 A24 F21 A23 B23 C22 B22 C21 E21 D22 D23 E22 F22 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 H_DBI#2 H_DSTBN#2 H_DSTBP#2 CPU_D48# CPU_D49# CPU_D50# CPU_D51# CPU_D52# CPU_D53# CPU_D54# CPU_D55# CPU_D56# CPU_D57# CPU_D58# CPU_D59# CPU_D60# CPU_D61# CPU_D62# CPU_D63# CPU_DBI3# CPU_DSTBN3# CPU_DSTBP3# B21 F20 A21 C20 E20 D20 A20 D19 C18 B20 E18 B19 D18 B18 C17 A18 F19 E19 F18 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63 H_DBI#3 H_DSTBN#3 H_DSTBP#3 DATA GROUP 1 ADDR. GROUP 0 PART 1 OF 6 L27 K25 H26 J27 L26 G27 F25 K26 CPU_D16# CPU_D17# CPU_D18# CPU_D19# CPU_D20# CPU_D21# CPU_D22# CPU_D23# CPU_D24# CPU_D25# CPU_D26# CPU_D27# CPU_D28# CPU_D29# CPU_D30# CPU_D31# CPU_DBI1# CPU_DSTBN1# CPU_DSTBP1# DATA GROUP 0 H_ADS# H_BNR# H_BPRI# H_DEFER# H_DRDY# H_DBSY# H_BREQ0# H_LOCK# 2 2 C657 1 330_0402_5% 5 HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 H_DBI#0 H_DSTBN#0 H_DSTBP#0 PENTIUMAGTL+ I/F IV 2 D71 1 CPU_A17# CPU_A18# CPU_A19# CPU_A20# CPU_A21# CPU_A22# CPU_A23# CPU_A24# CPU_A25# CPU_A26# CPU_A27# CPU_A28# CPU_A29# CPU_A30# CPU_A31# CPU_ADSTB1# L30 K29 J29 H28 K28 K30 H29 J28 F28 H30 E30 D29 G28 E29 D30 F29 E28 G30 G29 DATA GROUP 2 R803 330K_0402_5% U30 T30 R28 R25 U25 T28 V29 T26 U29 U26 V26 T25 V25 U27 U28 T29 CPU_D0# CPU_D1# CPU_D2# CPU_D3# CPU_D4# CPU_D5# CPU_D6# CPU_D7# CPU_D8# CPU_D9# CPU_D10# CPU_D11# CPU_D12# CPU_D13# CPU_D14# CPU_D15# CPU_DBI0# CPU_DSTBN0# CPU_DSTBP0# DATA GROUP 3 SUS_STAT#_R 1 2 RB751V_SOD323 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31 H_ADSTB#1 ADDR. GROUP 1 2 1 SUS_STAT# R800 27K_0402_5% CPU_A3# CPU_A4# CPU_A5# CPU_A6# CPU_A7# CPU_A8# CPU_A9# CPU_A10# CPU_A11# CPU_A12# CPU_A13# CPU_A14# CPU_A15# CPU_A16# CPU_REQ0# CPU_REQ1# CPU_REQ2# CPU_REQ3# CPU_REQ4# CPU_ADSTB0# CONTROL H_ADSTB#0 M28 P25 M25 N29 N30 M26 N28 P29 P26 R29 P30 P28 N26 N27 M29 N25 R26 L28 L29 R27 MISC. 1 2 R802 27K_0402_5% D70 20 5 +1.8VS 1 +2.5V C HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_ADSTB#0 R713 H_DBI#0 5 H_DSTBN#0 5 H_DSTBP#0 5 C H_DBI#1 5 H_DSTBN#1 5 H_DSTBP#1 5 B H_DBI#2 5 H_DSTBN#2 5 H_DSTBP#2 5 H_DBI#3 5 H_DSTBN#3 5 H_DSTBP#3 5 A CHS-216IGP9050A21_BGA718 2 4.7K_0402_5% Title Compal Electronics, Inc. ATi RC300ML-HOST(1/5) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.2 LA-2301 Date: 5 4 3 2 Thursday, April 08, 2004 Sheet 1 7 of 47 5 19 3 2 1 A_AD[0..31] 12,19 A_AD[0..31] D 4 A_CBE#[0..3] A_CBE#[0..3] D U51C 19 19 A_SBREQ# A_SBGNT# +3VS ALINK_SBREQ# ALINK_SBGNT# V5 V6 PCI_REQ#0/ALINK_NC PCI_GNT#0/ALINK_NC K5 K6 AGP2_GNT#/AGP3_GNT AGP2_REQ#/AGP3_REQ M5 AGP8X_DET# B AGP8X_DET# AGPREF_4X J6 AGP_VREF/TMDS_VREF C663 1 +1.5VS +1.5VS R660 1 2 AGP_COMP J5 AGP_COMP 1 @52.3_0603_1% R661 1K_0603_1% Ra 1 1 @0_0402_5% L @10P_0402_25V8K 4 R654 2 2 @0_0402_5% Xin/CLK SSCLK LVDS_SSIN 2 1 AGP_SBA7 @0_0402_5% S0 Xout 8 6 S1 SSCC 5 @SM561BS_SO8 R656 @0_0402_5% LVDS SPREAD SPECTRUM R657 @0_0402_5% 1 1 7 1 S1 AGP_SBA6 C662 @10P_0402_25V8K 2 R658 C @0_0402_5% 2 L6 M6 L5 S0 1 2 R651 2 AGP_ST0 AGP_ST1 AGP_ST2 R653 @0_0402_5% R655 R715 2 C3 C2 D4 E4 F6 F5 G6 G5 R652 @0_0402_5% U52 VDD AGP2_SBA0/AGP3_SBA#0/GPIO0/VDDC_CNTL0 AGP2_SBA1/AGP3_SBA#1/GPIO1/VDDC_CNTL1 AGP2_SBA2/AGP3_SBA#2/GPIO2/LVDS_BLON# AGP2_SBA3/AGP3_SBA#3/GPIO3/LVDS_DIGON AGP2_SBA4/AGP3_SBA#4/GPIO4/STP_AGP# AGP2_SBA5/AGP3_SBA#5/GPIO5/AGP_BUSY# AGP2_SBA6/AGP3_SBA#6/GPIO6/LVDS_SSOUT AGP2_SBA7/AGP3_SBA#7/GPIO7/LVDS_SSIN 2 VSS P5 R6 T6 T5 P6 R5 C1 D3 N6 N5 @0_0402_5% Note: PLACE CLOSE TO U2 (NB RC300M) B AGP_SBA6 AGP_SBA7 EDID_CLK 18 EDID_DAT 18 ENBK# 33 ENVDD 18 AGP_STP# 20 AGP_BUSY# 20 +3VS CHS-216IGP9050A21_BGA718 2 AGPREF_4X 1 2 2 0.1U_0402_10V6K AGP2_IRDY#/AGP3_IRDY/GPIO8/I2C_CLK AGP2_TRDY#/AGP3_TRDY/TMDS_DVI_CLK AGP2_STOP#/AGP3_STOP/GPIO10/DDC_DATA AGP_PAR AGP2_FRAME#/AGP3_FRAME/TMDS_DVI_DATA AGP2_DEVSEL#/AGP3_DEVSEL/GPIO9/I2C_DATA AGP2_PIPE#/AGP3_DBI_HI AGP2_NC/AGP3_DBI_LO AGP2_RBF#/AGP3_RBF AGP2_WBF#/AGP3_WBF 2 @10U_0805_6.3V6M L41 1 2 +3VS @BLM21P300S_0805 R714 LVDS_SSOUT 2 1 1 C661 @0_0402_5% 3 W5 W6 1 2 R659 8.2K_0402_5% R3 M1 L3 H1 C660 1 A_SBREQ# A_SBGNT# AGP2_CBE#0/AGP3_CBE0/TMD2_D7 AGP2_CBE#1/AGP3_CBE1/TMD2_DE AGP2_CBE#2/AGP3_CBE2 AGP2_CBE#3/AGP3_CBE3/TMD1_D5 1 2 PCI_PAR/ALINK_NC PCI_FRAME#/ALINK_STROBE# PCI_IRDY#/ALINK_ACAT# PCI_TRDY#/ALINK_END# INTA# ALINK_DEVSEL# PCI_STOP#/ALINK_OFF# 1 1 A_DEVSEL# A_OFF# AD5 AC6 AC5 AD2 W4 AD3 AD6 E5 E6 T3 U2 G3 H2 C659 +3VS_SSVDD 2 A_PAR A_STROBE# A_ACAT# A_END# AGP2_SBSTB/AGP3_SBSTBF/NC/LVDS_BLON AGP2_SBSTB#/AGP3_SBSTBS/NC/ENA_BL AGP2_ADSTB0/AGP3_ADSTBF0/TMD2_CLK# AGP2_ADSTB0#/AGP3_ADSTBS0/TMD2_CLK AGP2_ADSTB1/AGP3_ADSTBF1/TMD1_CLK# AGP2_ADSTB1#/AGP3_ADSTBS1/TMD1_CLK @0.1U_0402_10V6K 1 ALINK_CBE#0 ALINK_CBE#1 ALINK_CBE#2 ALINK_CBE#3 Y2 W3 W2 V3 V2 V1 U1 U3 T2 R2 P3 P2 N3 N2 M3 M2 L1 L2 K3 K2 J3 J2 J1 H3 F3 G2 F2 F1 E2 E1 D2 D1 2 AG4 AE2 AC3 AA3 AGP_AD0/TMD2_HSYNC AGP_AD1/TMD2_VSYNC AGP_AD2/TMD2_D1 AGP_AD3/TMD2_D0 AGP_AD4/TMD2_D3 AGP_AD5/TMD2_D2 AGP_AD6/TMD2_D5 AGP_AD7/TMD2_D4 AGP_AD8/TMD2_D6 AGP_AD9/TMD2_D9 AGP_AD10/TMD2_D8 AGP_AD11/TMD2_D11 AGP_AD12/TMD2_D10 AGP_AD13 AGP_AD14 AGP_AD15 AGP_AD16/TMD1_VSYNC AGP_AD17/TMD1_HSYNC AGP_AD18/TMD1_DE AGP_AD19/TMD1_D0 AGP_AD20/TMD1_D1 AGP_AD21/TMD1_D2 AGP_AD22/TMD1_D3 AGP_AD23/TMD1_D4 AGP_AD24/TMD1_D7 AGP_AD25/TMD1_D6 AGP_AD26/TMD1_D9 AGP_AD27/TMD1_D8 AGP_AD28/TMD1_D11 AGP_AD29/TMD1_D10 AGP_AD30/TMDS_HPD AGP_AD31 1 A_CBE#0 A_CBE#1 A_CBE#2 A_CBE#3 PART 3 OF 6 2 ALINK_AD0 ALINK_AD1 ALINK_AD2 ALINK_AD3 ALINK_AD4 ALINK_AD5 ALINK_AD6 ALINK_AD7 ALINK_AD8 ALINK_AD9 ALINK_AD10 ALINK_AD11 ALINK_AD12 ALINK_AD13 ALINK_AD14 ALINK_AD15 ALINK_AD16 ALINK_AD17 ALINK_AD18 ALINK_AD19 ALINK_AD20 ALINK_AD21 ALINK_AD22 ALINK_AD23 ALINK_AD24 ALINK_AD25 ALINK_AD26 ALINK_AD27 ALINK_AD28 ALINK_AD29 ALINK_AD30 ALINK_AD31 PCI BUS 1 / AGP Bus (GPIO , TMDS , ZVPort) 12,19 A_PAR 19 A_STROBE# 19 A_ACAT# 19 A_END# 19,24,27 PCI_PIRQA# 19 A_DEVSEL# 19 A_OFF# AK5 AJ5 AJ4 AH4 AJ3 AJ2 AH2 AH1 AG2 AG1 AG3 AF3 AF1 AF2 AF4 AE3 AE4 AE5 AE6 AC2 AC4 AB3 AB2 AB5 AB6 AA2 AA4 AA5 AA6 Y3 Y5 Y6 PCI Bus 0 / A-Link I/F C A_AD0 A_AD1 A_AD2 A_AD3 A_AD4 A_AD5 A_AD6 A_AD7 A_AD8 A_AD9 A_AD10 A_AD11 A_AD12 A_AD13 A_AD14 A_AD15 A_AD16 A_AD17 A_AD18 A_AD19 A_AD20 A_AD21 A_AD22 A_AD23 A_AD24 A_AD25 A_AD26 A_AD27 A_AD28 A_AD29 A_AD30 A_AD31 R662 1K_0603_1% R663 1 2 @47K_0402 A A AGP8X_DET# Close to Pin J6 Title Compal Electronics, Inc. ATi RC300ML-A-LINK/AGP(2/5) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.2 LA-2301 Date: 5 4 3 2 Thursday, April 08, 2004 Sheet 1 8 of 47 5 4 3 2 1 U51B DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12 13,14,15,16 DDR_SBA0 13,14,15,16 DDR_SBA1 13,14,15,16 DDR_SRAS# 13,14,15,16 DDR_SCAS# C 13,14,15,16 DDR_SWE# 14,15 DDR_CLK0 14,15 DDR_CLK0# 14,15 DDR_CLK1 14,15 DDR_CLK1# 13 DDR_CLK3 13 DDR_CLK3# 13 DDR_CLK4 13 DDR_CLK4# DDR_SMA13 DDR_DM0 DDR_DM1 DDR_DM2 DDR_DM3 DDR_DM4 DDR_DM5 DDR_DM6 DDR_DM7 AH7 AF10 AJ14 AF21 AH23 AK28 AD29 AB26 MEM_DM0 MEM_DM1 MEM_DM2 MEM_DM3 MEM_DM4 MEM_DM5 MEM_DM6 MEM_DM7 DDR_SRAS# DDR_SCAS# AF24 AF25 MEM_RAS# MEM_CAS# DDR_SWE# AE24 MEM_WE# DDR_DQS0 DDR_DQS1 DDR_DQS2 DDR_DQS3 DDR_DQS4 DDR_DQS5 DDR_DQS6 DDR_DQS7 AJ8 AF9 AH13 AE21 AJ23 AJ27 AC28 AA25 MEM_DQS0 MEM_DQS1 MEM_DQS2 MEM_DQS3 MEM_DQS4 MEM_DQS5 MEM_DQS6 MEM_DQS7 DDR_CLK0 DDR_CLK0# AK10 AH10 MEM_CK0 MEM_CK0# DDR_CLK1 DDR_CLK1# AH18 AJ19 MEM_CK1 MEM_CK1# AG30 AG29 MEM_CK2 MEM_CK2# DDR_CLK3 DDR_CLK3# AK11 AJ11 MEM_CK3 MEM_CK3# DDR_CLK4 DDR_CLK4# AH17 AJ18 MEM_CK4 MEM_CK4# AF28 AG28 MEM_CK5 MEM_CK5# DDR_SCKE0 DDR_SCKE1 DDR_SCKE2 DDR_SCKE3 AF13 AE13 AG14 AF14 MEM_CKE0 MEM_CKE1 MEM_CKE2 MEM_CKE3 DDR_SCS#0 DDR_SCS#1 DDR_SCS#2 DDR_SCS#3 AH26 AH27 AF26 AG27 MEM_CS#0 MEM_CS#1 MEM_CS#2 MEM_CS#3 MEM_CAP2 AA29 MPVDD AC18 MPVDD MEM_COMP AK19 C666 1 2MPVSS AD18 MPVSS MEM_DDRVREF AK20 B +1.8VS 14,16 15,16 13,16 13,16 DDR_SCKE0 DDR_SCKE1 DDR_SCKE2 DDR_SCKE3 14,16 15,16 13,16 13,16 DDR_SCS#0 DDR_SCS#1 DDR_SCS#2 DDR_SCS#3 L42 1 2 HB-1M2012-121JT03_0805 PART 2 OF 6 AH19 AJ17 AK17 AH16 AK16 AF17 AE18 AF16 AE17 AE16 AJ20 AG15 AF15 AE23 AH20 AE25 MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13 MEM_A14 MEM_A15 MEM I/F D DDR_DQ0 DDR_DQ1 DDR_DQ2 DDR_DQ3 DDR_DQ4 DDR_DQ5 DDR_DQ6 DDR_DQ7 DDR_DQ8 DDR_DQ9 DDR_DQ10 DDR_DQ11 DDR_DQ12 DDR_DQ13 DDR_DQ14 DDR_DQ15 DDR_DQ16 DDR_DQ17 DDR_DQ18 DDR_DQ19 DDR_DQ20 DDR_DQ21 DDR_DQ22 DDR_DQ23 DDR_DQ24 DDR_DQ25 DDR_DQ26 DDR_DQ27 DDR_DQ28 DDR_DQ29 DDR_DQ30 DDR_DQ31 DDR_DQ32 DDR_DQ33 DDR_DQ34 DDR_DQ35 DDR_DQ36 DDR_DQ37 DDR_DQ38 DDR_DQ39 DDR_DQ40 DDR_DQ41 DDR_DQ42 DDR_DQ43 DDR_DQ44 DDR_DQ45 DDR_DQ46 DDR_DQ47 DDR_DQ48 DDR_DQ49 DDR_DQ50 DDR_DQ51 DDR_DQ52 DDR_DQ53 DDR_DQ54 DDR_DQ55 DDR_DQ56 DDR_DQ57 DDR_DQ58 DDR_DQ59 DDR_DQ60 DDR_DQ61 DDR_DQ62 DDR_DQ63 MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3 MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7 MEM_DQ8 MEM_DQ9 MEM_DQ10 MEM_DQ11 MEM_DQ12 MEM_DQ13 MEM_DQ14 MEM_DQ15 MEM_DQ16 MEM_DQ17 MEM_DQ18 MEM_DQ19 MEM_DQ20 MEM_DQ21 MEM_DQ22 MEM_DQ23 MEM_DQ24 MEM_DQ25 MEM_DQ26 MEM_DQ27 MEM_DQ28 MEM_DQ29 MEM_DQ30 MEM_DQ31 MEM_DQ32 MEM_DQ33 MEM_DQ34 MEM_DQ35 MEM_DQ36 MEM_DQ37 MEM_DQ38 MEM_DQ39 MEM_DQ40 MEM_DQ41 MEM_DQ42 MEM_DQ43 MEM_DQ44 MEM_DQ45 MEM_DQ46 MEM_DQ47 MEM_DQ48 MEM_DQ49 MEM_DQ50 MEM_DQ51 MEM_DQ52 MEM_DQ53 MEM_DQ54 MEM_DQ55 MEM_DQ56 MEM_DQ57 MEM_DQ58 MEM_DQ59 MEM_DQ60 MEM_DQ61 MEM_DQ62 MEM_DQ63 AG6 AJ7 AJ9 AJ10 AJ6 AH6 AH8 AH9 AE7 AE8 AE12 AF12 AF7 AF8 AE11 AF11 AJ12 AH12 AH14 AH15 AH11 AJ13 AJ15 AJ16 AF18 AG20 AG21 AF22 AF19 AF20 AE22 AF23 AJ21 AJ22 AJ24 AK25 AH21 AH22 AH24 AJ25 AK26 AK27 AJ28 AH29 AH25 AJ26 AJ29 AH30 AF29 AE29 AB28 AA28 AE28 AD28 AC29 AB29 AC26 AB25 Y26 W26 AE26 AD26 AA26 Y27 MEM_CAP1 AF6 C664 1 2 0.47U_0603_16V7K C665 1 2 0.47U_0603_16V7K D DDR_DM[0..7] DDR_DQ[0..63] DDR_DQS[0..7] DDR_SMA[0..13] DDR_DM[0..7] 13,14,16 DDR_DQ[0..63] 13,14,16 DDR_DQS[0..7] 13,14,16 DDR_SMA[0..13] 13,14,15,16 C B MEN_COMP R664 1 2 49.9_0402_1% +2.5V 2.2U_0805_10V4Z CHS-216IGP9050A21_BGA718 1 2 R665 1K_0603_1% C668 0.1U_0402_10V6K +DDR_VREF 1 2 A C669 0.1U_0402_10V6K R666 1K_0603_1% A Title Compal Electronics, Inc. ATi RC300ML-DDR(3/5) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 Rev 0.2 LA-2301 Thursday, April 08, 2004 Sheet 1 9 of 47 4 3 L43 +2.5VS +3VS_VDDR 1 1 1 L44 G9 H9 0.1U_0402_10V6K +1.8VS 1 +1.8VS_AVDDDI 2 2 L46 10_0603_5% C673 0.1U_0402_10V6K +1.8VS 1 1 2 2 +1.8VS_AVDDQ C674 0.1U_0402_10V6K L47 1 2 KC FBM-L11-201209-221LMAT_0805 1 C675 10U_0805_10V4Z 2 +PLLVDD_18 1 C676 0.1U_0402_10V6K 1 2 2 C677 1 R667 R668 1 PART 4 OF 6 AVDD_25 B13 AVSSN B14 AVDDDI_18 C13 AVSSDI A15 AVDDQ B15 AVSSQ H11 PLLVDD_18 G11 PLLVSS 2 715 _0402_1% NB_RSET F14 F15 E14 C8 D9 RED GREEN BLUE DACHSYNC DACVSYNC C14 RSET 2 @10_0402_5% VDDR3 VDDR3 A14 0.1U_0402_10V6K 18 CRT_R 18 CRT_G 18 CRT_B 18 CRT_HSYNC 18 CRT_VSYNC CLK_EXT_AGP66 C C671 0.1U_0402_10V6K LVDS +1.8VS 2 KC FBM-L11-201209-221LMAT_0805 L45 1 2 1 C672 FBM-11-160808-121-T_0603 0.1U_0402_10V6K U51D +2.5VS_AVDD 1 D 1 17 REFCLK1_NB @15P_0402_50V8J 1 2 C681 R669 CLK_EXT_NB CLK_EXT_NB# 17 CLK_EXT_NB 17 CLK_EXT_NB# CLK_EXT_MEM66 A5 B5 HCLKIN HCLKIN# B6 A6 SYS_FBCLKOUT SYS_FBCLKOUT# B2 2 2 XTALIN XTALOUT D8 @10_0402_5% 1 A4 B4 2 1 56_0402_5% R671 C685 @15P_0402_50V8J AGPCLKIN 17 CLK_EXT_MEM66 CLK_EXT_MEM66 A3 EXT_MEM_CLK R673 2 10K_0402_5% D12 E12 F11 F12 D13 D14 E13 F13 TZOUT0TZOUT0+ TZOUT1TZOUT1+ TZOUT2TZOUT2+ TZCLKTZCLK+ 18 18 18 18 18 18 18 18 TXOUT_L0N TXOUT_L0P TXOUT_L1N TXOUT_L1P TXOUT_L2N TXOUT_L2P TXCLK_LN TXCLK_LP E10 D10 B9 C9 D11 E11 B10 C10 TXOUT0TXOUT0+ TXOUT1TXOUT1+ TXOUT2TXOUT2+ TXCLKTXCLK+ 18 18 18 18 18 18 18 18 LPVDD_18 A12 +1.8VS_LPVDD LPVSS A11 LPVSS C678 LVDDR_18 LVDDR_18 B12 C12 +1.8VS_LVDDR 2 2 0.1U_0402_10V6K LVSSR LVSSR B11 C11 LVSSR C_R E15 TV_CRMA Y_G C15 TV_LUMA COMP_B D15 DACSCL D6 NB_DDC_CLK DACSDA C6 NB_DDC_DATA 18 CPUSTOP# D5 SYSCLK A8 SYSCLK# B8 AGPCLKOUT CLK_EXT_AGP66 B3 1 TXOUT_U0N TXOUT_U0P TXOUT_U1N TXOUT_U1P TXOUT_U2N TXOUT_U2P TXCLK_UN TXCLK_UP ALINK_CLK 17 CLK_EXT_AGP66 +3VS 1 2 C670 CRT KC FBM-L11-201209-221LMAT_0805 2 2 2 +3VS SVID 5 D7 B7 USBCLK REF27 C5 OSC CLK. GEN. D +1.8VS KC FBM-L11-201209-221LMAT_0805 0.1U_0402_10V6K 1 2 L48 1 1 C679 C680 1 +1.8VS KC FBM-L11-201209-221LMAT_0805 0.1U_0402_10V6K 1 2 L49 1 1 1 C682 C683 C684 2 0.1U_0402_10V6K TV_COMPS 1 R670 R672 2 10U_0805_10V4Z 2 C 2 10U_0805_10V4Z 2 @75_0402_1% 1 2 1K_0402_5% 18 +3VS CHS-216IGP9050A21_BGA718 1 B 1 B TV-OUT CONN. C103 1 2 @33P_0402_50V8J CHB2012U121_0805 2 TV_CRMA L5 1 CHB2012U121_0805 2 1 L4 1 1 TV_LUMA 1 A R102 75_0402_1% 2 1 C109 100P_0402_25V8K 2 C110 1 2 C104 @33P_0402_50V8J 1 100P_0402_25V8K 2 LUMA_1 JP2 CRMA_1 1 2 3 4 1 2 3 4 SUYIN_030008FR004T100ZL C111 100P_0402_25V8K 1 2 A C112 100P_0402_25V8K 2 2 R101 75_0402_1% 2 D2 V-PORT-0603-220 M-V05_0603 2 D1 V-PORT-0603-220 M-V05_0603 Title Compal Electronics, Inc. ATi RC300ML-VEDIO(4/5) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.2 LA-2301 Date: 5 4 3 2 Thursday, April 08, 2004 Sheet 1 10 of 47 5 4 3 2 1 +CPU_CORE +1.5VS U51F +2.5V 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K U51E +3VS AA1 AA7 AA8 AC7 AC8 AD1 AD7 AD8 AK3 W8 VDDL_ALINK VDDL_ALINK VDDL_ALINK VDDL_ALINK VDDL_ALINK VDDL_ALINK VDDL_ALINK VDDL_ALINK VDDL_ALINK VDDL_ALINK MEM I/F PWR CORE PWR PART 5 OF 6 VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR2_CPU VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP/VDDP33 VDDP_AGP/VDDP33 VDDP_AGP/VDDP33 AGP PWR B C16 D16 D17 E16 E17 F16 F17 G17 G21 G23 G24 H16 H17 H19 H21 H24 K23 K24 M23 P23 P24 T23 T24 U23 U24 W30 POWER +CPU_CORE CPU I/F PWR C VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE ALINK PWR D F10 F9 G12 H12 H13 M12 M13 M14 M17 M18 M19 N12 N13 N14 N17 N18 N19 P12 P13 P14 P17 P18 P19 U12 U13 U14 U17 U18 U19 V12 V13 V14 V17 V18 V19 W12 W13 W14 W17 W18 W19 VDD_18 VDD_18 VDD_18 VDD_18 AA23 AA27 AB30 AC10 AC12 AC13 AC15 AC17 AC19 AC21 AC23 AC24 AC25 AC27 AD10 AD12 AD13 AD15 AD17 AD19 AD21 AD23 AD24 AD25 AD27 AE10 AE14 AE15 AE19 AE20 AE30 AE9 AF27 AG11 AG12 AG17 AG18 AG23 AG24 AG26 AG8 AG9 AJ30 AK14 AK23 AK8 V23 W23 W24 W25 Y25 A2 G4 H5 H6 H7 J4 K8 L4 M7 M8 N4 P1 P7 P8 R4 T8 U4 U5 U6 E7 F7 G8 C686 1 C687 1 C688 1 C689 1 C690 1 C691 1 C692 1 C693 1 1 C694 22U_1206_10V4Z 2 2 2 0.1U_0402_10V6K 2 2 2 0.1U_0402_10V6K 0.1U_0402_10V6K 2 2 2 0.1U_0402_10V6K 0.1U_0402_10V6K +2.5V 0.1U_0402_10V6K 1 + C695 100U_D2_10VM 2 C696 1 1 C697 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K C698 1 1 C699 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K C700 1 C701 2 0.1U_0402_10V6K 1 2 0.1U_0402_10V6K C702 1 C703 2 0.1U_0402_10V6K 1 2 0.1U_0402_10V6K C704 1 C705 2 0.1U_0402_10V6K 1 2 0.1U_0402_10V6K C706 1 C707 2 0.1U_0402_10V6K 1 1 2 2 C708 0.1U_0402_10V6K +2.5V 0.1U_0402_10V6K C709 0.1U_0402_10V6K 1 C710 2 1 C711 2 1 C712 2 0.1U_0402_10V6K 1 1 2 2 C713 0.1U_0402_10V6K 0.1U_0402_10V6K +1.5VS +1.5VS 0.1U_0402_10V6K 0.1U_0402_10V6K 1 + C715 47U_B_6.3VM 2 C725 1 C726 2 0.1U_0402_10V6K 1 1 1 2 0.1U_0402_10V6K 2 C727 2 0.1U_0402_10V6K 1 C714 + C728 47U_B_6.3VM 2 C716 1 C717 2 0.1U_0402_10V6K 1 2 0.1U_0402_10V6K C718 1 C719 2 0.1U_0402_10V6K 1 2 C720 0.1U_0402_10V6K 1 C721 2 0.1U_0402_10V6K 1 2 C722 0.1U_0402_10V6K 1 C723 2 0.1U_0402_10V6K 1 2 1 C724 2 0.1U_0402_10V6K +1.5VS 0.1U_0402_10V6K +1.5VS C729 1 1 C730 0.1U_0402_10V6K 2 C731 1 2 2 0.1U_0402_10V6K @0.01U_0402_16V7Z 1 C733 2 0.1U_0402_10V6K 1 2 C734 0.1U_0402_10V6K 1 C735 2 0.1U_0402_10V6K 1 C736 2 0.1U_0402_10V6K 1 C737 1 2 2 0.1U_0402_10V6K C738 0.1U_0402_10V6K 1 C739 1 2 2 0.1U_0402_10V6K C740 0.1U_0402_10V6K 1 C741 1 2 2 0.1U_0402_10V6K C742 0.1U_0402_10V6K 1 C743 1 2 2 0.1U_0402_10V6K ATI request +1.5VS C744 C732 0.1U_0402_10V6K 1 C745 1 @0.01U_0402_16V7Z C746 1 C747 1 C748 @0.01U_0402_16V7Z 1 C749 1 C750 @0.01U_0402_16V7Z 1 C751 1 C752 A29 AB23 AB24 AB27 AB4 AB8 AC1 AC11 AC14 AC16 AC20 AC30 AD11 AD14 AD16 AD20 AD4 AE27 AF30 AF5 AG10 AG13 AG16 AG19 AG22 AG25 AG7 AH28 AH3 AJ1 AK13 AK2 AK22 AK29 AK4 AK7 B1 B16 B30 C19 C23 C27 C4 D21 D25 E3 E8 E9 F27 F4 F8 G14 G15 G18 G20 H14 H15 H18 H20 H27 H4 H8 J7 @0.01U_0402_16V7Z 1 1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS PART 6 OF 6 GND VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS R23 R7 R8 T12 T13 T14 T15 T16 T17 T18 T19 T27 T4 U15 U16 U7 U8 V15 V16 V27 V4 V7 V8 W15 W16 W27 Y1 Y23 Y24 Y30 Y4 Y7 Y8 R19 R18 R17 R16 R15 R14 R13 R12 R1 P4 P27 P16 P15 N8 N24 N23 N16 N15 M4 M27 M16 M15 L8 L7 L25 L24 L23 K4 K27 J8 D C CHS-216IGP9050A21_BGA718 B C753 2 2 2 2 2 2 2 2 2 2 @0.01U_0402_16V7Z @0.01U_0402_16V7Z @0.01U_0402_16V7Z @0.01U_0402_16V7Z @0.01U_0402_16V7Z +3VS AC22 AC9 H10 H22 +1.8VS CHS-216IGP9050A21_BGA718 +1.8VS +3VS 0.1U_0402_10V6K C754 10U_0805_10V4Z A 1 2 C755 1 C756 2 0.1U_0402_10V6K 1 2 C757 10U_0805_10V4Z 1 2 0.1U_0402_10V6K 1 2 C758 C759 0.1U_0402_10V6K 1 2 C760 0.1U_0402_10V6K 1 C761 1 C762 0.1U_0402_10V6K 1 C763 2 2 2 0.1U_0402_10V6K 0.1U_0402_10V6K 1 2 0.1U_0402_10V6K C764 1 C765 1 2 2 0.1U_0402_10V6K C766 0.1U_0402_10V6K 1 1 C767 2 2 0.1U_0402_10V6K A Title Compal Electronics, Inc. ATi RC300ML-Power(5/5) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 Rev 0.2 LA-2301 Thursday, April 08, 2004 Sheet 1 11 of 47 5 4 3 2 1 A_CBE#[0..3] 8,19 A_AD[0..31] A_CBE#[0..3] 8,19 A_AD[0..31] D D R674 1 A_AD31 R676 1 A_AD30 R679 1 R681 1 A_AD29 R683 1 2 2 2 10K_0402_5% 4.7K_0402_5% 2 1 D51 RB751V_SOD323 R678 1 10K_0402_5% 2 4.7K_0402_5% 2 1 D52 RB751V_SOD323 2 10K_0402_5% +3VS A_AD[31..30] : FSB CLK SPEED +3VS BSEL1 5,17 DEFAULT: 01 +3VS BSEL0 5,17 A_AD18 00: 100 MHZ 01: 133 MHZ 10: 200MHZ 11:166 MHZ 2@4.7K_0402_5% R677 1 24.7K_0402_5% A_AD18 : ENABLE PHASE CALIBRATION +3VS DEFAULT: 0 0: DISABLE 1:ENABLE A_AD29: STRAP CONFIGURATION A_AD17 DEFAULT:1 2@4.7K_0402_5% R675 1 R680 1 2@4.7K_0402_5% R682 1 24.7K_0402_5% A_AD25/A_AD17 : CPU VOLTAGE[1..0] +3VS DEFAULT: 0 00: 1.05V 01: 1.35V 11: 1.75V 10: 1.45V 0: REDUCEDE SET 1: FULL SET(internal Pull high) R684 1 A_AD28 R686 1 2 @10K_0402_5% +3VS A_AD28: SPREAD SPECTRUM ENABLE R685 1 DEFAULT:0 24.7K_0402_5% A_AD25 0: DISABLE 1: ENABLE R687 1 2 10K_0402_5% A_AD25/A_AD17 : CPU VOLTAGE[1..0] +3VS DEFAULT: 10 2@4.7K_0402_5% 00: 1.05V 01: 1.35V 11: 1.75V 10: 1.45V C R688 1 A_AD27 R689 1 R692 1 A_AD26 R693 1 A_AD24 R694 1 2 10K_0402_5% +3VS DEFAULT: 1 2@4.7K_0402_5% 2 10K_0402_5% +3VS 0: TEST MODE 1: NORMAL MODE A_AD26 : ENABLE IOQ 8,19 A_PAR A_PAR +3VS C R690 1 2@4.7K_0402_5% PAR: EXTENDED DEBUG MODE R691 1 24.7K_0402_5% +3VS DEFAULT : 1 0: DEBUG MODE 1: NORMAL DEFAULT: 1 2@4.7K_0402_5% 2 10K_0402_5% A_AD27: FrcShortReset# AD25=1 DESTOP CPU AD25=0 MOBILE CPU AD17--DON'T CARE 0: IOQ=1 1: IOQ=12 A_AD24 : MOBILE CPU SELECT DEFAULT: 1 0: BANIAS CPU 1: OTHER CPU R695 1 B A_AD23 R696 1 2 10K_0402_5% +3VS A_AD23 : CLOCK BYPASS DISABLE DEFAULT: 1 2@4.7K_0402_5% B 0: TEST MODE 1: NORMAL(internal Pull high) A_AD22 R697 1 2@4.7K_0402_5% A_AD22 : OSC PAD OUTPUT PCICLK DEFAULT : 1 0:PCICLK OUT 1: OSC CLK OUT R698 1 A_AD21 R699 1 2 10K_0402_5% +3VS A_AD21 : AUTO_CAL ENABLE DEFAULT : 1 2@4.7K_0402_5% 0: DISABLE 1: ENABLE A_AD20 R700 1 2@4.7K_0402_5% R701 1 24.7K_0402_5% +3VS A_AD20 : INTERNAL CLK GEN ENABLE DEFAULT : 0 0: DISABLE 1: ENABLE A A Title Compal Electronics, Inc. ATi RC300ML-SYS. CONFIG. THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 Rev 0.2 LA-2301 Thursday, April 08, 2004 Sheet 1 12 of 47 5 4 3 2 1 +2.5V +2.5V +2.5V JP3 DDR_DQ1 DDR_DQ5 DDR_DQS0 DDR_DQ6 DDR_DQ2 DDR_DQ8 D DDR_DQ12 DDR_DQS1 DDR_DQ14 DDR_DQ15 9 9 DDR_CLK3 DDR_CLK3# DDR_DQ20 DDR_DQ16 DDR_DQS2 DDR_DQ18 DDR_DQ22 DDR_DQ24 DDR_DQ29 DDR_DQS3 DDR_DQ[0..63] DDR_DQS[0..7] C DDR_DM[0..7] DDR_SMA[0..13] DDR_DQ[0..63] 9,14,16 DDR_DQS[0..7] 9,14,16 DDR_DM[0..7] 9,14,16 DDR_SMA[0..13] DDR_DQ26 DDR_DQ30 9,14,15,16 RP112 10_0804_8P4R_5% 5 4 DDR_CKE3 DDR_SMA12 6 3 DDR_SMAA12 DDR_SMA9 7 2 DDR_SMAA9 DDR_SMA7 8 1 DDR_SMAA7 9,16 DDR_SCKE3 DDR_SMA5 DDR_SMA3 DDR_SMA1 DDR_SMA10 5 6 7 8 4 3 2 1 DDR_SMAA5 DDR_SMAA3 DDR_SMAA1 DDR_SMAA10 RP113 10_0804_8P4R_5% 5 4 6 3 7 2 DDR_SMA13 8 1 9,14,15,16 DDR_SBA0 9,14,15,16 DDR_SWE# 9,16 DDR_SCS#2 B RP115 10_0804_8P4R_5% DDR_BA0 DDR_WE# DDR_CS#2 DDR_SMAA13 DDR_DQ33 DDR_DQ36 DDR_DQS4 DDR_DQ38 DDR_DQ39 DDR_DQ45 DDR_DQ40 DDR_DQS5 DDR_DQ46 DDR_DQ43 DDR_DQ52 DDR_DQ49 DDR_DQS6 DDR_DQ50 DDR_DQ51 DDR_DQ60 A Layout note Place these resistors close to DIMM0, all trace length<500 mil DDR_DQ61 DDR_DQS7 DDR_DQ62 DDR_DQ58 17,20 SM_DATA_SB 17,20 SM_CLK_SB +3VS 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 VREF VSS DQ0 DQ1 VDD DQS0 DQ2 VSS DQ3 DQ8 VDD DQ9 DQS1 VSS DQ10 DQ11 VDD CK0 CK0# VSS DQ16 DQ17 VDD DQS2 DQ18 VSS DQ19 DQ24 VDD DQ25 DQS3 VSS DQ26 DQ27 VDD CB0 CB1 VSS DQS8 CB2 VDD CB3 DU VSS CK2 CK2# VDD CKE1 DU/A13 A12 A9 VSS A7 A5 A3 A1 VDD A10/AP BA0 WE# S0# A13 VSS DQ32 DQ33 VDD DQS4 DQ34 VSS DQ35 DQ40 VDD DQ41 DQS5 VSS DQ42 DQ43 VDD VDD VSS VSS DQ48 DQ49 VDD DQS6 DQ50 VSS DQ51 DQ56 VDD DQ57 DQS7 VSS DQ58 DQ59 VDD SDA SCL VDD_SPD VDD_ID VREF VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7 DQ12 VDD DQ13 DM1 VSS DQ14 DQ15 VDD VDD VSS VSS DQ20 DQ21 VDD DM2 DQ22 VSS DQ23 DQ28 VDD DQ29 DM3 VSS DQ30 DQ31 VDD CB4 CB5 VSS DM8 CB6 VDD CB7 DU/RESET# VSS VSS VDD VDD CKE0 DU/BA2 A11 A8 VSS A6 A4 A2 A0 VDD BA1 RAS# CAS# S1# DU VSS DQ36 DQ37 VDD DM4 DQ38 VSS DQ39 DQ44 VDD DQ45 DM5 VSS DQ46 DQ47 VDD CK1# CK1 VSS DQ52 DQ53 VDD DM6 DQ54 VSS DQ55 DQ60 VDD DQ61 DM7 VSS DQ62 DQ63 VDD SA0 SA1 SA2 NC.TEST 1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 DDR_DQ4 DDR_DQ0 R702 1K_0603_1% C768 0.1U_0402_10V6K 2 +DDR_VREF0 DDR_DM0 DDR_DQ3 1 DDR_DQ7 DDR_DQ9 2 R703 1K_0603_1% C769 0.1U_0402_10V6K D DDR_DQ13 DDR_DM1 DDR_DQ10 DDR_DQ11 DDR_DQ17 DDR_DQ21 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 DDR_DM2 DDR_DQ23 DDR_DQ19 DDR_DQ28 DDR_DQ25 DDR_DM3 DDR_DQ27 DDR_DQ31 C DDR_CKE2 DDR_SMAA11 DDR_SMAA8 DDR_SMAA6 DDR_SMAA4 DDR_SMAA2 DDR_SMAA0 DDR_BA1 DDR_RAS# DDR_CAS# DDR_CS#3 DDR_DQ32 DDR_DQ37 RP117 10_0804_8P4R_5% 5 4 6 3 7 2 DDR_SMA11 8 1 DDR_SMA8 5 6 7 8 4 3 2 1 DDR_SCKE2 9,16 DDR_SMA6 DDR_SMA4 DDR_SMA2 DDR_SMA0 RP116 10_0804_8P4R_5% 5 4 6 3 7 2 8 1 DDR_SBA1 9,14,15,16 DDR_SRAS# 9,14,15,16 DDR_SCAS# 9,14,15,16 DDR_SCS#3 9,16 B RP114 10_0804_8P4R_5% DDR_DM4 DDR_DQ35 DDR_DQ34 DDR_DQ44 DDR_DQ41 DDR_DM5 DDR_DQ47 DDR_DQ42 DDR_CLK4# 9 DDR_CLK4 9 DDR_DQ48 DDR_DQ53 DDR_DM6 DDR_DQ55 DDR_DQ54 DDR_DQ57 Layout note Place these resistor close by DIMM0, all trace length Max=1.4" DDR_DQ56 DDR_DM7 DDR_DQ63 DDR_DQ59 +3VS A THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Compal Electronics, Inc. Title DDR-SODIMM SLOT0 TYCO_1-1612781-1 Size Document Number Rev 0.2 LA-2301 Date: 5 4 3 2 Thursday, April 08, 2004 Sheet 1 13 of 47 9,13,15,16 DDR_SMA[0..13] 1 C150 DDR_SMA[0..13] 2 R164 1K_0603_1% 1 1 C151 @0.01U_0402_16V7Z 9,13,16 DDR_DQS[0..7] C152 0.1U_0402_10V6K 2 9,13,16 DDR_DM[0..7] 9,13,15,16 DDR_SRAS# 9,13,15,16 DDR_SCAS# 9,13,15,16 DDR_SWE# 2 2 9,13,16 DDR_DQ[0..63] D 8 7 6 5 1 2 3 4 DQ1 DQ5 DQ4 DQ0 DDR_DM0 10_0804_8P4R_5% DDR_DQS0 1 DQS0 2 R166 10_0402_5% RP5 DDR_DQ6 DQ6 8 1 DDR_DQ2 DQ2 7 2 DDR_DQ8 DQ8 6 3 DDR_DQ12 DQ12 5 4 1 R168 RP9 DDR_DQ3 5 DDR_DQ7 6 DDR_DQ9 7 DDR_DQ13 8 +2.5V 10_0804_8P4R_5% DDR_DM1 1 DM1 2 R172 10_0402_5% 8 7 6 5 1 1 2 3 4 DQ20 DQ16 DQ17 DQ21 10_0804_8P4R_5% DDR_DQS2 DQS2 1 2 R176 10_0402_5% RP12 DDR_DQ18 DQ18 8 1 DDR_DQ22 DQ22 7 2 DDR_DQ24 DQ24 6 3 DDR_DQ28 DQ28 5 4 DQS0 DM0 DQ4 DQ0 DQ3 DQ7 DQ1 DQ5 DQ6 DQ2 16 20 2 4 5 7 8 10 11 13 LDQS0 LDM1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQS1 DM1 DQ9 DQ13 DQ14 DQ15 DQ8 DQ12 DQ10 DQ11 51 47 54 56 57 59 60 62 63 65 UDQS0 UDM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 49 VREF +DDR_VREF1 RP14 DDR_DQ20 DDR_DQ16 DDR_DQ17 DDR_DQ21 DDR_DM2 1 R174 DDR_DQ23 DDR_DQ19 DDR_DQ29 DDR_DQ25 5 6 7 8 C157 0.1U_0402_10V6K DM2 2 10_0402_5% RP15 DQ23 4 DQ19 3 DQ29 2 DQ25 1 2 Close pin49 10_0804_8P4R_5% DM3 1 2 R180 10_0402_5% DDR_DM3 +2.5V U3 10_0804_8P4R_5% C DDR_CLK0# 9,15 DDR_CLK0# 1st Bank DDR_SRAS# DDR_SCAS# DDR_SWE# DDR_CLK0 DDR_CLK0 R163 120_0402_5% DDR_CKE0 1 2 R806 10_0402_5% DDR_CLK1 DDR_CLK1# 9,15 DDR_CLK1 9,15 DDR_CLK1# DDR_DM[0..7] 9,15 DDR_SBA0 DDR_SBA1 DDR_CS#0 1 2 R805 10_0402_5% 9,13,15,16 DDR_SBA0 9,13,15,16 DDR_SBA1 9,16 DDR_SCS#0 15 DDR_DQS[0..7] DQ3 DQ7 DQ9 DQ13 10_0804_8P4R_5% DDR_DQS1 1 DQS1 2 R170 10_0402_5% RP7 DDR_DQ14 8 DQ14 1 DDR_DQ15 7 DQ15 2 DDR_DQ10 6 DQ10 3 DDR_DQ11 5 DQ11 4 15 9,16 DDR_SCKE0 DM0 2 10_0402_5% 4 3 2 1 1 DM[0..7] 15 DDR_DQ[0..63] RP3 DDR_DQ1 DDR_DQ5 DDR_DQ4 DDR_DQ0 DQS[0..7] DM[0..7] +DDR_VREF1 1K_0603_1% DQ[0..63] DQS[0..7] 1 R165 2 DQ[0..63] 2 0.1U_0402_10V6K 1 +2.5V 3 2 4 1 5 DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12 29 30 31 32 35 36 37 38 39 40 28 41 42 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AP/A10 A11 A12 D U4 1 C153 1 C155 1 C775 1 C777 VDD0 VDD1 VDD2 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 1 18 33 3 9 15 55 61 NC0 NC1 NC2 NC3 NC4 NC5 NC6 14 17 19 25 43 50 53 CK CK# CKE 45 46 44 DDR_CLK0 DDR_CLK0# DDR_CKE0 BA0 BA1 26 27 DDR_SBA0 DDR_SBA1 CS# RAS# CAS# WE# 24 23 22 21 DDR_CS#0 DDR_SRAS# DDR_SCAS# DDR_SWE# VSSQ0 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSS0 VSS1 VSS2 6 12 52 58 64 34 48 66 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K DQS2 DM2 DQ17 DQ21 DQ23 DQ19 DQ20 DQ16 DQ18 DQ22 16 20 2 4 5 7 8 10 11 13 LDQS0 LDM1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQS3 DM3 DQ29 DQ25 DQ27 DQ31 DQ24 DQ28 DQ26 DQ30 51 47 54 56 57 59 60 62 63 65 UDQS0 UDM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 49 VREF DDR_SMA13 +DDR_VREF1 DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12 1 C158 0.1U_0402_10V6K 2 Close pin49 29 30 31 32 35 36 37 38 39 40 28 41 42 K4H561638F-TC/LB3_TSOPII66 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AP/A10 A11 A12 1 C154 1 C156 1 C776 1 C778 VDD0 VDD1 VDD2 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 1 18 33 3 9 15 55 61 NC0 NC1 NC2 NC3 NC4 NC5 NC6 14 17 19 25 43 50 53 CK CK# CKE 45 46 44 BA0 BA1 26 27 DDR_SBA0 DDR_SBA1 CS# RAS# CAS# WE# 24 23 22 21 DDR_CS#0 DDR_SRAS# DDR_SCAS# DDR_SWE# VSSQ0 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSS0 VSS1 VSS2 6 12 52 58 64 34 48 66 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K DDR_SMA13 DDR_CLK0 DDR_CLK0# DDR_CKE0 C K4H561638F-TC/LB3_TSOPII66 10_0804_8P4R_5% DDR_DQS3 DQS3 1 2 R178 10_0402_5% +2.5V +2.5V RP17 DDR_DQ26 DDR_DQ30 DDR_DQ27 DDR_DQ31 8 7 6 5 1 2 3 4 DQ26 DQ30 DQ27 DQ31 U5 DQS4 DM4 DQ33 DQ36 DQ35 DQ34 DQ32 DQ37 DQ38 DQ39 10_0804_8P4R_5% RP4 B DDR_DQ33 DDR_DQ36 DDR_DQ32 DDR_DQ37 8 7 6 5 1 2 3 4 DQ33 DQ36 DQ32 DQ37 10_0804_8P4R_5% DDR_DQS4 DQS4 1 2 R167 10_0402_5% RP6 DDR_DQ38 DQ38 8 1 DDR_DQ39 DQ39 7 2 DDR_DQ45 DQ45 6 3 DDR_DQ40 DQ40 5 4 10_0804_8P4R_5% DDR_DQS5 DQS5 1 2 R173 10_0402_5% DDR_DQS6 DQS6 2 10_0402_5% 1 R175 RP18 DDR_DQ50 DDR_DQ51 DDR_DQ60 DDR_DQ61 A 8 7 6 5 DQ50 DQ51 DQ60 DQ61 1 2 3 4 10_0804_8P4R_5% DDR_DQS7 DQS7 1 2 R181 10_0402_5% RP16 DDR_DQ62 DQ62 8 1 DDR_DQ58 DQ58 7 2 DDR_DQ63 DQ63 6 3 DDR_DQ59 DQ59 5 4 DDR_DM4 DDR_DQ35 DDR_DQ34 DDR_DQ44 DDR_DQ41 DM4 1 2 R169 10_0402_5% RP10 DQ35 5 4 DQ34 6 3 DQ44 7 2 DQ41 8 1 DQS5 DM5 DQ44 DQ41 DQ46 DQ43 DQ45 DQ40 DQ47 DQ42 10_0804_8P4R_5% DM5 1 2 R171 10_0402_5% RP8 DDR_DQ46 DQ46 5 4 DDR_DQ43 DQ43 6 3 DDR_DQ47 DQ47 7 2 DDR_DQ42 DQ42 8 1 DDR_DM5 DDR_DQ52 DDR_DQ49 DDR_DQ48 DDR_DQ53 10_0804_8P4R_5% RP13 5 4 6 3 7 2 8 1 +DDR_VREF1 1 DQ52 DQ49 DQ48 DQ53 C163 0.1U_0402_10V6K 10_0804_8P4R_5% DDR_DM6 DM6 1 2 R177 10_0402_5% RP11 DDR_DQ55 DQ55 5 4 DDR_DQ54 DQ54 6 3 DDR_DQ57 DQ57 7 2 DDR_DQ56 DQ56 8 1 DDR_DM7 Close pin49 2 DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12 16 20 2 4 5 7 8 10 11 13 LDQS0 LDM1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 51 47 54 56 57 59 60 62 63 65 UDQS0 UDM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 49 VREF 29 30 31 32 35 36 37 38 39 40 28 41 42 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AP/A10 A11 A12 U6 1 C159 1 C161 1 C779 1 C781 VDD0 VDD1 VDD2 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 1 18 33 3 9 15 55 61 NC0 NC1 NC2 NC3 NC4 NC5 NC6 14 17 19 25 43 50 53 CK CK# CKE 45 46 44 DDR_CLK1 DDR_CLK1# DDR_CKE0 BA0 BA1 26 27 DDR_SBA0 DDR_SBA1 CS# RAS# CAS# WE# 24 23 22 21 DDR_CS#0 DDR_SRAS# DDR_SCAS# DDR_SWE# VSSQ0 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSS0 VSS1 VSS2 6 12 52 58 64 34 48 66 DQS6 DM6 DQ52 DQ49 DQ55 DQ54 DQ48 DQ53 DQ50 DQ51 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K DDR_SMA13 DQS7 DM7 DQ57 DQ56 DQ62 DQ58 DQ60 DQ61 DQ63 DQ59 +DDR_VREF1 1 C164 0.1U_0402_10V6K Close pin49 2 DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12 K4H561638F-TC/LB3_TSOPII66 LDQS0 LDM1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 51 47 54 56 57 59 60 62 63 65 UDQS0 UDM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 49 VREF 29 30 31 32 35 36 37 38 39 40 28 41 42 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AP/A10 A11 A12 1 C160 1 C162 1 C780 1 C782 VDD0 VDD1 VDD2 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 1 18 33 3 9 15 55 61 NC0 NC1 NC2 NC3 NC4 NC5 NC6 14 17 19 25 43 50 53 CK CK# CKE 45 46 44 DDR_CLK1 DDR_CLK1# DDR_CKE0 BA0 BA1 26 27 DDR_SBA0 DDR_SBA1 CS# RAS# CAS# WE# 24 23 22 21 DDR_CS#0 DDR_SRAS# DDR_SCAS# DDR_SWE# VSSQ0 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSS0 VSS1 VSS2 6 12 52 58 64 34 48 66 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K Title A Compal Electronics, Inc. DDR(256Mb)X4-TOP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.2 LA-2331 Date: 5 4 3 2 Thursday, April 08, 2004 B DDR_SMA13 K4H561638F-TC/LB3_TSOPII66 10_0804_8P4R_5% DM7 1 2 R179 10_0402_5% 10_0804_8P4R_5% 16 20 2 4 5 7 8 10 11 13 Sheet 1 14 of 47 5 4 3 2 9,14 DQ[0..63] 14 DQ[0..63] DM[0..7] 14 DM[0..7] 9,13,14,16 DDR_SRAS# 9,13,14,16 DDR_SCAS# 9,13,14,16 DDR_SWE# 1 R808 9,16 DDR_SCKE1 DQS[0..7] 14 DQS[0..7] DDR_SRAS# DDR_SCAS# DDR_SWE# 2 DDR_CS#1 10_0402_5% R182 120_0402_5% 2 DDR_CKE1 10_0402_5% DDR_CLK1# 9,14 DDR_CLK1# DDR_CLK0 DDR_CLK0# 9,14 DDR_CLK0 9,14 DDR_CLK0# DDR_CLK1 1 DDR_SBA0 DDR_SBA1 1 R807 9,13,14,16 DDR_SBA0 9,13,14,16 DDR_SBA1 9,16 DDR_SCS#1 2 DDR_SMA[0..13] 9,13,14,16 DDR_SMA[0..13] D 1 DDR_CLK1 D +2.5V +2.5V 2nd Bank U7 U8 DQS3 DM3 DQ30 DQ26 DQ28 DQ24 DQ31 DQ27 DQ25 DQ29 +2.5V 2 C171 0.1U_0402_10V6K C 1 DQS2 DM2 DQ22 DQ18 DQ16 DQ20 DQ19 DQ23 DQ21 DQ17 +DDR_VREF1 DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12 16 20 2 4 5 7 8 10 11 13 LDQS0 LDM1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 51 47 54 56 57 59 60 62 63 65 UDQS0 UDM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 49 VREF 29 30 31 32 35 36 37 38 39 40 28 41 42 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AP/A10 A11 A12 1 C166 1 C168 1 C784 1 C786 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K VDD0 VDD1 VDD2 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 1 18 33 3 9 15 55 61 NC0 NC1 NC2 NC3 NC4 NC5 NC6 14 17 19 25 43 50 53 CK CK# CKE 45 46 44 DDR_CLK0 DDR_CLK0# DDR_CKE1 2 BA0 BA1 26 27 DDR_SBA0 DDR_SBA1 1 CS# RAS# CAS# WE# 24 23 22 21 DDR_CS#1 DDR_SRAS# DDR_SCAS# DDR_SWE# VSSQ0 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSS0 VSS1 VSS2 6 12 52 58 64 34 48 66 DDR_SMA13 DDR_CLK0 +2.5V 2 C172 @1.5P_0402_50V8C C170 0.1U_0402_10V6K 1 DQS1 DM1 DQ11 DQ10 DQ12 DQ8 DQ15 DQ14 DQ13 DQ9 16 20 2 4 5 7 8 10 11 13 LDQS0 LDM1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQS0 DM0 DQ2 DQ6 DQ5 DQ1 DQ7 DQ3 DQ0 DQ4 51 47 54 56 57 59 60 62 63 65 UDQS0 UDM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 49 VREF 29 30 31 32 35 36 37 38 39 40 28 41 42 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AP/A10 A11 A12 +DDR_VREF1 DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12 DDR_CLK0# Close to U8 pin5 and 6. Close pin49 1 C165 1 C167 1 C783 1 C785 VDD0 VDD1 VDD2 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 1 18 33 3 9 15 55 61 NC0 NC1 NC2 NC3 NC4 NC5 NC6 14 17 19 25 43 50 53 CK CK# CKE 45 46 44 DDR_CLK0 DDR_CLK0# DDR_CKE1 BA0 BA1 26 27 DDR_SBA0 DDR_SBA1 CS# RAS# CAS# WE# 24 23 22 21 DDR_CS#1 DDR_SRAS# DDR_SCAS# DDR_SWE# VSSQ0 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSS0 VSS1 VSS2 6 12 52 58 64 34 48 66 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K DDR_SMA13 DDR_CLK0 2 1 C169 @1.5P_0402_50V8C DDR_CLK0# C Close to U7 pin5 and 6. K4H561638F-TC/LB3_TSOPII66 K4H561638F-TC/LB3_TSOPII66 +2.5V +2.5V U9 U10 B +2.5V 2 C180 0.1U_0402_10V6K 1 DQS7 DM7 DQ59 DQ63 DQ61 DQ60 DQ58 DQ62 DQ56 DQ57 16 20 2 4 5 7 8 10 11 13 LDQS0 LDM1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQS6 DM6 DQ51 DQ50 DQ53 DQ48 DQ54 DQ55 DQ49 DQ52 51 47 54 56 57 59 60 62 63 65 UDQS0 UDM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 +DDR_VREF1 DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12 A 49 VREF 29 30 31 32 35 36 37 38 39 40 28 41 42 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AP/A10 A11 A12 1 C174 1 C176 1 C788 1 C790 VDD0 VDD1 VDD2 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 1 18 33 3 9 15 55 61 NC0 NC1 NC2 NC3 NC4 NC5 NC6 14 17 19 25 43 50 53 CK CK# CKE 45 46 44 DDR_CLK1 DDR_CLK1# DDR_CKE1 BA0 BA1 26 27 DDR_SBA0 DDR_SBA1 CS# RAS# CAS# WE# 24 23 22 21 DDR_CS#1 DDR_SRAS# DDR_SCAS# DDR_SWE# VSSQ0 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSS0 VSS1 VSS2 6 12 52 58 64 34 48 66 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K DDR_SMA13 DDR_CLK1 +2.5V 2 2 1 C179 @1.5P_0402_50V8C C178 0.1U_0402_10V6K 1 DQS5 DM5 DQ42 DQ47 DQ40 DQ45 DQ43 DQ46 DQ41 DQ44 16 20 2 4 5 7 8 10 11 13 LDQS0 LDM1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQS4 DM4 DQ39 DQ38 DQ37 DQ32 DQ34 DQ35 DQ36 DQ33 51 47 54 56 57 59 60 62 63 65 UDQS0 UDM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 49 VREF +DDR_VREF1 DDR_CLK1# Close to U10 pin5 and 6. Close pin49 DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12 29 30 31 32 35 36 37 38 39 40 28 41 42 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AP/A10 A11 A12 1 C173 1 C175 1 C787 1 C789 VDD0 VDD1 VDD2 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 1 18 33 3 9 15 55 61 NC0 NC1 NC2 NC3 NC4 NC5 NC6 14 17 19 25 43 50 53 CK CK# CKE 45 46 44 BA0 BA1 26 27 DDR_SBA0 DDR_SBA1 CS# RAS# CAS# WE# 24 23 22 21 DDR_CS#1 DDR_SRAS# DDR_SCAS# DDR_SWE# VSSQ0 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSS0 VSS1 VSS2 6 12 52 58 64 34 48 66 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K B DDR_SMA13 DDR_CLK1 2 DDR_CLK1 DDR_CLK1# DDR_CKE1 1 C177 @1.5P_0402_50V8C DDR_CLK1# Close to U9 pin5 and 6. A K4H561638F-TC/LB3_TSOPII66 K4H561638F-TC/LB3_TSOPII66 Title Compal Electronics, Inc. DDR(256Mb)X4-BTN THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.2 LA-2331 Date: 5 4 3 2 Thursday, April 08, 2004 Sheet 1 15 of 47 5 4 3 2 9,13,14 DDR_DM[0..7] DDR_DM[0..7] DDR_DQS[0..7] 9,13,14 DDR_DQS[0..7] DDR_SCKE[0..3] 9,13,14,15 DDR_SCKE[0..3] DDR_DQ[0..63] 9,13,14 DDR_DQ[0..63] DDR_SMA[0..13] 9,13,14,15 DDR_SMA[0..13] 1 +1.25VS +1.25VS +1.25VS DDR_SCKE1 2 33_0402_5% DDR_SCKE0 2 33_0402_5% DDR_SCKE2 2 33_0402_5% D RP41 1 R203 1 R202 1 R201 2 1 C185 0.1U_0402_10V6K 4 3 2 1 2 1 C193 0.1U_0402_10V6K 2 1 C194 0.1U_0402_10V6K DDR_DQ1 DDR_DQ5 DDR_DQ4 DDR_DQ0 2 1 C188 0.1U_0402_10V6K 5 6 7 8 RP62 9,13,14,15 DDR_SBA1 9,13,14,15 DDR_SRAS# 5 6 7 8 4 3 2 1 2 1 C199 0.1U_0402_10V6K 2 1 C200 0.1U_0402_10V6K RP43 9,13,14,15 9,15 9,14 9,13 DDR_SCAS# DDR_SCS#1 DDR_SCS#0 DDR_SCS#3 DDR_SCAS# DDR_SCS#1 DDR_SCS#0 DDR_SCS#3 5 6 7 8 4 3 2 1 2 1 C205 0.1U_0402_10V6K 2 1 C206 0.1U_0402_10V6K C DDR_DQ20 DDR_DQ16 DDR_DQ17 DDR_DQ21 RP59 8 7 6 5 1 2 3 4 33_0804_8P4R_5% RP54 DDR_SMA5 8 1 DDR_SMA3 7 2 DDR_SMA1 6 3 DDR_SMA10 5 4 9,13,14,15 DDR_SBA0 9,13,14,15 DDR_SWE# 9,13 DDR_SCS#2 33_0804_8P4R_5% RP51 DDR_SBA0 8 1 DDR_SWE# 7 2 DDR_SCS#2 6 3 DDR_SMA13 5 4 2 1 C189 0.1U_0402_10V6K 2 1 C191 0.1U_0402_10V6K 56_0804_8P4R_5% RP47 5 4 6 3 7 2 8 1 2 1 C195 0.1U_0402_10V6K 2 1 C197 0.1U_0402_10V6K 56_0804_8P4R_5% RP49 5 4 6 3 7 2 8 1 2 1 C201 0.1U_0402_10V6K 2 1 C203 0.1U_0402_10V6K 56_0804_8P4R_5% RP52 5 4 6 3 7 2 8 1 2 1 C207 0.1U_0402_10V6K 2 1 C209 0.1U_0402_10V6K 56_0804_8P4R_5% RP55 5 4 6 3 7 2 8 1 2 1 C212 0.1U_0402_10V6K 2 1 C215 0.1U_0402_10V6K 56_0804_8P4R_5% RP57 5 4 6 3 7 2 8 1 2 1 C217 0.1U_0402_10V6K 2 1 C220 0.1U_0402_10V6K 56_0804_8P4R_5% RP60 5 4 6 3 7 2 8 1 2 1 C223 0.1U_0402_10V6K 2 1 C226 0.1U_0402_10V6K 56_0804_8P4R_5% RP63 5 4 6 3 7 2 8 1 2 1 C228 0.1U_0402_10V6K 2 1 C230 0.1U_0402_10V6K 56_0804_8P4R_5% RP65 5 4 6 3 7 2 8 1 2 1 C232 0.1U_0402_10V6K 2 1 C234 0.1U_0402_10V6K DDR_DQ14 DDR_DQ15 DDR_DQ10 DDR_DQ11 33_0804_8P4R_5% DDR_SCKE3 DDR_SMA12 DDR_SMA9 DDR_SMA7 56_0804_8P4R_5% RP44 5 4 6 3 7 2 8 1 DDR_DQ9 DDR_DQ13 DDR_DM1 DDR_DQS1 33_0804_8P4R_5% 2 1 C211 0.1U_0402_10V6K 2 1 C214 0.1U_0402_10V6K DDR_DQS2 DDR_DM2 DDR_DQ18 DDR_DQ22 2 1 C219 0.1U_0402_10V6K 2 1 C222 0.1U_0402_10V6K DDR_DQ23 DDR_DQ19 DDR_DQ24 DDR_DQ28 2 1 C225 0.1U_0402_10V6K 33_0804_8P4R_5% DDR_DQ29 DDR_DQ25 DDR_DQS3 DDR_DM3 B DDR_DQ26 DDR_DQ30 DDR_DQ27 DDR_DQ31 RP50 2 1 C183 0.1U_0402_10V6K 2 1 C186 0.1U_0402_10V6K DDR_DQ3 DDR_DQ7 DDR_DQ8 DDR_DQ12 33_0804_8P4R_5% DDR_SMA2 DDR_SMA0 DDR_SBA1 DDR_SRAS# 4 3 2 1 DDR_DM0 DDR_DQS0 DDR_DQ6 DDR_DQ2 RP46 DDR_SMA8 DDR_SMA11 DDR_SMA6 DDR_SMA4 5 6 7 8 DDR_DQ33 DDR_DQ36 DDR_DQ32 DDR_DQ37 5 6 7 8 2 1 C190 0.1U_0402_10V6K 2 1 C192 0.1U_0402_10V6K 56_0804_8P4R_5% RP42 5 4 6 3 7 2 8 1 2 1 C196 0.1U_0402_10V6K 2 1 C198 0.1U_0402_10V6K 56_0804_8P4R_5% RP45 5 4 6 3 7 2 8 1 2 1 C202 0.1U_0402_10V6K 2 1 C204 0.1U_0402_10V6K 56_0804_8P4R_5% RP48 5 4 6 3 7 2 8 1 2 1 C208 0.1U_0402_10V6K 2 1 C210 0.1U_0402_10V6K DDR_DQ35 DDR_DQ34 DDR_DQ45 DDR_DQ40 DDR_DQ44 DDR_DQ41 DDR_DQS5 DDR_DM5 DDR_DQ46 DDR_DQ43 DDR_DQ47 DDR_DQ42 56_0804_8P4R_5% RP56 5 4 6 3 7 2 8 1 DDR_DQ52 DDR_DQ49 DDR_DQ48 DDR_DQ53 DDR_DQ55 DDR_DQ54 DDR_DQ60 DDR_DQ61 1 + C771 100U_D2_10VM 2 2 1 C213 0.1U_0402_10V6K 2 1 C216 0.1U_0402_10V6K 2 1 C218 0.1U_0402_10V6K 2 1 C221 0.1U_0402_10V6K 56_0804_8P4R_5% RP61 5 4 6 3 7 2 8 1 2 1 C224 0.1U_0402_10V6K 2 1 C227 0.1U_0402_10V6K 56_0804_8P4R_5% RP64 5 4 6 3 7 2 8 1 2 1 C229 0.1U_0402_10V6K 2 1 C231 0.1U_0402_10V6K DDR_DQ57 DDR_DQ56 DDR_DM7 DDR_DQS7 56_0804_8P4R_5% RP66 5 4 6 3 7 2 8 1 DDR_DQ62 DDR_DQ58 DDR_DQ63 DDR_DQ59 D C 56_0804_8P4R_5% RP58 5 4 6 3 7 2 8 1 DDR_DM6 DDR_DQS6 DDR_DQ50 DDR_DQ51 56_0804_8P4R_5% + 2 1 C184 0.1U_0402_10V6K 2 1 C187 0.1U_0402_10V6K 56_0804_8P4R_5% RP53 DDR_DQS4 5 4 DDR_DM4 6 3 DDR_DQ38 7 2 DDR_DQ39 8 1 B 2 1 C233 0.1U_0402_10V6K 2 1 C235 0.1U_0402_10V6K 56_0804_8P4R_5% +2.5V 1 4 3 2 1 C236 100U_D2_10VM 2 1 2 C237 0.1U_0402_10V6K 1 2 C238 0.1U_0402_10V6K 1 2 1 C239 0.1U_0402_10V6K 2 C240 0.1U_0402_10V6K 1 2 C241 0.1U_0402_10V6K 1 2 C242 0.1U_0402_10V6K 1 2 C243 0.1U_0402_10V6K 1 2 C244 0.1U_0402_10V6K 1 2 C245 0.1U_0402_10V6K 1 2 C246 0.1U_0402_10V6K +2.5V A 1 1 + + C772 100U_D2_10VM 2 C247 100U_D2_10VM 2 1 2 C248 0.1U_0402_10V6K 1 2 C249 0.1U_0402_10V6K 1 2 1 C250 0.1U_0402_10V6K 2 C251 0.1U_0402_10V6K 1 2 C252 0.1U_0402_10V6K 1 2 C253 0.1U_0402_10V6K 1 2 C254 0.1U_0402_10V6K 1 2 C255 0.1U_0402_10V6K 1 2 C256 0.1U_0402_10V6K 1 2 C257 A 0.1U_0402_10V6K Title Compal Electronics, Inc. DDR-SODIMM Decoupling THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.2 LA-2301 Date: 5 4 3 2 Thursday, April 08, 2004 Sheet 1 16 of 47 A B C D +3VS E C258 10U_0805_10V4Z 1 1 1 1 1 C259 0.1U_0402_10V6K 2 C260 0.1U_0402_10V6K 2 C261 0.1U_0402_10V6K 2 C262 0.1U_0402_10V6K 2 C263 0.1U_0402_10V6K 2 2 +3VS_VDDA 1 +3VS_CLK L7 1 2 CHB2012U121_0805 +3VS_VDDA 1 C259 close U11 pin 42 as posible C260 close U11 pin 48 as posible C261 close U11 pin 30 as posible C262 close U11 pin 19 as posible C263 close U11 pin 13 as posible 2 XTALOUT XTALIN 14.31818MHz_20P_1BX14318BE1A C269 10P_0402_50V8K C270 10P_0402_50V8K 2 C265 0.1U_0402_10V6K 2 1 C266 0.1U_0402_10V6K 2 1 C267 0.1U_0402_10V6K 2 C265 close U11 pin 1 as posible close U11 pin 9 as posible C267 close U11 pin 29 as posible C268 close U11 pin 36 as posible C264 C266 10U_0805_10V4Z 7 VDDA 36 +3VS_VDDA Termination R close U11 as possible. XOUT +3VS VSSA 37 CPUT0 40 VSSA EXT_CPU CLK_EXT_CPU 2 33_0402_5% 1 R205 CLK_EXT_CPU 4 1 2 CLK_EXT_CPU R208 R209 5,19,44 PM_STPCPU# 19 PM_STPPCI# R732 1 R733 1 CLK_EXT_CPU# SCLK SDATA 2 10K_0402_5% 1 10K_0402_5% 35 34 13,20 SM_CLK_SB 13,20 SM_DATA_SB VTT_PWRGD 20,22 VTT_PWRGD 2@0_0402_5% 2@0_0402_5% 2 10 45 12 26 11 PCI33/66# CPUC0 39 EXT_CPU# CPUT1 44 EXT_NB VTTPWRGD/PD# CPU_STP# PCI_STOP# 24/48#SEL PCI33/66#SEL 20 CLK_EXT_48M 24 CLK_EXT_SD48 10 REFCLK1_NB 32 CLK_SIO_14M 20 CLK_SB_14M 43 EXT_NB# SDRAMOUT 47 EXT_MEM66M 1 1 R217 2 2 33_0402_5% 33_0402_5% R221 1 CLK_SIO_14M R222 1 R226 1 2 68_0402_5% 2 33_0402_5% 2 33_0402_5% R219 1 2 33_0402_5% EXT_48M 27 EXT_SD48 28 AGPCLK0 AGPCLK1 32 31 EXT_AGP66M FS3/PCICLK_F0 FS4/PCICLK_F1 14 15 FS2 FS1 FS0 4 3 2 CLK_IREF 38 PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 16 17 20 21 22 23 48MHz_1 48MHz_0 FS2/REF2 FS1/REF1 FS0/REF0 IREF R225 2 49.9_0402_1% 2 49.9_0402_1% 1 R212 1 R213 2 49.9_0402_1% 2 49.9_0402_1% CLK_EXT_NB 10 1 R214 1 R215 1 R218 CLK_EXT_NB# 2 CLK_EXT_NB# 10 33_0402_5% 2 CLK_EXT_MEM66 10 33_0402_5% 2 CLK_EXT_AGP66 10 33_0402_5% 1 R220 2 33_0402_5% 2 CLK_EXT_ALINK 19 8 5 18 24 25 33 46 41 1 GNDXTAL GNDREF GNDPCI GNDPCI GND48M GNDAGP GNDSD GNDCPU 475_0402_1% FS3 FS4 1 R206 1 R207 CLK_EXT_CPU# 4 CLK_EXT_NB# 2 30 CLK_AUDIO_14M CLK_EXT_48M CLK_EXT_SD48 CLK_EXT_CPU# 2 33_0402_5% CLK_EXT_NB 2 33_0402_5% 1 R210 1 R211 CLK_EXT_NB CPUC1 R216 1 42 48 30 29 19 13 1 9 XIN @1M_0402_5% XTALOUT 1 +3VS 3 ICS951402AGT_TSSOP48 3 CLOCK FREQUENCY SELECT TABLE R234 5,12 BSEL1 D3 1 2 RB751V_SOD323 5,12 BSEL0 D4 1 2 RB751V_SOD323 10K_0402_5% 2 2 2 2 R236 R238 10K_0402_5% 4.7K_0402_5% R239 10K_0402_5% D E 1 R241 @10K_0402_5% Compal Electronics, Inc. Date: C R240 10K_0402_5% 4 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B R231 10K_0402_5% R237 4.7K_0402_5% Title A R230 @10K_0402_5% 2 R229 @10K_0402_5% 1 1 R235 R228 @10K_0402_5% 2 R233 10K_0402_5% 10K_0402_5% 4 FS0 FS1 FS2 FS3 FS4 PCI33/66# +3VS_CLK +3VS R232 10K_0402_5% PCI33/66# = HIGH 66MHZ ** PCI33/66# = LOW 33MHZ 1 1 +3VS Spread OFF OR Center spread +/-0.3% 1 100 2 133 100 1 133 0 2 1 0 1 0 0 2 0 0 1 0 0 1 0 +3VS_CLK A-LINK FREQ * 2 0 1 1 1 200 0 2 200 0 Note: 0 = PULL LOW 1 = PULL HIGH 1 0 With Spread Enabled 2 MEM 2 CPU 1 ** FS4 FS3 FS2 FS1 FS0 2 1 C268 0.1U_0402_10V6K 1 R204 2 2 2 6 VDDCPU VDDSD VDDAGP VDD48M VDDPCI VDDPCI VDDREF VDDXTAL 2 1 1 1 VSSA U11 XTALIN H +3VS_CLK 1 2 CHB2012U121_0805 Y5 G Width=40 mils L6 1 F F Clock Generator Thursday, April 08, 2004 G Rev 0.2 LA-2301 Sheet 17 H of 47 5 4 1 3 1 1 2 S S Q5 SI2302DS_SOT23 1 1 C274 0.1U_0402_10V6K 2 2 ENVDD 1 2 2 1 C275 4.7U_0805_10V4Z 2 1 C276 4.7U_0805_10V4Z 2 C277 0.1U_0402_16V4Z 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 DAC_BRIG INVT_PWM EDID_CLK EDID_CLK 10 10 TZCLKTZCLK+ 10 10 10 10 10 10 TZOUT1TZOUT1+ TZOUT2+ TZOUT2TZOUT0+ TZOUT0- 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 IB+ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 DISPOFF# +LCDVDD EDID_DAT D EDID_DAT 8 TXCLK+ 10 TXCLK- 10 TXOUT2+ TXOUT2TXOUT1TXOUT1+ TXOUT0TXOUT0+ 10 10 10 10 10 10 ACES_88107-3000 Q8 DTC124EK_SC59 1 3 R247 1.2K_0402_5% 2 80mil 2N7002_SOT23 8 C273 0.1U_0402_16V4Z 2 R246 150K_0402_5% 8 1 +LCDVDD JP4 IB+ 33 33 2 Q7 3 S D 2 G 1 2 G 3 1 2 1 D D Width: 40mils C271 4.7U_0805_10V4Z +3VS 2 G C272 @1000P_0402_50V7K 1 1 2 R244 100K_0402_5% D Q6 2N7002_SOT23 80mil R242 100K_0402_5% 1 R243 100_0402_1% 2 +3VS 2 +12VALW 1 +LCDVDD 3 SI2302DS: N CHANNEL VGS: 4.5V, RDS: 85 mOHM +12VALW VGS: 2.5V, RDS: 115mOHM Id(MAX): 2.8A VGS(MAX): +-8V L8 +3VS 1 B+ 2 1 R248 10K_0402_5% C 33 1 BKOFF# 2 D5 IB+ FBM-L11-201209-121LMT_0805 2 1 C278 0.1U_0603_50V4Z DISPOFF# 1 R249 1 R250 1 2 2 C279 @10U_1210_35V4Z 1 RB751V_SOD323 2 EDID_DAT +R_CRT_VCC +5VS_BEAD CRT Connector +CRT_VCC 1 1 1 D8 40mil F1 1 1 2 1 C283 2 0.1U_0402_10V6K RB491D_SOT23 1A_6VDC_MINISMDC110 +3VS 2 @V-PORT-0603-220 M-V05_0603 2 2 @V-PORT-0603-220 M-V05_0603 D7 40mil D9 2 D6 JP5 10 CRT_R 1 L10 10 CRT_G 1 L11 2 FCM2012C-800_0805 10 CRT_B 1 L12 2 FCM2012C-800_0805 1 2 2 R256 75_0402_1% 1 1 C284 C285 3.3P_0402_50V8C 3.3P_0402_50V8C 2 1 2 2 2 FCM2012C-800_0805 C286 3.3P_0402_50V8C 2 C287 5P_0402_50V8C CRTR CRTG CRTB 1 2 1 C288 5P_0402_50V8C 2 NB_DDC_DATA 2 4.7K_0402_5% NB_DDC_CLK 2 4.7K_0402_5% 6 11 1 7 12 2 8 13 3 9 14 4 10 15 5 C289 5P_0402_50V8C 1 1 R255 75_0402_1% 1 2 B R254 75_0402_1% C @V-PORT-0603-220 M-V05_0603 40mil Close to CRT connector +3VS C280 @47P_0402_50V8J 1 2 C282 @47P_0402_50V8J 1 2 EDID_CLK C281 @1000P_0402_50V7K 2 2.2K_0402_5% 2 2.2K_0402_5% 1 R251 1 R252 +CRT_VCC CRT_DDC_DATA 2 2.2K_0402_5% CRT_DDC_CLK 2 2.2K_0402_5% B 1 R253 1 R257 TYCO_1470801-1 U12 R258 1 D76 Y 1 3 2 G 3 C292 100P_0402_25V8K C294 100P_0402_25V8K 2 2 NB_DDC_DATA NB_DDC_DATA 10 2 G 1 D 1 R259 1K_0402_5% 1 VSYNC 1 2 FCM2012C-800_0805 1 74AHCT1G125GW_SOT353-5 A A CRTVSYNC 1 10 CRT_VSYNC CRT_DDC_CLK L14 4 +3VS @V-PORT-0603-220 M-V05_0603 U13 G 2 1 2.2K_0402_5% D77 1 1 2 2 3NB_DDC_CLK NB_DDC_CLK 10 Q10 2N7002_SOT23 C293 100P_0402_25V8K A 2 P 5 2 2 CRT_DDC_DATA C290 100P_0402_25V8K 2 S 1 C291 OE# 2 0.1U_0402_10V6K Q9 2N7002_SOT23 S HSYNC 3 74AHCT1G125GW_SOT353-5 1 2 L13 FCM2012C-800_0805 D CRTHSYNC 4 Y G A 1 5 P 2 10 CRT_HSYNC OE# 1 +CRT_VCC @V-PORT-0603-220 M-V05_0603 Title Compal Electronics, Inc. LVDS, CRT& TV CONN THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.2 LA-2301 Date: 5 4 3 2 Thursday, April 08, 2004 Sheet 1 18 of 47 4 3 8,12 8 A_AD[0..31] A_CBE#[0..3] +3VALW 2 @15P_0402_50V8J 1 R271 2 2 @0_0402_5% R272 8.2K_0402_5% 1 PULL DOWN FOR S3 +3VS 1 8.2K_0402_5% 2 1K_0402_5% 2 4.7K_0402_5% A_SERR# PM_STPCPU# PM_STPPCI# 8 A_STROBE# 8 A_DEVSEL# 8 A_ACAT# 8 A_END# 8,12 A_PAR 8 A_OFF# C Close SB 8 8 H_CPUSLP# 2 200_0402_5% H_A20M# 2 200_0402_5% H_IGNNE# 2 200_0402_5% H_SMI# 2 200_0402_5% H_STPCLK# 2 200_0402_5% H_INTR 2 200_0402_5% H_NMI 2 200_0402_5% H_INIT# 2 200_0402_5% 10K_0402_5% 2 R646 1 1 +3VS R279 4.7K_0402_5% 5,17,44 PM_STPCPU# 17 PM_STPPCI# PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# 5 5 5 5 5 5 5 5 H_PWRGD H_INTR H_NMI H_INIT# H_SMI# H_CPUSLP# H_IGNNE# H_A20M# B 1 R297 5 H_STPCLK# NC 2 +SB_VBAT Part 1 A_INTA# INTB# INTC# INTD# X1 X2 CPURSTIN# CPU_PWRGD INTR/LINT0 NMI/LINT1 INIT SMI# SLP# IGNNE# A20M# FERR# STPCLK# SSMUXSEL/GPIO0 DPRSLPVR APIC_D0 APIC_D1 APIC_CLK RTC_ALE/USBOC4#/GPIO3 RTC_WR#/RTC_CLKOUT RTC_CS#/USBOC3#/GPIO2 VBAT RTC_GND B15 D16 A14 A15 A16 A17 D15 A18 A19 C15 B1 C1 A1 D2 B2 C2 A2 D3 C3 A3 D4 B4 C4 A4 D5 B5 C8 D8 B8 A8 C9 D9 B9 A9 C10 B10 D11 A10 C11 B11 D12 A11 B3 C5 A7 D10 B7 A6 C7 D7 A5 B6 C6 D6 B12 C12 D13 A12 C13 A13 B13 C14 D14 B14 A20 AB5 Y14 AA14 AB14 AA13 AB13 AC14 Y13 AC13 AA2 PCI_1394 PCI_LAN PCI_PCM PCI_MINI PCI_EC PCI_SIO W=20mils 1 1 R300 2 200_0805_5% 1 R305 20M_0603_5% 1 2 1 R301 2 200_0805_5% PCI_CLK_R R270 1 PCI_CLK_FB PCI_RST# PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3 PCI_FRAME# PCI_DEVSEL# PCI_IRDY# PCI_TRDY# PCI_PAR PCI_STOP# PCI_PERR# PCI_SERR# PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 PCI_REQ#4 PCI_GNT#0 PCI_GNT#1 PCI_GNT#2 PCI_GNT#3 PCI_GNT#4 PM_CLKRUN# RAM_SEL0 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_DRQ#0 LPC_DRQ#1 SERIRQ OVCUR#5 1 10K_0402_5% 2 2 2 2 2 2 39_0402_5% 39_0402_5% 39_0402_5% 39_0402_5% 39_0402_5% 39_0402_5% C299 1U_0603_10V6K 8.2K_1206_8P4R_5% RP67 4 3 2 1 5 6 7 8 D 8.2K_1206_8P4R_5% RP70 PCI_REQ#2 4 5 PCI_REQ#3 3 6 PCI_REQ#0 2 7 PCI_REQ#1 1 8 8.2K_1206_8P4R_5% RP71 PCI_GNT#2 PCI_GNT#3 PCI_GNT#0 PCI_GNT#1 4 3 2 1 5 6 7 8 8.2K_1206_8P4R_5% RP69 PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# 4 3 2 1 5 6 7 8 8.2K_1206_8P4R_5% PCI_REQ#4 1 R276 PCI_GNT#4 1 R277 PCI_C/BE#[0..3] PCI_C/BE#[0..3] SERIRQ LPC_FRAME# LPC_AD3 LPC_DRQ#0 24,26,27,28 PCI_GNT#0 PCI_GNT#1 PCI_GNT#2 PCI_GNT#3 27 26 24 28 2 8.2K_0402_5% 2 8.2K_0402_5% RP73 4 3 2 1 C 5 6 7 8 10K_1206_8P4R_5% RP72 4 5 3 6 2 7 1 8 PCI_FRAME# 24,26,27,28 PCI_DEVSEL# 24,26,27,28 PCI_IRDY# 24,26,27,28 PCI_TRDY# 24,26,27,28 PCI_PAR 24,26,27,28 PCI_STOP# 24,26,27,28 PCI_PERR# 24,26,27,28 PCI_SERR# 24,26,27,28 PCI_REQ#0 27 PCI_REQ#1 26 PCI_REQ#2 24 PCI_REQ#3 28 LPC_AD2 LPC_DRQ#1 LPC_AD1 LPC_AD0 PM_CLKRUN# RAM_SEL0 20 RAM_SEL1 20 RAM_SEL2 RAM_SEL1 RAM_SEL2 PM_CLKRUN# 24,26,27,28,32,33 LPC_AD0 32,33 LPC_AD1 32,33 LPC_AD2 32,33 LPC_AD3 32,33 LPC_FRAME# 32,33 LPC_DRQ#0 33 LPC_DRQ#1 32 SERIRQ 24,32,33 2 +3V R291 100K_1206_8P4R_5% 2 1 R280 10K_0402_5% 2 R283 1 R644 1 R645 1 @10K_0402_5% 2 R647 2 R648 2 R292 1 10K_0402_5% 2 @10K_0402_5% +3V 2 @10K_0402_5% 1 10K_0402_5% 1 10K_0402_5% B GPOC3# GPOC2# GPIO1 RAM_SEL2 RAM_SEL1 RAM_SEL0 Size 256M(16X16) Vendor Cells 0 0 0 0 0 1 256M(16X16) HYN 8 0 1 0 256M(16X16) Elpida 8 0 1 1 256M(16X16) Infienon 8 2 1 0 0 512M(32X16) SAM 8 1 0 1 512M(32X16) HYN C803 2 U33A O C804 2 8 SAM 8 1 1 0 512M(32X16) Elpida 8 1 1 1 512M(32X16) Infienon 8 3PCIRST# PCIRST# 20,24,26,27,28 SN74LVC125APWLE_TSSOP14 7 R295 Title Compal Electronics, Inc. IXP150(1/4)- PCI/CPU/LPC 2 H_CPUFERR# A 0.1U_0402_10V6K G I 1000P_0402_50V7K 1 10K_0402_5% 2 2 2 MMBT3904_SOT23 1 PCI_RST# PCI_RST# 1 1 23 R294 330_0402_5% 470_0402_5% P +3VS 1 14 +3VALW C298 2 OE# 0.1U_0402_16V4Z 1 A 1 5 6 7 8 +CPU_CORE +CPU_CORE 3 4 3 2 1 PCI_FRAME# PCI_IRDY# PCI_TRDY# PCI_DEVSEL# 2 39_0402_5% C2971 2 22P_0402_50V8J PCI_AD[0..31] 22,24,26,27,28 Add for EMI J1 No short 1 Q12 CLK_PCI_1394 27 CLK_PCI_LAN 26 CLK_PCI_PCM 24 CLK_PCI_MINI 28 CLK_LPC_EC 33 CLK_PCI_SIO 32 PCI_AD[0..31] 2 R293 RP68 PCI_STOP# PCI_PERR# PCI_PAR PCI_SERR# +RTCVCC 2 C301 12P_0402_50V8K 2 H_FERR# 1 1 1 1 1 1 CHS-215IXP150-11_BGA457 RTCX1 1 2 20M_0603_5% 5 R263 R264 R265 R266 R267 R268 +SB_VBAT R304 1 10K_0402_5% 10K_0402_5% 1K_0402_5% 10K_0402_5% Y2 32.768KHZ_12.5P_1TJS125DJ2A073 IN RTCX2 C300 12P_0402_50V8K 1 2 R299 1 2 R302 1 2 R298 1 2 +3V R290 2 1 R312 10K_0402_5% 1 4 OUT NC 3 +3V CPU_STP#/DPSLP# PCI_STP# C20 P20 B23 P21 AC12 AC11 B18 E4 H_INTR B17 H_NMI B16 H_INIT# C17 H_SMI# C16 H_CPUSLP# F19 H_IGNNE# D17 H_A20M# D18 H_CPUFERR# E19 H_STPCLK# E16 GPIO0 E17 DPRSLPVR E18 SB_APIC_D0 C19 SB_APIC_D1 C18 CLK_14M_APIC B19 OVCUR#4 AB7 AB8 AC8 AC10 AB11 2 0_0402_5% N20 R23 RTCX2 CPURSTIN# R296 2 100K_0402_5% PM_STPCPU# PM_STPPCI# PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# RTCX1 8,24,27 24 28 26,28 GPIO0 1 44 PM_DPRSLPVR A_SBREQ# A_SBGNT# 2 1 R281 1 R282 1 R284 1 R285 1 R286 1 R287 1 R288 1 R289 SB150 SB 2 +CPU_CORE 1 2 R273 1 R274 1 R275 PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6 of 3 PCICLK7 PCICLK_FB PCIRST# AD0/ROMA18 AD1/ROMA17 AD2/ROMA16 AD3/ROMA15 AD4/ROMA14 AD5/ROMA13 AD6/ROMA12 AD7/ROMA11 AD8/ROMA9 AD9/ROMA8 AD10/ROMA7 AD11/ROMA6 AD12/ROMA5 AD13/ROMA4 AD14/ROMA3 AD15/ROMA2 AD16/ROMD0 AD17/ROMD1 AD18/ROMD2 AD19/ROMD3 AD20/ROMD4 AD21/ROMD5 AD22/ROMD6 AD23/ROMD7 AD24/RTC_AD7 AD25/RTC_AD6 AD26/RTC_AD5 AD27/RTC_AD4 AD28/RTC_AD3 AD29/RTC_AD2 AD30/RTC_AD1 AD31/RTC_AD0 CBE#0/ROMA10 CBE#1/ROMA1 CBE#2/ROMWE# CBE#3/RTC_RD# FRAME# DEVSEL#/ROMA0 IRDY# TRDY#/ROMOE# PAR STOP# PERR# SERR# REQ#0 REQ#1 REQ#2 REQ#3/PDMAREQ0# REQ#4/PLLBP33/PDMAREQ1# GNT#0 GNT#1 GNT#2 GNT#3/PDMAGNT0# GNT#4/PLLBP50/PDMAGNT1# CLKRUN# GPIO1/ROMCS# LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ#0 LDRQ#1 SERIRQ USBOC5#/GPM1 PCI CLKS C295 PCICLKF A_RST# A_AD0 A_AD1 A_AD2 A_AD3 A_AD4 A_AD5 A_AD6 A_AD7 A_AD8 A_AD9 A_AD10 A_AD11 A_AD12 A_AD13 A_AD14 A_AD15 A_AD16 A_AD17 A_AD18 A_AD19 A_AD20 A_AD21 A_AD22 A_AD23 A_AD24 A_AD25 A_AD26 A_AD27 A_AD28 A_AD29 A_AD30 A_AD31 A_CBE#0 A_CBE#1 A_CBE#2 A_CBE#3 A_STROBE# A_DEVSEL# A_ACAT# A_END# A_PAR A_OFF# A_SERR# A_SBREQ# A_SBGNT# PCI INTERFACE 2 1 NBRST# B22 R22 H22 P23 L23 N23 N22 M23 M22 K22 M21 M20 L21 K21 L20 N21 K23 K20 F23 G21 F20 H21 F22 F21 G20 E21 E20 D23 D22 E22 D20 C23 D21 C22 L22 J23 G22 E23 H20 J21 G23 H23 J20 J22 P22 B21 B20 LPC A 2 NBRST# A_AD0 A_AD1 A_AD2 A_AD3 A_AD4 A_AD5 A_AD6 A_AD7 A_AD8 A_AD9 A_AD10 A_AD11 A_AD12 A_AD13 A_AD14 A_AD15 A_AD16 A_AD17 A_AD18 A_AD19 A_AD20 A_AD21 A_AD22 A_AD23 A_AD24 A_AD25 A_AD26 A_AD27 A_AD28 A_AD29 A_AD30 A_AD31 A_CBE#0 A_CBE#1 A_CBE#2 A_CBE#3 A_STROBE# A_DEVSEL# A_ACAT# A_END# A_PAR A_OFF# A_SERR# A_SBREQ# A_SBGNT# RTC 1 3 TC7SH08FU_SSOP5 B Trace length of PCI_CLK_R + PCI_CLK_FB should be less than 200 mils. A-LINK INTERFACE Y G 4 @10_0402_5% 1K_0402_5% +3VS Layout note: XTAL 1 R269 P NB_RST# R261 2 U15 D 7,23,32,33 NB_RST# 1 1C296 5 0.1U_0402_16V4Z2 1 A_CBE#[0..3] U14A CLK_EXT_ALINK 17 CLK_EXT_ALINK 2 A_AD[0..31] CPU 5 Size Document Number Rev 0.2 LA-2301 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Date: Thursday, April 08, 2004 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Sheet 1 19 of 47 29 48MHZ_4P_FN4800002 C304 0.1U_0402_16V4Z OVCUR#0 USB20P5+ OVCUR#0 USB20P5USB20P4+ Note: Place close to ATI SB For ATI USB2.0 only . L USB20P4USB20P3+ USB20P3- C 1 2 3 4 RP76 15K_1206_8P4R_5% USB20P58 USB20P5+ 7 USB20P46 USB20P4+ 5 1 2 3 4 RP79 15K_1206_8P4R_5% USB20P08 USB20P0+ 7 USB20P36 USB20P3+ 5 4 3 2 1 RP81 15K_1206_8P4R_5% USB20P1+ 5 USB20P16 USB20P2+ 7 USB20P28 USB20P2+ USB20P2+ 29 USB20P2- USB20P2- 29 USB20P1+ USB20P1+ 29 USB20P1- USB20P1- 29 USB20P0+ USB20P0+ 29 USB20P0- USB20P0- 22 22 22 22 22 EC_RSMRST# 2 100K_0402_5% EE_DI 1 10K_0402_5% FANOUT0 1 10K_0402_5% 1 R313 2 R314 2 R315 29 MII_TXD3 MII_TXD2 MII_TXD1 MII_TXD0 MII_TXEN CLK25M EE_DI 22 SB_EEDO 22 SB_EECLK 33 EC_RSMRST# 17 CLK_SB_14M 34 FLASH# 29 OVCUR#2 22 32KHZ_S5_OUT 29 OVCUR#1 30 SB_SPK B 8 AGP_STP# 5 CPU_GHI# 2 D19 2 D20 2 R316 17,22 VTT_PWRGD 30 AGP_STP#_R 1 RB751V_SOD323 GHI 1 RB751V_SOD323 SB_VGATE 1 33_0402_5% 1 IAC_RST# 2 R809 2 R810 3 Q13 2 R319 2 R320 1 EC_THERM# EC_THERM# 33 1 RB751V_SOD323 PM_BATLOW# PM_BATLOW# 33 SB_EC_SWI# D12 2 1 RB751V_SOD323 EC_SWI# AB4 AC9 AC7 AA11 AB10 AA10 Y11 C21 Y10 AA5 AA6 Y5 AA4 AB3 Y6 W5 Y8 AA7 AB6 AA12 W12 Y12 AB12 AA8 AB17 AC16 AB15 AB16 AC15 Y16 AA17 AA16 AC17 Y15 AA15 AC18 AA18 AC19 AA19 AC20 AA20 AC21 AB21 AA21 Y20 AB20 Y19 AB19 Y18 AB18 Y17 AA23 AA22 AC23 Y21 AB23 Y22 W21 Y23 W20 AC22 AB22 W23 V21 V23 U21 U23 T21 T23 R21 R20 T22 T20 U22 U20 V22 V20 W22 SB_EC_THERM# SB_PM_BATLOW# EC_SWI# SB_GA20 D13 2 1 RB751V_SOD323 GATEA20 GATEA20 33 SB_KBRST# D14 2 1 RB751V_SOD323 KBRST# KBRST# 33 PM_SLP_S3# PM_SLP_S5# PBTN_OUT# SB_PWRGD PCI_ACT_REQ# SUS_STAT# SB_TEST1 SB_TEST0 SB_GA20 SB_KBRST# SB_AC_IN SB_EC_SWI# LPC_SMI# SB_EC_SMI# SB_SCI# SB_LID_OUT# SM_CLK_SB SM_DATA_SB SB_AC_IN D15 2 1 RB751V_SOD323 ACIN ACIN 33,34,38 SB_EC_SMI# D16 2 1 RB751V_SOD323 EC_SMI# EC_SMI# 33 SB_SCI# D17 2 1 RB751V_SOD323 EC_SCI# EC_SCI# 33 SB_LID_OUT# D18 2 1 RB751V_SOD323 EC_LID_OUT# EC_LID_OUT# 33 PWR_STRP IDE_PDIORDY INT_IRQ14 IDE_PDA0 IDE_PDA1 IDE_PDA2 IDE_PDDACK# IDE_PDDREQ IDE_PDIOR# IDE_PDIOW# IDE_PDCS1# IDE_PDCS3# PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 IDE_SDIORDY INT_IRQ15 IDE_SDA0 IDE_SDA1 IDE_SDA2 IDE_SDDACK# IDE_SDDREQ IDE_SDIOR# IDE_SDIOW# IDE_SDCS1# IDE_SDCS3# IDE_SDD0 IDE_SDD1 IDE_SDD2 IDE_SDD3 IDE_SDD4 IDE_SDD5 IDE_SDD6 IDE_SDD7 IDE_SDD8 IDE_SDD9 IDE_SDD10 IDE_SDD11 IDE_SDD12 IDE_SDD13 IDE_SDD14 IDE_SDD15 PM_SLP_S3# 33 PM_SLP_S5# 33 PBTN_OUT# 33 SB_PWRGD 22 SUS_STAT# 7 SM_CLK_SB 13,17 SM_DATA_SB 13,17 RAM_SEL1 19 RAM_SEL2 19 PWR_STRP 22 RP83 PDD0 PDD14 PDD1 PDD13 4 3 2 1 5 6 7 8 PDD2 PDD12 PDD3 PDD11 33_0804_8P4R_5% RP74 4 5 IDE_PDD2 3 6 IDE_PDD12 2 7 IDE_PDD3 1 8 IDE_PDD11 PDD4 PDD10 PDD5 PDD9 33_0804_8P4R_5% RP80 4 5 IDE_PDD4 3 6 IDE_PDD10 2 7 IDE_PDD5 1 8 IDE_PDD9 PDD6 PDD7 PDD8 1 2 D IDE_PDD[0..15] IDE_PDD[0..15] 23 RP75 IDE_PDA2 IDE_PDA0 IDE_PDCS3# IDE_PDCS1# 4 3 2 1 5 6 7 8 IDE_SA2 23 IDE_SA0 23 IDE_CSA#1 23 IDE_CSA#0 23 33_0804_8P4R_5% INT_IRQ14 IDE_PDA1 IDE_PDIOR# IDE_PDDACK# RP82 4 3 2 1 5 6 7 8 IDE_IIRQA 23 IDE_SA1 23 IDE_IORA# 23 IDE_ACKA# 23 33_0804_8P4R_5% 33_0804_8P4R_5% RP77 4 5 IDE_PDD6 3 6 IDE_PDD7 2 7 IDE_PDD8 1 8 IDE_PDIOW# IDE_PDIORDY IDE_PDDREQ PDD15 33_0804_8P4R_5% C RP78 4 3 2 1 5 6 7 8IDE_PDD15 IDE_IOWA# 23 IDE_IORDYA 23 IDE_REQA 23 33_0804_8P4R_5% RP76~RP79,RP82,RP103,RP104 near SB. RP85 IDE_SDCS1# IDE_SDCS3# IDE_SDA0 IDE_SDA2 1 2 3 4 INT_IRQ15 IDE_SDA1 IDE_SDIORDY IDE_SDDACK# IDE_SDIOR# IDE_SDDREQ IDE_SDD15 IDE_SDD0 IDE_SDIOW# IDE_SDD14 IDE_SDD1 IDE_SDD3 ODD_CSB#0 ODD_CSB#1 ODD_SA0 ODD_SA2 8 7 6 5 1 2 3 4 33_0804_8P4R_5% RP87 ODD_IIRQB 8 ODD_SA1 7 6 ODD_IORDYB 5 ODD_ACKB# 1 2 3 4 33_0804_8P4R_5% RP89 8 ODD_IORB# ODD_REQB 7 6 ODD_SDD15 5 ODD_SDD0 1 2 3 4 33_0804_8P4R_5% RP84 8 ODD_IOWB# 7 ODD_SDD14 6 ODD_SDD1 5 ODD_SDD3 ODD_CSB#0 23 ODD_CSB#1 23 ODD_SA0 23 ODD_SA2 23 ODD_SDD[0..15] ODD_IIRQB 23 ODD_SA1 23 ODD_IORDYB 23 ODD_ACKB# 23 ODD_IORB# 23 ODD_REQB 23 RP90 IDE_SDD13 IDE_SDD11 IDE_SDD2 IDE_SDD4 1 2 3 4 IDE_SDD12 IDE_SDD10 IDE_SDD5 IDE_SDD8 1 2 3 4 33_0804_8P4R_5% RP86 8 ODD_SDD12 7 ODD_SDD10 6 ODD_SDD5 5 ODD_SDD8 IDE_SDD6 IDE_SDD9 IDE_SDD7 1 2 3 4 33_0804_8P4R_5% RP88 8 ODD_SDD6 7 ODD_SDD9 6 ODD_SDD7 5 ODD_IOWB# 23 8 7 6 5 23 ODD_SDD13 ODD_SDD11 ODD_SDD2 ODD_SDD4 B 33_0804_8P4R_5% 33_0804_8P4R_5% SB_AC_IN GHI AGP_STP#_R CLK25M IAC_BITCLK 2 @10_0402_5% 33 RP72~RP75,RP81,RP101,RP102 near SB. IDE_PDD0 IDE_PDD14 IDE_PDD1 IDE_PDD13 RP91 1 2 3 4 8 7 6 5 PM_SLP_S5# PBTN_OUT# PM_SLP_S3# +3V 8 7 6 5 +3VALW 10K_1206_8P4R_5% 2 1 R804 10K_0402_5% SM_CLK_SB 1 2 R649 2.2K_0402_5% SM_DATA_SB 1 2 R650 2.2K_0402_5% AGP_STP# AGP_BUSY# SB_TEST1 SB_TEST0 10K_1206_8P4R_5% RP97 1 8 2 7 3 6 4 5 +3VS RP96 1 2 3 4 8 7 6 5 8.2K_1206_8P4R_5% IAC_SDATAI2 IAC_SDATAI1 IAC_SDATAI0 IAC_RST_R# 10K_1206_8P4R_5% 1 2 R323 8.2K_0402_5% RP98 1 2 3 4 8 7 6 5 A +3V 8.2K_1206_8P4R_5% C306 Title @15P_0402_50V8J RP92 1 2 3 4 PCI_ACT_REQ# 10K_1206_8P4R_5% RP95 8 7 6 5 IAC_BITCLK @10_0402_5% @15P_0402_50V8J 1 RB751V_SOD323 2 SB_PM_BATLOW#1 AGP_BUSY#_R 2 SB_LID_OUT# 3 SB_EC_THERM# 4 1 1 2 AGP_BUSY#_R 2N7002_SOT23 1 IAC_SDATAO_NB 33_0402_5% 1 IAC_SYNC_NB 33_0402_5% R322 C305 2 D11 10K_1206_8P4R_5% RP93 1 8 2 7 3 6 SB_KBRST# 4 5 R321 2 1 D10 SB_PM_BATLOW# SB_EC_SMI# SB_SCI# CLK_SB_14M A SB_EC_THERM# LPC_SMI# SB_EC_SWI# SB_GA20 D IAC_SYNC 22,30 IAC_SYNC CHS-215IXP150-11_BGA457 19,24,26,27,28 @0_0402_5% S IAC_SDATAO 22,30 IAC_SDATAO AC_BITCLK AC_SDOUT AC_SDIN0 AC_SDIN1 AC_SDIN2 AC_SYNC AC_RST# SPDIF_OUT 2 1K_0402_5% AGP_BUSY# AGP_BUSY# E1 E2 Y1 Y2 Y3 E3 V5 E5 G 8 1 R318 IAC_BITCLK IAC_SDATAI0 IAC_SDATAI1 2 +3VS IAC_BITCLK IAC_SDATAO_NB IAC_SDATAI0 IAC_SDATAI1 IAC_SDATAI2 IAC_SYNC_NB IAC_RST_R# SPDIF_OUT SPDIF_OUT 30 22 PCIRST# PIDERST# SIDERST# 30 30 IAC_RST_R# 0_0402_5% 1 23 23 EC_RSMRST# CLK_SB_14M FLASH# OVCUR#2 32KHZ_S5_OUT OVCUR#1 SB_SPK FANOUT0 AGP_STP#_R AGP_BUSY#_R GHI SB_VGATE TALERT#/ETH_TALERT# PME#/EXT_EVNT0# RI#/EXT_EVNT1# SLP_S3# SLP_S5# PWR_BTN# PWR_GOOD PCI_REQACT# SUS_STAT# TEST1 TEST0 GA20_IN/GEVNT0# KB_RST#/GEVNT1# SMB_ALERT#/GEVNT2# LPC_PME#/GEVNT3# LPC_SMI#/GEVNT4# GEVENT5#/ETH_VALERT# GEVENT6#/ETH_FALERT# GEVENT7#/ETH_CALERT# GPOC0#/SCL0 GPOC1#/SDA0 GPOC2#/SCL1 GPOC3#/SDA1 RTC_IRQ#/PWR_STRP PIDE_IORDY PIDE_IRQ PIDE_A0 PIDE_A1 PIDE_A2 PIDE_DACK# PIDE_DRQ PIDE_IOR# PIDE_IOW# PIDE_CS1# PIDE_CS3# PIDE_D0 PIDE_D1 PIDE_D2 PIDE_D3 PIDE_D4 PIDE_D5 PIDE_D6 PIDE_D7 PIDE_D8 PIDE_D9 PIDE_D10 PIDE_D11 PIDE_D12 PIDE_D13 PIDE_D14 PIDE_D15 SIDE_IORDY SIDE_IRQ SIDE_A0 SIDE_A1 SIDE_A2 SIDE_DACK# SIDE_DRQ SIDE_IOR# SIDE_IOW# SIDE_CS1# SIDE_CS3# SIDE_D0 SIDE_D1 SIDE_D2 SIDE_D3 SIDE_D4 SIDE_D5 SIDE_D6 SIDE_D7 SIDE_D8 SIDE_D9 SIDE_D10 SIDE_D11 SIDE_D12 SIDE_D13 SIDE_D14 SIDE_D15 1 +3V 2 2 USB_RCOMP 12.4K_0603_1% USBCLK/CLK48 USB_RCOMP USB_VREFOUT USB_ATEST1 USB_ATEST0 USBOC0#/GPM7 USB_HSDP5+ USB_FLDP5+ USB_HSDM5USB_FLDM5USB_HSDP4+ USB_FLDP4+ USB_HSDM4USB_FLDM4USB_HSDP3+ USB_FLDP3+ USB_HSDM3USB_FLDM3USB_HSDP2+ USB_FLDP2+ USB_HSDM2USB_FLDM2USB_HSDP1+ USB_FLDP1+ USB_HSDM1USB_FLDM1USB_HSDP0+ USB_FLDP0+ USB_HSDM0USB_FLDM0MCOL MCRS MDCK MDIO RX_CLK RXD3 RXD2 RXD1 RXD0 RX_DV RX_ERR TX_CLK TXD3 TXD2 TXD1 TXD0 TX_EN PHY_PD PHY_RST# CLK_25M EE_CS EE_DI EE_DO EE_CK RSMRST# OSC_IN SIO_CLK BLINK/GPM0 FANOUT1/USBOC2#/GPM2 32KHZ_IN/GPM3 USBOC1#/GPM4 SPEAKER/GPM5 FANOUT0/GPM6 GPIO_X0/AGP_STP# GPIO_X1/AGP_BUSY# GPIO_X2/GHI# GPIO_X3/VGATE GPIO_X4 GPIO_X5 Part 2 of 3 2 U14B P3 R1 P1 N4 N3 P4 M2 M1 N2 N1 L4 L3 M4 M3 K2 K1 L2 L1 H2 H1 J2 J1 G3 J3 H3 K3 F1 F2 G1 G2 R5 W1 V4 V2 T1 T3 U2 T5 W4 T2 U1 T4 U4 V1 U3 V3 W2 W3 U5 Y7 P2 R3 R2 R4 AB9 A23 W6 AB2 AA3 W11 AB1 Y4 AA1 AC1 AC6 AC2 AC3 AC4 AC5 ACPI / WAKE UP EVENTS GND OE 2 @15P_0402_50V8J SECONDARY ATA 66/100 1 1 R311 2 R396 10K_0402_5% SB150 SB OUT 3 1 C303 PRIMARY ATA 66/100 10K_0402_5% X3 4 VDD 2 @10_0402_5% USB INTERFACE 2 1 R307 ETHERNET MII 1 2 D CLK_USB_48M_R 1 2 R309 0_0402_5% R310 1 2 @0_0402_5% EEPROM GPIO CLK / RST GPIO_XTRA 1 R308 17 CLK_EXT_48M 3 1 4 AC97 5 +3V Compal Electronics, Inc. IXP150(2/4) - IDE/USB/MII THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS SizeCONFIDENTIAL Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Thursday, April 08, 2004 Rev 0.2 LA-2301 5 4 3 2 Sheet 1 20 of 47 5 4 3 2 1 +3VS C307 10U_0805_10V4Z C308 2 1 1 C309 1 C310 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 1 C311 1 C312 2 2 2 2 0.1U_0402_10V6K 0.1U_0402_10V6K 10U_0805_10V4Z D 1 C313 1 C314 1 C315 1 C316 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 1 C317 1 C318 1 C319 1 C320 1 C321 1 C322 1 2 2 2 2 2 2 2 2 2 2 2 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 2 +3VS C323 U14C 0.1U_0402_10V6K +2.5VS 0.1U_0402_10V6K C329 10U_0805_10V4Z 1 C331 0.1U_0402_10V6K 1 C332 1 C333 0.1U_0402_10V6K 1 C334 1 C335 +3VS 1 1 C330 1 C336 1 2 0.1U_0402_10V6K 2 2 2 2 2 2 2 2 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K ATI request @0.01U_0402_16V7Z C337 1 C324 @0.01U_0402_16V7Z C325 2 1 C326 2 1 C327 2 1 1 2 2 C328 @0.01U_0402_16V7Z +2.5V @0.01U_0402_16V7Z 0.1U_0402_10V6K C338 10U_0805_10V4Z 1 1 C339 2 Add for EMI 1 C340 1 C341 1 2 2 2 0.1U_0402_10V6K 2 +2.5VS C342 +2.5VS @0.01U_0402_16V7Z C343 C 1 1000P_0402_50V7K 1000P_0402_50V7K 1 C805 1 C806 2 1 C807 2 C808 2 ATI request 1 C809 2 2 ATI request 0.1U_0402_10V6K +3VS 1000P_0402_50V7K @0.01U_0402_16V7Z 0.1U_0402_10V6K @0.01U_0402_16V7Z 1 C344 2 1 C345 2 1 1 2 2 C346 @0.01U_0402_16V7Z @0.01U_0402_16V7Z +3V +2.5V 0.1U_0402_10V6K +3V C352 @0.1U_0402_16V7K 0.1U_0402_10V6K 0.1U_0402_10V6K C347 10U_0805_10V4Z 1 1 C348 2 2 1 C349 1 C350 1 2 2 0.1U_0402_10V6K 2 1 1 2 2 C351 0.1U_0402_10V6K +2.5V C354 @0.1U_0402_16V7K 1 2 C353 +2.5V @0.1U_0402_16V7K ATI request CLOSE TO L6,H6,J6 C355 1 1 2 2 +3V_AVDDC +3V +5VS C356 +3V_AVDDUSB 0.1U_0402_16V7K 1 0.1U_0402_10V6K R324 L15 100_0402_5% 1 RB751V_SOD323 C357 +3V_AVDDC 1U_0603_10V6K 1 2 MVB2012301YZT_0805 2 1 C358 1U_0603_10V6K 2 1 C359 0.1U_0402_10V6K 2 1 C797 470P_0402_50V7K 2 C798 C360 680P_0402_50V7K @10U_0805_10V6K 1 C371 0.1U_0402_10V6K 2 1 C365 1 C366 1 C367 1 C368 2 2 2 2 2 2 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 1 C B C799 2 R642 10K_0402_5% 1 1 2 C361 C800 @47U_B_6.3VM 680P_0402_50V7K + 2 G Q60 2N7002_SOT23 2 D S +SB_2.5VALW 2 +2.5V_AVDDCK D72 1 470P_0402_50V7K C369 @10U_0805_10V4Z 1 2 MVB2012301YZT_0805 1 2 1 C372 1U_0603_10V6K C373 2 1 2 C801 1 2 1 LM431SC_SOT23 2 C770 1U_0603_10V6K 1 C370 0.1U_0402_10V6K A 2 1 L17 A +2.5V_AVDDCK +2.5VS D 3 1 C364 1 1 C363 470P_0402_50V7K ATI request A E10 E13 E14 E6 E9 F10 F13 F14 F18 F6 F9 G6 J12 J15 J18 J19 J9 K10 K11 K12 K13 K14 K18 K19 L10 L11 L12 L13 L14 L18 L19 M10 M11 M12 M13 M14 M15 M6 M9 N10 N11 N12 N13 N14 N6 P10 P11 P12 P13 P14 P18 P19 R12 R15 R18 R19 R9 V14 V15 V16 V19 V6 V7 V8 W14 W15 W16 W19 W7 W8 H5 G5 2 +3V_AVDDUSB 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 2 Part 3 of 3 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS_USB VSS_USB CHS-215IXP150-11_BGA457 +3VALW K C362 10U_0805_10V4Z SB150 SB R +3V_AVDDUSB 1 2 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE STB_2.5V STB_2.5V STB_2.5V STB_2.5V STB_2.5V VDD_USB VDD_USB VDD_USB AVDDC STB_3.3V STB_3.3V STB_3.3V STB_3.3V STB_3.3V STB_3.3V STB_3.3V AVDDTX0 AVDDTX1 AVDDTX2 AVDDRX0 AVDDRX1 AVDDRX2 VREF_CPU 5V_VREF AVDD_CK S5_2.5V S5_3.3V AVSSC AVSSRX2 AVSSRX1 AVSSRX0 AVSSTX2 AVSSTX1 AVSSTX0 AVSSCK ATI request L16 1 2 MVB2012301YZT_0805 +SB_2.5VALW +3VALW 1 +12VALW +3V +2.5VS +2.5V_AVDDCK 2 1 1 +5VS_VREF 1 3 +3V D21 2 ATI request +3V_AVDDC B +3VS 2 @0.1U_0402_16V7K E11 E12 E15 E7 E8 F11 F12 F15 F16 F17 F7 F8 G18 G19 H18 H19 M18 M19 N18 N19 T18 T19 U18 U19 V17 V18 W17 W18 J10 J11 J13 J14 K15 K9 L15 L9 N15 N9 P15 P9 R10 R11 R13 R14 P6 R6 V13 W13 V12 L6 H6 J6 P5 T6 U6 V9 V10 V11 W9 W10 F4 J4 K5 F3 K4 L5 D19 D1 A21 Y9 AA9 N5 M5 J5 G4 K6 H4 F5 A22 POWER 0.1U_0402_10V6K 1 2 C802 680P_0402_50V7K Title Compal Electronics, Inc. IXP150(3/4) - PWR 0.1U_0402_10V6K THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINSSize CONFIDENTIAL Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Thursday, April 08, 2004 Rev 0.2 LA-2301 5 4 3 2 Sheet 1 21 of 47 5 4 3 2 1 +3VS 1 +3VALW R325 +3VALW C375 2 I 1 14 P 0.47U_0603_16V7K 5 U18B O 6 9 I O U18C 8 R329 1 2 47_0402_5% U18D D R331 SN74LVC14APWLE_TSSOP14 @10K_0402_5% 2 SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14 2 1K_0402_5% SB_PWRGD 20 1 U18A 4 G O P 14 I 7 3 2 0.1U_0402_16V7K R328 1 2 150K_0402_5% P 2 G 1 C374 O 7 SN74LVC32APWLE_TSSOP14 I G 1 1 2 150K_0402_5% 7 3 R332 2 14 14 R327 P O G B U17A 7 14 2 7 R330 @1M_0402_5% A 1 D 1 P 2 0_0402_5% 1 VGATE G 2 R326 44 +3VALW VTT_PWRGD 17,20 10K_0402_5% 1 +3VALW +3VALW 1 +2.5VS R333 2 1K_0402_5% 1 1 NB_PWRGD 7 D Q14 2N7002_SOT23 R334 47K_0402_5% S +3VALW 1 +3V 1 +3V 1 +3V 1 +3V C R346 10K_0402_5% 10K_0402_5% 2 R345 10K_0402_5% 2 R344 10K_0402_5% 2 R343 10K_0402_5% 2 R342 10K_0402_5% 2 R341 2 1 R340 2 R339 2 R338 2 @10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5% 2 R336 10K_0402_5% 2 R337 +3V 1 +3VS 1 +3VS 1 1 +3VS R335 2 C +3V 1 +3V 1 +3VALW 1 2 3 2 G 20 PWR_STRP 20 SB_EEDO 20 SB_EECLK 20,30 IAC_SYNC 20,30 IAC_SDATAO 20 SPDIF_OUT MANUAL PWR ON STRAP HIGH SPDIF_OUT ROM ON PCI BUS INIT ACTIVE HIGH 33MHz NB BUS SIO 24MHz SPEEDSTEP CPU_STP# ENABLE SPEED STEP DEFAULT AUTO PWR ON STRAP LOW 1 1 1 1 FREQLTCH TX_EN ROM ON LPC BUS INIT ACTIVE LOW (PIII) HI SPEED A-LINK SIO 48MHz DISABLE SPEED STEP DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT R358 B 32KHZ_S5 ETHERNET TXD[3:0] 32KHZ OUTPUT FROM SB200 (INT RTC) DISABLE CPU FREQ SETTING DEFAULT IGNORE DEBUG STRAPS R357 2 AC_SDOUT R356 2 AC_SYNC R355 2 EECK R354 2 2 @10K_0402_5%@10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5% 2 R353 10K_0402_5% IGN DEBUG EEDO USE DEBUG STRAPS 1 1 1 1 2 R352 10K_0402_5% 1 PWR_STRP R351 10K_0402_5% 2 REQUIRED SYSTEM STRAPS R350 10K_0402_5% 2 2 B R349 2 R348 @10K_0402_5% 10K_0402_5% 2 R347 1 1 1 20 MII_TXEN 20 MII_TXD3 20 MII_TXD2 20 MII_TXD1 20 MII_TXD0 20 32KHZ_S5_OUT PROCESSOR FREQ MULTIPLIER DEFAULT ENABLE CPU FREQSETTING 32KHZ INPUT TO SB200 (EXT RTC) 1 +3VS R359 2 10K_0402_5% A A 1 19,24,26,27,28 PCI_AD26 R360 2 @10K_0402_5% Title Compal Electronics, Inc. IXP150(4/4) - STRAPS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINSSize CONFIDENTIAL Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Thursday, April 08, 2004 Rev 0.2 LA-2301 5 4 3 2 Sheet 1 22 of 47 5 4 3 20 IDE_PDD[0..15] PIDE_RST# IDE_PDD7 IDE_PDD8 IDE_PDD6 IDE_PDD9 IDE_PDD5 IDE_PDD10 IDE_PDD4 IDE_PDD11 IDE_PDD3 IDE_PDD12 IDE_PDD2 IDE_PDD13 IDE_PDD1 IDE_PDD14 IDE_PDD0 IDE_PDD15 30,31,33 EC_IDERST +3V B 2 SN74LVC08APW_TSSOP14 1 5.6K_0402_5% 1 8.2K_0402_5% 1 10K_0402_5% U19A A B O 3 PIDE_RST# SN74LVC08APW_TSSOP14 GND:Master NC: Slave 2 475_0402_1% IDE_IORDYA 2 4.7K_0402_5% 1 R362 +3VS 6 O PHDD_LED# 2 100K_0402_5% 1 R361 +5VS 1 C376 0.1U_0402_16V4Z 1 2 1 R365 IDE_REQA 2 R363 2 R364 2 R366 IDE_IIRQA IDE_PDD7 C 20 IDE_REQA 20 IDE_IOWA# IDE_REQA IDE_IOWA# IDE_IORA# 20 IDE_IORA# 20 IDE_IORDYA 20 IDE_ACKA# 20 IDE_IIRQA 20 IDE_SA1 20 20 20 20 33 IDE_SA0 IDE_SA2 IDE_CSA#0 IDE_CSA#1 PHDD_LED# IDE_IORDYA PCSEL IDE_ACKA# IDE_IIRQA IDE_SA1 IDE_SA0 IDE_SA2 IDE_CSA#0 IDE_CSA#1 PHDD_LED# +5VS 60mil +5VS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 RESET# GND DD7 DD8 DD6 DD9 DD5 DD10 DD4 DD11 DD3 DD12 DD2 DD13 DD1 DD14 DD0 DD15 GND 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 DMARQ GND DIOW# / STOP GND DIOR# / HDMARDY# / HSTROBE GND IORDY / DDMARDY# / DSTROBE CSEL DMACK# GND INTRQ Reserved DA1 PDIAG# DA0 DA2 CS0# CS1# DASP# GND +5VCC +5VCC GND NC Place caps. near HDD CONN. 1 2 1 C377 10U_0805_10V4Z ALLTOP_C17864-14401_REVERSE Q15 AOS 3401_SOT23 3 1 4 14 1 O 5 I O 6 2 B 8 Place caps. near CDROM CONN. 2 R367 10K_0402_5% U16B OE# 10 2 1 C381 10U_0805_10V4Z 2 1 C382 1U_0603_10V4Z 2 2 C385 10U_0805_10V4Z C386 0.1U_0402_16V4Z 2 R368 1 C383 0.1U_0402_16V4Z +5VCD 1 C384 @1000P_0402_25V8K 1 2 240K_0402_5% +5VALW C387 1 2 SIDE_RST# R370 2 10K_0402_5% 1 1U_0603_10V4Z 7 2 SIDERST# P A 1 1 G 20 IDE_RST# 9 PCMRST# U19C C380 @1000P_0402_25V8K C +5VCD +3V 33 2 Net width should be 60mil wide 2 CD-ROM Connector 2 1 C379 0.1U_0402_16V4Z D +5VALW +5VCD 2 1 C378 1U_0603_10V4Z 1 PIDERST# U19B 7 20 P PCI_RST# G 19 A P IDE_RST# 4 2 @0_0402_5% 5 G 1 R731 7 2 0_0402_5% 14 1 R730 14 +3V 7,19,32,33 NB_RST# 1 JP6 HDD Connector D 2 IDE_PDD[0..15] SN74LVC125APWLE_TSSOP14 2 CD_PLAY +5VCD JP7 20 ODD_IOWB# 20 ODD_IORDYB 20 ODD_IIRQB 20 ODD_SA1 20 ODD_SA0 1 +3V R374 10K_0402_5% 2 A +5VCD 2 R372 33 SHDD_LED# 1 100K_0402_5% 1 D 3 G_PCI_RST# S PCI_RST# 2 G 2 R373 2N7002_SOT23 Q17 ODD_IOWB# ODD_IORDYB ODD_IIRQB ODD_SA1 ODD_SA0 SW_ODD_CSB#0 SHDD_LED# +5VCD SEC_CSEL 1 475_0402_1% G_PCI_RST# ODD_CSB#1 ODD_CSB#1 2 I 1 C389 2 R376 10K_0402_5% U16A O 3 2 0.1U_0402_16V4Z 1 20 ODD_REQB 20 ODD_IORB# 20 ODD_ACKB# SW_ODD_CSB#1 SN74LVC125APWLE_TSSOP14 +5VCD ODD_ACKB# 20 CBLIDB R369 2 ODD_SA2 SW_ODD_CSB#1 1 100K_0402_5% +5VCD ODD_SA2 20 G_PCI_RST# +5VCD +5VCD 1 2 FOX_QT8H0506-L201R-F +3V 1 ODD_SDD8 ODD_SDD9 ODD_SDD10 ODD_SDD11 ODD_SDD12 ODD_SDD13 ODD_SDD14 ODD_SDD15 ODD_REQB ODD_IORB# INT_CD_R 30,31 1 2 R829 @0_0402_5% 14 INT_CD_R P 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 OE# INT_CD_R GND ODD_SDD8 ODD_SDD9 ODD_SDD10 ODD_SDD11 ODD_SDD12 ODD_SDD13 ODD_SDD14 ODD_SDD15 ODD_REQB ODD_IORB# GND ODD_ACKB# N/A CBLIDB ODD_SA2 ODD_CSB#1 +5VS +5VS +5VS GND GND GND N/A G INT_CD_L CD_AGND SIDE_RST# ODD_SDD7 ODD_SDD6 ODD_SDD5 ODD_SDD4 ODD_SDD3 ODD_SDD2 ODD_SDD1 ODD_SDD0 GND ODD_IOWB# ODD_IORDYB ODD_IIRQB ODD_SA1 ODD_SA0 ODD_CSB#0 SHDD_LED# +5VS +5VS GND GND SEC_CSEL N/A 7 ODD_REQB 2 5.6K_0402_5% ODD_IIRQB 2 8.2K_0402_5% ODD_SDD7 1 5.6K_0402_5% 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 10 1 R378 1 R379 2 R380 INT_CD_L CD_AGND SIDE_RST# ODD_SDD7 ODD_SDD6 ODD_SDD5 ODD_SDD4 ODD_SDD3 ODD_SDD2 ODD_SDD1 ODD_SDD0 30,31 INT_CD_L 30 CD_AGND ODD_IORDYB 2 4.7K_0402_5% 20 ODD_CSB#0 ODD_CSB#0 9 I OE# 1 R377 R375 10K_0402_5% U16C O 8 SW_ODD_CSB#0 A SN74LVC125APWLE_TSSOP14 C388 0.1U_0402_16V4Z Title Compal Electronics, Inc. THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. IDE/CDROM CONN. Rev 0.2 LA-2301 Date: 5 B 3 20 ODD_SDD[0..15] +3VS CD_PLAY 31,33 Q16 DTC124EK_SC59 1 R371 10K_0402_5% 2 SN74LVC08APW_TSSOP14 1 B 4 3 2 Thursday, April 08, 2004 Sheet 1 23 of 47 4 3 CBE3# CBE2# CBE1# CBE0# 19,20,26,27,28 PCIRST# 19,26,27,28 PCI_FRAME# 19,26,27,28 PCI_IRDY# 19,26,27,28 PCI_TRDY# 19,26,27,28 PCI_DEVSEL# 19,26,27,28 PCI_STOP# 19,26,27,28 PCI_PERR# 19,26,27,28 PCI_SERR# 19,26,27,28 PCI_PAR 19 PCI_REQ#2 19 PCI_GNT#2 19 CLK_PCI_PCM G4 J4 K1 K3 L1 L2 L3 M1 M2 A1 B1 H1 PCIRST# FRAME# IRDY# TRDY# DEVSEL# STOP# PERR# SERR# PAR PCIREQ# PCIGNT# PCICLK 2 +VCC_5IN1 1 R832 @0_0805_5% B 2 R833 1 R383 1 R385 1 R387 1 R388 1 R389 SD_PULLHIGH 1 0_0805_5% SDCM_XDALE 2 43K_0402_5% SDDA0_XDD7 2 43K_0402_5% SDDA1_XDD0 2 43K_0402_5% SDDA2_XDCL 2 43K_0402_5% SDDA3_XDD4 2 43K_0402_5% +3VS IDSEL: PCI_AD20 1 R837 26,27,28,33 PCM_PME# 1 +3VS R384 PCI_AD20 1 R386 8,19,27 PCI_PIRQA# 19 PCI_PIRQB# 19,32,33 SERIRQ 2 @43K_0402_5% 35 5IN1_LED# 19,26,27,28,32,33 PM_CLKRUN# 25 SDOC# CLK_PCI_PCM L8 2+3V_PCM_SUSP L11 10K_0402_5% PCM_ID 2 F4 100_0402_1% PCI_PIRQA# K8 SD_PULLHIGH N9 PCI_PIRQB# K9 N10 L10 N11 M11 SDOC# J9 PCIRST# Close chip termenal +VCC_5IN1 1 R391 1 R392 1 R836 SDCD# 2 43K_0402_5% SDWP 2 43K_0402_5% MSINS# 2 @43K_0402_5% 25 25 25 SDCD# SDWP SDPWREN# 17 CLK_EXT_SD48 SDCD# SDWP SDPWREN# R398 2 33_0402_5% SDCM_XDALE SDDA0_XDD7 SDDA1_XDD0 SDDA2_XDCL SDDA3_XDD4 1 25 SDCK_XDWE# 25 SDCM_XDALE 25 SDDA0_XDD7 25 SDDA1_XDD0 25 SDDA2_XDCL 25 SDDA3_XDD4 B4 C8 D12 H11 L9 L6 N4 K2 G1 F3 VCC10 VCC9 VCC8 VCC7 VCC6 VCC5 VCC4 VCC3 VCC2 VCC1 A7 G13 VCCA2 VCCA1 M12 N12 VPPD1 VPPD0 RIOUT#_PME# SUSPEND# CAD31/D10 CAD30/D9 CAD29/D1 CAD28/D8 CAD27/D0 CAD26/A0 CAD25/A1 CAD24/A2 CAD23/A3 CAD22/A4 CAD21/A5 CAD20/A6 CAD19/A25 CAD18/A7 CAD17/A24 CAD16/A17 CAD15/IOWR# CAD14/A9 CAD13/IORD# CAD12/A11 CAD11/OE# CAD10/CE2# CAD9/A10 CAD8/D15 CAD7/D7 CAD6/D13 CAD5/D6 CAD4/D12 CAD3/D5 CAD2/D11 CAD1/D4 CAD0/D3 B2 C3 B3 A3 C4 A6 D7 C7 A8 D8 A9 C9 A10 B10 D10 E12 F10 E13 F13 F11 G10 G11 G12 H12 H10 J11 J12 K13 J10 K10 K12 L13 CCBE3#/REG# CCBE2#/A12 CCBE1#/A8 CCBE0#/CE1# B7 A11 E11 H13 S1_REG# S1_A12 S1_A8 S1_CE1# CRST#/RESET CFRAME#/A23 CIRDY#/A15 CTRDY#/A22 CDEVSEL#/A21 CSTOP#/A20 CPERR#/A14 CSERR#/WAIT# CPAR/A13 CREQ#/INPACK# CGNT#/WE# CCLK/A16 B9 B11 A12 A13 B13 C12 C13 A5 D13 B8 C11 B12 C5 D5 S1_RST S1_A23 S1_A15 S1_A22 S1_A21 S1_A20 S1_A14 S1_WAIT# S1_A13 S1_INPACK# S1_WE# A16_CLK 1 R382 S1_BVD1 S1_WP D11 S1_A19 D6 S1_RDY# M9 B5 PCM_SPK# S1_BVD2 A4 L12 D9 C6 A2 E10 J13 S1_CD2# S1_CD1# S1_VS2 S1_VS1 S1_D2 S1_A18 S1_D14 CSTSCHG/BVD1_STSCHG# CCLKRUN#/WP_IOIS16# IDSEL CBLOCK#/A19 MFUNC0 MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6 MFUNC7 CINT#/READY_IREQ# SPKROUT CAUDIO/BVD2_SPKR# CCD2#/CD2# CCD1#/CD1# CVS2/VS2# CVS1/VS1 CRSV3/D2 CRSV2/A18 CRSV1/D14 GRST# SD/MMC/MS/SM E7 VCC_SD E8 F8 G7 SDCD# SDWP/SMWPD# SDPWREN33# H5 SDCLKI F6 E5 E6 F7 F5 G6 SDCLK/SMWE# SDCMD/SMALE SDDAT0/SMDATA7 SDDAT1/SMDATA0 SDDAT2/SMCLE SDDAT3/SMDATA4 G5 GND_SD MSINS# MSPWREN#/SMPWREN# MSBS/SMDATA1 MSCLK/SMRE# MSDATA0/SMDATA2 MSDATA1/SMDATA6 MSDATA2/SMDATA5 MSDATA3/SMDATA3 H7 J8 H8 E9 G9 H9 G8 F9 SMBSY# SMCD# SMWP# SMCE# H6 J7 J6 J5 D3 H2 L4 M8 K11 F12 C10 B6 A M10 S1_D[0..15] S1_D10 S1_D9 S1_D1 S1_D8 S1_D0 S1_A0 S1_A1 S1_A2 S1_A3 S1_A4 S1_A5 S1_A6 S1_A25 S1_A7 S1_A24 S1_A17 S1_IOWR# S1_A9 S1_IORD# S1_A11 S1_OE# S1_CE2# S1_A10 S1_D15 S1_D7 S1_D13 S1_D6 S1_D12 S1_D5 S1_D11 S1_D4 S1_D3 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 1 2 2 C402 15P_0402_50V8J S1_D[0..15] 2 1 C393 0.1U_0402_16V4Z D 1 2 1 C394 0.1U_0402_16V4Z 1 C395 0.1U_0402_16V4Z 2 1 S1_IOWR# 25 C396 0.1U_0402_16V4Z 2 S1_IORD# 25 S1_OE# S1_CE2# 2 1 C398 0.1U_0402_16V4Z C397 0.1U_0402_16V4Z 2 2 1 C399 0.1U_0402_16V4Z 2 1 C400 0.1U_0402_16V4Z 2 C401 0.1U_0402_16V4Z 25 25 C S1_REG# 25 S1_CE1# 25 S1_RST 25 S1_CD1# C403 10P_0402_50V8K S1_CD2# 1 2 C404 10P_0402_50V8K Closed to Pin L12 1 2 Closed to Pin A4 S1_WAIT# 25 S1_INPACK# 25 S1_WE# 25 S1_A16 2 33_0402_5% Close chip termenal S1_BVD1 25 S1_WP 25 MSD0_XDD2 S1_RDY# 25 MSD1_XDD6 PCM_SPK# 30 S1_BVD2 25 S1_CD2# S1_CD1# S1_VS2 S1_VS1 XD_MS_PWREN# MSBS_XDD1 1 MSD0_XDD2 R394 MSD1_XDD6 MSD2_XDD5 MSD3_XDD3 MSD2_XDD5 MSD3_XDD3 25 25 25 25 MSBS_XDD1 1 R397 1 R399 1 R400 1 R401 1 R403 2 43K_0402_5% 2 43K_0402_5% 2 43K_0402_5% 2 43K_0402_5% 2 43K_0402_5% B MSINS# 25 XD_MS_PWREN# 25 MSBS_XDD1 25 2 MSCLK_XDRE# 25 33_0402_5% MSD0_XDD2 25 MSD1_XDD6 25 MSD2_XDD5 25 MSD3_XDD3 25 XDBSY# XDCD# XDWP# XDCE# 25 25 25 25 A R831 43K_0402_5% CB714_LFBGA169 Date: 3 1 +S1_VCC Compal Electronics, Inc. PCMCIA Controller ENE CB714 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4 2 25 Title 5 2 C392 0.1U_0402_16V4Z 2 E1 J3 N1 N5 19,26,27,28 19,26,27,28 19,26,27,28 19,26,27,28 1 2 S1_A[0..25] 25 1 C391 0.1U_0402_16V4Z 1 PCI_C/BE#3 PCI_C/BE#2 PCI_C/BE#1 PCI_C/BE#0 R381 10_0402_5% S1_A[0..25] 1 C390 0.1U_0402_16V4Z +3VS CARDBUS AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 CLK_PCI_PCM C VCCD1# VCCD0# C2 C1 D4 D2 D1 E4 E3 E2 F2 F1 G2 G3 H3 H4 J1 J2 N2 M3 N3 K4 M4 K5 L5 M5 K6 M6 N6 M7 N7 L7 K7 N8 D +3VS 1 PCI_AD[0..31] PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0 1 +S1_VCC +3VS U21 19,22,26,27,28 PCI_AD[0..31] 2 VPPD0 VPPD1 VCCD0# VCCD1# PCI Interface 25 25 25 25 M13 N13 5 2 Rev 0.2 LA-2301 Thursday, April 08, 2004 Sheet 1 24 of 47 5 4 3 2 1 PCMCIA Power Controller CardBus Socket D 0.1U_0402_16V4Z 9 C408 +S1_VCC U22 VCC VCC VCC 12V 40mil 13 12 11 +S1_VPP +5VS 0.1U_0402_16V4Z C412 4.7U_0805_10V4Z C413 5 6 S1_A[0..25] OC VCCD0# VCCD1# VPPD0 VPPD1 JP8 S1_D[0..15] Close to CardBus Conn. 24 24 24 24 +S1_VCC 1 1 C415 0.1U_0402_16V4Z 2 2 24 S1_CE1# 24 S1_OE# 24 24 S1_WE# S1_RDY# +S1_VCC +S1_VPP S1_A16 S1_A15 S1_A12 S1_A7 S1_A6 S1_A5 S1_A4 S1_A3 S1_A2 S1_A1 S1_A0 S1_D0 S1_D1 S1_D2 S1_WP +S1_VPP 8 1 CP-2211_SSOP16 C418 4.7U_0805_10V4Z 2 1 C419 0.01U_0402_25V7Z 2 C 24 SD CLK 1 xD PU and PD. Close to Socket R406 @0_0402_5% XDCD# 24 XDBSY# 24 Reserve for Debug. +VCC_5IN1 2 43K_0402_5% 2 MSCLK_XDRE# 43K_0402_5% 2 SDCK_XDWE# 2.2K_0402_5% XDCE# 24 +S1_VCC C420 @10P_0402_50V8K 1 R408 1 R410 1 R412 1 R414 1 R416 1 MSCLK_XDRE# 24 MSCLK_XDRE# 2 C421 @10P_0402_50V8K B 1 2 +VCC_5IN1 JP9 XDBSY# SDCM_XDALE XDCD# SDDA2_XDCL 30 24 33 28 26 31 9 36 20 SM_VCC / XD_VCC SM_D0 / XD_D0 SM_D1 / XD_D1 SM_D2 / XD_D2 5 IN SM_D3 / XD_D3 SM_D4 / XD_D4 SM_D5 / XD_D5 SM_D6 / XD_D6 SM_D7 / XD_D7 SM_-RE / XD_-RE SM_-WP / XD_-WP SM_-CE / XD_-CE SM_-WE / XD_-WE SM_R/-B / XD_R/-B SM_ALE / XD_ALE SM_CD / XD_CD SM_CLE / XD_CLE SM_LVD A 2 38 SDWP SM-CD2 / SW-CD2 SM-WP2 / SW-WP2 1 CONN SD_VCC SD_DAT0 SD_DAT1 SD_DAT2 SD_DAT3 SD_CLK SD_CMD 11 6 5 37 34 8 32 MS_VCC MS_D0 MS_D1 MS_D2 MS_D3 MS_SCLK MS_BS MS_INS 29 17 16 19 25 27 13 22 GND GND GND GND GND 1 42 41 40 39 SDDA0_XDD7 SDDA1_XDD0 SDDA2_XDCL SDDA3_XDD4 SDCK_XDWE# SDCM_XDALE +VCC_5IN1 SDDA0_XDD7 24 SDDA1_XDD0 24 SDDA2_XDCL 24 SDDA3_XDD4 24 SDDA1_XDD0 MSBS_XDD1 MSD0_XDD2 MSD3_XDD3 SDDA3_XDD4 MSD2_XDD5 MSD1_XDD6 SDDA0_XDD7 34 33 32 31 21 22 23 24 SM-D0 SM-D1 / XD-D1 SM-D2 / XD-D2 SM_D3 / XD_D3 SM-D4 / XD-D4 SM-D5 / XD-D5 SM-D6 / XD-D6 SM-D7 / XD-D7 XDWP# SDWP SDCK_XDWE# SDCM_XDALE 35 43 36 37 SM_WP-IN / XD_WP-IN SM-WP-SW #SM_-WE / XD_-WE #SM-ALE / XD-ALE XDBSY# MSCLK_XDRE# XDCE# XDCD# 25 3 29 26 27 28 30 2 38 SM-LVD SM-VCC-SW SM_-VCC / XD_-VCC #SM_R/-B / XD_R/-B #SM_-RE / XD_-RE #SM_-CE / XD_-CE #SM_-CD SM-COM-SW SM-CLE / XD-CLE SDDA2_XDCL S1_CD1# 24 D S1_CE2# S1_VS1 S1_IORD# S1_IOWR# 24 24 24 24 +S1_VCC +S1_VPP S1_A22 S1_A23 S1_A24 S1_A25 S1_VS2 S1_RST S1_WAIT# S1_INPACK# S1_REG# S1_BVD2 S1_BVD1 S1_D8 S1_D9 S1_D10 S1_CD2# S1_VS2 24 S1_RST 24 S1_WAIT# 24 S1_INPACK# 24 S1_REG# 24 S1_BVD2 24 S1_BVD1 24 S1_CD2# 5 IN 1 SD-DAT3 SD-DAT2 SD-DAT1 CONN SD-DAT0 SD-WP-SW SD-CMD SD_CLK SD-VCC SD-CD-SW SD-VCC-SW SD-COM-SW 11 12 6 7 5 10 8 9 4 42 41 SDDA3_XDD4 SDDA2_XDCL SDDA1_XDD0 SDDA0_XDD7 SDWP SDCM_XDALE SDCK_XDWE# MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3 MS-SCLK MS-INS MS-BS MS-VCC 15 14 16 18 19 17 13 20 MSD0_XDD2 MSD1_XDD6 MSD2_XDD5 MSD3_XDD3 MSCLK_XDRE# MSINS# MSBS_XDD1 XD-VCC XD-CD GND GND 40 39 1 44 SDCM_XDALE 24 C 24 +VCC_5IN1 SDCD# B +VCC_5IN1 +VCC_5IN1 XDCD# TAITWUN_R007-L30-15-S SD-SW-CD1 / SW-CD1 SD-SW-WP1 / SW-WP1 3 4 MSD0_XDD2 MSD1_XDD6 MSD2_XDD5 MSD3_XDD3 MSCLK_XDRE# MSBS_XDD1 MSINS# +VCC_5IN1 MSD0_XDD2 MSD1_XDD6 MSD2_XDD5 MSD3_XDD3 24 24 24 24 +3VS 2 MSCLK_XDRE# XDWP# XDCE# SDCK_XDWE# 35 21 18 15 12 7 10 14 23 MSBS_XDD1 24 MSINS# 24 24 SDPWREN# 24 XD_MS_PWREN# SDCD# SDWP SDCD# SDWP 24 24 +3VS SD PWR Control +VCC_5IN1 R418 10K_0402_5% +3VS 1 24 XDWP# SDDA1_XDD0 MSBS_XDD1 MSD0_XDD2 MSD3_XDD3 SDDA3_XDD4 MSD2_XDD5 MSD1_XDD6 SDDA0_XDD7 S1_CD1# S1_D11 S1_D12 S1_D13 S1_D14 S1_D15 S1_CE2# S1_VS1 S1_IORD# S1_IOWR# S1_A17 S1_A18 S1_A19 S1_A20 S1_A21 JP27 MS CLK R417 @0_0402_5% +VCC_5IN1 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 70 72 74 76 78 80 82 84 FOX_1CA41502-TC-AW_84P_LT 2 1 1 R411 1 R407 1 R409 S1_WP 2 43K_0402_5% S1_OE# 2 47K_0402_5% S1_RST 2 47K_0402_5% S1_CE1# 2 47K_0402_5% S1_CE2# 2 47K_0402_5% GND GND S1_D3 S1_CD1# S1_D4 S1_D11 S1_D5 S1_D12 S1_D6 S1_D13 S1_D7 S1_D14 S1_CE1# S1_D15 S1_A10 S1_CE2# S1_OE# S1_VS1 S1_A11 S1_IORD# S1_A9 S1_IOWR# S1_A8 S1_A17 S1_A13 S1_A18 S1_A14 S1_A19 S1_WE# S1_A20 S1_RDY# S1_A21 S1_VCC S1_VCC S1_VPP S1_VPP S1_A16 S1_A22 S1_A15 S1_A23 S1_A12 S1_A24 S1_A7 S1_A25 S1_A6 S1_VS2 S1_A5 S1_RST S1_A4 S1_WAIT# S1_A3 S1_INPACK# S1_A2 S1_REG# S1_A1 S1_BVD2 S1_A0 S1_BVD1 S1_D0 S1_D8 S1_D1 S1_D9 S1_D2 S1_D10 S1_WP S1_CD2# GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND 2 XDCD# 1 43K_0402_5% XDBSY# 1 43K_0402_5% 2 2 R413 2 R415 S1_WP SDCK_XDWE# 24 SDCK_XDWE# +3VS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 69 71 73 75 77 79 81 83 S1_D3 S1_D4 S1_D5 S1_D6 S1_D7 S1_CE1# S1_A10 S1_OE# S1_A11 S1_A9 S1_A8 S1_A13 S1_A14 S1_WE# S1_RDY# 1 7 R405 10K_0402_5% SHDN GND C417 3.3V 3.3V 16 4.7U_0805_10V4Z 3 4 VCCD0 VCCD1 VPPD0 VPPD1 1 2 15 14 20mil S1_A[0..25] S1_D[0..15] C414 10U_0805_10V4Z 2 C416 10 C407 0.1U_0402_16V4Z 1 2 C409 10U_0805_10V4Z 1 2 C410 0.01U_0402_25V4Z 1 2 C411 1U_0603_10V4Z 24 24 5V 5V +3VS 0.1U_0402_16V4Z VPP 1 2 C406 0.1U_0402_16V4Z U23 1 2 3 4 GND IN IN EN# OUT OUT OUT OC# R815 10K_0402_5% 8 7 6 5 1 +5VS R834 1 2 SDOC# 24 A 0_0402_5% TPS2041ADR_SO8 TAISOL_152-4001004-00-1 Title Compal Electronics, Inc. PCMCIA Socket THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.2 LA-2301 Date: 5 4 3 2 Thursday, April 08, 2004 Sheet 1 25 of 47 4 31 PME# 27 RST# 19 CLK_PCI_LAN 19,24,27,28,32,33 PM_CLKRUN# 4 17 128 1 2 Y3 LAN_X2 25MHZ_20P_1BX25000CK1A C432 27P_0402_50V8J 1 2 C433 27P_0402_50V8J 35 52 80 100 NC/HSDAC+ NC/HG NC/LG2 NC/LV2 11 123 124 126 GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND GND GND GND 11 10 9 1 NS0013_16P 1 C424 0.01U_0402_25V7Z R429 75_0402_1% 1 R430 75_0402_1% 1 C425 0.01U_0402_25V7Z 2 2 1 R426 49.9_0402_1% 2 RJ45_TX+ RJ45_TX- 1 1 CT TX+ TX- 2 1 1 2 +3VS 2 2 1K_0402_5% 2 15K_0402_5% 2 5.9K_0603_1% CT TD+ TD- 2 C426 0.01U_0402_25V7Z RJ45_GND +LAN_DVDD +3V NC/VSS NC/VSS 9 13 NC/GND NC/GND NC/GND NC/GND NC/GND NC/GND 22 48 62 73 112 118 C E 8 RTT3/CRTL18 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 26 41 56 71 84 94 107 CLK CLKRUN# GND/VSS GND/VSS GND/VSS R424 1 R427 1 R428 1 6 7 8 RJ45_RX+ RJ45_RX- 2 10 120 125 AVDD33/AVDDL AVDD33/AVDDL AVDD33/AVDDL NC/AVDDL 3 7 20 16 VDD25/VDD18 VDD25/VDD18 VDD25/VDD18 VDD25/VDD18 32 54 78 99 Power LAN_X1 88 CTRL25 B 21 38 51 66 81 91 101 119 NC/M66EN NC/AVDDH NC/HV 10mil 10mil R423 49.9_0402_1% R425 49.9_0402_1% 16 15 14 NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18 2 B Q18 2SB1197K_SOT23 C 40mil 1 C427 10U_0805_10V4Z +2.5V_LAN 1 2 2 3 +3V C428 0.1U_0402_16V4Z C CTRL25 Q19 DTA114YKA_SOT23 1 1 2 R432 300_0402_5% JP10 10mil 12 Amber LED+ 11 Amber LED- 8 CTRL25 7 PR4+ 6 PR2- 5 PR3- 4 PR3+ RJ45_RX+ 3 PR2+ RJ45_TX- 2 PR1- RJ45_TX+ 1 PR1+ ACTIVITY# RJ45_RX+3V +LAN_AVDDL 1 L18 40mil 1 C429 2 0_0805_5% +3V 1 1 0.1U_0402_16V4Z C431 0.1U_0402_16V4Z 2 C430 2 3 +3V 0.1U_0402_16V4Z 2 1 1 +LAN_DVDD 40mil 24 45 64 110 116 1 R436 1 2 0_0805_5% C435 2 0.1U_0402_16V4Z 2 R433 300_0402_5% Q20 DTA114YKA_SOT23 LINK10_100# +2.5V_LAN 1 1 0.1U_0402_16V4Z 10 Green LED- 9 Green LED+ 10mil SHLD4 16 SHLD3 15 SHLD2 14 SHLD1 13 B TYCO_1566735-1 R434 R435 75_0402_1% 75_0402_1% RJ45_GND C437 C4360.1U_0402_16V4Z 2 2 PR4- 1 24,27,28,33 LAN_PME# 28 65 105 23 127 72 74 R422 49.9_0402_1% RX+ RXCT 2 INTA# CLK_PCI_LAN PM_CLKRUN# LWAKE ISOLATE# RTSET NC/SMBCLK NC/SMBDATA LAN_TD+ LAN_TD- RD+ RDCT 1 25 19,20,24,27,28 PCIRST# X1 X2 LAN_X1 LAN_X2 D 1 2 3 2 19,28 PCI_PIRQD# 14 15 18 19 121 122 REQ# GNT# U26 LAN_RD+ LAN_RD- 10K 30 29 PCI_REQ#1 PCI_GNT#1 C422 0.1U_0402_16V4Z C 19 19 PERR# SERR# 2 AT93C46-10SI-2.7_SO8 10K 70 75 1 2 19,24,27,28 PCI_PERR# 19,24,27,28 PCI_SERR# VCC NC NC GND 2 PAR FRAME# IRDY# TRDY# DEVSEL# STOP# CS SK DI DO 8 7 6 5 E 76 61 63 67 68 69 1 2 3 4 47K 19,24,27,28 PCI_PAR 19,24,27,28 PCI_FRAME# 19,24,27,28 PCI_IRDY# 19,24,27,28 PCI_TRDY# 19,24,27,28 PCI_DEVSEL# 19,24,27,28 PCI_STOP# 2 LAN_IDSEL 100_0402_1% LAN_TD+ LAN_TDLAN_RD+ LAN_RD- LAN_EECS LAN_EECLK LAN_EEDI LAN_EEDO +3V B IDSEL 1 R431 1 2 5 6 2 R420 5.6K_0402_5% E 46 PCI_AD19 ACTIVITY# LINK10_100# LAN RTL8100C(L) U25 1 47K PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3 117 115 114 113 NC/MDI2+ NC/MDI2NC/MDI3+ NC/MDI3- C/BE#0 C/BE#1 C/BE#2 C/BE#3 PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3 LED0 LED1 LED2 NC/LED3 TXD+/MDI0+ TXD-/MDI0RXIN+/MDI1+ RXIN-/MDI1- 92 77 60 44 19,24,27,28 19,24,27,28 19,24,27,28 19,24,27,28 LAN_EEDO LAN_EEDI LAN_EECLK LAN_EECS B C 2 108 109 111 106 3 C423 15P_0402_50V8J 1 +3V EEDO AUX/EEDI EESK EECS 1 1 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 LAN I/F 1 2 R421 10_0402_5% 104 103 102 98 97 96 95 93 90 89 87 86 85 83 82 79 59 58 57 55 53 50 49 47 43 42 40 39 37 36 34 33 PCI I/F PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 CLK_PCI_LAN D 2 U24 PCI_AD[0..31] 19,22,24,27,28 PCI_AD[0..31] 3 2 5 1 20mil LANGND 2 C434 1000P_1206_2KV7K 1 1 C438 2 2 C439 4.7U_0805_10V4Z +3V AVDD25/HSDACRTL8100C_QFP128 12 +2.5V_LAN_VDD 20mil 1 C440 0.1U_0402_16V4Z 2 1 2 1 R437 2 0_0805_5% 0.1U_0402_16V4Z +2.5V_LAN 0.1U_0402_16V4Z 1 1 1 C441 10U_0805_10V4Z C442 2 2 0.1U_0402_16V4Z C443 0.1U_0402_16V4Z 1 1 C444 2 2 0.1U_0402_16V4Z C445 1 C446 2 2 0.1U_0402_16V4Z C447 0.1U_0402_16V4Z Termination plane should be closed to chassis ground and also depends on safety concern A A Title Compal Electronics, Inc. LAN REALTEK RTL8100CL THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-2301 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 Thursday, April 08, 2004 Rev 0.2 Sheet 1 26 of 47 B C D +3VS 1 R438 1 R439 1 R440 1 R441 2 R442 2 4.7K_0402_5% 2 10K_0402_5% 2 4.7K_0402_5% 2 4.7K_0402_5% 1 4.7K_0402_5% DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD PLLVDD AVDD AVDD AVDD AVDD AVDD 15 27 39 51 59 72 88 100 7 1 2 107 108 120 CPS 106 NC/(TPBIAS1) NC/(TPA1+) NC/(TPA1-) NC/(TPB1+) NC/(TPB1-) 125 124 123 122 121 +3VS PCIRST# 86 96 10 11 CYCLEOUT/CARDBUS CNA TEST17 TEST16 BIAS CURRENT 1 R0 OSCILLATOR FILTER 118 R1 119 X0 6 X1 5 FILTER0 3 FILTER1 4 +3VS 0.01U_0402_25V4Z 1 1 1 C461 C462 2 1 R443 C463 1 2 C465 1 8 9 109 110 111 117 126 127 128 17 23 30 33 44 55 64 68 75 83 93 103 220_1206_8P4R_5% 1 4 C468 1 1 1 C456 C457 1 1 C458 1 C459 C460 2 +3VS 0_0805_5% 2 18P_0402_50V8J C464 1 2 18P_0402_50V8J R446 56.2_0603_1% TPBIAS0 TPA0+ TPA0TPB0+ TPB0- 116 115 114 113 112 2 C466 0.33U_0603_16V4Z JP11 3 4 3 2 1 R448 56.2_0603_1% 1 TSB43AB21A_PQFP128 1 R447 56.2_0603_1% 2 AMP_440168-2 R449 56.2_0603_1% C467 R451 5.11K_0603_1% 220P_0402_50V7K C469 0.1U_0402_16V4Z 2 2 0.1U_0402_16V4Z 1 CLK_PCI_1394 0.1U_0402_16V4Z 0.1U_0402_16V4Z SCL_1394 101 102 104 105 C455 2 99 98 97 TEST3 TEST2 TEST1 TEST0 2 2 GPIO3 GPIO2 0.1U_0402_16V4Z 1 G_RST 2 1 C454 2 SCL_1394 SDA_1394 14 89 90 0.1U_0402_16V4Z 4.7U_0805_10V4Z 2 8 7 6 5 2 1 C453 X5 24.576MHz_16P_3XG-24576-43E1 PC0 PC1 PC2 PLLGND1 REG_EN AGND AGND AGND AGND AGND AGND AGND DGND DGND REG18 DGND DGND DGND DGND DGND DGND DGND REG18 DGND RP118 1 2 3 4 0.1U_0402_16V4Z 2 SDA_1394 94 95 2 1 C452 1 2 R444 6.34K_0603_1% 91 TEST9 TEST8 1 2 1K_0402_5% SCL TPBIAS0 TPA0+ TPA0TPB0 + TPB0 - 0.1U_0402_16V4Z L19 +1394_PLLVDD 92 PHY PORT 1 2 C451 @1000P_0402_50V7K @1000P_0402_50V7K @1000P_0402_50V7K @1000P_0402_50V7K @1000P_0402_50V7K 2 2 2 2 2 +3VS EEPROM 2 WIRE BUS SDA POWER CLASS 0.1U_0402_16V4Z +3VS 1 3 19,24,26,28 PCI_FRAME# 19,24,26,28 PCI_IRDY# 19,24,26,28 PCI_TRDY# 19,24,26,28 PCI_DEVSEL# 19,24,26,28 PCI_STOP# 19,24,26,28 PCI_PERR# 8,19,24 PCI_PIRQA# 24,26,28,33 1394_PME# 19,24,26,28 PCI_SERR# 19,24,26,28 PCI_PAR 19,24,26,28,32,33 PM_CLKRUN# 19,20,24,26,28 PCIRST# TSB43AB21A /(TSB43AB22) 2 1 C450 1 19,24,26,28 PCI_C/BE#3 19,24,26,28 PCI_C/BE#2 19,24,26,28 PCI_C/BE#1 19,24,26,28 PCI_C/BE#0 19 CLK_PCI_1394 19 PCI_GNT#0 19 PCI_REQ#0 0.1U_0402_16V4Z 2 2 1394_IDSEL 100_0402_5% 2 1 C449 1 1 R445 0.1U_0402_16V4Z 1 PCI_AD16 2 1 C448 2 IDSEL:PCI_AD16 PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_C/BE3 PCI_C/BE2 PCI_C/BE1 PCI_C/BE0 PCI_CLK PCI_GNT PCI_REQ PCI_IDSEL PCI_FRAME PCI_IRDY PCI_TRDY PCI_DEVSEL PCI_STOP PCI_PERR PCI_INTA/CINT PCI_PME/CSTSCHG PCI_SERR PCI_PAR PCI_CLKRUN PCI_RST 1 1 2 84 82 81 80 79 77 76 74 71 70 69 67 66 65 63 61 46 45 43 42 41 40 38 37 32 31 29 28 26 25 24 22 34 47 60 73 16 18 19 36 49 50 52 53 54 56 13 21 57 58 12 85 PCI BUS INTERFACE PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_C/BE#3 PCI_C/BE#2 PCI_C/BE#1 PCI_C/BE#0 CLK_PCI_1394 PCI_GNT#0 PCI_REQ#0 1394_IDSEL PCI_FRAME# PCI_IRDY# PCI_TRDY# PCI_DEVSEL# PCI_STOP# PCI_PERR# PCI_PIRQA# 1394_PME# PCI_SERR# PCI_PAR CYCLEIN U27 VDDP VDDP VDDP VDDP VDDP 19,22,24,26,28 PCI_AD[0..31] 20 35 48 62 78 PCI_AD[0..31] 87 1 E +3VS 2 A 4 2 R452 10_0402_5% 1 2 C470 Title 15P_0402_50V8J Compal Electronics, Inc. TI 1394 Controller TSB43AB21A THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-2301 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: A B C D Thursday, April 08, 2004 Rev 0.2 Sheet E 27 of 47 12 33,35 A 13 KILL_SW# B SN74LVC08APW_TSSOP14 U19D O MINI_PCI SOCKET 11 G WL_OFF# 7 33 P 14 +3V TIP LAN RESERVED INTB# +3V_MINIPCI L20 1 PCI_PIRQD# 19,26 PCI_PIRQD# W=40mils 2 0_0603_5% CLK_PCI_MINI 19 CLK_PCI_MINI C472 0.1U_0402_16V4Z 2 2 1 1 19 PCI_REQ#3 PCI_AD31 PCI_AD29 C473 0.1U_0402_16V4Z PCI_AD27 PCI_AD25 19,24,26,27 PCI_C/BE#3 PCI_AD23 PCI_AD21 PCI_AD19 PCI_AD17 19,24,26,27 PCI_C/BE#2 19,24,26,27 PCI_IRDY# 19,24,26,27,32,33 PM_CLKRUN# 19,24,26,27 PCI_SERR# 19,24,26,27 PCI_PERR# 19,24,26,27 PCI_C/BE#1 PCI_AD14 PCI_AD12 PCI_AD10 PCI_AD8 PCI_AD7 1 CLK_PCI_MINI PCI_AD5 R454 10_0402_5% PCI_AD3 W=30mils PCI_AD1 +5VS_MINIPCI 2 +3V RB751V_SOD323 D22 1 2 1 C478 15P_0402_50V8J 2 +5VS 1 L22 W=30mils 2 0_0603_5% JP12 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 1 KEY 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 2 KEY 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 2 RING PCI_AD[0..31] 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 W=30mils PCI_PIRQC# W=40mils 19,22,24,26,27 +5VS_MINIPCI PCI_PIRQC# 19 INTA# +3V_MINIPCI +3V PCIRST# 19,20,24,26,27 WLANPME# 24,26,27,33 PCI_AD30 PCI_AD28 PCI_AD26 PCI_AD24 MINI_IDSEL 1 R453 PCI_AD22 PCI_AD20 PCI_AD18 PCI_AD16 2 PCI_AD18 100_0402_5% C474 0.1U_0402_16V4Z +3V_MINIPCI L21 W=40mils 1 2 0_0603_5% +3V PCI_GNT#3 19 2 2 1 1 1 C475 0.1U_0402_16V4Z 2 1 C476 0.1U_0402_16V4Z 2 C477 10U_0805_10V4Z IDSEL:PCI_AD18 PCI_PAR 19,24,26,27 PCI_FRAME# 19,24,26,27 PCI_TRDY# 19,24,26,27 PCI_STOP# 19,24,26,27 PCI_DEVSEL# 19,24,26,27 PCI_AD15 PCI_AD13 PCI_AD11 PCI_AD9 PCI_C/BE#0 19,24,26,27 PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0 W=20mils QTC_C102A-056B11-01 +5VS_MINIPCI PCI_AD[0..31] LAN RESERVED 2 +3V C479 0.1U_0402_16V4Z 1 +5VS_MINIPCI 1 2 1 C480 1000P_0402_50V7K 2 1 C481 0.1U_0402_16V4Z 2 1 C482 0.1U_0402_16V4Z 2 C483 10U_0805_10V4Z Title Compal Electronics, Ltd. Mini PCI Slot THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D CustomLA-2301 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Thursday, April 08, 2004 Rev 0.2 Sheet 28 of 47 5 4 3 2 1 U55 1 2 3 4 1 2 R828 @0_0402_5% GND IN EN1# EN2# OC1# OUT1 OUT2 OC2# 8 7 6 5 +USB_VCCB +5V +USB_VCCC @TPS2042ADR_SO8 +3V +USB_VCCA +USB_VCCC +USB_VCCC R455 100K_0402_5% 2 +5V U29 1 1 + C490 @150U_D2_6.3VM 1 2 3 4 2 C491 0.1U_0402_16V4Z 2 GND IN EN1# EN2# OC1# OUT1 OUT2 OC2# 1 2 8 7 R727 @0_0402_5% 6 1 5 R728 2 C484 100U_D2_10VM 2 40mil 1 1 + 100K_0402_5% R456 +USB_VCCB 40mil 1 + C487 @470P_0402_50V7K 2 1 C485 100U_D2_10VM 2 1 + C488 @470P_0402_50V7K 2 C486 100U_D2_10VM 2 C489 @470P_0402_50V7K D 2 D 1 1 +USB_VCCB 1 40mil 2 @0_0402_5% TPS2042ADR_SO8 1 R457 2 47K_0402_5% 1 R458 2 47K_0402_5% C492 0.1U_0402_16V4Z OVCUR#0 20 OVCUR#2 20 1 1 2 2 C493 0.1U_0402_16V4Z +USB_VCCC +USB_VCCB JP13 20 20 1 2 3 4 USB20P0USB20P0+ +3V +USB_VCCA 1 +5V 1 2 3 4 C 1 1 C494 @150U_D2_6.3VM 2 2 C495 0.1U_0402_16V4Z GND IN IN EN# R459 100K_0402_5% OUT OUT OUT OC# 8 7 6 5 G1 G2 G3 12 13 14 G4 G5 G6 USB20P2- 20 USB20P2+ 20 FOX_UB91123-ST2-FR C 2 U30 + 9 10 11 VCC VCC D0- D1D0+ D1+ VSS VSS 5 6 7 8 1 R729 2 @0_0402_5% TPS2041ADR_SO8 1 R460 2 47K_0402_5% C496 0.1U_0402_16V4Z OVCUR#1 20 1 2 USB CONNECTOR +USB_VCCA JP14 20 20 USB20P1USB20P1+ USB1USB1+ 1 2 3 4 VCC D0D0+ VSS 5 6 G1 G2 SANTA_360111-4 B B A A Title Compal Electronics, Inc. USB/PCI-Debug THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.2 LA-2301 Date: 5 4 3 2 Thursday, April 08, 2004 Sheet 1 29 of 47 2 +5VALW 1 2 @CHB2012U121_0805 C497 @4.7U_0805_10V4Z +AC97_DVDD 2 31,33,34,37 SUSP# 1 R477 2 R478 2 R479 2 R481 IAC_RST# 20,22 IAC_SYNC 20,22 IAC_SDATAO C_MD_SPK C529 2 31 1 1U_0402_6.3V4Z 2 22_0402_5% 1 22_0402_5% 1 22_0402_5% 1 0_0402_5% System Sound MONO_OUT/VREFOUT3 37 23 LINE_IN_L 24 LINE_IN_R 18 CD_L 6 SDATA_IN 8 XTL_IN 2 CD_R 19 CD_GND 21 MIC1 22 MIC2 13 PHONE AFILT1 29 12 PC_BEEP AFILT2 30 VREFOUT 28 11 RESET# 10 SYNC 45 46 SPDIFI/EAPD SPDIFO 4 7 DVSS1 DVSS2 ALC250_LQFP48 1 L27 1 L28 1 L29 1 L30 C530 1 2 R490 100K_0402_5% DCVOL 32 NC VREFOUT2 VAUX SCK SDA 31 33 34 43 44 NC AVSS1 AVSS2 40 26 42 1 C517 1 C520 1 R476 I O IAC_BITCLK 20 1U_0402_6.3V4Z SN74LVC14APWLE_TSSOP14 +3V POWER 560_0402_5% 2 0_0603_5% +AVDD_AC97 AGND AGND C534 10U_0805_10V4Z +3VS 2 C537 2 1 MONO_IN_O 2 1 2 1 C MONO_IN_I 2 560_0402_5% 2 B E 2 0_0402_5% CLK_AUDIO_14M 17 C527 1 2 1 R486 1 R487 2 0_0402_5% 2 0_0402_5% 1 2 C522 1 2 C523 1 2 1 C524 2 C525 0.1U_0402_16V4Z 1 1 2 2 C526 4.7U_0805_10V4Z EC_IDERST 23,31,33 EC_SMC2 5,33 1 R488 2 Q21 R498 2SC2411K_SC59 2.4K_0402_5% IAC_SDATAO IAC_RST# 2 1 B JP15 1 +3VS_MDC 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 MONO_OUT/PC_BEEP AUDIO_PWRDN/DETECH GND MONO_PHONE AUXA_RIGHT RESERVED/BT_ON# AUXA_LEFT GND CD_GND +5Vmain CD_RIGHT RESERVED/USB+ CD_LEFT RESERVED/USBGND RESERVED/PRIMARY_DN +3.3Vaux/BT_VCC RESERVED/+5VD/WAKEUP GND RESERVED/GND +3.3Vmain AC97_SYNC AC97_SDATA_OUT AC97_SDATA_IN1 AC97_RESET# AC97_SDATA_IN0 GND GND AC97_MSTRCLK AC97_BITCLK 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 ACES_88018-3010 MD_SPK +5VS_MDC 2 L31 1 2 CHB1608B121_0603 +5VS C532 1U_0603_10V4Z 1 +3VS_MDC_R R494 1 2 10K_0402_5% IAC_SYNC 2 1 R495 0_0402_5% 1 +3VS R496 2 1 22_0402_5% IAC_SDATAI1 20 2IAC_BITCLK R497 22_0402_5% R500 10K_0402_5% 1 1U_0402_6.3V4Z 3 C538 1 2 PCM_SPK# 2 0_0805_5% 1 2 L32 CHB1608B121_0603 C535 10U_0805_10V4Z MONO_IN 1U_0402_6.3V4Z R499 1 R471 C R484 @0_0402_5% +3V 1 R493 10K_0402_5% 2 C519 @22P_0402_50V8J R735 @10K_0402_5% C521 1 R482 2 R492 1 2 R734 @10K_0402_5% IAC_SDATAI0 20 2 1000P_0402_50V7K 2 1000P_0402_50V7K 2 +AUD_VREF 0_0603_5% C531 10U_0805_10V4Z 1 C533 1 2 10 1 2 MDC Connector 2 11 1 C536 0.22U_0402_10V4Z U18E P R491 1 2 8.2K_0402_5% G 6 7 O 14 2 4 OE# U33B SN74LVC125APWLE_TSSOP14 24 2 22_0402_5% 2 22_0402_5% +3V_MDC I XTL_OUT 1 @24.576MHz_16P_3XG-24576-43E1 +AUD_VREF 2 @0_0805_5% 2 @0_0805_5% 2 0_0805_5% 2 @0_0805_5% R489 10K_0402_5% 0.1U_0402_16V4Z 2 27 VREF NC XTLSEL XTL_IN C518 @22P_0402_50V8J +3VS XTL_OUT 3 1 BEEP# 5 1 R469 1 R470 XTL_IN 31 R472 @1M_0402_5% XTL_OUT X6 AMP_RIGHT 31 L_OUT_R 31 +3VALW 1 33 C774 47P_0402_50V8J +AVDD_AC97 +3V AMP_LEFT 31 SDATA_OUT 48 R485 0_0402_5% 2 0_0402_5% 2 0_0402_5% L_OUT_L 2 BIT_CLK 20 5 1 41 HP_OUT_R 1 R463 1 R464 L_OUT_R 1 39 HP_OUT_L L_OUT_L 2 1U_0402_6.3V4Z 2 1U_0402_6.3V4Z D 2 JD1 1 C507 1 C508 C499 @4.7U_0805_10V4Z R462 @24K_0402_1% 2 1 9 DVDD2 DVDD1 JD2 DGND B 38 16 47 EAPD R483 @10K_0402_5% Ra 25 LINER 2 2 LINEL 36 1 C528 0.1U_0402_16V4Z EC_SMD2 1 1 5,33 2 1 @0.01U_0402_25V4Z 0_0402_5% 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 1 CD_LIN 1U_0402_6.3V4Z 1 CD_RIN 1U_0402_6.3V4Z 1 CD_GNA1 1U_0402_6.3V4Z 1 C_MIC 1U_0402_6.3V4Z 6.8K_0402_5% 2 35 LINE_OUT_R 1 2 C504 @0.1U_0402_16V4Z 2 @1000P_0402_25V8K 2 @1000P_0402_25V8K 1 C_MD_SPK 2 C516 MONO_IN R475 R480 1 LINE_OUT_L AUX_R +VDDA R461 @69.8K_0603_1% 1 2 SUSP# 2 MIC 20 MD_SPK AUX_L 15 3 2 1 2 2 31 2 2 1 C 1 C510 1 C511 CD_L 2 C512 CD_R 2 C513 CD_GNA 2 C514 MIC 2 C515 R468 6.8K_0402_5% CD_GNA 1 R473 20K_0402_5% R474 0_0402_5% 14 17 1 2 CD_AGND 2 1U_0402_6.3V4Z CD_R R467 6.8K_0402_5% 23 1 C509 CD_L 1 20K_0402_5% 1 20K_0402_5% 1 23,31 INT_CD_R NBA_PLUG NBA_PLUG 1 C505 1 C506 1 GND @SI9182DH-AD_MSOP8 C503 10U_0805_10V4Z 1 INT_CD_L 2 R465 INT_CD_R 2 R466 23,31 INT_CD_L AVDD1 bypass EQ when NBA_PLUG = High AVDD2 U32 CNOISE SD +VDDA 2 2 C502 0.1U_0402_16V4Z 6 ERROR 8 1 5 1 2 DELAY 1U_0402_6.3V4Z 2 1 C501 10U_0805_10V4Z D 31 2 1 VOUT SENSE or ADJ VIN 1 1 C500 0.1U_0402_16V4Z U31 1 1 +VDDA Adjustable Output @0.1U_0402_16V4Z 4 1 2 C498 7 2 1 L26 2 +3V CHB2012U121_0805 2 +3VS @CHB2012U170_0805 2 1 L24 1 L25 +AVDD_AC97 0.1U_0402_16V4Z 1 2 CHB2012U170_0805 1U_0402_6.3V4Z +5VAMP 1 0.01U_0402_25V4Z AC97 Codec 3 1 4 L23 1U_0402_6.3V4Z 5 2 +3VALW I O 12 C539 1 2 1U_0402_6.3V4Z SN74LVC14APWLE_TSSOP14 R501 1 2 560_0402_5% A 1 13 SB_SPK G D23 RB751V_SOD323 2 R502 10K_0402_5% 2 20 7 A 1 P 14 +3V POWER U18F Title Compal Electronics, Ltd. AC97 Codec ALC250 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D CustomLA-2301 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 Rev 0.2 Sheet Thursday, April 08, 2004 1 30 of 47 A B C D E +5VALW POWER ON PATH 14 P 4 PIN 9,5 ACTIVE R515 @1M_0402_5% AMP_LEFT 30 AMP_LEFT 30 AMP_RIGHT 1 C544 1 C546 AMP_RIGHT NBA_PLUG VOL_AMP AMP_L 2 1 0.47U_0603_16V4ZC545 AMP_R 2 1 0.47U_0603_16V4ZC547 @SN74HCT4066PW_TSSOP14 AMP_LIN AMP_RIN 2 0.47U_0603_16V4Z 2 0.47U_0603_16V4Z 1 C551 1 C553 2 0.47U_0603_16V4Z 2 0.47U_0603_16V4Z B 9 2 3 4 21 5 23 6 20 @SN74HCT4066PW_TSSOP14 2 1 2 C556 @0.1U_0402_16V4Z JP26 INTSPK_R1 INTSPK_R2 1 2 1 2 2 1 C560 2 1 1 R522 1 R523 30 MIC MIC 1 L33 C562 220P_0402_50V8K D24 4 2 C566 1 C567 2 1 C568 2 1 2 C569 1 2 C570 @ 4.99K_0603_1% INTSPK_R1 1 C571 INTSPK_L1 1 C572 2 100U_D2_10VM 2 100U_D2_10VM 2 L36 1 2 CHB2012U121_0805 3 6 2 1 FOX_JA6033L-5S1-TR 2 +5VAMP HEADPHONE OUT JACK 2 R830 47K_0402_5% 1 L34 1 2 FBM-11-160808-700T_0603 L35 1 2 FBM-11-160808-700T_0603 1 C573 330P_0402_50V7K +5VALW TO +5VLDO +5VLDO 1 NBA_PLUG + R527 2 MIC-1 1 C820 2 + 2 1 @0.1U_0402_10V6K 1 C565 0.1U_0402_10V6K 2 C564 1 3 1 @1U_0603_10V4Z A R 5 0.1U_0402_16V4Z 1U_0603_10V4Z 2 JP16 2 2.2K_0402_5% 2 @2.2K_0402_5% 2 FBM-11-160808-700T_0603 (4.5V) @4.7U_0805_10V4Z K 1 1 2 +AUD_VREF_J 4.7U_0805_10V4Z S 2 3.9K_0603_1% HP MICROPHONE IN JACK +5VAMP DECOUPLING 22U_1206_10V4Z R526 LM431SC_SOT23 SPK 10 dB C561 2 1 2 Bias (Gain) R520 3.09K 2 R511 100K_0402_5% JP17 5 1 G S S S 4 3 2 1 @1U_0805_25V4Z S 2N7002_SOT23 3 -6dB +AUD_VREF +5VLDO C563 R519 7.15K R520 3.09K_0603_1% S (4.5V) 2 1 3 D 1 1 1 4 1 C559 1U_0603_10V4Z 2 1 1U_0603_10V4Z C558 Q25 2N7002_SOT23 @22U_1206_10V4Z 22U_1206_10V4Z 1 +5VAMP R516 3.9K 2 1 S 3 D 1 1 2 1 3 23,33 CD_PLAY SI4800DY_SO8 U36 C550 VR - A-Type 7.15K_0603_1% Q24 2N7002_SOT23 D D D D 5 6 7 8 AOS 3401_SOT23 +5VLDO D Q27 2 G CD_PLAY 2 G Q28 2N7002_SOT23 2 3.9K_0603_1% 2 1 3 Q26 1K_0402_5% 2 (0.47U~1U) 1 NBA_PLUG 2 G 2 1 D 2 G +5VALW R525 2 1 C549 R519 1 +5VALW DECOUPLING +5VALW R524 1 5 2 3 +5VALW TO +5VLDO 10K_0402_5% 1 C548 1/20W_10KA_XV0107GPV2N-9508 R518 100K_0402_5% +12VALW 2 VR1 VOL_AMP Regulator for AMP +5VALW 4 2 +5VAMP 2 1 12 13 24 C554 0.047U_0402_16V4Z 1 R516 Reserve for noise. ACES_85204-0200 2 30 JP25 INTSPK_L1 INTSPK_L2 PATH_SEL_1 C557 1U_0603_10V4Z EAPD 1 2 C543 0.1U_0402_16V4Z INTSPK_L2 INTSPK_R2 1 2 ACES_85204-0200 1 2 G NBA_PLUG TPA0232PWP_TSSOP24 HP_R AMP_RIGHT @1U_0603_10V4Z R521 10K_0402_5% 1 2 22 15 14 11 9 16 10 8 PVDD SHUTDOWN# PVDD SE/BTL# VDD PC-BEEP BYPASS HP/LINE# LOUTVOLUME ROUTLOUT+ LIN ROUT+ RIN LLINEIN RLINEIN GND LHPIN GND RHPIN GND GND CLK 17 HP_L U34D A D Q22 U35 7 18 19 C G 7 8 7 C555 1 2 23,30 INT_CD_R 3 3 P R514 1 @1M_0402_5% G 2 1 +5VAMP B 14 @1U_0603_10V4Z A 5 1 R513 @1M_0402_5% 2 C552 1 2 23,30 INT_CD_L U34C P R512 2 1 @1M_0402_5% INTSPK_L1 INTSPK_R1 AMP_LEFT DIRECT PLAY PATH +5VAMP 0.47U_0603_16V4Z 30,33,34,37 14 SUSP# @0_0402_5% +5VAMP PIN 10,4 ACTIVE LOW 30 NBA_PLUG 1 100K_0402_5% C 1 PATH_SEL 3 2 G EC_IDERST 23,30,33 2 2N7002_SOT23S HIGH PATH_SEL 2 1 @0_0402_5% R718 2 1 D Q23 @2N7002_SOT23S Pin 22 6 1 PATH_SEL_1 R717 2 C541 4.7U_0805_10V4Z fo=1/(2*3.14*R*C)=260Hz R=1.5K / C=0.47U 2 R510 @10K_0402_5% 2 R505 1 3 2 C540 0.1U_0402_16V4Z 0.47U_0603_16V4Z 7 @SN74HCT4066PW_TSSOP14 SHUTDOWN# 1 R = R385, R386 C = C537, C539 AMP_L 1 R506 AMP_R 1 R508 1 C542 VOL_AMP 0.1U_0402_16V4Z 2 1.5K_0402_5% 2 1.5K_0402_5% AMP_RIGHT 10 C B W=40Mil R385=R386= 1.3K Ohm C537=C539= 0.47U 0.47U_0603_16V4Z 7 13 14 A G 1 L_OUT_R W/O EQ 2 30 R509 @1M_0402_5% +5VAMP U34B 12 +5VALW 11 2AMP_LEFT @SN74HCT4066PW_TSSOP14 P R507 2 1 @1M_0402_5% +5VAMP 4 B C G 1 R504 @1M_0402_5% L_OUT_L 2 30 A 6 1 1 +5VAMP 2 @1M_0402_5% Audio AMP U34A R503 3 Direct CD CTL 4 3 6 2 1 1 2 C574 330P_0402_50V7K FOX_JA6033L-5S1-TR 1 +5VAMP L37 1 2 CHB2012U121_0805 Title Compal Electronics, Ltd. Audio AMP & JACK THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev 0.2 CustomLA-2301 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: A B C D Sheet Thursday, April 08, 2004 E 31 of 47 A B C D E SUPER I/O SMsC LPC47N217 RP99 1 R530 1 R531 1 R533 +3VS SIO_PD# SIO_SMI# SIO_PME# 2 2 10K_0402_5% 2 10K_0402_5% 10K_0402_5% 17 CLK_SIO_14M 17 18 PCI_RESET# LPCPD# PM_CLKRUN# CLK_PCI_SIO SERIRQ SIO_PME# 19 20 21 6 CLKRUN# PCI_CLK SER_IRQ IO_PME# CLK_SIO_14M 9 LPT_DET# R816 @100K_0402_5% 2 1 SIO_GPIO11 SIO_SMI# SIO_IRQ 2 2 R538 CLK14 RXD1 TXD1 DSR1# RTS1# CTS1# DTR1# RI1# DCD1# 62 63 64 1 2 3 4 5 IRRX2 IRTX2 IRMODE/IRRX3 37 38 39 IRRX IRTXOUT IRMODE INIT# SLCTIN# PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 SLCT PE BUSY ACK# ERROR# ALF# STROBE# 41 42 44 46 47 48 49 50 51 53 55 56 57 58 59 60 61 INIT# SLCTIN# LPD0 LPD1 LPD2 LPD3 LPD4 LPD5 LPD6 LPD7 LPTSLCT LPTPE LPTBUSY LPTACK# LPTERR# LPTAFD# LPTSTB# VTR VCC VCC VCC VCC 7 11 26 45 54 SERIAL I/F SIO_PD# CLK_PCI_SIO R537 @10K_0402_5% FIR CLOCK 23 24 25 27 28 29 30 31 32 33 34 35 36 40 GPIO40 GPIO41 GPIO42 GPIO43 GPIO44 GPIO45 GPIO46 GPIO47 GPIO10 GPIO11/SYSOPT GPIO12/IO_SMI# GPIO13/IRQIN1 GPIO14/IRQIN2 GPIO23 8 22 43 52 VSS VSS VSS VSS POWER 1 2 2 +3VS 8 7 6 5 4.7K_1206_8P4R_5% 1 SIO_IRQ 2 R528 1 10K_0402_5% RXD1 1 R532 1 R534 2 1K_0402_5% 2 10K_0402_5% IRRX Serial Port for Debug +3VS C580 +3VS +5VS 2 15P_0402_50V8J JP18 2 @15P_0402_50V8J 1 1 2 3 4 LPC47N217_STQFP64 1 1 10_0402_5% C579 2 LFRAME# LDRQ# FIR_DET# LPC_AD[0..3] +3VS CLK_SIO_14M 15 16 R535 @100K_0402_5% 2 1 +3VS 19,33 LPC_AD[0..3] LPC_FRAME# LPC_DRQ#1 LPC I/F 19,24,26,27,28,33 PM_CLKRUN# 19 CLK_PCI_SIO 19,24,33 SERIRQ LAD0 LAD1 LAD2 LAD3 DCD#1 RI#1 CTS#1 DSR#1 RXD1 TXD1 DSR#1 RTS#1 CTS#1 DTR#1 RI#1 DCD#1 PARALLEL I/F 7,19,23,33 NB_RST# 1 10 12 13 14 GPIO 19,33 LPC_FRAME# 19 LPC_DRQ#1 U37 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 +3VS L50 1 1 C812 LPTSLCTIN# LPTINIT# LPTERR# AFD#/3M# +5V_PRN 8 7 6 5 LPTSLCT LPTPE LPTBUSY LPTACK# FD0 FD1 FD2 FD3 1 2 3 4 2.7K_1206_8P4R_5% RP110 FD0 8 FD1 7 FD2 6 FD3 5 1 2 3 4 2.7K_1206_8P4R_5% RP111 FD7 8 FD6 7 FD5 6 FD4 5 220P_1206_8P4C_50V8K CP4 5 6 7 8 FD4 FD5 FD6 FD7 220P_1206_8P4C_50V8K 4 3 2 1 LPTAFD# FD0 LPTERR# FD1 INIT# FD2 SLCTIN# FD3 FD4 FD6 5 6 7 8 FD0 FD1 FD2 FD3 FD7 FD6 FD5 FD4 FD7 LPTACK# LPTBUSY LPTPE LPTSLCT 1 C581 2 +3VS +3VS 1 R546 1 R548 (60mil) 1 220P_0402_50V8K 1 JP19 1 R544 1 2 R541 0_0402_5% C583 @10U_0805_10V4Z 22U_1206_10V4Z C584 10U_0805_10V4Z 1 2 2 (60mil) U38 IRRX +IR_3VS 1 (30mil) @ 2 4.7_1206_5% R545 2 R547 47_1206_5% 2 R543 @4.7_1206_5% +IR_ANODE 2 1 C582 1 1 2 14 33_0402_5% 2 15 3 LPTINIT# 2 16 33_0402_5% 4 LPTSLCTIN# 2 17 33_0402_5% 5 18 6 19 7 20 8 21 9 22 10 23 11 24 12 25 13 2 4 6 8 IRED_C RXD VCC GND IRED_A TXD SD/MODE MODE 1 3 5 7 IRTXOUT IRMODE TFDU6102-TR3_8P PCB Footprint : TFDU6101E C585 0.1U_0402_16V4Z SD/MODE: SHUTDOWN MODE, HIGH ACTIVE MODE: HIGH/LOW SPEED SELECT 4 Title TYCO_1470802-1 Compal Electronics, Ltd. LPC-Super I/O THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D CustomLA-2301 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 68_1206_8P4R_5% A 2 AFD#/3M# 68_1206_8P4R_5% LPD7 LPD6 LPD5 LPD4 FIR_DET# 47_0402_5% RP102 RP103 1 3 L: R POP; FIR Enable H: R De-POPFIR Disable R540 2.2K_0402_5% R542 LPTSTB# 2.7K_1206_8P4R_5% 8 7 6 5 1 RB420D_SOT23 2.7K_1206_8P4R_5% RP109 8 AFD#/3M# 7 LPTERR# 6 LPTINIT# 5 LPTSLCTIN# 1 2 3 4 2 +5VS_BEAD 1 2 3 4 LPD0 LPD1 LPD2 LPD3 FIR Module D25 1 RP108 1 2 3 4 FD5 220P_1206_8P4C_50V8K CP3 8 1 7 2 6 3 5 4 4 3 2 1 @E&T_96212-1011S 1000P_0402_50V7K 2 1 2 R817 0_0402_5% 220P_1206_8P4C_50V8K CP2 LPTACK# 1 8 LPTBUSY 2 7 LPTPE 3 6 LPTSLCT 4 5 4 R539 1K_0402_5% 1 8 7 6 5 2 C813 +5V_PRN 3 CP1 2 * 0 = 02Eh 1 = 04Eh SIO_GPIO11 C578 0.1U_0402_16V4Z KC FBM-L11-201209-221LMAT_0805 Parallel Port 1 2 3 4 2 1 C577 0.1U_0402_16V4Z 2 0.1U_0402_10V6K LPT_DET# 2 +5VS_BEAD 1 C576 0.1U_0402_16V4Z 2 2 2 1 C575 4.7U_0805_10V4Z 1 2 3 4 5 6 7 8 9 10 1 1 Base I/O Address 1 1 1 2 3 4 5 6 7 8 9 10 RXD1 TXD1 DSR#1 RTS#1 CTS#1 DTR#1 RI#1 DCD#1 2 Add for EMI +5VS R536 @10K_0402_5% Date: B C D Rev 0.2 Sheet Thursday, April 08, 2004 E 32 of 47 4 3 +3VALW 19,24,32 SERIRQ 19 LPC_DRQ#0 19,32 LPC_FRAME# 19 CLK_LPC_EC 0.1U_0402_16V4Z R553 10_0402_5% 2 R552 910_NUM_LED# 1 EC_RST# 1 47K_0402_5% C597 15P_0402_50V8J 20 20 2 1 C596 0.1U_0402_16V4Z GATEA20 KBRST# 34 34 34 34 2 For KB910 591_NUM_LED# 1 R555 591_EC_SCI# 1 R556 591_HDD_LED# 1 R557 GATEA20 5 6 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 71 72 73 74 77 78 79 80 EC_PLAYBTN# EC_STOPBTN# EC_REVBTN# EC_FRDBTN# NUM_LED# 2 @0_0402_5% 2 @0_0402_5% 2 @0_0402_5% KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 EC_SCI# 20 HDD_LED# 35 C 910_EC_SCI# 910_HDD_LED# 2 0_0402_5% 2 0_0402_5% 2 0_0402_5% pin110 reserve for KSO16 pin111 reserve for KSO17 +3VALW +3V For KB910 1 R571 1 R573 +5VS RP104 1 2 3 4 8 7 6 5 PSCLK1 PSDAT1 PSCLK2 PSDAT2 34 34 35 1 2 3 4 8 7 6 5 EC_PME# 1394_PME# WLANPME# PCM_PME# LAN_PME# 2 @10K_0402_5% 2 10K_0402_5% 1 R818 1 R819 2 1 34 2 BKOFF# FSEL# FSEL# PSCLK1/IOPF0 PSDAT1/IOPF1 PSCLK2/IOPF2 PSDAT2/IOPF3 PSCLK3/IOPF4 PSDAT3/IOPF5 PSCLK4/IOPF6 PSDAT4/IOPF7 32KX1/32KCLKIN CRY2 160 32KX2 IOPJ2/BST0 IOPJ3/BST1 IOPJ4/BST2 IOPJ5/PFS IOPJ6/PLI IOPJ7/BRKL_RSTO IOPM0/D8 IOPM1/D9 IOPM2/D10 IOPM3/D11 IOPM4/D12 IOPM5/D13 IOPM6/D14 IOPM7/D15 1 IN 4 1 Y4 32.768KHZ_12.5P_1TJS125DJ2A073 OUT 2 161 VBAT PORTE LPCPD 124 125 126 127 128 131 132 133 KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 PORTI IOPI0/D0 IOPI1/D1 IOPI2/D2 IOPI3/D3 IOPI4/D4 IOPI5/D5 IOPI6/D6 IOPI7/D7 138 139 140 141 144 145 146 147 ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7 PORTJ-1 IOPJ0/RD IOPJ1/WR0 150 151 FRD# SELIO# 152 SELIO# IOPD4 IOPD5 IOPD6 IOPD7 41 42 54 55 591_NUM_LED# CAPS_LED# PADS_LED# IOPK0/A8 IOPK1/A9 IOPK2/A10 IOPK3/A11 IOPK4/A12 IOPK5/A13_BE0 IOPK6/A14_BE1 IOPK7/A15_CBRD 143 142 135 134 130 129 121 120 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 IOPL0/A16 IOPL1/A17 IOPL2/A18 IOPL3/A19 IOPL4/WR1# 113 112 104 103 48 KBA16 KBA17 KBA18 KBA19 PORTJ-2 PORTK PORTM SEL0# SEL1# CLK NUM_LED# PADS_LED# CAPS_LED# R554 1 2 KSO15 300_0402_5% KSO14 KSO10 KSO11 KSO8 KSO9 KSO13 KSI7 KSO3 KSO7 KSO12 KSI4 KSI6 KSI5 KSO6 KSO5 KSI3 KSI0 KSO0 KSO1 KSI1 KSI2 KSO2 KSO4 R560 1 2 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 EC_UTXD/KSO17 34 EC_SMC1 34,39 EC_SMD1 34,39 NB_RST# 7,19,23,32 R726 2 1 PBTN_OUT# 20 EC_SMC2 5,30 47K_0402_5% EC_SMD2 5,30 FAN_SPEED1 35 ACIN 2 44 24 25 PORTD-2 JP21 EC_THERM# 20 FAN_SPEED2 35 CD_PLAY 23,31 IOPE4/SWIN IOPE5/EXWINT40 IOPE6/LPCPD/EXWIN45 IOPE7/CLKRUN/EXWINT46 PORTH CP5 2 C600 12P_0402_50V8K 2 L39 0_0402_5%2 0_0402_5%2 ACIN 20,34,38 KILL_SW# 28,35 PM_SLP_S3# 20 LPCPD R835 30 EAPD 2 @0_0402_5% 1 4 100P_1206_8P4C_50V8 CP8 KSI6 KSI5 KSO6 KSO5 5 6 7 8 4 3 2 1 C 100P_1206_8P4C_50V8 KSI3 KSI0 KSO0 KSO1 +3VS CP9 5 6 7 8 4 3 2 1 100P_1206_8P4C_50V8 +3VS CP10 KSI1 KSI2 KSO2 KSO4 5 6 7 8 ADB[0..7] ADB[0..7] 34 * FRD# FWR# 34 34 SELIO# 34 Index 4 3 2 1 Data 0 2E 2F 0 1 4E 4F 1 0 1 1 (HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1 Reserved B ENV0 (KBA0) ENV1 (KBA1) TRIS (KBA4) 0 IRE 0 0 * OBD 0 1 0 DEV 0 0 1 1 PROG 1 0 SHBM(KBA5)=1: Enable shared memory with host BIOS TRIS(KBA4)=1: While in IRE and OBD, float all the signals for clip-on ISE use PHDD_LED# 23 +3VALW KBA[0..19] KBA[0..19] 34 KBA1 1 R576 1 R577 1 R578 1 R579 1 R580 1 R581 1 R583 KBA2 KBA3 KBA5 40 2 1K_0402_5% 2 @1K_0402_5% 2 1K_0402_5% 2 1K_0402_5% 2 @10K_0402_5% 2 @10K_0402_5% 2 @10K_0402_5% 1 R586 1 R587 1 R588 SKU_ID1 BATT_LOW_LED# 34 910_WL_LED# 34 910_PWR_LED# 34 910_CHGI_LED# 34 910_ODD_LED# 34 Title 2 10K_0402_5% 2 10K_0402_5% 2 10K_0402_5% A Compal Electronics, Ltd. K/B-CTRL/PC87591 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D CustomLA-2301 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 3 4 3 2 1 0 Date: 5 CP7 5 6 7 8 I/O Address BADDR1(KBA3) BADDR0(KBA2) For 551. C601 @1U_0402_6.3V4Z For KB910 4 3 2 1 2 1K_0402_5% SKU_ID0 2 CP6 5 6 7 8 100P_1206_8P4C_50V8 1 R566 FSTCHG 1 4 3 2 1 100P_1206_8P4C_50V8 PM_CLKRUN# 19,24,26,27,28,32 910_HDD_LED# 551_GND KSO8 KSO9 KSO13 KSI7 KSO3 KSO7 KSO12 KSI4 R564 1 2 300_0402_5% ELCO_00-6278-034-001-800 ON/OFF 35 PM_SLP_S5# 20 5 6 7 8 100P_1206_8P4C_50V8 +3VS 300_0402_5% SKU_ID2 1 ECAGND CHB1608B121_0603 910_GND0 1 R562 910_GND1 1 R563 910_EC_SCI# KSO15 KSO14 KSO10 KSO11 KEYBOARD CONN. EC_PME# EC_THERM# IOPD0/RI1/EXWINT20 IOPD1/RI2/EXWINT21 IOPD2/EXWINT24/RESET2 IOPH0/A0/ENV0 IOPH1/A1/ENV1 IOPH2/A2/BADDR0 IOPH3/A3/BADDR1 IOPH4/A4/TRIS IOPH5/A5/SHBM IOPH6/A6 IOPH7/A7 ALI/MH# 39 S4_DATA 36 MUL_KEY# 34 EC_SMC2 EC_SMD2 PORTD-1 PORTL PC87591L-VPCN01 A2_LQFP176 NC Analog Board ID definition, Please see page 3. C599 10P_0402_50V8K 168 169 170 171 172 175 176 1 1 NC 0.1U_0402_16V4Z 1 IOPC0 IOPC1/SCL2 IOPC2/SDA2 IOPC3/TA1 IOPC4/TB1/EXWINT22 IOPC5/TA2 IOPC6/TB2/EXWINT23 IOPC7/CLKOUT EC_URXD EC_UTXD/KSO17 EC_USCLK D INVT_PWM 18 BEEP# 30 PWR_SUSP_LED 34,35 ACOFF 40 PM_BATLOW# 20 EC_ON 35 EC_LID_OUT# 20 S4_LATCH 36 26 29 30 PS2 interface 158 173 174 47 EC_URXD EC_UTXD/KSO17 EC_USCLK EC_SMC1 EC_SMD1 NB_RST# +3VALW @E&T_96212-1011S DAC_BRIG 18 EN_DFAN2 35 IREF 40 EN_DFAN1 35 153 154 162 163 164 165 EC_TINT# EC_TCK EC_TDO EC_TDI EC_TMS BATT_TEMP 39 ADP_I 40,43 BATT_OVP 40 99 100 101 102 IOPB0/URXD IOPB1/UTXD IOPB2/USCLK IOPB3/SCL1 IOPB4/SDA1 IOPB7/RING/PFAIL/RESET2 PORTC JTAG debug port R585 0_0402_5% C598 PORTB KBSOUT0 KBSOUT1 KBSOUT2 KBSOUT3 KBSOUT4 KBSOUT5 KBSOUT6 KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12 KBSOUT13 KBSOUT14 KBSOUT15 110 111 114 115 116 117 118 119 148 149 155 156 3 4 27 28 95 Key matrix scan BATT_TEMPB BATT_TEMP 81 82 VBATTA 83 84 VBATTB AD_BID0 87 88 MUL_KEY# 89 90 SKU_ID0 93 SKU_ID1 94 INVT_PWM IOPA0/PWM0 IOPA1/PWM1 IOPA2/PWM2 IOPA3/PWM3 IOPA4/PWM4 IOPA5/PWM5 IOPA6/PWM6 IOPA7/PWM7 PWM or PORTA KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7 0.1U_0402_16V4Z 32 33 36 37 38 39 40 43 GA20/IOPB5 KBRST/IOPB6 TINT# TCK TDO TDI TMS 62 63 69 70 75 76 DA0 DA1 DA2 DA3 DA output IOPD3/ECSCI# 105 106 107 108 109 3 2 SYSON SUSP# VR_ON CRY2 @20M_0603_5% 2 2 1 R582 CRY1 1 AD_BID0 1 SKU_ID2 512_SEL AD Input CRY1 EC_SMI# 36,37,42 SYSON 30,31,34,37 SUSP# 44 VR_ON 23 PCMRST# 20 EC_RSMRST# 23 SHDD_LED# 8 ENBK# 18 BKOFF# Remove 20M Ohm R for KB910 R584 100K_0402_5% R589 0_0402_5% 591_HDD_LED# 20 EC_SMI# 23,30,31 EC_IDERST 28 WL_OFF# 20 EC_SWI# +3VALW Rb TP_CLK TP_DATA LID_SW# MUL_KEY# FRD# SELIO# FSEL# VR_ON 1 47K_0402_5% SYSON 1 10K_0402_5% SUSP# 1 10K_0402_5% A PSCLK1 PSDAT1 PSCLK2 PSDAT2 TP_CLK TP_DATA 10K_0804_8P4R_5% +3VALW Ra EC_TINT# EC_TCK EC_TDO EC_TDI EC_TMS 1 100K_0402_5% RP105 1 EC_SMC1 4.7K_0402_5% 1 EC_SMD1 4.7K_0402_5% 2 R569 2 R570 2 R572 24,26,27,28 24,26,27,28 24,26,27,28 24,26,27,28 2 R565 1 GATEA20 47K_0402_5% 1 EC_PME# 47K_0402_5% 2 R574 2 R575 +5VALW 2 R596 2 R595 For KB910 +3VALW 10K_0804_8P4R_5% 1 2 TP_CLK R567 4.7K_0402_5% 1 2 TP_DATA R568 4.7K_0402_5% B 2 EC_SMC2 4.7K_0402_5% 2 EC_SMD2 4.7K_0402_5% AD0 AD1 AD2 AD3 IOPE0AD4 IOPE1/AD5 IOPE2/AD6 IOPE3/AD7 DP/AD8 DN/AD9 Host interface GND1 GND2 GND3 GND4 GND5 GND6 GND7 1 R558 1 R559 1 R561 49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68 SERIRQ LDRQ# LFRAME# LAD0 LAD1 LAD2 LAD3 LCLK RESET1# SMI# PWUREQ# C589 2 910_NUM_LED# 7 8 9 15 14 13 10 18 19 22 23 591_EC_SCI# 31 2 Place D69 Close to EC Chip +3VALW EC_RST# 1 2 C773 2 @0_0402_5% LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_AD[0..3] 19,32 LPC_AD[0..3] @SSM14_SMA 1 R551 2 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 2 1 U39 2 1 BATT_TEMP 0.01U_0402_25V7Z D26 1 1 AGND ECAGND 2 C595 +EC_AVCC AVCC 0.1U_0402_16V4Z For EC Tools 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10 11 12 20 21 85 86 91 92 97 98 2 C591 0.1U_0402_16V4Z 1 JP20 1 R549 for KB910 R550 for NS591L C592 +EC_VDD 34 45 123 136 157 166 1 +3VS 2 CHB1608B121_0603 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 1 2 +RTCVCC 96 D L38 1 0.1U_0402_16V4Z 1 1000P_0402_50V7K 1 1000P_0402_50V7K 1 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0_0402_5% 2 @0_0402_5% VDD 2 C586 2 C587 2 C588 2 C590 1 C593 1 C594 +EC_VCC 1 R549 1 R550 +3VALW +EC_VCC +EC_VCC 17 35 46 122 159 167 137 +EC_AVCC 1 2 R736 0_0805_5% 16 5 2 Rev 0.2 Sheet Thursday, April 08, 2004 1 33 of 47 Touch Pad Connector Extension IO JP22 +5VALW C602 1 2 TP_CLK TP_DATA +5VS +5V +5VALW 20,33,38 ACIN 2 B O 1 VCC 10 SN74LVC32APWLE_TSSOP14 8 1D 2D 3D 4D 5D 6D 7D 8D AA LARST# 11 1 CLK OE 10 SELIO# SELIO# A U17C G 33 9 3 4 7 8 13 14 17 18 7 KBA2 P 14 @100K_0402_5% R590 @0.1U_0402_16V4Z U40 ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7 GND +3VALW +3VALW 20 @0.1U_0402_16V4Z C603 1 2 C604 +5VALW 1 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 2 5 6 9 12 15 16 19 BATT_LOW_LED# PWR_LED# WL_LED# BATT_CHGI_LED# ODD_LED# 1 BATT_LOW_LED# 33 PWR_LED# 35 WL_LED# 35 ACES_85201-1205 For MP3 / BUTTON LOCK / CD-PLAY RP107 PWR_LED# BATT_CHGI_LED# ODD_LED# WL_LED# 2 PWR_LED# PWR_SUSP_LED BATT_CHGI_LED# BATT_LOW_LED# ODD_LED# 35 1 2 3 4 @1.2M_0402_5% @1U_0603_10V4Z 33,35 PWR_SUSP_LED @SN74HCT374PW_TSSOP20 R591 2 1 2 3 4 5 6 7 8 9 10 11 12 33 33 8 7 6 5 910_PWR_LED# 33 910_CHGI_LED# 33 910_ODD_LED# 33 910_WL_LED# 33 0_1206_8P4R_5% MUL_KEY_ESD# MUL_KEY_ESD# 35 For KB910 D28 1 4 3 5 2 R592 10K_0402_5% A 12 B 13 O 2 S FLASH# Q29 2N7002_SOT23 FWR# SMBus EEPROM EC_SMC1 EC_SMD1 2 R594 100K_0402_5% A0 A1 A2 GND 1 2 3 4 1 0.1U_0402_16V4Z U43 8 VCC 7 WP 6 SCL 5 SDA AT24C16AN-10SI-2.7_SO8 2 33,39 33,39 33 20 R597 100K_0402_5% 1 4 3 5 2 EC_REVBTN# SW2 TC010-PS11CET_5P EC_REVBTN# 33 D49 2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 +5VALW +5VALW C607 1 2 1 SN74LVC32APWLE_TSSOP14 3 D 1 14 P 11 1 7 FWE# G U17D KBA18 KBA16 KBA15 KBA12 KBA7 KBA6 KBA5 KBA4 KBA3 KBA2 KBA1 KBA0 ADB0 ADB1 ADB2 33 EC_UTXD/KSO17 0.1U_0402_16V4Z U41 1 30,31,33,37 2 G 2 SUSP# C605 1 2 A18 A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VDD WE# A17 A14 A13 A8 A9 A11 OE# A10 CE# DQ7 DQ6 DQ5 DQ4 DQ3 FWE# KBA17 KBA14 KBA13 KBA8 KBA9 KBA11 FRD# KBA10 FSEL# ADB7 ADB6 ADB5 ADB4 ADB3 1 +3VALW 3 FRD BTN FRD# 33 FSEL# 33 +3VALW U42 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 FSEL# FRD# FWE# 22 24 9 CE# OE# WE# EC_FRDBTN# 3 EC_FRDBTN# 33 SW3 TC010-PS11CET_5P PLAY BTN 1MB Flash ROM 21 20 19 18 17 16 15 14 8 7 36 6 5 4 3 2 1 40 13 37 1 4 512K8-90_PLCC32 KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19 @PSOT24C_SOT23 2 2 1 4 VCC0 VCC1 31 30 D0 D1 D2 D3 D4 D5 D6 D7 25 26 27 28 32 33 34 35 RP# NC READY/BUSY# NC0 NC1 10 11 12 29 38 GND0 GND1 23 39 3 5 +3VALW R593 100K_0402_5% REV BTN ADB[0..7] 512KB Flash ROM +3V +3VALW KBA[0..19] 35,38 MUL_KEY# 33 DAN202U_SC70 SW1 TC010-PS11CET_5P 5 KBA[0..19] ADB[0..7] 51ON# MUL_KEY# 2 1 ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7 2 C608 D50 1 3 STOP BTN +3VALW EC_PLAYBTN# 33 2 @PSOT24C_SOT23 2 1 2 R598 @100K_0402_5% EC_PLAYBTN# SW4 TC010-PS11CET_5P @0.1U_0402_16V4Z 1 4 3 5 System BIOS 33 33 3 1 EC_STOPBTN# EC_STOPBTN# 33 SW5 TC010-PS11CET_5P @SST39VF080-70_TSOP40 Title Compal Electronics, Ltd. BIOS & Ext.I/O THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D CustomLA-2301 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Thursday, April 08, 2004 Rev 0.2 Sheet 34 of 47 5 4 3 2 1 Power Button +3VALW LID_SW# 1 34 MUL_KEY_ESD# R599 2 100K_0402_5% +3VALW 33 LID_SW# 1 D SW7 TC010-PS11CET_5P 51ON# 2 DAN202U_SC70 ON/OFF 33 51ON# 34,38 1 4.7K_0402_5% +3V VID_PWRGD R604 1 2 2 1 R603 2 +3VALW 33K_0402_5% 2 C609 1000P_0402_25V8K 1 D Q34 2N7002_SOT23 R605 10K_0402_5% 1 DTC124EK_SC59 2 EC_ON D35 RLZ20A_LL34 1 44 VID_PWRGD 44 ENLL 2 R607 2 EC_ON 3 Q32 33 D 1 5 3 1 4 ESE11MV9_4P 2 G 1 0_0402_5% +3V POWER U33C 3 S 8 5 H_VID_PWRGD O 10 4 3 DAN202U_SC70 D31 V-PORT-0603-220 M-V05_0603 OE# 3 D33 2 2 1 1 R601 100K_0402_5% 2 1 2 36 S4_LID_SW# 2 SW6 1 D73 3 1 D30 @PSOT24C_SOT23 2 3 ON/OFFBTN# 36 I 9 SN74LVC125APWLE_TSSOP14 1 4 100_0402_1% 1 D38 1SS355_SOD323 C613 0.1U_0402_16V4Z 1 Q59 SUSP LED 2N7002_SOT23 +5V C612 D57 1 10U_0805_10V4Z 2 R725 300_0402_5% 2 1 1 1 1 2 2 3 3 R610 100K_0402_5% KILL_SW# 28,33 DS-1208_3P 3 HT-191UD_AMBER_0603 D39 JP23 +FAN_VCC1 1 1 2 @1000P_0402_25V8K 3 C614 ACES_85205-0300 D41 2 1N4148_SOT23 1 1 R614 2 SW8 2 8.2K_0402_5% ODD_LED +5V 1 2 2 3 2 2 B 1 C615 @1000P_0402_25V8K ODD_LED# 34 RTC BATT - HDD LED +5V + BATT1 2 1 +RTCBATT D42 1 2 2 2 1 HDD_LED# 33 B ML1220T13RE HT-191UYG-DT_GRN_0603 R615 300_0402_5% C618 0.1U_0402_16V4Z 1 2 +RTCBATT BAS40-04_SOT23 D45 +RTCVCC 3 33 FAN_SPEED1 1 HT-191UYG-DT_GRN_0603 R613 300_0402_5% 1 PWR_SUSP_LED 33,34 D40 +3VS R617 10K_0402_5% V-PORT-0603-220 M-V05_0603 FAN CONN 2 SYS. FUNT. LED--Right Angle +12VALWP C622 WL LED +5V +5VALW 1 1 2 100_0402_1% C620 0.1U_0402_16V4Z 1 2 C621 D46 2 1N4148_SOT23 2 8.2K_0402_5% 2 1 2 WL_LED# 34 HT-110UD_1204 5IN1 LED D47 10U_0805_10V4Z +FAN_VCC2 1 A +3VS C619 1 2 R639 120_0402_5% @1000P_0402_25V8K 1 1 R620 2 R616 300_0402_5% 1 1 - 1 + 6 R619 10K_0402_5% Q41 FMMT619_SOT23 C D44 2 B 1SS355_SOD323 2 E 2 2 R618 3 33 EN_DFAN2 U44B LM358A_SO8 0 7 +CHGRTC 1 D43 1 5 0.1U_0402_16V4Z 2 2 1 PWR_LED# 34 S 1 Q37 FMMT619_SOT23 C 2 B 2 E 1 HT-191NB_BLUE_0603 2 - R612 10K_0402_5% R611 2 +3V 1 2 1 U44A LM358A_SO8 0 1 G 2 + P 3 33 EN_DFAN1 2 R640 300_0402_5% 2 2 8 2 +5VALW C611 0.1U_0402_16V4Z D 1 1 1 3 C610 0.1U_0402_16V4Z C Kill SWITCH D48 2 +5V 1 +12VALWP 1 FAN CONN 1 SYS. FUNT. LED--Flate PWR ON LED 2 G C 2 1 5IN1_LED# 24 HT-110UYG-CT_YEL/GRN JP24 1 2 3 ACES_85205-0300 A 3 2 2 +3VS 1 R621 10K_0402_5% C623 @1000P_0402_25V8K 33 FAN_SPEED2 1 Title 2 Compal Electronics, Ltd. PWRGD/Fan/PWRBTN/TP/LID. THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D CustomLA-2301 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 Rev 0.2 Sheet Thursday, April 08, 2004 1 35 of 47 1 1 H7 H_C315D91 1 1 CF10 SMD40M80 CF11 SMD40M80 CF12 SMD40M80 1 CF14 SMD40M80 CF9 SMD40M80 1 1 CF13 SMD40M80 CF6 SMD40M80 1 CF8 SMD40M80 CF5 SMD40M80 1 1 CF7 SMD40M80 CF4 SMD40M80 1 1 CF3 SMD40M80 1 H11 H_C315D169 CF2 SMD40M80 1 1 1 1 1 H10 H_C315D181 H33 H_C146D63 1 1 1 H6 H_C315D91 1 H8 H_C315D91 1 1 1 1 FD6 FIDUCAL CF1 SMD40M80 H9 H_C315D181 1 FD5 FIDUCAL 1 H5 H_C315D91 H26 H_S315D110 11 H29 H_S394D110 FD4 FIDUCAL 1 H25 H_S315D110 U33D SN74LVC125APWLE_TSSOP14 H28 H_S394D110 FD3 FIDUCAL 1 O H27 H_S315D110 FD2 FIDUCAL 1 FD1 FIDUCAL 1 H3 H_C394D177 1 1 H24 H_S315D110 1 1 1 13 I OE# 12 H2 H_C394D177 11 O SN74LVC125APWLE_TSSOP14 1 H4 H_C394D177 1 H1 H_C394D177 H22 H_S315D110 1 H21 H_S315D110 1 H23 H_S315D110 E 1 H20 H_S315D110 D 1 I C U16D OE# 12 B 1 13 A H19 H_O224X146D146X67 H18 H_C276D169 H36 H_S394D110 M2 H_C79D79N M3 M4 H_O118X79D118X79N H_C148D148N 1 1 M1 H_O201X148D201X148N 1 H34 H_C315D169 H32 H_S354D181 1 1 1 1 1 2 1 2 M5 H_C138D138N Battery mode Hibernation 1 RTCVREF 1 RTCVREF 1N4148_SOT23 D74 RTCVREF 1 2 5 2 0.1U_0402_10V6K 2 ON/OFFBTN# 35 U53 D S P 2 2 C791 1 R822 100K_0402_5% 1 R821 3 R820 100K_0402_5% 3 1 1 680K_0402_5% 2 2 A S 3 D 3 2 G Q63 2N7002_SOT23 33,37,42 SYSON 1 2 R824 10K_0402_5% R825 1 2 10K_0402_5% S4_LATCH 1 R826 10K_0402_5% C795 @1U_0805_16V7K +3VALW 33 S4_DATA U54 1 2 1 2 R827 10K_0402_5% 1 2 C793 1U_0603_10V4Z 1 2 3 4 5 6 7 2 RTCVREF CD1# D1 CP1 SD1# Q1 Q1# GND VCC CD2# D2 CP2 SD2# Q2 Q2# 14 13 12 11 10 09 08 RTCVREF 0.1U_0402_10V6K 1 2 C794 74LCX74MTC_TSSOP14 Q64 D75 2 S D_SET_S4 1 CH751H-40_SC76 2 G 2N7002_SOT23 1 33 D D 3 RTCVREF 1 Q62 2N7002_SOT23 2 G S4_LID_SW# Q61 2N7002_SOT23 2 G 3 35 1 3 3 C792 1U_0603_10V6K 4 1 2 R823 10K_0402_5% NC7SZ14M5X_SOT23-5 Y G 1 S 1 2 C796 @220P_0402_50V7K 4 4 Title Compal Electronics, Ltd. ScrewHole THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D CustomLA-2301 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: A B C D Rev 0.2 Sheet Thursday, April 08, 2004 E 36 of 47 3 2 1 +2.5V To +2.5VS Transfer +2.5V & +2.5VS Discharge +2.5V 1 1 0.1U_0402_10V6K C817 1 0.1U_0402_10V6K C818 1 1 0.1U_0402_10V6K 10U_0805_10V4Z 2 10U_0805_10V4Z R625 1 1 C631 S @0.1U_0402_16V4Z C637 2 +12VALW 2 0.1U_0402_16V7K S 3 2 +3VS 1 @0.1U_0402_16V4Z R626 @470_0402_5% 3 D C638 S SUSP 2 G Q46 2N7002_SOT23 SYSON# D 2 G S SUSP Q48 @2N7002_SOT23 10U_0805_10V4Z 2 47K_0603_1% 1 D C647 0.1U_0402_16V7K 2 10U_0805_10V4Z 2 1 +5V +5VS C642 R634 10K_0402_5% @0.1U_0402_16V4Z 1 SI4800DY_SO8 1 1 C643 2 +12VALW R630 470_0805_5% R633 1 R631 @470_0402_5% SYSON# 2 27K_0603_1% 1 C648 D 0.1U_0402_16V7K 2 S 3 3 2 B S SYSON# 2 G Q50 2N7002_SOT23 1 SUSP 2 G Q51 2N7002_SOT23 33,36,42 D 2 G SYSON S Q54 2N7002_SOT23 SYSON# D S 2 G SUSP Q52 2N7002_SOT23 1 2 1 S S S G D 3 C646 D D D D 1 @0.1U_0402_16V4Z 2 +12VALW S C Q49 @2N7002_SOT23 +5V & +5VS Discharge 1 2 C640 R632 2 D 2 G +5VALW 2 10U_0805_10V4Z 1 2 3 4 1 2 C641 8 7 6 5 3 SI4800DY_SO8 1 1 1 S S S G +5VS U50 1 2 3 4 D D D D R627 @470_0402_5% +5VALW To +5VS Transfer +5VALW 1 10U_0805_10V4Z 2 +3V C632 +5V U49 C645 1 2 +5VALW To +5V Transfer 1 10U_0805_10V4Z 0.1U_0402_16V7K SYSON# 2 G Q47 2N7002_SOT23 +5VALW 8 7 6 5 D Q43 @2N7002_SOT23 2 95.3K_0603_1% D C639 2 R628 1 1 C633 3 1 1 1 95.3K_0603_1% 1 SI4800DY_SO8 1 2 2 S S S G 1 C634 10U_0805_10V4Z 1 +12VALW C C635 10U_0805_10V4Z D D D D 3 2 1 1 2 1 R629 2 S +3VS 1 2 3 4 1 S S S G S D 2 G +3V & +3VS Discharge 8 7 6 5 3 D D D D SUSP Q42 @2N7002_SOT23 +3VALW AND +2.5VALW MUST RISING SAME TIME +1.5V MUST DELAY AFTER +2.5V +3VALW U48 1 2 3 4 SI4800DY_SO8 1 2 SUSP G Q45 2N7002_SOT23 D 2 G D R623 @470_0402_5% +3VALW To +3VS Transfer +3V U47 C636 @0.1U_0402_16V4Z +3VS +3VALW 10U_0805_10V4Z 2 0.1U_0402_16V7K +3VALW To +3V Transfer 8 7 6 5 2 R622 @470_0402_5% C626 SYSON# 2 +3VS 1 2 100K_0603_1% 1 0.1U_0402_10V6K 1 1 2 SI4800DY_SO8 1 +12VALW C819 C627 1 2 C816 +2.5VS 3 C815 C629 1 2 3 4 3 C814 0.1U_0402_10V6K 2 2 2 S S S G 3 0.1U_0402_10V6K 2 2 D D D D 1 8 7 6 5 +3V 2 D +2.5V U46 Add for EMI +2.5V +2.5VS 1 4 1 5 S 2 G Q53 @2N7002_SOT23 B +1.5VS Discharge +5VALW 1 +1.5VS 42,43 SUSP Q55 2N7002_SOT23 S 1 2 SUSP D D 3 1 2 R708 @470_0603_5% SUSP SUSP# 2 G 3 30,31,33,34 SUSP# 1 R635 4.7K_0402_5% S 2 G Q58 @2N7002_SOT23 A A Title Compal Electronics, Inc. DC-DC Circuit Interface THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev 0.2 LA-2301 Date: 5 4 3 2 Thursday, April 08, 2004 Sheet 1 37 of 47 A B C D VS 12A_65VDC_451012 ACIN 20,33,34 PACIN 40,41 1 PACIN LM393M_SO8 PD2 1 1 O PC6 0.1U_0402_16V7K PR7 10K_0402_5% 2 2 RLZ4.3B_LL34 PR8 2 1 Vin Detector RTCVREF 10K_0402_5% 3.3V High 18.384 17.901 17.430 Low 17.728 17.257 16.976 2 VIN 2 20K_0402_1% 2 - 4 PR6 PC5 1000P_0402_50V7K + 1 SINGA_2DC-G213-B04 2 1 1 2 3 15.4K_0402_1% 2 PU1A 1 1 PR5 P 8 2 PC4 100P_0402_50V8J 1 2 PR4 1K_0402_5% 2 88.7K_0402_1% 1 PC3 1000P_0402_50V7K 2 PC2 100P_0402_50V8J 2 2 PC1 1000P_0402_50V7K 1 1 1 EC10QS04_SOD106 2 2 2 G G PR2 PR3 2 3 4 2 1M_0402_1% VS 5.6K_0402_5% PD1 1 1 1 1 PR1 1 PJP1 DC_IN_S2 2 G 1 1 DC_IN_S1 VIN 1 VIN PL1 C8B BPH 853025_2P 1 2 PF1 PD3 1 1N4148_SOD80 PD4 1 1 2 BATT+ RB751V_SOD323 PR9 VS 33_1206_5% 1 2 PR10 1K_1206_5% 2 CHGRTCP N1 1 2 PR11 200_0603_5% 3 1 PQ1 TP0610T_SOT23 2 VIN PC8 0.1U_0603_25V7K 1 N3 1 2 PR12 1K_1206_5% 1N4148_SOD80 B+ 2 2 100K_0402_5% PC7 0.022U_0805_50V7K 2 PR13 2 PD5 1 1 2 1 2 34,35 1 PR14 51ON# 2 22K_0402_5% 1 2 PR15 1K_1206_5% 1 RTCVREF PR19 499K_0402_1% 3 PC13 1000P_0402_50V7K 1 VL 34K_0402_1% PR24 66.5K_0402_1% PR23 499K_0402_1% PR25 191K_0402_1% PC11 1000P_0402_50V7K 3 2 2 PC12 1000P_0402_50V7K 2 PR22 1 6 2 1 RB715F_SOT323 2 5 - 1 + O LM393M_SO8 2 3 7 1 ACON PU1B 1 2 40 2 1 PD7 6,39,41 MAINPWON 8 PD6 RLZ16B_LL34 PC9 1U_0805_25V4Z 1 1 2 GND PC10 10U_0805_10V4Z P N2 2 1 2.2M_0402_5% G IN 2 200_0603_5% OUT 2 PR18 4 3 2 100K_0402_5% 1 2 2 2 200_0603_5% 1 1 PR17 VL 1 2 200_0603_5% 2 1 +CHGRTC 3.3V PR21 1 PR20 1 PR16 PU2 S-812C33AUA-C2N-T2_SOT89 PJ1 +3VALWP 2 2 PJ7 1 1 +3VALW 2 +1.8VSP JUMP_43X118 2 1 1 +1.8VS JUMP_43X79 (1A,40mils ,Via NO.= 2) (5A,200mils ,Via NO.= 10) 1 D PJ3 2 1 1 +5VALW PJ4 JUMP_43X118 (5A,200mils ,Via NO.= 10) +CPU_VIDP 2 2 PJ5 +12VALWP 2 2 1 1 +12VALW 1 1 +CPU_VID JUMP_43X39 2PQ2 2 G SN7002N_SOT23 PR26 Precharge detector 15.97V/14.84V FOR ADAPTOR PQ3 DTC115EUA_SC70 (120mA,20mils ,Via NO.= 1) JUMP_43X39 2 (120mA,40mils ,Via NO.= 2) 4 2 2 +5VALWP PJ2 1 1 JUMP_43X118 PJ8 2 2 1 1 +2.5V +1.5VSP 2 2 1 1 +1.5VS 3 PJ6 +2.5VP PACIN 1 47K_0402_5% S 1 2 3 +5VALWP JUMP_43X118 (3A,120mils ,Via NO.= 6) 4 JUMP_43X118 (8A,320mils ,Via NO.= 16) PJ9 +1.25VSP 2 2 1 1 +1.25VS JUMP_43X118 (2A,80mils ,Via NO.= 4) A B THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C Title Compal Electronics, Inc. DCIN & DETECTOR Size Document Number Rev 0.1 LA-2331 Date: Thursday, April 08, 2004 Sheet D 38 of 47 A B C D PH1 under CPU botten side : CPU thermal protection at 84 degree C Recovery at 45 degree C VMB PR32 1 2 16.9K_0402_1% TM_REF1 1 2 2 PR34 100_0402_5% MAINPWON 6,38,41 3 + PQ4 DTC115EUA_SC70 2 - PD9 2 1 O 1 2 1SS355_SOD323 LM393M_SO8 PR35 +3VALWP 1 2 3.32K_0402_1% 2 1 1K_0402_5% 2 PR37 2 1 VL 100K_0402_1% 0.022U_0402_16V7K 2 1 25.5K_0402_1% 1 PR38 PC17 1 ALI/MH# 33 PR36 2 1 1 3 4 @ BAS40-04_SOT23 PU3A 1 PR33 100_0402_5% 47K_0402_1% 1 10KB_0603_1%_TH11-3H103FT 1 PC16 0.01U_0402_25V7Z 2 PC15 1000P_0402_50V7K PR27 PC14 0.1U_0603_25V7K PR30 1 2 47K_0402_1% 8 1 PH1 P 2 3 BATT+ G 1 PD8 PR31 1K_0402_5% SUYIN_200275MR009G116ZL_RV +3VALWP 1 VL 2 PL2 1 2 C8B BPH 853025_2P 2 15A_65VDC_451015 PR29 2 1 47K_0402_5% 2 1 VS 1 1K_0402_5% 1 PR28 2 2 BATT_S1 ALI/NIMH# AB/I TS_A EC_SMDA EC_SMCA 2 GND GND 1 2 3 4 5 6 7 8 9 2 10 11 PF2 BATT+ BATT+ ID B/I TS SMD SMC GNDGND- 1 PJP2 VL 1 1 2 PD10 PR39 PC18 1000P_0402_50V7K 100K_0402_1% 2 2 3 1 2 @ BAS40-04_SOT23 BATT_TEMP 33 EC_SMD1 33,34 1 1 EC_SMC1 33,34 PH2 near main Battery CONN : BAT. thermal protection at 79 degree C Recovery at 45 degree C PD11 @ BAS40-04_SOT23 PD12 @ BAS40-04_SOT23 VL 2 1 3 2 2 3 VL PH2 3 PR40 47K_0402_1% 3 PR41 1 2 47K_0402_1% 5 + P 2 14.7K_0402_1% TM_REF2 6 - PU3B PD13 O 2 7 1 1SS355_SOD323 LM393M_SO8 1 1 4 1 PR42 G 8 2 +5VALWP 1 10KB_0603_1%_TH11-3H103FT PC19 PR43 PR44 3.48K_0402_1% 2 1 VL 100K_0402_1% PR45 100K_0402_1% PC20 1000P_0402_50V7K 2 2 1 1 2 2 0.022U_0402_16V7K 4 4 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C Title Compal Electronics, Inc. BATTERY CONN / OTP Size Document Number Rev 0.1 LA-2331 Date: Thursday, April 08, 2004 Sheet D 39 of 47 B 8 7 6 5 2 PL3 1 2 C8B BPH 853025_2P 1 0.01_2512_1%(1W) PC21 4.7U_1206_25V6K PC22 4.7U_1206_25V6K PC23 1 2 3 4.7U_1206_25V6K 4 4 8 7 6 5 4 PR46 1 2 3 2 1 2 3 1 8 7 6 5 1 2 3 B+ 2 PQ7 AO4407_SO8 1 PQ6 AO4407_SO8 8 7 6 5 PQ8 3 200K_0402_1% PC31 PR57 1 2 1 2 1K_0402_5% 1000P_0402_50V7K 2 2 PC30 0.1U_0402_16V7K 2 2 G 33 D 205K_0402_1% 1 2 PR59 IREF PQ14 S SN7002N_SOT23 PR64 21 FB2 OUT 20 VH 19 VCC 18 VREF 7 FB1 8 -INE1 RT 17 9 +INE1 -INE3 16 FB3 15 OUTC1 11 OUTD CTL 14 0.1U_0402_16V7K 12 -INC1 +INC1 13 IREF=1.31*Icharge IREF=0.73~3.3V 2 3 2 1 2 1 PD15 1SS355_SOD323 PC26 1 2 0.1U_0603_25V7K 6 RLZ22B_LL34 1 -INE2 VCC(o) 5 1 10 10K_0402_5% PC34 100K_0402_1% 4 CS 2 1 PD16 PQ12 LXCHRG 1 2 PC29 0.1U_0603_25V7K 1 PR58 68K_0402_5% 1 2 PC32 0.1U_0603_25V7K 2 2 ACOFF 33 1SS355_SOD323 DTC115EUA_SC70 CC=0.5~2.7A CV=16.8V(12 CELLS LI-ION) 2 PL4 PR61 1 2 1 2 22UH_SPC-1204P-220_2.9A_20% 0.02_2512_1% PR63 PC33 1 2 1 2 47K_0402_5% 1500P_0402_50V7K ACON BATT+ 4.7U_1206_25V6K 2 ACON ACON 2 38 2 PR62 1 PACIN 1 2 PR60 3K_0402_1% PACIN 3 38,41 1 1 1SS355_SOD323 22 CS PQ10 AO4407_SO8 ACOFF# 4 PD18 PC35 PC36 4.7U_1206_25V6K RB051L-40_SOD106 1 1 PD17 ACOFF# 1 PC28 PR55 2 1 2 10K_0402_5% 4700P_0402_25V7K 1 +INE2 N18 1 2 2 2 S 2 3 PR56 150K_0402_1% PR54 33.2K_0402_1% 10K_0402_1% 3 PC25 0.022U_0402_16V7K 1 2 2 PR53 1 1 3 1 PQ13 SN7002N_SOT23 2 G PC27 23 PD14 1 0.1U_0402_16V7K D OUTC2 GND VIN PR51 10K_0402_5% 2 1 1 2 2 0_0402_5% PR49 1 2 47K_0402_5% 1 1 100K_0402_5% 24 3 1 1 2 PR52 PQ11 DTC115EUA_SC70 +INC2 5 6 7 8 ADP_I 1 2 33,43 PR50 1 1 0.1U_0603_25V7K PU4 1 -INC2 PC37 4.7U_1206_25V6K 2 47K 2 2 2 47K 2 PQ9 DTA144EUA_SC70 PC24 1 1 PR47 PR48 47K_0402_5% 1 AO4407_SO8 4 1 1 2 VIN Iadp=0~5.8A P3 D PQ5 AO4407_SO8 B++ 2 P2 C 1 A MB3887_SSOP24 +3VALWP CS 1 PR65 2 1 PR67 47K_0402_5% PQ15 DTC115EUA_SC70 PR66 4.2V 1 2 95.3K_0603_0.1% 1 143K_0603_0.1% 2 PR68 2 2 1 3 1 3 95.3K_0603_0.1% 3 PQ16 DTC115EUA_SC70 FSTCHG 2 VMB 1 3 33 75W Iadp=0~3.5A PR46=0.02_2512_1% PR53=25.5K_0402_1% Unpop PQ8 90W Iadp=0~4.2A PR46=0.015_2512_1% PR53=29.4K_0402_1% Unpop PQ8 120W Iadp=0~5.8A PR46=0.01_2512_1% PR53=33.2K_0402_1% Pop PQ5 and PQ8 2 PR69 340K_0402_1% 1 OVP voltage : LI 4S2P : 17.4V--> BATT_OVP= 1.935V +12VALWP PR70 499K_0402_1% 8 P 3 - 2 4 + G PU5A LM358A_SO8 1 0 33 BATT_OVP 2 (BAT_OVP=0.1111 *VMB) 4 A 1 1 2.2K_0402_5% 105K_0402_1% 2 PR72 2 0.1U_0402_16V7K PR71 2 @ 1 PC38 2 1 4 PC39 0.01U_0402_25V7Z THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B C Title Compal Electronics, Inc. CHARGER Size Document Number Rev 0.1 LA-2331 Date: Thursday, April 08, 2004 Sheet D 40 of 47 5 4 3 2 1 PC40 N4 2 1 1 PQ17 SI4800DY-T1_SO8 4 3 2 1 2 2 1 1 4 3 2 1 2 CSH5 1 2.5VREF PR84 698_0402_1% 2 PC57 4.7U_0805_6.3V6K +5VALWP PR87 10.2K_0402_1% PC59 100P_0402_50V8J 470U_6.3V_M 1 + 1 470U_6.3V_M PD23 + 1 MAX1902EAI_SSOP28 PC54 0.47U_0603_16V7K 2 PC60 2 PC61 SSM14_SMA 2 2 1 PC62 @ 0.047U_0402_16V4Z PR81 2 0_0402_5% 1 1 CSL5 1 10K_0402_1% C 1 PC58 1000P_0402_50V7K 2 2 1 5 6 7 8 D D D D PC52 47P_0402_50V8J 2M_0402_1% PDL5 2 2 2 1 47K_0402_5% G S S S 21 22 RUN/ON3 1 TIME/ON5 0_0402_5% PR78 PLX5 2 2 VS PR88 7 28 PQ20 SI4810DY_SO8 4 5 18 16 17 19 20 14 13 12 15 9 6 11 PR75 2 CSH3 CSL3 FB3 SKIP# SHDN# 12OUT VDD BST5 DH5 LX5 DL5 PGND CSH5 CSL5 FB5 SEQ REF SYNC RST# 1 1 2 3 10 23 3 1 1 G S S S 2 2 1 PR74 1.54K_0402_1% 1 2 PC56 100P_0402_50V8J PR86 1 PC50 4.7U_1206_25V6K 2 1 2 PR83 10K_0402_5% PACIN 1 2 SSM14_SMA PC46 PC47 4.7U_1206_25V6K 4.7U_1206_25V6K 2 LX3 DL3 VL DH3 26 24 V+ 27 8 1 1 3.32K_0402_1% 38,40 1 2 BST3 GND 1 1 25 0_0402_5% PR85 2 PC55 PD22 1 1 1 2 1 2 PU6 0.47U_0603_16V7K 2 2 2 PC53 PR82 CSH3 CSL3 2 620_0402_5% 1 + SI4800DY-T1_SO8 PDH5 PR80 1 2 1 S S S G 1 2 3 4 1 1 2 PR77 1.27K_0402_1% PR79 PC49 0.1U_0603_25V7K PC48 4.7U_0805_6.3V6K PDH3 PR76 2 1 1.27K_0402_1% C +3VALWP PQ18 D D D D +12VALWP 1 8 7 6 5 D D D D PQ19 SI4810DY_SO8 PDL3 2 10uH_SDT-1205P-100-118_5A_20% B+++ PD21 1SS355_SOD323 PC51 47P_0402_50V8J 2 PC45 5 6 7 8 VL 1M_0402_1% 1 0.1U_0603_25V7K 2 1 2 3 4 S S S G DAP202U_SOT323 PLX3 PL6 10UH_SPC-1205P-100_4.5A_20% PD20 VS 2 2 4.7U_1206_25V6K D PT1 2 D D D D 1 1 PC44 PC43 4.7U_1206_25V6K 470U_6.3V_M EC11FS2_SOD106 1 FLYBACK 22_1206_5% 2 SNB 2 PR73 8 7 6 5 HCB4532K-800T90_1812 PC41 470P_0805_100V7K 4 2 3 1 BST51 2 4.7U_1206_25V6K 1 B+ 2 PC42 BST31 0.1U_0603_25V7K 1 1 B+++ PL5 D PD19 PR89 B VL 2 2 1 PR90 220K_0402_5% B 10K_0402_1% 2 1 MAINPWON 6,38,39 PC63 0.47U_0603_16V7K A A THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Compal Electronics, Inc. 5V/3.3V/12V Size Document Number Rev 0.1 LA-2331 Date: Thursday, April 08, 2004 Sheet 1 41 of 47 A B C PR91 2 PQ21 SI4800DY-T1_SO8 2 PHASE 8 LGATE 4 G S S S UGATE 4 3 2 1 2 1 PL7 4.7U_SPC-1205P-4R7A_+40-20% 2 1 FB 2 1 APW7057KC-TR_SOP8 1 2 0.1U_0402_16V7K 2 @ PC68 470U_6.3V_M 2 PR94 5.1K_0402_1% 1 2 3 2 PQ24 DTC115EUA_SC70 + PQ23 SI4810DY_SO8 1 PC123 +2.5VP 4 3 2 1 PR158 0_0402_5% 1 2 SYSON GND G S S S 3 3 +5VALWP 1 BOOT 1 6 1 1 2 PC67 0.1U_0402_16V7K 5 6 7 8 PR93 100K_0402_5% 2 1 1 PC65 4.7U_0805_6.3V6K D D D D VL OCSET 1 VCC 1 7 PD24 1N4148_SOD80 D D D D PU7 1 PQ22 DTC115EUA_SC70 PC64 1U_0603_6.3V6M 2 JUMP_43X118 5 6 7 8 PC66 470P_0603_50V7K 2 7.15K_0402_1% 2 1 PR92 PJ10 2 10_0603_5% 5 1 2 2 1 1 D PR95 2 2 1 2 1 PC69 0.1U_0402_16V7K 2.4K_0402_1% PR96 1 1 2 D D D D 5 6 7 8 1 1 UGATE 2 PHASE 8 PQ25 SI4800DY-T1_SO8 G S S S 1 BOOT 4 3 2 1 PQ26 SN7002N_SOT23 3 S 6 PL8 3UH_SPC-07040-3R0_5A_30% 2 1 FB +1.5VSP D D D D @ 0.1U_0402_16V7K GND LGATE 4 APW7057KC-TR_SOP8 + PQ27 SI4810DY_SO8 PC74 470U_6.3V_M 2 4 3 2 1 G S S S 3 3 1 1 PC124 D 2 G +5VALWP 2 OCSET 1 1 PC71 4.7U_0805_6.3V6K 5 6 7 8 1 PR159 0_0402_5% 1 2 2 SUSP PD25 1N4148_SOD80 PC73 0.1U_0402_16V7K VCC 2 PU8 1 37,43 3 1U_0603_6.3V6M 2 JUMP_43X118 PC70 2 PC72 470P_0603_50V7K 7 2 10_0603_5% 5 1 2 PR97 3.32K_0402_1% PJ11 2 2 1 2 PR98 3K_0402_1% 1 2 PR99 1 2 PC75 0.1U_0402_16V7K 1 3.4K_0402_1% 4 4 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C Title Compal Electronics, Inc. 2.5V/1.5V Size Document Number Rev 0.1 LA-2331 Date: Thursday, April 08, 2004 Sheet D 42 of 47 5 PJ12 PU9 APL1085UC-TR_TO252 VIN VOUT 2 1 1 2 PR101 @ 2M_0402_1% VS PR102 @ 100K_0402_1% PC79 0.1U_0603_25V7K - O D S PQ28 @ SN7002N_SOT23 2 G 1 PU10A @ LM393M_SO8 PC82 @ 10P_0402_50V8J 2 2 PC81 @ 1000P_0402_50V7K 2 PR107 @ 100K_0402_1% 1 + 2 3 3 H_PROCHOT# 5 2 2 @ 124K_0402_1% 1 2 PR105 2 1 PR106 @ 196K_0402_1% @ 1 VL D 1 2 2 @ 0.01U_0402_25V7Z PC80 8 ADP_I 1 33,40 1 PR104 @ 10.2K_0402_1% 2 1 1 2 PR103 44.2_0402_1% 1 PC78 100P_0402_50V8J VL 1 1 2 PC76 4.7U_0805_6.3V6K 1 2 PC77 4.7U_0805_6.3V6K PR100 100_0402_1% P 1 D 85W THROTTLING 70W REVOVERY +1.8VSP ADJUST JUMP_43X118 1 G 1 3 2 4 2 1 3 1 2 2 +3VS 4 C PU10B @ LM393M_SO8 C P - O 7 G + 6 4 PJ13 JUMP_43X118 5 2 2 1 1 8 +2.5V 6 NC 5 3 VREF NC 7 4 VOUT NC 8 TP 9 +3VALWP 1 VCNTL GND 2 PR108 1K_0402_1% VIN 2 PC84 1U_0603_6.3V6M 2 2 PC83 10U_1206_6.3V7K 1 1 PU11 1 APL5331KAC-TR_SO8 +1.25VSP 2 1 2 1 PC85 0.1U_0402_16V7K PR109 1K_0402_1% B PC86 10U_1206_6.3V7K 2 PC125 @ 0.1U_0402_16V7K D 2 G PQ29 S SN7002N_SOT23 2 1 0_0402_5% 1 2 SUSP 3 37,42 1 B 1 PR160 A A THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Compal Electronics, Inc. 1.8V/1.25V/PROCHOT Size Document Number Rev 0.1 LA-2331 Date: Thursday, April 08, 2004 Sheet 1 43 of 47 B+ 2 +5VS RAMPADJ CPU_VID4 CPU_VID3 CPU_VID2 CPU_VID1 CPU_VID0 CPU_VID5 1 2 3 4 5 6 VID4 VID3 VID2 VID1 VID0 VID5 PGOOD ENLL 34 ENLL 33 DRSEN DSEN# PWM3 20 ISEN3+ ISEN3- 21 22 PWM4 31 ISEN4+ ISEN4- 30 29 1 PR114 2 0_0402_5% 35 1 PR118 69.8K_0402_1% 2 PR121 118K_0402_1% FS COMP 15 37 DRSV FB 13 38 NC NC 14 16 17 18 40 NC 12 GND VDIFF VSEN VRTN GND OFS PR115 2 1 @ 0_0402_5% 2 1 PR116 @ 0_0402_5% 2 PR122 @ 0_0402_5% 2 1 Place close to IC 2 2 1 1 S PG 2 EN GND 2 PR138 100K_0402_5% +CPU_VIDP 1 C 2 B E 3 1 5 Remote Sensing PR128 1 2 16.2K_0402_1% 1 PQ30 SN7002N_SOT23 PR133 0_0402_5% 2 1 +CPU_CORE S PR135 0_0402_5% 2 1 2 1 PR134 @ 0_0402_5% PQ33 SN7002N_SOT23 2 1 PR136 @ 0_0402_5% VCCSENSE 5 Place near +VCC_CORE output capacitor VSSSENSE 5 PQ34 MMBT3904_SOT23 2 4 OUT 46 46 MIC5258_SOT23-5 1 IN 3 PC96 4.7U_0805_6.3V6K PR141 100K_0402_5% 1 VR_ON PR140 0_0402_5% 2 1 1 D 2 G 3 PU13 VID_PWRGD 33 4 H_BOOTSELECT 2 1 2 35 PC95 4.7U_0805_6.3V6K PR137 22K_0402_5% 2 1 46 ISEN4+ ISEN4- PR125 2.26K_0402_1% 1 2 3 PR132 PC94 27K_0402_5% 1U_0603_6.3V6M PR130 681K_0402_1% PR131 5.1K_0402_1% 2PQ32 G SN7002N_SOT23 1.2VDD PWM4 PC92 PR124 @ 1000P_0402_50V7K @ 0_0402_5% 2 1 2 1 PC93 0.1U_0402_16V7K D PR139 0_0603_5% 2 1 46 46 1 PC91 22P_0402_50V8J +5VCPUVCC 2 S PQ31 2 TP0610T_SOT23G 46 ISEN3+ ISEN3+5VCPUVCC 1 1 D PWM3 PC89 PR120 2200P_0402_50V7K 20K_0402_1% 2 1 1 2 8 PR127 1M_0402_1% 2 PR126 32.4K_0402_1% Unpop PR115 Unpop PR115 & PR116 Pop PR116 +3VALWP +5VCPUVCC 1 1 2 ISL6248ACR-T_QFN40 1 20K_0402_1% 17.4K_0402_1% Others 45 45 G PR119 45 ISEN2+ ISEN2- 36 19 PR129 45.3K_0402_1% PWM2 D 360_0402_1% 300_0402_1% 26 27 28 S PR117 PWM2 ISEN2+ ISEN2- 2 PR123 10K_0402_1% 3 Phase 45 45 1 2 2 LM358A_SO8 1 4 Phase 6 - 45 ISEN1+ ISEN1- 22 1 0 PWM1 1 2 7 DSV 25 24 23 1 1 1 PR119 20K_0402_1% 2 PC90 100P_0402_50V8J SOFT 9 Frequency Select PU5B + 5 11 PWM1 ISEN1+ ISEN1- 3 2 PR117 360_0402_1% OCSET VGATE 2 1 10 PC88 0.047U_0603_16V7K 2 1 PR112 10K_0402_5% 2 1 39 3 5,17,19 PM_STPCPU# 7 2 1 PR113 2 0_0402_5% 19 PM_DPRSLPVR 1 VCC 1 35 PU12 32 2 5 5 5 5 5 5 PR111 80.6K_0402_1% 1 PC87 +5VCPUVCC 1U_0603_6.3V6M 2 1 Battery Feed Forward 2 PR110 10_0603_5% THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Title Compal Electronics, Inc. CPU_CORE (1) Size Document Number Rev 0.1 LA-2331 Date: Thursday, April 08, 2004 Sheet 44 of 47 1 1 PC98 4.7U_1206_25V6K 2 1 PQ35 SI7840DP_SO8 PL9 1 2 HCB4532K-800T90_1812 PC100 PC99 4.7U_1206_25V6K 4.7U_1206_25V6K 1 1 + PC101 100U_25V_M + 2 2 5 2 PR142 0_0603_5% +5VS 1 CPU_B+ PC97 0.22U_0805_16V7K_V2 2 1 2 2 2 PC131 @ 220U_25V_M DELAYPHASE 8 GND 5 LGATE PL10 0.56UH_ETQP4LR56WFC_21A_20% 1 2 PQ36 PHASE1 IRL7833S_D2PAK PQ37 @ IRF7831TR_SO8 1 7 Panasonic ETQ-P4LR56WFC N5 PQ38 @ IRF7831TR_SO8 PC103 1U_0805_16V7K 1 PD27 SSM14_SMA 1 4 2 PR145 39.2K_0402_1% 1 2 PC104 0.01U_0402_25V7Z 1 1 4 2 2 2 B+ 2 2 1 ISL6209CB-T_SO8 1 + 5 6 7 8 BOOT PWM UGATE 3 2 1 VCC 3 4 2 PR144 57.6K_0402_1% 6 5 6 7 8 1 2 44 PR143 499K_0402_1% 1 + 4 PU14 PWM1 PC130 @ 220U_25V_M PC102 @ 100U_25V_M 1 2 3 2 1 3 2 1 3 PC126 3300P_0402_50V7K N6 PH3 820_0402_5% 2 1 ISEN1ISEN1+ DELAYPHASE 8 4 GND 5 LGATE PHASE2 PQ41 @ IRF7831TR_SO8 4 PD28 SSM14_SMA 1 +CPU_CORE 1 1 1 2 2 2 1 PR149 39.2K_0402_1% 2 1 PC110 0.01U_0402_25V7Z 2 1 PD26 EC31QS04 PC127 3300P_0402_50V7K 3 2 3 2 1 3 2 1 1 4 2 1 1 PQ42 IRL7833S_D2PAK PQ40 @ IRF7831TR_SO8 2 PR148 ISL6209CB-T_SO8 57.6K_0402_1% Panasonic ETQ-P4LR56WFC PL11 0.56UH_ETQP4LR56WFC_21A_20% 1 2 1 7 N7 1 1 2 PWM UGATE 1000P_0402_50V7K 820P_0603_50V7K PC133 PC135 PC134 820P_0603_50V7K 2 3 3 2 1 2 5 6 7 8 1 2 PC109 1U_0805_16V7K 1 1 PR147 499K_0402_1% BOOT 5 6 7 8 44 2 PWM2 VCC PC132 Local Transistor Swtich Decoupling PU15 6 1000P_0402_50V7K 2 1 4 PC108 4.7U_1206_25V6K 2 PQ39 SI7840DP_SO8 PR146 0_0603_5% PC107 4.7U_1206_25V6K 2 5 2 PC106 4.7U_1206_25V6K 1 CPU_B+ PC105 0.22U_0805_16V7K_V2 1 2 2 44 44 N8 44 44 PH4 820_0402_5% 2 1 ISEN2ISEN2+ Local Transistor Swtich Decoupling THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Title Compal Electronics, Inc. CPU_CORE (2) Size Date: Document Number Thursday, April 08, 2004 Rev 0.1 Sheet 45 of 47 4 3 2 1 PC113 4.7U_1206_25V6K PC114 4.7U_1206_25V6K 2 PC112 4.7U_1206_25V6K 1 1 5 2 PQ43 SI7840DP_SO8 1 PR150 0_0603_5% 4 PU16 PHASE3 GND LGATE PR152 57.6K_0402_1% ISL6209CB-T_SO8 PQ45 @ IRF7831TR_SO8 IRL7833S_D2PAK 1 5 PQ46 @ IRF7831TR_SO8 4 PR153 39.2K_0402_1% 1 PC116 0.01U_0402_25V7Z 2 1 3 2 1 3 2 1 2 PC128 3300P_0402_50V7K 2 4 PD29 SSM14_SMA 1 2 8 PQ44 2 DELAYPHASE 4 D PL12 0.56UH_ETQP4LR56WFC_21A_20% 1 2 3 7 N9 1 PWM UGATE Panasonic ETQ-P4LR56WFC 3 2 1 2 1 VCC 1 1 1 PR151 499K_0402_1% BOOT 3 5 6 7 8 PC115 1U_0805_16V7K 2 2 44 2 PWM3 5 6 7 8 6 D 1 CPU_B+ PC111 0.22U_0805_16V7K_V2 1 2 +5VS 2 2 5 N10 PH5 820_0402_5% 2 1 ISEN3ISEN3+ CPU_B+ PC119 4.7U_1206_25V6K 2 PC118 4.7U_1206_25V6K 4 GND 5 LGATE ISL6209CB-T_SO8 PQ50 IRL7833S_D2PAK PHASE4 +CPU_CORE PQ48 @ IRF7831TR_SO8 1 8 PQ49 @ IRF7831TR_SO8 4 SSM14_SMA PC129 3300P_0402_50V7K 2 PR157 39.2K_0402_1% 1 PC122 0.01U_0402_25V7Z 2 1 3 2 1 3 2 1 2 4 PD30 1 2 DELAYPHASE Panasonic ETQ-P4LR56WFC PL13 0.56UH_ETQP4LR56WFC_21A_20% 1 2 2 7 N11 3 1 1 PWM UGATE 5 6 7 8 3 3 2 1 2 PR156 4 57.6K_0402_1% 1 1 PC121 1U_0805_16V7K 1 PR155 499K_0402_1% BOOT 5 6 7 8 2 2 44 2 PWM4 VCC C PC120 4.7U_1206_25V6K Local Transistor Swtich Decoupling PU17 6 1 1 1 PQ47 SI7840DP_SO8 1 PR154 0_0603_5% 2 C 5 2 PC117 0.22U_0805_16V7K_V2 1 2 2 44 44 N12 B 44 44 B PH6 820_0402_5% 2 1 ISEN4ISEN4+ A A THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Compal Electronics, Inc. CPU_CORE (2) Size Date: Document Number Thursday, April 08, 2004 Rev 0.1 Sheet 1 46 of 47 REV 0.1 Date Page Description Location 03/10 03/10 P.14,15 Add 16 Cap in on board DDR chip VDD pin ADD C775 ~ C790 P.18 Del L9 & change L8 to bead for EMI DEL L9 Change L8 to Bead 03/15 P.19 Redefine On board DDR strap pin DEL R643, R646 03/15 P.21 Change SB +2.5valw power design DEL R641 ADD Q60,D72 03/15 P.25 Change 5 In 1 connector Change JP9 03/15 P.32 Add Parallel Port detect strap pin ADD R817 03/15 P.27 Change 1394 connector footprint NONE 03/16 P.33 Change EC SMbus2 pull high plwer plan from +5VALW to +3V NONE 03/16 P.36 Add Battery Hibernation circuit ADD U54,Q61 ~ Q64,U53,D75,D74,R822,R823 ~ R827,C791, C794,C792, C793,R820,R821 04/5 P.23 Change ODD Conn. layout 04/5 P.23 Change ODD Conn. layout Title Compal Electronics, Ltd. PIR THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D CustomLA-2301 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Thursday, April 08, 2004 Rev 0.2 Sheet 47 of 47
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