G.Wittwer Hardware

Transcription

G.Wittwer Hardware
WP5:
Hardware and Triggering
Gangnant
Wittwer
Integration (1) and Triggering (2)
plus few words of Coupling (3)…
ACTAR TPC Collaboration Workshop - November 18-20, 2015
Gilles Wittwer
Reminder of DAQ block diagram
-----Very Front End----- ---Front End--- ----Back End--PC
farm
DISK
MUTANT
BEAST
To other DAQ systems
AGET: Asic for GET – 64 analog channels - 512 cells/channel
IRFU
ASAD: ASic and Analog to Digital converter - 4 AGET + 4 ch. ADC CENBG
(FEDD)
COBO: COncentration BOard – 4 ASAD - 1024 digital channels
MUTANT: MUtiplicity, Trigger ANd Time ( 3 trigger levels)
New MTCA.4
(µTCA for Physics)
August 2011
GANIL Laboratory
[ leader & referent for µTCA of
GET (MTCA.0 specifications)
BEAST: Back End Adaptor for Synchronization by Timestamp
ACTAR TPC Collaboration Workshop - November 18-20, 2015
Gilles Wittwer
NSCL/MSU
(VADATECH)
1-Integration:
Full architecture for ACTAR-TPC
64
63
62
61
Back End Front End
Very Front End
LVDS readout signals @ 150Mbit/s
(ADC 12bits-25MHz) + slow control
and monitoring bus over 10 meters
16384 channels !
Aget
Aget
ADC
Aget
ZAP
4
ZAP
3
2
1
Aget
Aget
Aget
ADC
to GTS
Aget
Aget
GbE dual star carrier support
PM
C
MH
GbE dual star carrier support
8 CoBo’s with
1 CoBo for 4 ASADs
8 CoBo’s with
1 CoBo for 4 ASADs
Slave
MUTANT
Power supply
10 GbE MCH uplink
Master
MUTANT
Power supply
BEAST
Master CENTRUM
channels available
PC farm
ACTAR TPC Collaboration Workshop - November 18-20, 2015
Gilles Wittwer
2-Triggering:
Among the main tasks of MUTanT
MUTanT
Distribution of a 100 MHz clock (GMC) to every CoBo of each crate, phase aligned
(skew< 1ns - TDC) [ µTCA-CLK1
Distribution of a synchronous start/stop sampling (phase aligned) (WSCA)[ µTCA-CLK2
Exchanging data in parallel with the CoBo @ 800 Mbit/s (TX/RX) with its own shelf and slave shelves
Building the whole TPC Digital MUltiplicity:
- Master MUTANT + slave MUTANT
- Each MUTANT with the CoBo boards
every 40 ns
and Time stamp:
- 48 bits / 10 ns
- CDT/autonomous mode
- 32 bit event number (CDT)
- local/remote (via BEAST)
3 Trigger levels:
-LØ= External Trigger
-L1 = Multiplicity Trigger
-L2 = Hit Pattern Trigger
ACTAR TPC Collaboration Workshop - November 18-20, 2015
Gilles Wittwer
Trigger modes for level 0 and 1
ext.trig.
L0: external trigger attached to a programmable gate & delay
with reject and inhibit options
inhibit
L0 gate
(delay & width)
sampling
WSCA
sampling
samples readout conversion + readout
Trig. Reject
Trig. OK
L1: Time over multiplicity threshold with:
- 2 sets of Multiplicity Threshold/Number of Buckets
(HighMT/NBhigh and LowMT/NBlow)
- Logical combination of L1lowOK and L1highOK for the final L1 OK:
L1OK = L1lowOK
L1OK = L1highOK
L1OK = L1lowOK or L1highOK
L1OK = L1lowOK and L1highOK
- 2 proton decay mode with 2 successive L1 cycles (
L1A OK for implantation followed or not by a L1B OK for decay
(with Timeout and options like “Half event readout” or “Validation gate”
between implantation and decay)
L0/L1: Coincidence of L1 OK with L0 gate triggered externally
or L1 OK starts L0 gate (with delay and width) waiting
for an external validation.
ACTAR TPC Collaboration Workshop - November 18-20, 2015
Gilles Wittwer
8
7
6
5
4
3
2
1
0
multiplicity
HMT= 6
NBhigh = 3
LMT= 3
NBlow = 6
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Possible L1highOK
Possible L1lowOK
Trigger modes for level 2
L2: “Trigger accept” is obtained as a positive result of an
algorithm applied on the readout Hit Pattern and
processed by the PowerPC processor
ONE ASAD
BOARD
As in other modes, Timestamp and Event Number are
sent directly in case of acceptation
Rule for data transactions:
1 clock_pulse -> 1 Byte:10 ns
Optionally:
Mask Pattern can be sent to AGETs in order to turn on
and digitize interesting channels for the current event or
to switch off irrelevant channels in a way to reduce dead
time
ACTAR TPC Collaboration Workshop - November 18-20, 2015
Gilles Wittwer
Trigger modes for level 2
L2: “Trigger reject” is obtained as a negative result of an
algorithm applied on the readout Hit Pattern and
processed by the PowerPC processor
In this case, no L2 state, Reject command
is sent to the CoBo’s (2 Bytes -> 20 ns)
L2_state
DEAD TIME
ACTAR TPC Collaboration Workshop - November 18-20, 2015
Gilles Wittwer
Less than 300 ns for internal
reset are required before
restarting sampling
Back End Adaptor for Synchronization
by Timestamp (BEAST)
DAQ systems with MUTANT: Ready today for coupling @ GANIL with CENTRUM interface !
But tomorrow with SPIRAL2 instrumentations that will not use
CENTRUM …
Goal:
Be able to synchronize ACTAR-TPC DAQ, S3 Beam Trackers and other systems using
MUTANT (Clock & Time stamp) by an external system (i.e. GTS)
OR using MUTANT as reference if ancillary detectors are added to the GET system
Solution:
Coupling with GTS,…
CENTRUM world
(up to 4 master channels)
Clock I/O
Trigger request/Ck_event
Trigger validations
Logical inspections
GbE Network
ACTAR TPC Collaboration Workshop - November 18-20, 2015
BEAST
Gilles Wittwer
shelf
Back End Adaptor for Synchronization
by Timestamp (BEAST)
OR BEAST in “standalone” as Master CENTRUM when no VXI is used in the experiment
with timestamp only or with timestamp + event number (CDT with trigger_ok to ck_evt)
DESKTOP
µTCA
trigger_ok
T
G
V
BEAST
AMC
ck_evt
Work to do
Ø  Writing BEAST specifications and starting study: early 2016
Ø  Routing PCB, board assembly, first prototype test: ready for early 2017
Ø  Design update, production, tests and documentation: 2017/2018
ACTAR TPC Collaboration Workshop - November 18-20, 2015
Gilles Wittwer
Conclusion
in terms of trigger functionalities
ü  hardware communication between CoBo and MUTANT is validated
- Production CoBo is booting correctly in µTCA shelf (local reset is no longer required)
- Multiplicity frames are received by MUTANT without any problems
- Evt Num and TS frames are received and well decoded by CoBo
ü  Standard L1 trigger is working correctly
ü  L0 combined with L1 or alone works with the reject command
ü  Multiplicity (ADC Raw data) is now converted into a number of hit channels
- 0 to 1024
- without overflows
ü  L1 2p mode with all “Bordeaux” options is OK
- Basic 2p mode is now available
- External validation is taken into account
- Half Event Readout (Implantation) option is working correctly
ü  L2 trigger cycle validated by all the tests performed in GAP lab during the last weeks
- CoBo hit pattern readout through MUTANT FIFOs to L2 trigger OK delivered by PPC program.
- Write back of “MASK” pattern is also an option that has been tested
- All that with EVT NUM + TS broadcast (accepted event) or with L2 reject command
ACTAR TPC Collaboration Workshop - November 18-20, 2015
Gilles Wittwer
Conclusion
in terms of hardware and integration
Ø  µTCA configuration validation: CoBos + MUTANT firmwares are ready to use
Ø  Xilinx 12.4 (XPS) version is required to integrate L2 user algorithm in MUTANT module
Ø  MUTANT mass production:
- First batch during 2015 (12 modules) -> 6 shipped and 6 under final tests at GANIL
- Second and last batch foreseen for mid 2016 ( 3 to 25 modules ?)
Ø  Port of Multi shelves clock alignment C program from Standalone mode to LINUX OS
Ø  Even if detailed technical manuals are available:
https://project-get.cea.fr/Public/100_workgroups/400_wp3/200_mutant/view
Ø  A TRUE “User’s Manual” for MUTANT has to be written
ACTAR TPC Collaboration Workshop - November 18-20, 2015
Gilles Wittwer