Abrasive Process for Reclaiming Semiconductor Wafers

Abrasive Process for Reclaiming Semiconductor Wafers
G. Kremen*~, L. Igelshteyn*, S. Feigyn*, S. McSpadden^, R. Parten^, J. Bai. ^
Semiconductor circuit manufacturers require two qualities of crystalline silicon wafers:
“prime” and “reclaim”. Reclaim wafer may consist of a silicon substrate with
semiconductor components implanted and/or diffused into one wafer surface. Reclaiming
then involves removing the layers and portions of the underlying wafer.
Chemical stripping one of the most common techniques used in reclaiming
semiconductor wafers. The process has serious disadvantages such as
environmental hazards and chemical exposure to the population. It is
unsuitable for removing surface layers from large diameter wafers (6 inches
and more). A mixture of nitric acid (NHO3) and hydrofluoric acid (HF) is one
of the etching compositions used for the reclamation of silicon wafers.
As device manufacturers begin the characterization of their 300-mm processes, almost
every department in the fab will use reclaim. In the thin film department, high quality
reclaim wafers will be used for LTO, PSG oxide, nitride, poly, and metals monitoring.
Additionally, wafers to check spin 071 layers may be reclaim material. During furnace
operations, reclaim will be used to check oxide thickness and diffusion depths, as well as
sodium levels in CMOS applications.
The aim for reclaim wafering is to omit chemical striping and remove as little silicon as
possible while producing as little subsurface damage (SSD) as possible. The amount of
SSD directly corresponds to the time and amount of stock removal of silicon on a CMP
operation. CMP is the most expensive process of all the operations in wafer
manufacturing. The less silicon removed the more times a customer can reclaim the same
wafer and re-use it.
The Magnetic Abrasive Process (MAP) is a relatively new technique to remove material
from the surfaces of a workpeice by subjecting it to a magnetic abrasive powder in a
magnetic field. In this paper we measure and compare the surface roughness, crystal
damage and the depth of this damage within prime and reclaim silicon wafers machined
using MAP and traditional technologies.
The set up for machining of silicon wafers is taken from US patent number 6,146,245 of
Scientific Manufacturing Technologies Inc. (SMT Inc.).
Table 1 shows sample types as well as the parameters that were measured.
* Scientific Manufacturing Technology Inc. (SMT Inc.)
^ Oak Ridge National Laboratory (ORNL)
~ To whom correspondence should be addressed tel: 718-272-4070,
Fax: 718-272-4072, email: SciMT@aol.com
1
In order to more precisely describe roughness, the following parameters were calculated:
Rp – maximum height of the profile above the mean line within the assessment length, Rv
– maximum depth of the profile below the mean line with the assessment length, and Rt –
maximum peak-to-valley height of the profile in the assessment lengths. ). In order to
assess the quality of the crystal, the x-ray rocking curve measurements were performed
using synchrotron radiation with a wavelength of 0.155nm. The SSD was characterized
via cross-sectional Transmission Electron Microscopy.
Observing parameter Rt, it can be seen that maximum peak-to-valley height (6.01µm)
occurs after etching, and minimum height (0.09µm) occurs on a prime polished wafer;
and the second-lowest height (0.19µm) occurs on a polished wafer with film before
reclaiming. A reclaim wafer after MAP has a peak-to-valley height of 0.45µm, which is
five times smaller that that of a prime wafer after lapping alone (2.25µm). The C-CMAP
machining route compares favorably to the C-CL-CLE in terms of surface roughness. It is
important to mention that final surface roughness after MAP is 0.45 µm as compared to
0.09 µm and 0.19 µm for CMP and FFO, respectively.
The appearance of the surface of wafers after the C-FMAP route is mirror-like with
multiple scratches (like grinding marks). These scratches are believed by some to indicate
the presence of a large amount of SSD, a low crystal quality or micro cracks. The x-ray
data refute this belief.
Table 2 lists the Full Width at Half Maximum (FWHM) values obtained from
the rocking curves at Si (111) reflection from the Si wafers processed at
different conditions. The data taken from a near perfect Si crystal are used as
standard in order to obtain the instrumental resolution. The FWHM
provides a measure of the mosaicness of the sample, which would correspond
to SSD. The CMAP3 machining route is only slightly more damaged than the
CLEP machining route.
As shown from Table 2 above, the three wafers processed with MAP (CMAP1, CMAP2
and CMAP3) has narrower FWHM than those processed using traditional processes CL
and CLE. In fact, the best result from the MAP processed wafers, 15.34 arcsec in
FWHM, is even close to that of the wafer processed with the three traditional processes
(lapping, etching, and CMP), which is 12.60 arcsec in FWHM. If we use MAP then we
can eliminate lapping and etching. CMP after MAP is only used to decrease surface
roughness.
The bright field TEM images allow convincing depth measurement of SSD. Figure 1
shows defects such as dislocation at the surface of the wafer penetrating to 0.5 micron. A
typical lapped wafer has SSD depth of about 10-15 microns. The Kobe-process-induced
SSD is less then 8 microns.
SMT Inc. process allows the removal of films from silicon wafers without environmental
or chemical hazards. In order to remove 2-5 µm of films from reclaim wafers, today’s
traditional technologies remove 25-50 µm of silicon, which removes a 10-30 µm deep
2
layer of SSD. In contrast, the MAP removes 2-5 µm of films and 1-1.5 µm of silicon
wafer, which removes a 0.5 µm deep layer of SSD.
TABLE 1. TYPES OF WAFERS
Samples
Characteriz
ations
Surface
Roughness
Crystal
Damage
Subsurface
Damage
As
Cut
As
As
As
Cut Cut, Cut, As Cut
&
Lappe Lappe Lappe
d
d
d
& MAP
&
& Etche
Etched d,
Polish
ed
(CLE
( C ) (CL) (CLE) P) (CMAP)
Photoresistor
Oxide film
Film
Not
& MAP
Removed
(FMAP)
(FFO)
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
no
no
no
no
no
no
yes
no
Table 2. FWHM of the rocking curves
Sample
FWHM (arc sec)
C
CL
CLE
CLEP
CMAP1
CMAP2
CMAP3
FMAP
Silicon
Standard
127.15
69.80
165.31
12.60
24.01
41.80
15.34
N/A
10.98
Figure 1
3
Acknowledgements
This research was performed in part at the High Temperature Materials Laboratory, Oak
Ridge National Laboratory and Oak Ridge National Laboratory’s beamline X-14A at the
National Synchrotron Light Source, Brookhaven National Laboratory. Research
sponsored by the Assistant Secretary for Energy Efficiency and Renewable Energy,
Office of Transportation Technologies, as part of the High Temperature Materials
Laboratory User Program, Oak Ridge National Laboratory, managed by UT-Battelle,
LLC, for the U.S. Dept. of Energy under contract No. DE-AC05-00OR22725.
References
1. U.S. Patent number: 5,855,735 Date of Patent: January 5, 1999 “Process for Recovering
Substrate”. Takada et al.
2. “Method and Device for Machining Flat Parts” U.S. Patent, Patent Number: 6,146,245
Date of Patent: November 14, 2000. Kremen, G., Igelshteyn, L., Feigyn, S.
3. Kremen, G.Z., Feigyn, S., Igelshteyn, L., Elsayed, E.A., “Material removal Rate and of the
Surface Roughness of the Magnetic-Abrasive process”, 3rd International Machining and
Grinding Conference on October 4-7, 1999 in Cincinnati, Ohio.
4. "Magneto-Abrasive powder and method of producing the same," U.S. Patent, Patent
Number: 5,846,270 Date of Patent: December 8, 1998. Feigyn, S., Kremen, G.Z.,
Igelshteyn, L.
5. H.K. Tonshoff, W.v.Schmeiden, I.Inasaki, W.Konnig, G.Spur “Abrasive Machining of
Silicon”. Annals o f the CIRP Vol. 39/2/1990
6. TEM Analysis for Scientific Manufacturing Technologies Inc. JOB #01090103026 (ref #:
01150).
7. Cutler, R. “The President’s Corner”,www.exsil.com. January 2001
4