The Mont-Blanc project

http://www.montblanc-project.eu
The Mont-Blanc approach
towards Exascale
Alex Ramirez
Barcelona Supercomputing Center
Disclaimer: Not only I speak for myself ... All references to unavailable products are speculative, taken from web sources.
There is no commitment from ARM, Samsung, Intel, Nvidia, or others, implied.
This project and the research leading to these results has received funding from the European Community's Seventh Framework Programme [FP7/2007-2013] under grant agreement n° 288777.
Outline
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A bit of history
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Supercomputers from mobile components
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Vector supercomputers
Commodity supercomputers
The next step in the commodity chain
Homogeneous architecture
Compute accelerators
Rely on OmpSs to handle the challenges
BSC prototype roadmap
Mont-Blanc project goals
HPC Advisory Council, Malaga
September 13, 2012
In the beginning ... there were only supercomputers
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Built to order
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Very few of them
Special purpose hardware
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Very expensive
Control Data, Convex, ...
Cray-1
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1975, 160 MFLOPS
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80 units, 5-8 M$
Cray X-MP
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1982, 800 MFLOPS
Cray-2
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1985, 1.9 GFLOPS
Cray Y-MP
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1988, 2.6 GFLOPS
Fortran+vectorizing compilers
HPC Advisory Council, Malaga
September 13, 2012
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The Killer Microprocessors
10.000
MFLOPS
Cray-1, Cray-C90
NEC SX4, SX5
1000
Alpha AV4, EV5
Intel Pentium
100
IBM P2SC
HP PA8200
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1974
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1989
1994
1999
They were not faster ...
... but they were significantly cheaper and greener
Need 10 microprocessors to achieve the performance of 1 Vector
CPU
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4
1984
Microprocessors killed the Vector supercomputers
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1979
SIMD vs. MIMD programming paradigms
HPC Advisory Council, Malaga
September 13, 2012
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Then, commodity took over special purpose
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ASCI Red, Sandia
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1997, 1 Tflops (Linpack),
9298 cores @ 200 Mhz
1.2 Tbytes
Intel Pentium Pro
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Upgraded to Pentium II Xeon,
1999, 3.1 Tflops
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ASCI White, LLNL
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2001, 7.3 TFLOPS
8192 proc. @ 375 Mhz,
6 Tbytes
(3+3) Mwats
IBM Power 3
Message-Passing Programming Models
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HPC Advisory Council, Malaga
September 13, 2012
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Finally, commodity hardware + commodity software
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MareNostrum
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Nov 2004, #4 Top500
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IBM PowerPC 970 FX
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20 Tflops, Linpack
Blade enclosure
Myrinet + 1 GbE network
SuSe Linux
HPC Advisory Council, Malaga
September 13, 2012
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The next step in the commodity chain
HPC
Servers
Desktop
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Mobile
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HPC Advisory Council, Malaga
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Total cores in Jun'12 Top500
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13.5 Mcores
Tablets sold in Q4 2011
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27 Mtablets
Smartphones sold Q4 2011
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> 100 Mphones
September 13, 2012
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ARM Processor improvements in DP FLOPS
IBM Intel
BG/Q AVX
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DP ops/cycle
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ARMv8
Intel
SSE2
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2
ARM
CortexTM-A9
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1999
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2003
2005
2007
2009
2011
2013
2015
8 DP ops / cycle
ARM quickly moved from optional floating-point to state-of-the-art
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2001
IBM BG/Q and Intel AVX implement DP in 256-bit SIMD
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ARM
CortexTM-A15
IBM
BG/P
ARMv8 ISA introduces DP in the NEON instruction set (128-bit SIMD)
HPC Advisory Council, Malaga
September 13, 2012
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ARM processor efficiency vs. IBM / Intel / Nvidia
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Cortex-A15 @ 2 GHz*
32 GFLOPS (4-core)
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6
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GFLOPS / W
Cortex-A9 @ 1 GHz
2 GFLOPS (2-core)
IBM-Chip
Intel-Chip
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BG/Q @ 1.6 GHz
205 GFLOPS
(16-core)
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NVIDIA-Card
ARM-chip
ARM11 @ 482 MHz
0.5 GFLOPS
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1
0
2007-nov
2008-jun
2008-nov
2009-jun
2009-nov
2010-jun
2010-nov
2011-jun
2011-nov
2012-jun
2012-nov
* Based on ARM Cortex-A9 @ 2GHz power consumption on 45nm, not an ARM comitment
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HPC Advisory Council, Malaga
September 13, 2012
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Are the “Killer Mobiles™" coming?
Cost (log10)
Server ($1500)
Desktop ($150)
HPC-Mobile ($40) ?
Nowadays
Mobile ($20)
Near future
Performance (log2)
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Where is the sweet spot? Maybe in the low-end ...
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The same reason why microprocessors killed supercomputers
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Today ~ 1:8 ratio in performance, 1:100 ratio in cost
Tomorrow ~ 1:2 ratio in performance, still 1:100 in cost ?
Not so much performance ... but much lower cost, and power
HPC Advisory Council, Malaga
September 13, 2012
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Killer mobile™ example: Samsung Exynos 5450 *
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4-core ARM Cortex-A15 @ 2 GHz
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32 GFLOPS
8-core ARM Mali T685
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168 GFLOPS*
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Dual channel DDR3 memory controller
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All in a low-power mobile socket
* Data from web sources, not an ARM or Samsung commitment
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HPC Advisory Council, Malaga
September 13, 2012
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Are we building BlueGene again?
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Yes ...
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Exploit Pollack's Rule in
presence of abundant
parallelism
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... and No
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Many small cores vs. Single
fast core
Heterogeneous computing
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On-chip GPU
Commodity vs. Special
purpose
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Higher volume
Many vendors
Lower cost
Lots of room for improvement
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No SIMD / vectors yet ...
Build on Europe's embedded
strengths
HPC Advisory Council, Malaga
September 13, 2012
Can we achieve competitive performance?
64 GB/s
10-40 Gb/s
1 Gb/s
56 Gb/s
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2-socket Intel Sandy Bridge
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370 GFLOPS
1 address space
44 MB on-chip memory
136 GB/s
64 GB/s intra-node (2 x QPI)
HPC Advisory Council, Malaga
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8-socket ARM Cortex A-15
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256 GFLOPS
8 address spaces
16 MB on-chip memory
102 GB/s
1 Gb/s intra-node (1 GbE)
September 13, 2012
Can we achieve competitive performance?
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Sandy Bridge + Nvidia K20
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1685 GFLOPS
2 address spaces
32 GB/s between CPU-GPU
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8-socket Exynos 5450
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16x PCIe 3.0
68 + 192 GB/s
HPC Advisory Council, Malaga
1600 GFLOPS
16 address spaces
12.8 GB/s between CPU-GPU
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Shared memory
102 GB/s
September 13, 2012
Then, what is so good about it?
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Sandy Bridge + Nvidia K20
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> $3000
> 400 Watt
HPC Advisory Council, Malaga
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8-socket Exynos 5450
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< $200
< 100 Watt
September 13, 2012
There is no free lunch
2X more cores for
the same
performance
½ on-chip memory /
core
8X more address
spaces
1 GbE inter-chip
communication
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HPC Advisory Council, Malaga
September 13, 2012
OmpSs runtime layer manages architecture complexity
P0
P1
P2
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Programmer exposed a simple
architecture
Task graph provides
lookahead
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Automatically handle all of the
architecture challenges
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No overlap
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Overlap
HPC Advisory Council, Malaga
Exploit knowledge about the
future
Strong scalability
Multiple address spaces
Low cache size
Low interconnect bandwidth
Enjoy the positive aspects
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Energy efficiency
Low cost
September 13, 2012
A big challenge, and a huge opportunity for Europe
Built with the best
that is coming
GFLOPS / W
Built with the best
of the market
2011
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2012
2013
2014
2015
2016
Prototypes are critical to accelerate software development
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What is the best
that we could do?
256 nodes
250 GFLOPS
1.7 Kwatt
System software stack + applications
HPC Advisory Council, Malaga
September 13, 2012
2017
Very high expectations ...
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High media impact of ARM-based HPC
Scientific, HPC, general press quote MontBlanc objectives
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Highlighted by Eric Schmidt, Google Executive
Chairman, at the EC's Innovation Convention
HPC Advisory Council, Malaga
September 13, 2012
The hype curve
Peak of Inflated Expectations
Visibility
Plateau of Productivity
Slope of Enlightenment
Trough of Disillusionment
Technology Trigger
Time
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We'll see how deep it gets on the way down ...
HPC Advisory Council, Malaga
September 13, 2012
Project goals
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To develop an European Exascale approach
Based on embedded power-efficient technology
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Objetives
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Develop a first prototype system, limited by available technology
Design a Next Generation system, to overcome the limitations
Develop a set of Exascale applications targeting the new system
HPC Advisory Council, Malaga
September 13, 2012