Outline - Enrico Rubiola
Transcription
Outline - Enrico Rubiola
In memoriam of Jacques Groslambert The sampling theorem in Π and Λ digital dividers Claudio E. Calosso∇ and Enrico Rubiola ∇ INRIM, Torino, Italy CNRS FEMTO-ST Institute, Besancon, France Outline • Theoretical introduction • Π and Λ digital dividers • Experiments home page http://rubiola.org Motivations • Seminal article by W. F. Egan (1990) • Milestone in the domain, never forget it • However, TTL and ECL logic families are now obsolete • Microwave (photonics) –> highest spectral purity •Transfer the spectral purity to HF/VHF • Dividers are more comfortable than multipliers • NIST now uses analog dividers •Nowadays digital electronics is fantastic • CPLD & FPGA –> Easy to duplicate • High number of gates for cheap • High toggling frequency (1.5 GHz) W. F. Egan Egan WF, Modeling phase noise in frequency dividers, IEEE T UFFC 37(4), July 1990 E. Rubiola & al, Phase noise in the regenerative frequency dividers, IEEE T IM 41(3), June 1992 A. Hati & al, Ultra-low-noise regenerative frequency divider…, Proc IEEE IFCS, May 2012 2 3 The gearwork model jitter xo = xi phase 'i 1 D 'i ⌫o ⌫i • Keeps the input jitter x(t) (phase-time fluctuation) • Scales down • φ by 1/D • Sφ by 1/D2 N D teeth 𝞅 N teeth 1 ⌫i D S (f ) ⌫o = • The noise-free divider actual (output stage) 1/D2 • Sφ of the output stage adds up and often dominates input 1/D2 • In the real divider [rad] [rad2/Hz] gearbox 1/D2 phase 'o = W. F. Egan Egan WF, Modeling phase noise in frequency dividers, IEEE T UFFC 37(4), July 1990 f Sampling and aliasing — Energy conservation applies to the unfiltered signal — SxII(ƒ) Input signal (unfiltered wide-band noise) ƒ ƒ • With white noise, the PSD increases by B/ƒN (Bandwidth / Nyquist ƒ) etc. s 3fs ia ia 2fs al as s al alia ali fs s fs s 2fs alia 3fs main etc. • Multiple aliases overlap to the main part of the spectrum ali as Reconstructed signal (aliased) fN = 1 fs 2 Nyquist frequency Downsampling increases the (PM) noise spectrum Low ƒN N= 2 /fN ƒ fN N= SxI(ƒ) SxI(ƒ) High ƒN 2 /fN ƒ fN 4 Aliasing and 1/ƒ noise SxII(ƒ) Proportionally lower power in the higher-ƒ aliases Input signal (unfiltered wide-band 1/f noise) etc. etc. 2fs fs fs main 3fs 3fs ƒ alias al alias alia s alias 2fs ali s as ia Reconstructed signal (little aliasing effect) Small effect on the overall noise spectrum ƒ fN 1 = fs 2 Nyquist frequency 5 6 PM-noise aliasing in the input stage saturated in out t analog gain Convert the input sinusoid into a square wave, as appropriate t equivalent sampling function • Edge-sampling at 2νi inherent in the sin-to-square conversion • Full-bandwidth (B) noise is taken in • The phase-noise Nyquist frequency is νi • The sampling process increases the noise by B/νi Eventually, clipping removes the AM noise [Pfaff 1974] 7 Aliasing in Π divider Regular synchronous divider The Greek letter Π recalls the square wave ΠΠΠΠ input sampling frequency 2⌫i t input jitter is discarded ÷ 10 jitter is transmitted jitter is discarded jitter is transmitted jitter is discarded jitter is transmitted jitter is transmitted out t • Raw decimation without low-pass filter • Aliasing increases Sφ by D • Overall, Sφ scales down by 1/D input aliasing Π divider 1/D 2 • The divider takes 1 edge out of D White S𝞅(f ) = b0 • The gearbox scales Sφ down by squarewave sin clock 1/D2 1/D 1 output sampling frequency ⌫o = 2 D ⌫i Λ divider 8 The Λ divider – Little/no aliasing New divider architecture Series of Greek letters ΛΛΛΛΛ recalls the triangular wave ÷ 10 D • Gearbox and aliasing –> 1/D law shift register in out • Add D independent realizations shifted by 1/2 input clock, • reduce the phase noise by 1/D, • … and get back the 1/D2 law squarewave sin clock output White S𝞅(f ) = b0 input input aliasing Π divider 1/D shift register 1/D D 2 ÷ 10 Λ divider The names Π and Λ derive from the shape of the weight functions in our article on frequency counters E. Rubiola, On the measurement of frequency … with high-resolution counters, RSI 76 054703, 2005 Experimental method 9 Large input PM noise is used to emphasize the effect of aliasing • Intentionally high PM noise at the input • The scaled-down input noise is higher than the output-stage noise • Large attenuation/ampli –> noise input 𝞅 S (f ) ! 1/D2 • Digital instruments for phase-noise measurement can handle 1/D2 ƒinput ≠ ƒreference gearbox output stage f • Correlation reduces the background 10 Dividers under test EPM3064A CPLD (Altera MAX 3000 Series, 64 macro-cells, speed grade 7 ns) in ÷ 10 out Π divider – the one everybody knows – Multi-buffer Π divider Λ divider ÷ 10 ÷ 10 in D shift register in D-type register out out ÷ 10 The outputs are arguably independent Try to reduce the output-stage noise D shift register White noise: The clock edges are independent Correct for aliasing Results – Test on aliasing Λ and dividers (multi-buf Π config) 0.5 –20 dB dB dis cre pa nc y internal clock sin input +4 dB Π divider –9.3 dB output (theory –10) Λ divider output • Flicker region • Negligible aliasing • 1/D2 law (–20 dB) –18.7 dB (theory –20) • White region • Aliasing in the front-end –> +4 dB • 1/D law and 1/D2 law 11 Phase noise of real dividers Multibuffer Π divider ÷ 10 in b –1 D-type register =– out b –1 12 0d B =– 13 –1 16 –1 0.5 ar 28 .5 .5 dB dB dB tif ac ts? nt cie ? uffi ing ins erag av multiple outputs are expected to reduce the output-stage noise – not happened, why? – Λ and Π dividers (multibuffer Π config) b–1 ≈ –156 dB b0 ≈ –165 dB experimental problems still present • Flicker region –> Negligible aliasing • The multibuffer Π divider is still not well explained • The Λ divider exhibits low 1/ƒ and low white noise 12 Allan deviation of real dividers • Slope 1/τ, typical of white and flicker PM noise • The Λ divider performs 2×10–14 at τ = 1 s, 10 MHz output 13 The bottom line 14 • Aliasing in traditional dividers • Increases white noise • Has little effect on flicker • Flicker in multi-buffer Π divider not understood yet • The new Λ divider • Is little/no affected by aliasing • Exhibits the lowest PM noise flicker: b–1 ≈ –130 dB white: b0 ≈ –165 dB • Features 2×10–14 at τ = 1 s, 10 MHz output home page http://rubiola.org Thanks – J. Groslambert, V. Giordano, M. Siccardi, J.-M. Friedt Grants from ANR (Oscillator IMP and First-TF network), and Region Franche Comte