Troubleshooting TLM2 0 Models in TLM2.0 Models in Innovator

Transcription

Troubleshooting
TLM2 0 Models in
TLM2.0
Innovator
Dr. Andrea Kroll,
VP Marketing JEDA Technologies
22nd Synopsys EDA Interoperability Forum
November 5th 2009
S ft
Software
Adapter
Ad t and
d Model
M d l Interoperability
I t
bilit
Adapter
Adapter
Adapteryour
From
Internal
ESL group
and/or
autogenerated
from
3rd party
tool
→
Adapter
Adapter
From
Wireless experts
in you
your co
company
pa y
From
security experts
in your company
Adappter
Adapter
Adapter
debug
From IP provider with
wrapper
f
from
ESL tools
l
vendor
Adapter
Addapter
From
IP vendor
or in-house
solution
l ti
Adapter
From your
Internal
ESL group
and/or
ESL vendor
tlm5-to-tlm12
Adapter
tl 5 t tl 12
tlm5-to-tlm12
Adapter
TLM2.0 for Model Interoperability
Troubleshooting TLM2.0 Models in Innovator - © 2009 JEDA Technologies, Inc
Wh t is
What
i TLM2.0?
TLM2 0?

Set of API calls
►
Blocking and non-blocking transport calls
►
Debug interface
►
Direct memory access interface for fast simulation speed-up
Set of Modeling Styles
►
AT : 4+ phase data transport to simulate pipelined and
out-of-order/split transactions communication accurately
►
LT : 2 phase data transport to simulate simple
communication and higher abstraction at high speed

Set of Rules
►
Define the expected behavior and semantic
►
Ensure save communication to avoid data loss,, data duplication
p
or misrouted
d transactions
JEDA TLM2.0
TLM2 0 Interoperability
I t
bilit Checking
Ch ki

>50 rules in TLM2.0 Interoperability
p
y
Standard impose restrictions

Checks for
► Correct
Phase Transitions
► Save
Access to Generic Payload
► Save
Memory Management
► Correct
Timing
► Correct
Transaction Path and Routing
Troubleshooting
TLM2.0
Models
in Quality™
Innovator- -©©2009
2009JEDA
JEDATechnologies,
Technologies,Inc
Inc
Achieve Confidence
in ESL
Model
I
Innovator
t Vi
Virtual
t l Pl
Platform
tf
Example
E
l
RAM
ARM
MemDecoder
AHB
DMAC
MemDecoder
(L2)
FILE IO
APB I2C
APB
UART
I t Ctrl
Int
Ct l
...
I
Innovator
t Vi
Virtual
t l Pl
Platform
tf
Example
E
l
RAM
ARM
MemDecoder
AHB
DMAC
MemDecoder
(L2)
FILE IO
APB I2C
APB
UART
I t Ctrl
Int
Ct l
...
Fi di
Finding
IInteroperability
t
bilit P
Problems
bl
Transaction Trace
Message
Sequence
Charts (MSC)
Fi di
Finding
IInteroperability
t
bilit P
Problems
bl
I
Innovator
t Vi
Virtual
t l Pl
Platform
tf
Example
E
l
JEDA
TLM2.0
Checker0
Checker1
RAM
ARM7TDMI
MultiHop
Checker
JEDA
TLM2.0
Checker1
MemDecoder
AHB
DMAC
MemDecoder
(L2)
FILE IO
JEDA
TLM2.0
Checker2
APB I2C
APB
UART
Int Ctrl
...
Error Report Troubleshooting TLM2.0 Models in Innovator - © 2009 JEDA Technologies, Inc
I
Innovator
t Vi
Virtual
t l Pl
Platform
tf
Example
E
l
JEDA
TLM2.0
Checker0
Checker1
RAM
ARM7TDMI
MultiHop
Checker
JEDA
TLM2.0
Checker1
MemDecoder
AHB
DMAC
MemDecoder
(L2)
FILE IO
JEDA
TLM2.0
Checker2
APB I2C
APB
UART
Int Ctrl
...
Error Report Troubleshooting TLM2.0 Models in Innovator - © 2009 JEDA Technologies, Inc
G
Generate
t R
Reports
t
Detailed Error
report
Summary
Report
Troubleshooting
TLM2.0
Models
in Quality™
2009JEDA
JEDATechnologies,
Technologies,Inc
Inc
Achieve Confidence
in ESL
Model
TLM2 0 Checker
TLM2.0
Ch k Add
Added
dV
Value
l

Find interoperability
p
y violations instantly
y

Avoid weeks of debugging
gg g

Avoid long backtracking

Increase learning curve for TLM2.0 standard

Use “Triangle
a g e of
o truth”
t ut o
on TLM2.0
0 standard
sta da d
Troubleshooting
TLM2.0
Models
in Quality™
2009JEDA
JEDATechnologies,
Technologies,Inc
Inc
Achieve Confidence
in ESL
Model
JEDA Model
JEDAM d lV
Validation
lid ti
S
Solution
l ti
JEDA Validation
Tools Suite
JEDA OCP
Validation Suite
ITG
ITG:
Traffic Generation
Traffic Generation
Traffic Generation
AMBAchecker
sequence generator, traffic templates
OCPchecker:
Selfchecking
AMBA
Validation Suite
AMBA-ITG:
TLM2.0-ITG:
OCP-ITG:
Generation
JEDA TLM 2.0
Validation Suite
NSCa:
NSC
Native SystemC Assertion
across TLM multiple levels
Compliance Checks
TLM2checker:
Compliance Checks
Amba
Coverage
Transaction
T
ti
Coverage
OCPcov:
TLM2 Coverage
Transaction
Coverage
Rule Coverage
JEDADC:
Measurement
Data/Functional Coverage
JEDACC:
Model
Validation IP
Hardware aware C-Code Coverage
U
Users
off JEDA Tools
T l

System Architects
►
Use protocol compliance checkers for TLM2.0, AXI or
OCP to reduce debugging time
►
Use Traffic
U
T ffi Profile
P fil Generators
G
t
(ITG) to
t iimprove
interconnect and memory architecture analysis
Embedded SW Developers
p
►
Measure C-Code coverage for smaller code footprint
►
Use coverage for SW testing to improve code quality
High Level Synthesis User
►
Use coverage metric on high level model to reduce
verification
ifi ti
effort
ff t